2 * linux/drivers/mmc/host/at91_mci.c - ATMEL AT91 MCI Driver
4 * Copyright (C) 2005 Cougar Creek Computing Devices Ltd, All Rights Reserved
6 * Copyright (C) 2006 Malcolm Noyes
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
14 This is the AT91 MCI driver that has been tested with both MMC cards
15 and SD-cards. Boards that support write protect are now supported.
16 The CCAT91SBC001 board does not support SD cards.
18 The three entry points are at91_mci_request, at91_mci_set_ios
22 This configures the device to put it into the correct mode and clock speed
26 MCI request processes the commands sent in the mmc_request structure. This
27 can consist of a processing command and a stop command in the case of
28 multiple block transfers.
30 There are three main types of request, commands, reads and writes.
32 Commands are straight forward. The command is submitted to the controller and
33 the request function returns. When the controller generates an interrupt to indicate
34 the command is finished, the response to the command are read and the mmc_request_done
35 function called to end the request.
37 Reads and writes work in a similar manner to normal commands but involve the PDC (DMA)
38 controller to manage the transfers.
40 A read is done from the controller directly to the scatterlist passed in from the request.
41 Due to a bug in the AT91RM9200 controller, when a read is completed, all the words are byte
42 swapped in the scatterlist buffers. AT91SAM926x are not affected by this bug.
44 The sequence of read interrupts is: ENDRX, RXBUFF, CMDRDY
46 A write is slightly different in that the bytes to write are read from the scatterlist
47 into a dma memory buffer (this is in case the source buffer should be read only). The
48 entire write buffer is then done from this single dma memory buffer.
50 The sequence of write interrupts is: ENDTX, TXBUFE, NOTBUSY, CMDRDY
53 Gets the status of the write protect pin, if available.
56 #include <linux/module.h>
57 #include <linux/moduleparam.h>
58 #include <linux/init.h>
59 #include <linux/ioport.h>
60 #include <linux/platform_device.h>
61 #include <linux/interrupt.h>
62 #include <linux/blkdev.h>
63 #include <linux/delay.h>
64 #include <linux/err.h>
65 #include <linux/dma-mapping.h>
66 #include <linux/clk.h>
67 #include <linux/atmel_pdc.h>
69 #include <linux/mmc/host.h>
75 #include <asm/mach/mmc.h>
76 #include <asm/arch/board.h>
77 #include <asm/arch/cpu.h>
78 #include <asm/arch/at91_mci.h>
80 #define DRIVER_NAME "at91_mci"
82 #define FL_SENT_COMMAND (1 << 0)
83 #define FL_SENT_STOP (1 << 1)
85 #define AT91_MCI_ERRORS (AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE \
86 | AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE \
87 | AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)
89 #define at91_mci_read(host, reg) __raw_readl((host)->baseaddr + (reg))
90 #define at91_mci_write(host, reg, val) __raw_writel((val), (host)->baseaddr + (reg))
94 * Low level type for this driver
99 struct mmc_command *cmd;
100 struct mmc_request *request;
102 void __iomem *baseaddr;
105 struct at91_mmc_data *board;
111 * Flag indicating when the command has been sent. This is used to
112 * work out whether or not to send the stop
115 /* flag for current bus settings */
118 /* DMA buffer used for transmitting */
119 unsigned int* buffer;
120 dma_addr_t physical_address;
121 unsigned int total_length;
123 /* Latest in the scatterlist that has been enabled for transfer, but not freed */
126 /* Latest in the scatterlist that has been enabled for transfer */
131 * Copy from sg to a dma block - used for transfers
133 static inline void at91_mci_sg_to_dma(struct at91mci_host *host, struct mmc_data *data)
135 unsigned int len, i, size;
136 unsigned *dmabuf = host->buffer;
138 size = host->total_length;
142 * Just loop through all entries. Size might not
143 * be the entire list though so make sure that
144 * we do not transfer too much.
146 for (i = 0; i < len; i++) {
147 struct scatterlist *sg;
149 unsigned int *sgbuffer;
153 sgbuffer = kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
154 amount = min(size, sg->length);
157 if (cpu_is_at91rm9200()) { /* AT91RM9200 errata */
160 for (index = 0; index < (amount / 4); index++)
161 *dmabuf++ = swab32(sgbuffer[index]);
164 memcpy(dmabuf, sgbuffer, amount);
166 kunmap_atomic(sgbuffer, KM_BIO_SRC_IRQ);
173 * Check that we didn't get a request to transfer
174 * more data than can fit into the SG list.
182 static void at91_mci_pre_dma_read(struct at91mci_host *host)
185 struct scatterlist *sg;
186 struct mmc_command *cmd;
187 struct mmc_data *data;
189 pr_debug("pre dma read\n");
193 pr_debug("no command\n");
199 pr_debug("no data\n");
203 for (i = 0; i < 2; i++) {
204 /* nothing left to transfer */
205 if (host->transfer_index >= data->sg_len) {
206 pr_debug("Nothing left to transfer (index = %d)\n", host->transfer_index);
210 /* Check to see if this needs filling */
212 if (at91_mci_read(host, ATMEL_PDC_RCR) != 0) {
213 pr_debug("Transfer active in current\n");
218 if (at91_mci_read(host, ATMEL_PDC_RNCR) != 0) {
219 pr_debug("Transfer active in next\n");
224 /* Setup the next transfer */
225 pr_debug("Using transfer index %d\n", host->transfer_index);
227 sg = &data->sg[host->transfer_index++];
228 pr_debug("sg = %p\n", sg);
230 sg->dma_address = dma_map_page(NULL, sg_page(sg), sg->offset, sg->length, DMA_FROM_DEVICE);
232 pr_debug("dma address = %08X, length = %d\n", sg->dma_address, sg->length);
235 at91_mci_write(host, ATMEL_PDC_RPR, sg->dma_address);
236 at91_mci_write(host, ATMEL_PDC_RCR, sg->length / 4);
239 at91_mci_write(host, ATMEL_PDC_RNPR, sg->dma_address);
240 at91_mci_write(host, ATMEL_PDC_RNCR, sg->length / 4);
244 pr_debug("pre dma read done\n");
248 * Handle after a dma read
250 static void at91_mci_post_dma_read(struct at91mci_host *host)
252 struct mmc_command *cmd;
253 struct mmc_data *data;
255 pr_debug("post dma read\n");
259 pr_debug("no command\n");
265 pr_debug("no data\n");
269 while (host->in_use_index < host->transfer_index) {
270 struct scatterlist *sg;
272 pr_debug("finishing index %d\n", host->in_use_index);
274 sg = &data->sg[host->in_use_index++];
276 pr_debug("Unmapping page %08X\n", sg->dma_address);
278 dma_unmap_page(NULL, sg->dma_address, sg->length, DMA_FROM_DEVICE);
280 data->bytes_xfered += sg->length;
282 if (cpu_is_at91rm9200()) { /* AT91RM9200 errata */
283 unsigned int *buffer;
286 /* Swap the contents of the buffer */
287 buffer = kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
288 pr_debug("buffer = %p, length = %d\n", buffer, sg->length);
290 for (index = 0; index < (sg->length / 4); index++)
291 buffer[index] = swab32(buffer[index]);
293 kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
296 flush_dcache_page(sg_page(sg));
299 /* Is there another transfer to trigger? */
300 if (host->transfer_index < data->sg_len)
301 at91_mci_pre_dma_read(host);
303 at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_ENDRX);
304 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_RXBUFF);
307 pr_debug("post dma read done\n");
311 * Handle transmitted data
313 static void at91_mci_handle_transmitted(struct at91mci_host *host)
315 struct mmc_command *cmd;
316 struct mmc_data *data;
318 pr_debug("Handling the transmit\n");
320 /* Disable the transfer */
321 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
323 /* Now wait for cmd ready */
324 at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_TXBUFE);
332 if (cmd->data->blocks > 1) {
333 pr_debug("multiple write : wait for BLKE...\n");
334 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_BLKE);
336 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
338 data->bytes_xfered = host->total_length;
341 /*Handle after command sent ready*/
342 static int at91_mci_handle_cmdrdy(struct at91mci_host *host)
346 else if (!host->cmd->data) {
347 if (host->flags & FL_SENT_STOP) {
348 /*After multi block write, we must wait for NOTBUSY*/
349 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
351 } else if (host->cmd->data->flags & MMC_DATA_WRITE) {
352 /*After sendding multi-block-write command, start DMA transfer*/
353 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_TXBUFE);
354 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_BLKE);
355 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN);
358 /* command not completed, have to wait */
364 * Enable the controller
366 static void at91_mci_enable(struct at91mci_host *host)
370 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
371 at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
372 at91_mci_write(host, AT91_MCI_DTOR, AT91_MCI_DTOMUL_1M | AT91_MCI_DTOCYC);
373 mr = AT91_MCI_PDCMODE | 0x34a;
375 if (cpu_is_at91sam9260() || cpu_is_at91sam9263())
376 mr |= AT91_MCI_RDPROOF | AT91_MCI_WRPROOF;
378 at91_mci_write(host, AT91_MCI_MR, mr);
380 /* use Slot A or B (only one at same time) */
381 at91_mci_write(host, AT91_MCI_SDCR, host->board->slot_b);
385 * Disable the controller
387 static void at91_mci_disable(struct at91mci_host *host)
389 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS | AT91_MCI_SWRST);
395 static void at91_mci_send_command(struct at91mci_host *host, struct mmc_command *cmd)
397 unsigned int cmdr, mr;
398 unsigned int block_length;
399 struct mmc_data *data = cmd->data;
402 unsigned int ier = 0;
406 /* Needed for leaving busy state before CMD1 */
407 if ((at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_RTOE) && (cmd->opcode == 1)) {
408 pr_debug("Clearing timeout\n");
409 at91_mci_write(host, AT91_MCI_ARGR, 0);
410 at91_mci_write(host, AT91_MCI_CMDR, AT91_MCI_OPDCMD);
411 while (!(at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_CMDRDY)) {
413 pr_debug("Clearing: SR = %08X\n", at91_mci_read(host, AT91_MCI_SR));
419 if (mmc_resp_type(cmd) == MMC_RSP_NONE)
420 cmdr |= AT91_MCI_RSPTYP_NONE;
422 /* if a response is expected then allow maximum response latancy */
423 cmdr |= AT91_MCI_MAXLAT;
424 /* set 136 bit response for R2, 48 bit response otherwise */
425 if (mmc_resp_type(cmd) == MMC_RSP_R2)
426 cmdr |= AT91_MCI_RSPTYP_136;
428 cmdr |= AT91_MCI_RSPTYP_48;
433 if ( data->blksz & 0x3 ) {
434 pr_debug("Unsupported block size\n");
435 cmd->error = -EINVAL;
436 mmc_request_done(host->mmc, host->request);
440 block_length = data->blksz;
441 blocks = data->blocks;
443 /* always set data start - also set direction flag for read */
444 if (data->flags & MMC_DATA_READ)
445 cmdr |= (AT91_MCI_TRDIR | AT91_MCI_TRCMD_START);
446 else if (data->flags & MMC_DATA_WRITE)
447 cmdr |= AT91_MCI_TRCMD_START;
449 if (data->flags & MMC_DATA_STREAM)
450 cmdr |= AT91_MCI_TRTYP_STREAM;
451 if (data->blocks > 1)
452 cmdr |= AT91_MCI_TRTYP_MULTIPLE;
459 if (host->flags & FL_SENT_STOP)
460 cmdr |= AT91_MCI_TRCMD_STOP;
462 if (host->bus_mode == MMC_BUSMODE_OPENDRAIN)
463 cmdr |= AT91_MCI_OPDCMD;
466 * Set the arguments and send the command
468 pr_debug("Sending command %d as %08X, arg = %08X, blocks = %d, length = %d (MR = %08X)\n",
469 cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(host, AT91_MCI_MR));
472 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTDIS | ATMEL_PDC_RXTDIS);
473 at91_mci_write(host, ATMEL_PDC_RPR, 0);
474 at91_mci_write(host, ATMEL_PDC_RCR, 0);
475 at91_mci_write(host, ATMEL_PDC_RNPR, 0);
476 at91_mci_write(host, ATMEL_PDC_RNCR, 0);
477 at91_mci_write(host, ATMEL_PDC_TPR, 0);
478 at91_mci_write(host, ATMEL_PDC_TCR, 0);
479 at91_mci_write(host, ATMEL_PDC_TNPR, 0);
480 at91_mci_write(host, ATMEL_PDC_TNCR, 0);
481 ier = AT91_MCI_CMDRDY;
483 /* zero block length and PDC mode */
484 mr = at91_mci_read(host, AT91_MCI_MR) & 0x7fff;
485 at91_mci_write(host, AT91_MCI_MR, mr | (block_length << 16) | AT91_MCI_PDCMODE);
488 * Disable the PDC controller
490 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
492 if (cmdr & AT91_MCI_TRCMD_START) {
493 data->bytes_xfered = 0;
494 host->transfer_index = 0;
495 host->in_use_index = 0;
496 if (cmdr & AT91_MCI_TRDIR) {
501 host->total_length = 0;
503 at91_mci_pre_dma_read(host);
504 ier = AT91_MCI_ENDRX /* | AT91_MCI_RXBUFF */;
510 host->total_length = block_length * blocks;
511 host->buffer = dma_alloc_coherent(NULL,
513 &host->physical_address, GFP_KERNEL);
515 at91_mci_sg_to_dma(host, data);
517 pr_debug("Transmitting %d bytes\n", host->total_length);
519 at91_mci_write(host, ATMEL_PDC_TPR, host->physical_address);
520 at91_mci_write(host, ATMEL_PDC_TCR, host->total_length / 4);
521 ier = AT91_MCI_CMDRDY;
527 * Send the command and then enable the PDC - not the other way round as
528 * the data sheet says
531 at91_mci_write(host, AT91_MCI_ARGR, cmd->arg);
532 at91_mci_write(host, AT91_MCI_CMDR, cmdr);
534 if (cmdr & AT91_MCI_TRCMD_START) {
535 if (cmdr & AT91_MCI_TRDIR)
536 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN);
539 /* Enable selected interrupts */
540 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_ERRORS | ier);
544 * Process the next step in the request
546 static void at91_mci_process_next(struct at91mci_host *host)
548 if (!(host->flags & FL_SENT_COMMAND)) {
549 host->flags |= FL_SENT_COMMAND;
550 at91_mci_send_command(host, host->request->cmd);
552 else if ((!(host->flags & FL_SENT_STOP)) && host->request->stop) {
553 host->flags |= FL_SENT_STOP;
554 at91_mci_send_command(host, host->request->stop);
557 mmc_request_done(host->mmc, host->request);
561 * Handle a command that has been completed
563 static void at91_mci_completed_command(struct at91mci_host *host)
565 struct mmc_command *cmd = host->cmd;
568 at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
570 cmd->resp[0] = at91_mci_read(host, AT91_MCI_RSPR(0));
571 cmd->resp[1] = at91_mci_read(host, AT91_MCI_RSPR(1));
572 cmd->resp[2] = at91_mci_read(host, AT91_MCI_RSPR(2));
573 cmd->resp[3] = at91_mci_read(host, AT91_MCI_RSPR(3));
576 dma_free_coherent(NULL, host->total_length, host->buffer, host->physical_address);
580 status = at91_mci_read(host, AT91_MCI_SR);
582 pr_debug("Status = %08X [%08X %08X %08X %08X]\n",
583 status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
585 if (status & AT91_MCI_ERRORS) {
586 if ((status & AT91_MCI_RCRCE) && !(mmc_resp_type(cmd) & MMC_RSP_CRC)) {
590 if (status & (AT91_MCI_RTOE | AT91_MCI_DTOE))
591 cmd->error = -ETIMEDOUT;
592 else if (status & (AT91_MCI_RCRCE | AT91_MCI_DCRCE))
593 cmd->error = -EILSEQ;
597 pr_debug("Error detected and set to %d (cmd = %d, retries = %d)\n",
598 cmd->error, cmd->opcode, cmd->retries);
604 at91_mci_process_next(host);
608 * Handle an MMC request
610 static void at91_mci_request(struct mmc_host *mmc, struct mmc_request *mrq)
612 struct at91mci_host *host = mmc_priv(mmc);
616 at91_mci_process_next(host);
622 static void at91_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
625 struct at91mci_host *host = mmc_priv(mmc);
626 unsigned long at91_master_clock = clk_get_rate(host->mci_clk);
628 host->bus_mode = ios->bus_mode;
630 if (ios->clock == 0) {
631 /* Disable the MCI controller */
632 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS);
636 /* Enable the MCI controller */
637 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
639 if ((at91_master_clock % (ios->clock * 2)) == 0)
640 clkdiv = ((at91_master_clock / ios->clock) / 2) - 1;
642 clkdiv = (at91_master_clock / ios->clock) / 2;
644 pr_debug("clkdiv = %d. mcck = %ld\n", clkdiv,
645 at91_master_clock / (2 * (clkdiv + 1)));
647 if (ios->bus_width == MMC_BUS_WIDTH_4 && host->board->wire4) {
648 pr_debug("MMC: Setting controller bus width to 4\n");
649 at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) | AT91_MCI_SDCBUS);
652 pr_debug("MMC: Setting controller bus width to 1\n");
653 at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS);
656 /* Set the clock divider */
657 at91_mci_write(host, AT91_MCI_MR, (at91_mci_read(host, AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv);
659 /* maybe switch power to the card */
660 if (host->board->vcc_pin) {
661 switch (ios->power_mode) {
663 gpio_set_value(host->board->vcc_pin, 0);
666 gpio_set_value(host->board->vcc_pin, 1);
677 * Handle an interrupt
679 static irqreturn_t at91_mci_irq(int irq, void *devid)
681 struct at91mci_host *host = devid;
683 unsigned int int_status, int_mask;
685 int_status = at91_mci_read(host, AT91_MCI_SR);
686 int_mask = at91_mci_read(host, AT91_MCI_IMR);
688 pr_debug("MCI irq: status = %08X, %08X, %08X\n", int_status, int_mask,
689 int_status & int_mask);
691 int_status = int_status & int_mask;
693 if (int_status & AT91_MCI_ERRORS) {
696 if (int_status & AT91_MCI_UNRE)
697 pr_debug("MMC: Underrun error\n");
698 if (int_status & AT91_MCI_OVRE)
699 pr_debug("MMC: Overrun error\n");
700 if (int_status & AT91_MCI_DTOE)
701 pr_debug("MMC: Data timeout\n");
702 if (int_status & AT91_MCI_DCRCE)
703 pr_debug("MMC: CRC error in data\n");
704 if (int_status & AT91_MCI_RTOE)
705 pr_debug("MMC: Response timeout\n");
706 if (int_status & AT91_MCI_RENDE)
707 pr_debug("MMC: Response end bit error\n");
708 if (int_status & AT91_MCI_RCRCE)
709 pr_debug("MMC: Response CRC error\n");
710 if (int_status & AT91_MCI_RDIRE)
711 pr_debug("MMC: Response direction error\n");
712 if (int_status & AT91_MCI_RINDE)
713 pr_debug("MMC: Response index error\n");
715 /* Only continue processing if no errors */
717 if (int_status & AT91_MCI_TXBUFE) {
718 pr_debug("TX buffer empty\n");
719 at91_mci_handle_transmitted(host);
722 if (int_status & AT91_MCI_ENDRX) {
724 at91_mci_post_dma_read(host);
727 if (int_status & AT91_MCI_RXBUFF) {
728 pr_debug("RX buffer full\n");
729 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
730 at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_RXBUFF | AT91_MCI_ENDRX);
734 if (int_status & AT91_MCI_ENDTX)
735 pr_debug("Transmit has ended\n");
737 if (int_status & AT91_MCI_NOTBUSY) {
738 pr_debug("Card is ready\n");
742 if (int_status & AT91_MCI_DTIP)
743 pr_debug("Data transfer in progress\n");
745 if (int_status & AT91_MCI_BLKE) {
746 pr_debug("Block transfer has ended\n");
750 if (int_status & AT91_MCI_TXRDY)
751 pr_debug("Ready to transmit\n");
753 if (int_status & AT91_MCI_RXRDY)
754 pr_debug("Ready to receive\n");
756 if (int_status & AT91_MCI_CMDRDY) {
757 pr_debug("Command ready\n");
758 completed = at91_mci_handle_cmdrdy(host);
763 pr_debug("Completed command\n");
764 at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
765 at91_mci_completed_command(host);
767 at91_mci_write(host, AT91_MCI_IDR, int_status);
772 static irqreturn_t at91_mmc_det_irq(int irq, void *_host)
774 struct at91mci_host *host = _host;
775 int present = !gpio_get_value(irq_to_gpio(irq));
778 * we expect this irq on both insert and remove,
779 * and use a short delay to debounce.
781 if (present != host->present) {
782 host->present = present;
783 pr_debug("%s: card %s\n", mmc_hostname(host->mmc),
784 present ? "insert" : "remove");
786 pr_debug("****** Resetting SD-card bus width ******\n");
787 at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS);
789 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
794 static int at91_mci_get_ro(struct mmc_host *mmc)
796 struct at91mci_host *host = mmc_priv(mmc);
798 if (host->board->wp_pin)
799 return !!gpio_get_value(host->board->wp_pin);
801 * Board doesn't support read only detection; let the mmc core
807 static const struct mmc_host_ops at91_mci_ops = {
808 .request = at91_mci_request,
809 .set_ios = at91_mci_set_ios,
810 .get_ro = at91_mci_get_ro,
814 * Probe for the device
816 static int __init at91_mci_probe(struct platform_device *pdev)
818 struct mmc_host *mmc;
819 struct at91mci_host *host;
820 struct resource *res;
823 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
827 if (!request_mem_region(res->start, res->end - res->start + 1, DRIVER_NAME))
830 mmc = mmc_alloc_host(sizeof(struct at91mci_host), &pdev->dev);
833 dev_dbg(&pdev->dev, "couldn't allocate mmc host\n");
837 mmc->ops = &at91_mci_ops;
839 mmc->f_max = 25000000;
840 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
842 mmc->max_blk_size = 4095;
843 mmc->max_blk_count = mmc->max_req_size;
845 host = mmc_priv(mmc);
849 host->board = pdev->dev.platform_data;
850 if (host->board->wire4) {
851 if (cpu_is_at91sam9260() || cpu_is_at91sam9263())
852 mmc->caps |= MMC_CAP_4_BIT_DATA;
854 dev_warn(&pdev->dev, "4 wire bus mode not supported"
855 " - using 1 wire\n");
859 * Reserve GPIOs ... board init code makes sure these pins are set
860 * up as GPIOs with the right direction (input, except for vcc)
862 if (host->board->det_pin) {
863 ret = gpio_request(host->board->det_pin, "mmc_detect");
865 dev_dbg(&pdev->dev, "couldn't claim card detect pin\n");
869 if (host->board->wp_pin) {
870 ret = gpio_request(host->board->wp_pin, "mmc_wp");
872 dev_dbg(&pdev->dev, "couldn't claim wp sense pin\n");
876 if (host->board->vcc_pin) {
877 ret = gpio_request(host->board->vcc_pin, "mmc_vcc");
879 dev_dbg(&pdev->dev, "couldn't claim vcc switch pin\n");
887 host->mci_clk = clk_get(&pdev->dev, "mci_clk");
888 if (IS_ERR(host->mci_clk)) {
890 dev_dbg(&pdev->dev, "no mci_clk?\n");
897 host->baseaddr = ioremap(res->start, res->end - res->start + 1);
898 if (!host->baseaddr) {
906 clk_enable(host->mci_clk); /* Enable the peripheral clock */
907 at91_mci_disable(host);
908 at91_mci_enable(host);
911 * Allocate the MCI interrupt
913 host->irq = platform_get_irq(pdev, 0);
914 ret = request_irq(host->irq, at91_mci_irq, IRQF_SHARED,
915 mmc_hostname(mmc), host);
917 dev_dbg(&pdev->dev, "request MCI interrupt failed\n");
921 platform_set_drvdata(pdev, mmc);
924 * Add host to MMC layer
926 if (host->board->det_pin) {
927 host->present = !gpio_get_value(host->board->det_pin);
935 * monitor card insertion/removal if we can
937 if (host->board->det_pin) {
938 ret = request_irq(gpio_to_irq(host->board->det_pin),
939 at91_mmc_det_irq, 0, mmc_hostname(mmc), host);
941 dev_warn(&pdev->dev, "request MMC detect irq failed\n");
943 device_init_wakeup(&pdev->dev, 1);
946 pr_debug("Added MCI driver\n");
951 clk_disable(host->mci_clk);
952 iounmap(host->baseaddr);
954 clk_put(host->mci_clk);
956 if (host->board->vcc_pin)
957 gpio_free(host->board->vcc_pin);
959 if (host->board->wp_pin)
960 gpio_free(host->board->wp_pin);
962 if (host->board->det_pin)
963 gpio_free(host->board->det_pin);
967 release_mem_region(res->start, res->end - res->start + 1);
968 dev_err(&pdev->dev, "probe failed, err %d\n", ret);
975 static int __exit at91_mci_remove(struct platform_device *pdev)
977 struct mmc_host *mmc = platform_get_drvdata(pdev);
978 struct at91mci_host *host;
979 struct resource *res;
984 host = mmc_priv(mmc);
986 if (host->board->det_pin) {
987 if (device_can_wakeup(&pdev->dev))
988 free_irq(gpio_to_irq(host->board->det_pin), host);
989 device_init_wakeup(&pdev->dev, 0);
990 gpio_free(host->board->det_pin);
993 at91_mci_disable(host);
994 mmc_remove_host(mmc);
995 free_irq(host->irq, host);
997 clk_disable(host->mci_clk); /* Disable the peripheral clock */
998 clk_put(host->mci_clk);
1000 if (host->board->vcc_pin)
1001 gpio_free(host->board->vcc_pin);
1002 if (host->board->wp_pin)
1003 gpio_free(host->board->wp_pin);
1005 iounmap(host->baseaddr);
1006 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1007 release_mem_region(res->start, res->end - res->start + 1);
1010 platform_set_drvdata(pdev, NULL);
1011 pr_debug("MCI Removed\n");
1017 static int at91_mci_suspend(struct platform_device *pdev, pm_message_t state)
1019 struct mmc_host *mmc = platform_get_drvdata(pdev);
1020 struct at91mci_host *host = mmc_priv(mmc);
1023 if (host->board->det_pin && device_may_wakeup(&pdev->dev))
1024 enable_irq_wake(host->board->det_pin);
1027 ret = mmc_suspend_host(mmc, state);
1032 static int at91_mci_resume(struct platform_device *pdev)
1034 struct mmc_host *mmc = platform_get_drvdata(pdev);
1035 struct at91mci_host *host = mmc_priv(mmc);
1038 if (host->board->det_pin && device_may_wakeup(&pdev->dev))
1039 disable_irq_wake(host->board->det_pin);
1042 ret = mmc_resume_host(mmc);
1047 #define at91_mci_suspend NULL
1048 #define at91_mci_resume NULL
1051 static struct platform_driver at91_mci_driver = {
1052 .remove = __exit_p(at91_mci_remove),
1053 .suspend = at91_mci_suspend,
1054 .resume = at91_mci_resume,
1056 .name = DRIVER_NAME,
1057 .owner = THIS_MODULE,
1061 static int __init at91_mci_init(void)
1063 return platform_driver_probe(&at91_mci_driver, at91_mci_probe);
1066 static void __exit at91_mci_exit(void)
1068 platform_driver_unregister(&at91_mci_driver);
1071 module_init(at91_mci_init);
1072 module_exit(at91_mci_exit);
1074 MODULE_DESCRIPTION("AT91 Multimedia Card Interface driver");
1075 MODULE_AUTHOR("Nick Randell");
1076 MODULE_LICENSE("GPL");
1077 MODULE_ALIAS("platform:at91_mci");