2 * linux/drivers/mmc/host/at91_mci.c - ATMEL AT91 MCI Driver
4 * Copyright (C) 2005 Cougar Creek Computing Devices Ltd, All Rights Reserved
6 * Copyright (C) 2006 Malcolm Noyes
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
14 This is the AT91 MCI driver that has been tested with both MMC cards
15 and SD-cards. Boards that support write protect are now supported.
16 The CCAT91SBC001 board does not support SD cards.
18 The three entry points are at91_mci_request, at91_mci_set_ios
22 This configures the device to put it into the correct mode and clock speed
26 MCI request processes the commands sent in the mmc_request structure. This
27 can consist of a processing command and a stop command in the case of
28 multiple block transfers.
30 There are three main types of request, commands, reads and writes.
32 Commands are straight forward. The command is submitted to the controller and
33 the request function returns. When the controller generates an interrupt to indicate
34 the command is finished, the response to the command are read and the mmc_request_done
35 function called to end the request.
37 Reads and writes work in a similar manner to normal commands but involve the PDC (DMA)
38 controller to manage the transfers.
40 A read is done from the controller directly to the scatterlist passed in from the request.
41 Due to a bug in the AT91RM9200 controller, when a read is completed, all the words are byte
42 swapped in the scatterlist buffers. AT91SAM926x are not affected by this bug.
44 The sequence of read interrupts is: ENDRX, RXBUFF, CMDRDY
46 A write is slightly different in that the bytes to write are read from the scatterlist
47 into a dma memory buffer (this is in case the source buffer should be read only). The
48 entire write buffer is then done from this single dma memory buffer.
50 The sequence of write interrupts is: ENDTX, TXBUFE, NOTBUSY, CMDRDY
53 Gets the status of the write protect pin, if available.
56 #include <linux/module.h>
57 #include <linux/moduleparam.h>
58 #include <linux/init.h>
59 #include <linux/ioport.h>
60 #include <linux/platform_device.h>
61 #include <linux/interrupt.h>
62 #include <linux/blkdev.h>
63 #include <linux/delay.h>
64 #include <linux/err.h>
65 #include <linux/dma-mapping.h>
66 #include <linux/clk.h>
67 #include <linux/atmel_pdc.h>
69 #include <linux/mmc/host.h>
75 #include <asm/mach/mmc.h>
76 #include <asm/arch/board.h>
77 #include <asm/arch/cpu.h>
78 #include <asm/arch/at91_mci.h>
80 #define DRIVER_NAME "at91_mci"
82 #define FL_SENT_COMMAND (1 << 0)
83 #define FL_SENT_STOP (1 << 1)
85 #define AT91_MCI_ERRORS (AT91_MCI_RINDE | AT91_MCI_RDIRE | AT91_MCI_RCRCE \
86 | AT91_MCI_RENDE | AT91_MCI_RTOE | AT91_MCI_DCRCE \
87 | AT91_MCI_DTOE | AT91_MCI_OVRE | AT91_MCI_UNRE)
89 #define at91_mci_read(host, reg) __raw_readl((host)->baseaddr + (reg))
90 #define at91_mci_write(host, reg, val) __raw_writel((val), (host)->baseaddr + (reg))
94 * Low level type for this driver
99 struct mmc_command *cmd;
100 struct mmc_request *request;
102 void __iomem *baseaddr;
105 struct at91_mmc_data *board;
111 * Flag indicating when the command has been sent. This is used to
112 * work out whether or not to send the stop
115 /* flag for current bus settings */
118 /* DMA buffer used for transmitting */
119 unsigned int* buffer;
120 dma_addr_t physical_address;
121 unsigned int total_length;
123 /* Latest in the scatterlist that has been enabled for transfer, but not freed */
126 /* Latest in the scatterlist that has been enabled for transfer */
129 /* Timer for timeouts */
130 struct timer_list timer;
133 static void at91_timeout_timer(unsigned long data)
135 struct at91mci_host *host;
137 host = (struct at91mci_host *)data;
140 dev_err(host->mmc->parent, "Timeout waiting end of packet\n");
142 if (host->cmd && host->cmd->data) {
143 host->cmd->data->error = -ETIMEDOUT;
146 host->cmd->error = -ETIMEDOUT;
148 host->request->cmd->error = -ETIMEDOUT;
151 mmc_request_done(host->mmc, host->request);
156 * Copy from sg to a dma block - used for transfers
158 static inline void at91_mci_sg_to_dma(struct at91mci_host *host, struct mmc_data *data)
160 unsigned int len, i, size;
161 unsigned *dmabuf = host->buffer;
163 size = host->total_length;
167 * Just loop through all entries. Size might not
168 * be the entire list though so make sure that
169 * we do not transfer too much.
171 for (i = 0; i < len; i++) {
172 struct scatterlist *sg;
174 unsigned int *sgbuffer;
178 sgbuffer = kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
179 amount = min(size, sg->length);
182 if (cpu_is_at91rm9200()) { /* AT91RM9200 errata */
185 for (index = 0; index < (amount / 4); index++)
186 *dmabuf++ = swab32(sgbuffer[index]);
189 memcpy(dmabuf, sgbuffer, amount);
191 kunmap_atomic(sgbuffer, KM_BIO_SRC_IRQ);
198 * Check that we didn't get a request to transfer
199 * more data than can fit into the SG list.
207 static void at91_mci_pre_dma_read(struct at91mci_host *host)
210 struct scatterlist *sg;
211 struct mmc_command *cmd;
212 struct mmc_data *data;
214 pr_debug("pre dma read\n");
218 pr_debug("no command\n");
224 pr_debug("no data\n");
228 for (i = 0; i < 2; i++) {
229 /* nothing left to transfer */
230 if (host->transfer_index >= data->sg_len) {
231 pr_debug("Nothing left to transfer (index = %d)\n", host->transfer_index);
235 /* Check to see if this needs filling */
237 if (at91_mci_read(host, ATMEL_PDC_RCR) != 0) {
238 pr_debug("Transfer active in current\n");
243 if (at91_mci_read(host, ATMEL_PDC_RNCR) != 0) {
244 pr_debug("Transfer active in next\n");
249 /* Setup the next transfer */
250 pr_debug("Using transfer index %d\n", host->transfer_index);
252 sg = &data->sg[host->transfer_index++];
253 pr_debug("sg = %p\n", sg);
255 sg->dma_address = dma_map_page(NULL, sg_page(sg), sg->offset, sg->length, DMA_FROM_DEVICE);
257 pr_debug("dma address = %08X, length = %d\n", sg->dma_address, sg->length);
260 at91_mci_write(host, ATMEL_PDC_RPR, sg->dma_address);
261 at91_mci_write(host, ATMEL_PDC_RCR, (data->blksz & 0x3) ? sg->length : sg->length / 4);
264 at91_mci_write(host, ATMEL_PDC_RNPR, sg->dma_address);
265 at91_mci_write(host, ATMEL_PDC_RNCR, (data->blksz & 0x3) ? sg->length : sg->length / 4);
269 pr_debug("pre dma read done\n");
273 * Handle after a dma read
275 static void at91_mci_post_dma_read(struct at91mci_host *host)
277 struct mmc_command *cmd;
278 struct mmc_data *data;
280 pr_debug("post dma read\n");
284 pr_debug("no command\n");
290 pr_debug("no data\n");
294 while (host->in_use_index < host->transfer_index) {
295 struct scatterlist *sg;
297 pr_debug("finishing index %d\n", host->in_use_index);
299 sg = &data->sg[host->in_use_index++];
301 pr_debug("Unmapping page %08X\n", sg->dma_address);
303 dma_unmap_page(NULL, sg->dma_address, sg->length, DMA_FROM_DEVICE);
305 data->bytes_xfered += sg->length;
307 if (cpu_is_at91rm9200()) { /* AT91RM9200 errata */
308 unsigned int *buffer;
311 /* Swap the contents of the buffer */
312 buffer = kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
313 pr_debug("buffer = %p, length = %d\n", buffer, sg->length);
315 for (index = 0; index < (sg->length / 4); index++)
316 buffer[index] = swab32(buffer[index]);
318 kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
321 flush_dcache_page(sg_page(sg));
324 /* Is there another transfer to trigger? */
325 if (host->transfer_index < data->sg_len)
326 at91_mci_pre_dma_read(host);
328 at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_ENDRX);
329 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_RXBUFF);
332 pr_debug("post dma read done\n");
336 * Handle transmitted data
338 static void at91_mci_handle_transmitted(struct at91mci_host *host)
340 struct mmc_command *cmd;
341 struct mmc_data *data;
343 pr_debug("Handling the transmit\n");
345 /* Disable the transfer */
346 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
348 /* Now wait for cmd ready */
349 at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_TXBUFE);
357 if (cmd->data->blocks > 1) {
358 pr_debug("multiple write : wait for BLKE...\n");
359 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_BLKE);
361 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
363 data->bytes_xfered = host->total_length;
366 /*Handle after command sent ready*/
367 static int at91_mci_handle_cmdrdy(struct at91mci_host *host)
371 else if (!host->cmd->data) {
372 if (host->flags & FL_SENT_STOP) {
373 /*After multi block write, we must wait for NOTBUSY*/
374 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_NOTBUSY);
376 } else if (host->cmd->data->flags & MMC_DATA_WRITE) {
377 /*After sendding multi-block-write command, start DMA transfer*/
378 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_TXBUFE);
379 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_BLKE);
380 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN);
383 /* command not completed, have to wait */
389 * Enable the controller
391 static void at91_mci_enable(struct at91mci_host *host)
395 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
396 at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
397 at91_mci_write(host, AT91_MCI_DTOR, AT91_MCI_DTOMUL_1M | AT91_MCI_DTOCYC);
398 mr = AT91_MCI_PDCMODE | 0x34a;
400 if (cpu_is_at91sam9260() || cpu_is_at91sam9263())
401 mr |= AT91_MCI_RDPROOF | AT91_MCI_WRPROOF;
403 at91_mci_write(host, AT91_MCI_MR, mr);
405 /* use Slot A or B (only one at same time) */
406 at91_mci_write(host, AT91_MCI_SDCR, host->board->slot_b);
410 * Disable the controller
412 static void at91_mci_disable(struct at91mci_host *host)
414 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS | AT91_MCI_SWRST);
420 static void at91_mci_send_command(struct at91mci_host *host, struct mmc_command *cmd)
422 unsigned int cmdr, mr;
423 unsigned int block_length;
424 struct mmc_data *data = cmd->data;
427 unsigned int ier = 0;
431 /* Needed for leaving busy state before CMD1 */
432 if ((at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_RTOE) && (cmd->opcode == 1)) {
433 pr_debug("Clearing timeout\n");
434 at91_mci_write(host, AT91_MCI_ARGR, 0);
435 at91_mci_write(host, AT91_MCI_CMDR, AT91_MCI_OPDCMD);
436 while (!(at91_mci_read(host, AT91_MCI_SR) & AT91_MCI_CMDRDY)) {
438 pr_debug("Clearing: SR = %08X\n", at91_mci_read(host, AT91_MCI_SR));
444 if (mmc_resp_type(cmd) == MMC_RSP_NONE)
445 cmdr |= AT91_MCI_RSPTYP_NONE;
447 /* if a response is expected then allow maximum response latancy */
448 cmdr |= AT91_MCI_MAXLAT;
449 /* set 136 bit response for R2, 48 bit response otherwise */
450 if (mmc_resp_type(cmd) == MMC_RSP_R2)
451 cmdr |= AT91_MCI_RSPTYP_136;
453 cmdr |= AT91_MCI_RSPTYP_48;
458 if ( cpu_is_at91rm9200() && (data->blksz & 0x3) ) {
459 pr_debug("Unsupported block size\n");
460 cmd->error = -EINVAL;
461 mmc_request_done(host->mmc, host->request);
465 block_length = data->blksz;
466 blocks = data->blocks;
468 /* always set data start - also set direction flag for read */
469 if (data->flags & MMC_DATA_READ)
470 cmdr |= (AT91_MCI_TRDIR | AT91_MCI_TRCMD_START);
471 else if (data->flags & MMC_DATA_WRITE)
472 cmdr |= AT91_MCI_TRCMD_START;
474 if (data->flags & MMC_DATA_STREAM)
475 cmdr |= AT91_MCI_TRTYP_STREAM;
476 if (data->blocks > 1)
477 cmdr |= AT91_MCI_TRTYP_MULTIPLE;
484 if (host->flags & FL_SENT_STOP)
485 cmdr |= AT91_MCI_TRCMD_STOP;
487 if (host->bus_mode == MMC_BUSMODE_OPENDRAIN)
488 cmdr |= AT91_MCI_OPDCMD;
491 * Set the arguments and send the command
493 pr_debug("Sending command %d as %08X, arg = %08X, blocks = %d, length = %d (MR = %08X)\n",
494 cmd->opcode, cmdr, cmd->arg, blocks, block_length, at91_mci_read(host, AT91_MCI_MR));
497 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTDIS | ATMEL_PDC_RXTDIS);
498 at91_mci_write(host, ATMEL_PDC_RPR, 0);
499 at91_mci_write(host, ATMEL_PDC_RCR, 0);
500 at91_mci_write(host, ATMEL_PDC_RNPR, 0);
501 at91_mci_write(host, ATMEL_PDC_RNCR, 0);
502 at91_mci_write(host, ATMEL_PDC_TPR, 0);
503 at91_mci_write(host, ATMEL_PDC_TCR, 0);
504 at91_mci_write(host, ATMEL_PDC_TNPR, 0);
505 at91_mci_write(host, ATMEL_PDC_TNCR, 0);
506 ier = AT91_MCI_CMDRDY;
508 /* zero block length and PDC mode */
509 mr = at91_mci_read(host, AT91_MCI_MR) & 0x7fff;
510 mr |= (data->blksz & 0x3) ? AT91_MCI_PDCFBYTE : 0;
511 mr |= (block_length << 16);
512 mr |= AT91_MCI_PDCMODE;
513 at91_mci_write(host, AT91_MCI_MR, mr);
516 * Disable the PDC controller
518 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
520 if (cmdr & AT91_MCI_TRCMD_START) {
521 data->bytes_xfered = 0;
522 host->transfer_index = 0;
523 host->in_use_index = 0;
524 if (cmdr & AT91_MCI_TRDIR) {
529 host->total_length = 0;
531 at91_mci_pre_dma_read(host);
532 ier = AT91_MCI_ENDRX /* | AT91_MCI_RXBUFF */;
538 host->total_length = block_length * blocks;
539 host->buffer = dma_alloc_coherent(NULL,
541 &host->physical_address, GFP_KERNEL);
543 at91_mci_sg_to_dma(host, data);
545 pr_debug("Transmitting %d bytes\n", host->total_length);
547 at91_mci_write(host, ATMEL_PDC_TPR, host->physical_address);
548 at91_mci_write(host, ATMEL_PDC_TCR, (data->blksz & 0x3) ?
549 host->total_length : host->total_length / 4);
551 ier = AT91_MCI_CMDRDY;
557 * Send the command and then enable the PDC - not the other way round as
558 * the data sheet says
561 at91_mci_write(host, AT91_MCI_ARGR, cmd->arg);
562 at91_mci_write(host, AT91_MCI_CMDR, cmdr);
564 if (cmdr & AT91_MCI_TRCMD_START) {
565 if (cmdr & AT91_MCI_TRDIR)
566 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN);
569 /* Enable selected interrupts */
570 at91_mci_write(host, AT91_MCI_IER, AT91_MCI_ERRORS | ier);
574 * Process the next step in the request
576 static void at91_mci_process_next(struct at91mci_host *host)
578 if (!(host->flags & FL_SENT_COMMAND)) {
579 host->flags |= FL_SENT_COMMAND;
580 at91_mci_send_command(host, host->request->cmd);
582 else if ((!(host->flags & FL_SENT_STOP)) && host->request->stop) {
583 host->flags |= FL_SENT_STOP;
584 at91_mci_send_command(host, host->request->stop);
586 del_timer(&host->timer);
587 mmc_request_done(host->mmc, host->request);
592 * Handle a command that has been completed
594 static void at91_mci_completed_command(struct at91mci_host *host)
596 struct mmc_command *cmd = host->cmd;
599 at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
601 cmd->resp[0] = at91_mci_read(host, AT91_MCI_RSPR(0));
602 cmd->resp[1] = at91_mci_read(host, AT91_MCI_RSPR(1));
603 cmd->resp[2] = at91_mci_read(host, AT91_MCI_RSPR(2));
604 cmd->resp[3] = at91_mci_read(host, AT91_MCI_RSPR(3));
607 dma_free_coherent(NULL, host->total_length, host->buffer, host->physical_address);
611 status = at91_mci_read(host, AT91_MCI_SR);
613 pr_debug("Status = %08X [%08X %08X %08X %08X]\n",
614 status, cmd->resp[0], cmd->resp[1], cmd->resp[2], cmd->resp[3]);
616 if (status & AT91_MCI_ERRORS) {
617 if ((status & AT91_MCI_RCRCE) && !(mmc_resp_type(cmd) & MMC_RSP_CRC)) {
621 if (status & (AT91_MCI_RTOE | AT91_MCI_DTOE))
622 cmd->error = -ETIMEDOUT;
623 else if (status & (AT91_MCI_RCRCE | AT91_MCI_DCRCE))
624 cmd->error = -EILSEQ;
628 pr_debug("Error detected and set to %d (cmd = %d, retries = %d)\n",
629 cmd->error, cmd->opcode, cmd->retries);
635 at91_mci_process_next(host);
639 * Handle an MMC request
641 static void at91_mci_request(struct mmc_host *mmc, struct mmc_request *mrq)
643 struct at91mci_host *host = mmc_priv(mmc);
647 mod_timer(&host->timer, jiffies + HZ);
649 at91_mci_process_next(host);
655 static void at91_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
658 struct at91mci_host *host = mmc_priv(mmc);
659 unsigned long at91_master_clock = clk_get_rate(host->mci_clk);
661 host->bus_mode = ios->bus_mode;
663 if (ios->clock == 0) {
664 /* Disable the MCI controller */
665 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIDIS);
669 /* Enable the MCI controller */
670 at91_mci_write(host, AT91_MCI_CR, AT91_MCI_MCIEN);
672 if ((at91_master_clock % (ios->clock * 2)) == 0)
673 clkdiv = ((at91_master_clock / ios->clock) / 2) - 1;
675 clkdiv = (at91_master_clock / ios->clock) / 2;
677 pr_debug("clkdiv = %d. mcck = %ld\n", clkdiv,
678 at91_master_clock / (2 * (clkdiv + 1)));
680 if (ios->bus_width == MMC_BUS_WIDTH_4 && host->board->wire4) {
681 pr_debug("MMC: Setting controller bus width to 4\n");
682 at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) | AT91_MCI_SDCBUS);
685 pr_debug("MMC: Setting controller bus width to 1\n");
686 at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS);
689 /* Set the clock divider */
690 at91_mci_write(host, AT91_MCI_MR, (at91_mci_read(host, AT91_MCI_MR) & ~AT91_MCI_CLKDIV) | clkdiv);
692 /* maybe switch power to the card */
693 if (host->board->vcc_pin) {
694 switch (ios->power_mode) {
696 gpio_set_value(host->board->vcc_pin, 0);
699 gpio_set_value(host->board->vcc_pin, 1);
710 * Handle an interrupt
712 static irqreturn_t at91_mci_irq(int irq, void *devid)
714 struct at91mci_host *host = devid;
716 unsigned int int_status, int_mask;
718 int_status = at91_mci_read(host, AT91_MCI_SR);
719 int_mask = at91_mci_read(host, AT91_MCI_IMR);
721 pr_debug("MCI irq: status = %08X, %08X, %08X\n", int_status, int_mask,
722 int_status & int_mask);
724 int_status = int_status & int_mask;
726 if (int_status & AT91_MCI_ERRORS) {
729 if (int_status & AT91_MCI_UNRE)
730 pr_debug("MMC: Underrun error\n");
731 if (int_status & AT91_MCI_OVRE)
732 pr_debug("MMC: Overrun error\n");
733 if (int_status & AT91_MCI_DTOE)
734 pr_debug("MMC: Data timeout\n");
735 if (int_status & AT91_MCI_DCRCE)
736 pr_debug("MMC: CRC error in data\n");
737 if (int_status & AT91_MCI_RTOE)
738 pr_debug("MMC: Response timeout\n");
739 if (int_status & AT91_MCI_RENDE)
740 pr_debug("MMC: Response end bit error\n");
741 if (int_status & AT91_MCI_RCRCE)
742 pr_debug("MMC: Response CRC error\n");
743 if (int_status & AT91_MCI_RDIRE)
744 pr_debug("MMC: Response direction error\n");
745 if (int_status & AT91_MCI_RINDE)
746 pr_debug("MMC: Response index error\n");
748 /* Only continue processing if no errors */
750 if (int_status & AT91_MCI_TXBUFE) {
751 pr_debug("TX buffer empty\n");
752 at91_mci_handle_transmitted(host);
755 if (int_status & AT91_MCI_ENDRX) {
757 at91_mci_post_dma_read(host);
760 if (int_status & AT91_MCI_RXBUFF) {
761 pr_debug("RX buffer full\n");
762 at91_mci_write(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS);
763 at91_mci_write(host, AT91_MCI_IDR, AT91_MCI_RXBUFF | AT91_MCI_ENDRX);
767 if (int_status & AT91_MCI_ENDTX)
768 pr_debug("Transmit has ended\n");
770 if (int_status & AT91_MCI_NOTBUSY) {
771 pr_debug("Card is ready\n");
775 if (int_status & AT91_MCI_DTIP)
776 pr_debug("Data transfer in progress\n");
778 if (int_status & AT91_MCI_BLKE) {
779 pr_debug("Block transfer has ended\n");
783 if (int_status & AT91_MCI_TXRDY)
784 pr_debug("Ready to transmit\n");
786 if (int_status & AT91_MCI_RXRDY)
787 pr_debug("Ready to receive\n");
789 if (int_status & AT91_MCI_CMDRDY) {
790 pr_debug("Command ready\n");
791 completed = at91_mci_handle_cmdrdy(host);
796 pr_debug("Completed command\n");
797 at91_mci_write(host, AT91_MCI_IDR, 0xffffffff);
798 at91_mci_completed_command(host);
800 at91_mci_write(host, AT91_MCI_IDR, int_status);
805 static irqreturn_t at91_mmc_det_irq(int irq, void *_host)
807 struct at91mci_host *host = _host;
808 int present = !gpio_get_value(irq_to_gpio(irq));
811 * we expect this irq on both insert and remove,
812 * and use a short delay to debounce.
814 if (present != host->present) {
815 host->present = present;
816 pr_debug("%s: card %s\n", mmc_hostname(host->mmc),
817 present ? "insert" : "remove");
819 pr_debug("****** Resetting SD-card bus width ******\n");
820 at91_mci_write(host, AT91_MCI_SDCR, at91_mci_read(host, AT91_MCI_SDCR) & ~AT91_MCI_SDCBUS);
822 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
827 static int at91_mci_get_ro(struct mmc_host *mmc)
829 struct at91mci_host *host = mmc_priv(mmc);
831 if (host->board->wp_pin)
832 return !!gpio_get_value(host->board->wp_pin);
834 * Board doesn't support read only detection; let the mmc core
840 static const struct mmc_host_ops at91_mci_ops = {
841 .request = at91_mci_request,
842 .set_ios = at91_mci_set_ios,
843 .get_ro = at91_mci_get_ro,
847 * Probe for the device
849 static int __init at91_mci_probe(struct platform_device *pdev)
851 struct mmc_host *mmc;
852 struct at91mci_host *host;
853 struct resource *res;
856 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
860 if (!request_mem_region(res->start, res->end - res->start + 1, DRIVER_NAME))
863 mmc = mmc_alloc_host(sizeof(struct at91mci_host), &pdev->dev);
866 dev_dbg(&pdev->dev, "couldn't allocate mmc host\n");
870 mmc->ops = &at91_mci_ops;
872 mmc->f_max = 25000000;
873 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
875 mmc->max_blk_size = 4095;
876 mmc->max_blk_count = mmc->max_req_size;
878 host = mmc_priv(mmc);
882 host->board = pdev->dev.platform_data;
883 if (host->board->wire4) {
884 if (cpu_is_at91sam9260() || cpu_is_at91sam9263())
885 mmc->caps |= MMC_CAP_4_BIT_DATA;
887 dev_warn(&pdev->dev, "4 wire bus mode not supported"
888 " - using 1 wire\n");
892 * Reserve GPIOs ... board init code makes sure these pins are set
893 * up as GPIOs with the right direction (input, except for vcc)
895 if (host->board->det_pin) {
896 ret = gpio_request(host->board->det_pin, "mmc_detect");
898 dev_dbg(&pdev->dev, "couldn't claim card detect pin\n");
902 if (host->board->wp_pin) {
903 ret = gpio_request(host->board->wp_pin, "mmc_wp");
905 dev_dbg(&pdev->dev, "couldn't claim wp sense pin\n");
909 if (host->board->vcc_pin) {
910 ret = gpio_request(host->board->vcc_pin, "mmc_vcc");
912 dev_dbg(&pdev->dev, "couldn't claim vcc switch pin\n");
920 host->mci_clk = clk_get(&pdev->dev, "mci_clk");
921 if (IS_ERR(host->mci_clk)) {
923 dev_dbg(&pdev->dev, "no mci_clk?\n");
930 host->baseaddr = ioremap(res->start, res->end - res->start + 1);
931 if (!host->baseaddr) {
939 clk_enable(host->mci_clk); /* Enable the peripheral clock */
940 at91_mci_disable(host);
941 at91_mci_enable(host);
944 * Allocate the MCI interrupt
946 host->irq = platform_get_irq(pdev, 0);
947 ret = request_irq(host->irq, at91_mci_irq, IRQF_SHARED,
948 mmc_hostname(mmc), host);
950 dev_dbg(&pdev->dev, "request MCI interrupt failed\n");
954 platform_set_drvdata(pdev, mmc);
957 * Add host to MMC layer
959 if (host->board->det_pin) {
960 host->present = !gpio_get_value(host->board->det_pin);
967 setup_timer(&host->timer, at91_timeout_timer, (unsigned long)host);
970 * monitor card insertion/removal if we can
972 if (host->board->det_pin) {
973 ret = request_irq(gpio_to_irq(host->board->det_pin),
974 at91_mmc_det_irq, 0, mmc_hostname(mmc), host);
976 dev_warn(&pdev->dev, "request MMC detect irq failed\n");
978 device_init_wakeup(&pdev->dev, 1);
981 pr_debug("Added MCI driver\n");
986 clk_disable(host->mci_clk);
987 iounmap(host->baseaddr);
989 clk_put(host->mci_clk);
991 if (host->board->vcc_pin)
992 gpio_free(host->board->vcc_pin);
994 if (host->board->wp_pin)
995 gpio_free(host->board->wp_pin);
997 if (host->board->det_pin)
998 gpio_free(host->board->det_pin);
1002 release_mem_region(res->start, res->end - res->start + 1);
1003 dev_err(&pdev->dev, "probe failed, err %d\n", ret);
1010 static int __exit at91_mci_remove(struct platform_device *pdev)
1012 struct mmc_host *mmc = platform_get_drvdata(pdev);
1013 struct at91mci_host *host;
1014 struct resource *res;
1019 host = mmc_priv(mmc);
1021 if (host->board->det_pin) {
1022 if (device_can_wakeup(&pdev->dev))
1023 free_irq(gpio_to_irq(host->board->det_pin), host);
1024 device_init_wakeup(&pdev->dev, 0);
1025 gpio_free(host->board->det_pin);
1028 at91_mci_disable(host);
1029 del_timer_sync(&host->timer);
1030 mmc_remove_host(mmc);
1031 free_irq(host->irq, host);
1033 clk_disable(host->mci_clk); /* Disable the peripheral clock */
1034 clk_put(host->mci_clk);
1036 if (host->board->vcc_pin)
1037 gpio_free(host->board->vcc_pin);
1038 if (host->board->wp_pin)
1039 gpio_free(host->board->wp_pin);
1041 iounmap(host->baseaddr);
1042 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1043 release_mem_region(res->start, res->end - res->start + 1);
1046 platform_set_drvdata(pdev, NULL);
1047 pr_debug("MCI Removed\n");
1053 static int at91_mci_suspend(struct platform_device *pdev, pm_message_t state)
1055 struct mmc_host *mmc = platform_get_drvdata(pdev);
1056 struct at91mci_host *host = mmc_priv(mmc);
1059 if (host->board->det_pin && device_may_wakeup(&pdev->dev))
1060 enable_irq_wake(host->board->det_pin);
1063 ret = mmc_suspend_host(mmc, state);
1068 static int at91_mci_resume(struct platform_device *pdev)
1070 struct mmc_host *mmc = platform_get_drvdata(pdev);
1071 struct at91mci_host *host = mmc_priv(mmc);
1074 if (host->board->det_pin && device_may_wakeup(&pdev->dev))
1075 disable_irq_wake(host->board->det_pin);
1078 ret = mmc_resume_host(mmc);
1083 #define at91_mci_suspend NULL
1084 #define at91_mci_resume NULL
1087 static struct platform_driver at91_mci_driver = {
1088 .remove = __exit_p(at91_mci_remove),
1089 .suspend = at91_mci_suspend,
1090 .resume = at91_mci_resume,
1092 .name = DRIVER_NAME,
1093 .owner = THIS_MODULE,
1097 static int __init at91_mci_init(void)
1099 return platform_driver_probe(&at91_mci_driver, at91_mci_probe);
1102 static void __exit at91_mci_exit(void)
1104 platform_driver_unregister(&at91_mci_driver);
1107 module_init(at91_mci_init);
1108 module_exit(at91_mci_exit);
1110 MODULE_DESCRIPTION("AT91 Multimedia Card Interface driver");
1111 MODULE_AUTHOR("Nick Randell");
1112 MODULE_LICENSE("GPL");
1113 MODULE_ALIAS("platform:at91_mci");