2 * Atmel MultiMedia Card Interface driver
4 * Copyright (C) 2004-2008 Atmel Corporation
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/blkdev.h>
11 #include <linux/clk.h>
12 #include <linux/debugfs.h>
13 #include <linux/device.h>
14 #include <linux/dmaengine.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/err.h>
17 #include <linux/gpio.h>
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/ioport.h>
21 #include <linux/module.h>
22 #include <linux/platform_device.h>
23 #include <linux/scatterlist.h>
24 #include <linux/seq_file.h>
25 #include <linux/stat.h>
27 #include <linux/mmc/host.h>
28 #include <linux/atmel-mci.h>
31 #include <asm/unaligned.h>
34 #include <mach/board.h>
36 #include "atmel-mci-regs.h"
38 #define ATMCI_DATA_ERROR_FLAGS (MCI_DCRCE | MCI_DTOE | MCI_OVRE | MCI_UNRE)
39 #define ATMCI_DMA_THRESHOLD 16
42 EVENT_CMD_COMPLETE = 0,
48 enum atmel_mci_state {
57 struct atmel_mci_dma {
58 #ifdef CONFIG_MMC_ATMELMCI_DMA
59 struct dma_chan *chan;
60 struct dma_async_tx_descriptor *data_desc;
65 * struct atmel_mci - MMC controller state shared between all slots
66 * @lock: Spinlock protecting the queue and associated data.
67 * @regs: Pointer to MMIO registers.
68 * @sg: Scatterlist entry currently being processed by PIO code, if any.
69 * @pio_offset: Offset into the current scatterlist entry.
70 * @cur_slot: The slot which is currently using the controller.
71 * @mrq: The request currently being processed on @cur_slot,
72 * or NULL if the controller is idle.
73 * @cmd: The command currently being sent to the card, or NULL.
74 * @data: The data currently being transferred, or NULL if no data
75 * transfer is in progress.
76 * @dma: DMA client state.
77 * @data_chan: DMA channel being used for the current data transfer.
78 * @cmd_status: Snapshot of SR taken upon completion of the current
79 * command. Only valid when EVENT_CMD_COMPLETE is pending.
80 * @data_status: Snapshot of SR taken upon completion of the current
81 * data transfer. Only valid when EVENT_DATA_COMPLETE or
82 * EVENT_DATA_ERROR is pending.
83 * @stop_cmdr: Value to be loaded into CMDR when the stop command is
85 * @tasklet: Tasklet running the request state machine.
86 * @pending_events: Bitmask of events flagged by the interrupt handler
87 * to be processed by the tasklet.
88 * @completed_events: Bitmask of events which the state machine has
90 * @state: Tasklet state.
91 * @queue: List of slots waiting for access to the controller.
92 * @need_clock_update: Update the clock rate before the next request.
93 * @need_reset: Reset controller before next request.
94 * @mode_reg: Value of the MR register.
95 * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
96 * rate and timeout calculations.
97 * @mapbase: Physical address of the MMIO registers.
98 * @mck: The peripheral bus clock hooked up to the MMC controller.
99 * @pdev: Platform device associated with the MMC controller.
100 * @slot: Slots sharing this MMC controller.
105 * @lock is a softirq-safe spinlock protecting @queue as well as
106 * @cur_slot, @mrq and @state. These must always be updated
107 * at the same time while holding @lock.
109 * @lock also protects mode_reg and need_clock_update since these are
110 * used to synchronize mode register updates with the queue
113 * The @mrq field of struct atmel_mci_slot is also protected by @lock,
114 * and must always be written at the same time as the slot is added to
117 * @pending_events and @completed_events are accessed using atomic bit
118 * operations, so they don't need any locking.
120 * None of the fields touched by the interrupt handler need any
121 * locking. However, ordering is important: Before EVENT_DATA_ERROR or
122 * EVENT_DATA_COMPLETE is set in @pending_events, all data-related
123 * interrupts must be disabled and @data_status updated with a
124 * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the
125 * CMDRDY interupt must be disabled and @cmd_status updated with a
126 * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the
127 * bytes_xfered field of @data must be written. This is ensured by
134 struct scatterlist *sg;
135 unsigned int pio_offset;
137 struct atmel_mci_slot *cur_slot;
138 struct mmc_request *mrq;
139 struct mmc_command *cmd;
140 struct mmc_data *data;
142 struct atmel_mci_dma dma;
143 struct dma_chan *data_chan;
149 struct tasklet_struct tasklet;
150 unsigned long pending_events;
151 unsigned long completed_events;
152 enum atmel_mci_state state;
153 struct list_head queue;
155 bool need_clock_update;
158 unsigned long bus_hz;
159 unsigned long mapbase;
161 struct platform_device *pdev;
163 struct atmel_mci_slot *slot[ATMEL_MCI_MAX_NR_SLOTS];
167 * struct atmel_mci_slot - MMC slot state
168 * @mmc: The mmc_host representing this slot.
169 * @host: The MMC controller this slot is using.
170 * @sdc_reg: Value of SDCR to be written before using this slot.
171 * @mrq: mmc_request currently being processed or waiting to be
172 * processed, or NULL when the slot is idle.
173 * @queue_node: List node for placing this node in the @queue list of
175 * @clock: Clock rate configured by set_ios(). Protected by host->lock.
176 * @flags: Random state bits associated with the slot.
177 * @detect_pin: GPIO pin used for card detection, or negative if not
179 * @wp_pin: GPIO pin used for card write protect sending, or negative
181 * @detect_is_active_high: The state of the detect pin when it is active.
182 * @detect_timer: Timer used for debouncing @detect_pin interrupts.
184 struct atmel_mci_slot {
185 struct mmc_host *mmc;
186 struct atmel_mci *host;
190 struct mmc_request *mrq;
191 struct list_head queue_node;
195 #define ATMCI_CARD_PRESENT 0
196 #define ATMCI_CARD_NEED_INIT 1
197 #define ATMCI_SHUTDOWN 2
201 bool detect_is_active_high;
203 struct timer_list detect_timer;
206 #define atmci_test_and_clear_pending(host, event) \
207 test_and_clear_bit(event, &host->pending_events)
208 #define atmci_set_completed(host, event) \
209 set_bit(event, &host->completed_events)
210 #define atmci_set_pending(host, event) \
211 set_bit(event, &host->pending_events)
214 * Enable or disable features/registers based on
215 * whether the processor supports them
217 static bool mci_has_rwproof(void)
219 if (cpu_is_at91sam9261() || cpu_is_at91rm9200())
226 * The debugfs stuff below is mostly optimized away when
227 * CONFIG_DEBUG_FS is not set.
229 static int atmci_req_show(struct seq_file *s, void *v)
231 struct atmel_mci_slot *slot = s->private;
232 struct mmc_request *mrq;
233 struct mmc_command *cmd;
234 struct mmc_command *stop;
235 struct mmc_data *data;
237 /* Make sure we get a consistent snapshot */
238 spin_lock_bh(&slot->host->lock);
248 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
249 cmd->opcode, cmd->arg, cmd->flags,
250 cmd->resp[0], cmd->resp[1], cmd->resp[2],
251 cmd->resp[2], cmd->error);
253 seq_printf(s, "DATA %u / %u * %u flg %x err %d\n",
254 data->bytes_xfered, data->blocks,
255 data->blksz, data->flags, data->error);
258 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n",
259 stop->opcode, stop->arg, stop->flags,
260 stop->resp[0], stop->resp[1], stop->resp[2],
261 stop->resp[2], stop->error);
264 spin_unlock_bh(&slot->host->lock);
269 static int atmci_req_open(struct inode *inode, struct file *file)
271 return single_open(file, atmci_req_show, inode->i_private);
274 static const struct file_operations atmci_req_fops = {
275 .owner = THIS_MODULE,
276 .open = atmci_req_open,
279 .release = single_release,
282 static void atmci_show_status_reg(struct seq_file *s,
283 const char *regname, u32 value)
285 static const char *sr_bit[] = {
316 seq_printf(s, "%s:\t0x%08x", regname, value);
317 for (i = 0; i < ARRAY_SIZE(sr_bit); i++) {
318 if (value & (1 << i)) {
320 seq_printf(s, " %s", sr_bit[i]);
322 seq_puts(s, " UNKNOWN");
328 static int atmci_regs_show(struct seq_file *s, void *v)
330 struct atmel_mci *host = s->private;
333 buf = kmalloc(MCI_REGS_SIZE, GFP_KERNEL);
338 * Grab a more or less consistent snapshot. Note that we're
339 * not disabling interrupts, so IMR and SR may not be
342 spin_lock_bh(&host->lock);
343 clk_enable(host->mck);
344 memcpy_fromio(buf, host->regs, MCI_REGS_SIZE);
345 clk_disable(host->mck);
346 spin_unlock_bh(&host->lock);
348 seq_printf(s, "MR:\t0x%08x%s%s CLKDIV=%u\n",
350 buf[MCI_MR / 4] & MCI_MR_RDPROOF ? " RDPROOF" : "",
351 buf[MCI_MR / 4] & MCI_MR_WRPROOF ? " WRPROOF" : "",
352 buf[MCI_MR / 4] & 0xff);
353 seq_printf(s, "DTOR:\t0x%08x\n", buf[MCI_DTOR / 4]);
354 seq_printf(s, "SDCR:\t0x%08x\n", buf[MCI_SDCR / 4]);
355 seq_printf(s, "ARGR:\t0x%08x\n", buf[MCI_ARGR / 4]);
356 seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n",
358 buf[MCI_BLKR / 4] & 0xffff,
359 (buf[MCI_BLKR / 4] >> 16) & 0xffff);
361 /* Don't read RSPR and RDR; it will consume the data there */
363 atmci_show_status_reg(s, "SR", buf[MCI_SR / 4]);
364 atmci_show_status_reg(s, "IMR", buf[MCI_IMR / 4]);
371 static int atmci_regs_open(struct inode *inode, struct file *file)
373 return single_open(file, atmci_regs_show, inode->i_private);
376 static const struct file_operations atmci_regs_fops = {
377 .owner = THIS_MODULE,
378 .open = atmci_regs_open,
381 .release = single_release,
384 static void atmci_init_debugfs(struct atmel_mci_slot *slot)
386 struct mmc_host *mmc = slot->mmc;
387 struct atmel_mci *host = slot->host;
391 root = mmc->debugfs_root;
395 node = debugfs_create_file("regs", S_IRUSR, root, host,
402 node = debugfs_create_file("req", S_IRUSR, root, slot, &atmci_req_fops);
406 node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state);
410 node = debugfs_create_x32("pending_events", S_IRUSR, root,
411 (u32 *)&host->pending_events);
415 node = debugfs_create_x32("completed_events", S_IRUSR, root,
416 (u32 *)&host->completed_events);
423 dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n");
426 static inline unsigned int ns_to_clocks(struct atmel_mci *host,
429 return (ns * (host->bus_hz / 1000000) + 999) / 1000;
432 static void atmci_set_timeout(struct atmel_mci *host,
433 struct atmel_mci_slot *slot, struct mmc_data *data)
435 static unsigned dtomul_to_shift[] = {
436 0, 4, 7, 8, 10, 12, 16, 20
442 timeout = ns_to_clocks(host, data->timeout_ns) + data->timeout_clks;
444 for (dtomul = 0; dtomul < 8; dtomul++) {
445 unsigned shift = dtomul_to_shift[dtomul];
446 dtocyc = (timeout + (1 << shift) - 1) >> shift;
456 dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n",
457 dtocyc << dtomul_to_shift[dtomul]);
458 mci_writel(host, DTOR, (MCI_DTOMUL(dtomul) | MCI_DTOCYC(dtocyc)));
462 * Return mask with command flags to be enabled for this command.
464 static u32 atmci_prepare_command(struct mmc_host *mmc,
465 struct mmc_command *cmd)
467 struct mmc_data *data;
470 cmd->error = -EINPROGRESS;
472 cmdr = MCI_CMDR_CMDNB(cmd->opcode);
474 if (cmd->flags & MMC_RSP_PRESENT) {
475 if (cmd->flags & MMC_RSP_136)
476 cmdr |= MCI_CMDR_RSPTYP_136BIT;
478 cmdr |= MCI_CMDR_RSPTYP_48BIT;
482 * This should really be MAXLAT_5 for CMD2 and ACMD41, but
483 * it's too difficult to determine whether this is an ACMD or
484 * not. Better make it 64.
486 cmdr |= MCI_CMDR_MAXLAT_64CYC;
488 if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN)
489 cmdr |= MCI_CMDR_OPDCMD;
493 cmdr |= MCI_CMDR_START_XFER;
494 if (data->flags & MMC_DATA_STREAM)
495 cmdr |= MCI_CMDR_STREAM;
496 else if (data->blocks > 1)
497 cmdr |= MCI_CMDR_MULTI_BLOCK;
499 cmdr |= MCI_CMDR_BLOCK;
501 if (data->flags & MMC_DATA_READ)
502 cmdr |= MCI_CMDR_TRDIR_READ;
508 static void atmci_start_command(struct atmel_mci *host,
509 struct mmc_command *cmd, u32 cmd_flags)
514 dev_vdbg(&host->pdev->dev,
515 "start command: ARGR=0x%08x CMDR=0x%08x\n",
516 cmd->arg, cmd_flags);
518 mci_writel(host, ARGR, cmd->arg);
519 mci_writel(host, CMDR, cmd_flags);
522 static void send_stop_cmd(struct atmel_mci *host, struct mmc_data *data)
524 atmci_start_command(host, data->stop, host->stop_cmdr);
525 mci_writel(host, IER, MCI_CMDRDY);
528 #ifdef CONFIG_MMC_ATMELMCI_DMA
529 static void atmci_dma_cleanup(struct atmel_mci *host)
531 struct mmc_data *data = host->data;
533 dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len,
534 ((data->flags & MMC_DATA_WRITE)
535 ? DMA_TO_DEVICE : DMA_FROM_DEVICE));
538 static void atmci_stop_dma(struct atmel_mci *host)
540 struct dma_chan *chan = host->data_chan;
543 chan->device->device_terminate_all(chan);
544 atmci_dma_cleanup(host);
546 /* Data transfer was stopped by the interrupt handler */
547 atmci_set_pending(host, EVENT_XFER_COMPLETE);
548 mci_writel(host, IER, MCI_NOTBUSY);
552 /* This function is called by the DMA driver from tasklet context. */
553 static void atmci_dma_complete(void *arg)
555 struct atmel_mci *host = arg;
556 struct mmc_data *data = host->data;
558 dev_vdbg(&host->pdev->dev, "DMA complete\n");
560 atmci_dma_cleanup(host);
563 * If the card was removed, data will be NULL. No point trying
564 * to send the stop command or waiting for NBUSY in this case.
567 atmci_set_pending(host, EVENT_XFER_COMPLETE);
568 tasklet_schedule(&host->tasklet);
571 * Regardless of what the documentation says, we have
572 * to wait for NOTBUSY even after block read
575 * When the DMA transfer is complete, the controller
576 * may still be reading the CRC from the card, i.e.
577 * the data transfer is still in progress and we
578 * haven't seen all the potential error bits yet.
580 * The interrupt handler will schedule a different
581 * tasklet to finish things up when the data transfer
582 * is completely done.
584 * We may not complete the mmc request here anyway
585 * because the mmc layer may call back and cause us to
586 * violate the "don't submit new operations from the
587 * completion callback" rule of the dma engine
590 mci_writel(host, IER, MCI_NOTBUSY);
595 atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
597 struct dma_chan *chan;
598 struct dma_async_tx_descriptor *desc;
599 struct scatterlist *sg;
601 enum dma_data_direction direction;
605 * We don't do DMA on "complex" transfers, i.e. with
606 * non-word-aligned buffers or lengths. Also, we don't bother
607 * with all the DMA setup overhead for short transfers.
609 if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD)
614 for_each_sg(data->sg, sg, data->sg_len, i) {
615 if (sg->offset & 3 || sg->length & 3)
619 /* If we don't have a channel, we can't do DMA */
620 chan = host->dma.chan;
622 host->data_chan = chan;
627 if (data->flags & MMC_DATA_READ)
628 direction = DMA_FROM_DEVICE;
630 direction = DMA_TO_DEVICE;
632 sglen = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, direction);
633 if (sglen != data->sg_len)
635 desc = chan->device->device_prep_slave_sg(chan,
636 data->sg, data->sg_len, direction,
637 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
641 host->dma.data_desc = desc;
642 desc->callback = atmci_dma_complete;
643 desc->callback_param = host;
644 desc->tx_submit(desc);
647 chan->device->device_issue_pending(chan);
651 dma_unmap_sg(&host->pdev->dev, data->sg, sglen, direction);
655 #else /* CONFIG_MMC_ATMELMCI_DMA */
657 static int atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data)
662 static void atmci_stop_dma(struct atmel_mci *host)
664 /* Data transfer was stopped by the interrupt handler */
665 atmci_set_pending(host, EVENT_XFER_COMPLETE);
666 mci_writel(host, IER, MCI_NOTBUSY);
669 #endif /* CONFIG_MMC_ATMELMCI_DMA */
672 * Returns a mask of interrupt flags to be enabled after the whole
673 * request has been prepared.
675 static u32 atmci_submit_data(struct atmel_mci *host, struct mmc_data *data)
679 data->error = -EINPROGRESS;
685 iflags = ATMCI_DATA_ERROR_FLAGS;
686 if (atmci_submit_data_dma(host, data)) {
687 host->data_chan = NULL;
690 * Errata: MMC data write operation with less than 12
691 * bytes is impossible.
693 * Errata: MCI Transmit Data Register (TDR) FIFO
694 * corruption when length is not multiple of 4.
696 if (data->blocks * data->blksz < 12
697 || (data->blocks * data->blksz) & 3)
698 host->need_reset = true;
701 host->pio_offset = 0;
702 if (data->flags & MMC_DATA_READ)
711 static void atmci_start_request(struct atmel_mci *host,
712 struct atmel_mci_slot *slot)
714 struct mmc_request *mrq;
715 struct mmc_command *cmd;
716 struct mmc_data *data;
721 host->cur_slot = slot;
724 host->pending_events = 0;
725 host->completed_events = 0;
726 host->data_status = 0;
728 if (host->need_reset) {
729 mci_writel(host, CR, MCI_CR_SWRST);
730 mci_writel(host, CR, MCI_CR_MCIEN);
731 mci_writel(host, MR, host->mode_reg);
732 host->need_reset = false;
734 mci_writel(host, SDCR, slot->sdc_reg);
736 iflags = mci_readl(host, IMR);
738 dev_warn(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n",
741 if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) {
742 /* Send init sequence (74 clock cycles) */
743 mci_writel(host, CMDR, MCI_CMDR_SPCMD_INIT);
744 while (!(mci_readl(host, SR) & MCI_CMDRDY))
749 atmci_set_timeout(host, slot, data);
751 /* Must set block count/size before sending command */
752 mci_writel(host, BLKR, MCI_BCNT(data->blocks)
753 | MCI_BLKLEN(data->blksz));
754 dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n",
755 MCI_BCNT(data->blocks) | MCI_BLKLEN(data->blksz));
760 cmdflags = atmci_prepare_command(slot->mmc, cmd);
761 atmci_start_command(host, cmd, cmdflags);
764 iflags |= atmci_submit_data(host, data);
767 host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop);
768 host->stop_cmdr |= MCI_CMDR_STOP_XFER;
769 if (!(data->flags & MMC_DATA_WRITE))
770 host->stop_cmdr |= MCI_CMDR_TRDIR_READ;
771 if (data->flags & MMC_DATA_STREAM)
772 host->stop_cmdr |= MCI_CMDR_STREAM;
774 host->stop_cmdr |= MCI_CMDR_MULTI_BLOCK;
778 * We could have enabled interrupts earlier, but I suspect
779 * that would open up a nice can of interesting race
780 * conditions (e.g. command and data complete, but stop not
783 mci_writel(host, IER, iflags);
786 static void atmci_queue_request(struct atmel_mci *host,
787 struct atmel_mci_slot *slot, struct mmc_request *mrq)
789 dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n",
792 spin_lock_bh(&host->lock);
794 if (host->state == STATE_IDLE) {
795 host->state = STATE_SENDING_CMD;
796 atmci_start_request(host, slot);
798 list_add_tail(&slot->queue_node, &host->queue);
800 spin_unlock_bh(&host->lock);
803 static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
805 struct atmel_mci_slot *slot = mmc_priv(mmc);
806 struct atmel_mci *host = slot->host;
807 struct mmc_data *data;
812 * We may "know" the card is gone even though there's still an
813 * electrical connection. If so, we really need to communicate
814 * this to the MMC core since there won't be any more
815 * interrupts as the card is completely removed. Otherwise,
816 * the MMC core might believe the card is still there even
817 * though the card was just removed very slowly.
819 if (!test_bit(ATMCI_CARD_PRESENT, &slot->flags)) {
820 mrq->cmd->error = -ENOMEDIUM;
821 mmc_request_done(mmc, mrq);
825 /* We don't support multiple blocks of weird lengths. */
827 if (data && data->blocks > 1 && data->blksz & 3) {
828 mrq->cmd->error = -EINVAL;
829 mmc_request_done(mmc, mrq);
832 atmci_queue_request(host, slot, mrq);
835 static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
837 struct atmel_mci_slot *slot = mmc_priv(mmc);
838 struct atmel_mci *host = slot->host;
841 slot->sdc_reg &= ~MCI_SDCBUS_MASK;
842 switch (ios->bus_width) {
843 case MMC_BUS_WIDTH_1:
844 slot->sdc_reg |= MCI_SDCBUS_1BIT;
846 case MMC_BUS_WIDTH_4:
847 slot->sdc_reg |= MCI_SDCBUS_4BIT;
852 unsigned int clock_min = ~0U;
855 spin_lock_bh(&host->lock);
856 if (!host->mode_reg) {
857 clk_enable(host->mck);
858 mci_writel(host, CR, MCI_CR_SWRST);
859 mci_writel(host, CR, MCI_CR_MCIEN);
863 * Use mirror of ios->clock to prevent race with mmc
864 * core ios update when finding the minimum.
866 slot->clock = ios->clock;
867 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
868 if (host->slot[i] && host->slot[i]->clock
869 && host->slot[i]->clock < clock_min)
870 clock_min = host->slot[i]->clock;
873 /* Calculate clock divider */
874 clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1;
876 dev_warn(&mmc->class_dev,
877 "clock %u too slow; using %lu\n",
878 clock_min, host->bus_hz / (2 * 256));
882 host->mode_reg = MCI_MR_CLKDIV(clkdiv);
885 * WRPROOF and RDPROOF prevent overruns/underruns by
886 * stopping the clock when the FIFO is full/empty.
887 * This state is not expected to last for long.
889 if (mci_has_rwproof())
890 host->mode_reg |= (MCI_MR_WRPROOF | MCI_MR_RDPROOF);
892 if (list_empty(&host->queue))
893 mci_writel(host, MR, host->mode_reg);
895 host->need_clock_update = true;
897 spin_unlock_bh(&host->lock);
899 bool any_slot_active = false;
901 spin_lock_bh(&host->lock);
903 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
904 if (host->slot[i] && host->slot[i]->clock) {
905 any_slot_active = true;
909 if (!any_slot_active) {
910 mci_writel(host, CR, MCI_CR_MCIDIS);
911 if (host->mode_reg) {
913 clk_disable(host->mck);
917 spin_unlock_bh(&host->lock);
920 switch (ios->power_mode) {
922 set_bit(ATMCI_CARD_NEED_INIT, &slot->flags);
926 * TODO: None of the currently available AVR32-based
927 * boards allow MMC power to be turned off. Implement
928 * power control when this can be tested properly.
930 * We also need to hook this into the clock management
931 * somehow so that newly inserted cards aren't
932 * subjected to a fast clock before we have a chance
933 * to figure out what the maximum rate is. Currently,
934 * there's no way to avoid this, and there never will
935 * be for boards that don't support power control.
941 static int atmci_get_ro(struct mmc_host *mmc)
943 int read_only = -ENOSYS;
944 struct atmel_mci_slot *slot = mmc_priv(mmc);
946 if (gpio_is_valid(slot->wp_pin)) {
947 read_only = gpio_get_value(slot->wp_pin);
948 dev_dbg(&mmc->class_dev, "card is %s\n",
949 read_only ? "read-only" : "read-write");
955 static int atmci_get_cd(struct mmc_host *mmc)
957 int present = -ENOSYS;
958 struct atmel_mci_slot *slot = mmc_priv(mmc);
960 if (gpio_is_valid(slot->detect_pin)) {
961 present = !(gpio_get_value(slot->detect_pin) ^
962 slot->detect_is_active_high);
963 dev_dbg(&mmc->class_dev, "card is %spresent\n",
964 present ? "" : "not ");
970 static const struct mmc_host_ops atmci_ops = {
971 .request = atmci_request,
972 .set_ios = atmci_set_ios,
973 .get_ro = atmci_get_ro,
974 .get_cd = atmci_get_cd,
977 /* Called with host->lock held */
978 static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq)
979 __releases(&host->lock)
980 __acquires(&host->lock)
982 struct atmel_mci_slot *slot = NULL;
983 struct mmc_host *prev_mmc = host->cur_slot->mmc;
985 WARN_ON(host->cmd || host->data);
988 * Update the MMC clock rate if necessary. This may be
989 * necessary if set_ios() is called when a different slot is
990 * busy transfering data.
992 if (host->need_clock_update)
993 mci_writel(host, MR, host->mode_reg);
995 host->cur_slot->mrq = NULL;
997 if (!list_empty(&host->queue)) {
998 slot = list_entry(host->queue.next,
999 struct atmel_mci_slot, queue_node);
1000 list_del(&slot->queue_node);
1001 dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n",
1002 mmc_hostname(slot->mmc));
1003 host->state = STATE_SENDING_CMD;
1004 atmci_start_request(host, slot);
1006 dev_vdbg(&host->pdev->dev, "list empty\n");
1007 host->state = STATE_IDLE;
1010 spin_unlock(&host->lock);
1011 mmc_request_done(prev_mmc, mrq);
1012 spin_lock(&host->lock);
1015 static void atmci_command_complete(struct atmel_mci *host,
1016 struct mmc_command *cmd)
1018 u32 status = host->cmd_status;
1020 /* Read the response from the card (up to 16 bytes) */
1021 cmd->resp[0] = mci_readl(host, RSPR);
1022 cmd->resp[1] = mci_readl(host, RSPR);
1023 cmd->resp[2] = mci_readl(host, RSPR);
1024 cmd->resp[3] = mci_readl(host, RSPR);
1026 if (status & MCI_RTOE)
1027 cmd->error = -ETIMEDOUT;
1028 else if ((cmd->flags & MMC_RSP_CRC) && (status & MCI_RCRCE))
1029 cmd->error = -EILSEQ;
1030 else if (status & (MCI_RINDE | MCI_RDIRE | MCI_RENDE))
1036 dev_dbg(&host->pdev->dev,
1037 "command error: status=0x%08x\n", status);
1041 atmci_stop_dma(host);
1042 mci_writel(host, IDR, MCI_NOTBUSY
1043 | MCI_TXRDY | MCI_RXRDY
1044 | ATMCI_DATA_ERROR_FLAGS);
1049 static void atmci_detect_change(unsigned long data)
1051 struct atmel_mci_slot *slot = (struct atmel_mci_slot *)data;
1056 * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before
1057 * freeing the interrupt. We must not re-enable the interrupt
1058 * if it has been freed, and if we're shutting down, it
1059 * doesn't really matter whether the card is present or not.
1062 if (test_bit(ATMCI_SHUTDOWN, &slot->flags))
1065 enable_irq(gpio_to_irq(slot->detect_pin));
1066 present = !(gpio_get_value(slot->detect_pin) ^
1067 slot->detect_is_active_high);
1068 present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags);
1070 dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n",
1071 present, present_old);
1073 if (present != present_old) {
1074 struct atmel_mci *host = slot->host;
1075 struct mmc_request *mrq;
1077 dev_dbg(&slot->mmc->class_dev, "card %s\n",
1078 present ? "inserted" : "removed");
1080 spin_lock(&host->lock);
1083 clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1085 set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1087 /* Clean up queue if present */
1090 if (mrq == host->mrq) {
1092 * Reset controller to terminate any ongoing
1093 * commands or data transfers.
1095 mci_writel(host, CR, MCI_CR_SWRST);
1096 mci_writel(host, CR, MCI_CR_MCIEN);
1097 mci_writel(host, MR, host->mode_reg);
1102 switch (host->state) {
1105 case STATE_SENDING_CMD:
1106 mrq->cmd->error = -ENOMEDIUM;
1110 case STATE_SENDING_DATA:
1111 mrq->data->error = -ENOMEDIUM;
1112 atmci_stop_dma(host);
1114 case STATE_DATA_BUSY:
1115 case STATE_DATA_ERROR:
1116 if (mrq->data->error == -EINPROGRESS)
1117 mrq->data->error = -ENOMEDIUM;
1121 case STATE_SENDING_STOP:
1122 mrq->stop->error = -ENOMEDIUM;
1126 atmci_request_end(host, mrq);
1128 list_del(&slot->queue_node);
1129 mrq->cmd->error = -ENOMEDIUM;
1131 mrq->data->error = -ENOMEDIUM;
1133 mrq->stop->error = -ENOMEDIUM;
1135 spin_unlock(&host->lock);
1136 mmc_request_done(slot->mmc, mrq);
1137 spin_lock(&host->lock);
1140 spin_unlock(&host->lock);
1142 mmc_detect_change(slot->mmc, 0);
1146 static void atmci_tasklet_func(unsigned long priv)
1148 struct atmel_mci *host = (struct atmel_mci *)priv;
1149 struct mmc_request *mrq = host->mrq;
1150 struct mmc_data *data = host->data;
1151 struct mmc_command *cmd = host->cmd;
1152 enum atmel_mci_state state = host->state;
1153 enum atmel_mci_state prev_state;
1156 spin_lock(&host->lock);
1158 state = host->state;
1160 dev_vdbg(&host->pdev->dev,
1161 "tasklet: state %u pending/completed/mask %lx/%lx/%x\n",
1162 state, host->pending_events, host->completed_events,
1163 mci_readl(host, IMR));
1172 case STATE_SENDING_CMD:
1173 if (!atmci_test_and_clear_pending(host,
1174 EVENT_CMD_COMPLETE))
1178 atmci_set_completed(host, EVENT_CMD_COMPLETE);
1179 atmci_command_complete(host, mrq->cmd);
1180 if (!mrq->data || cmd->error) {
1181 atmci_request_end(host, host->mrq);
1185 prev_state = state = STATE_SENDING_DATA;
1188 case STATE_SENDING_DATA:
1189 if (atmci_test_and_clear_pending(host,
1190 EVENT_DATA_ERROR)) {
1191 atmci_stop_dma(host);
1193 send_stop_cmd(host, data);
1194 state = STATE_DATA_ERROR;
1198 if (!atmci_test_and_clear_pending(host,
1199 EVENT_XFER_COMPLETE))
1202 atmci_set_completed(host, EVENT_XFER_COMPLETE);
1203 prev_state = state = STATE_DATA_BUSY;
1206 case STATE_DATA_BUSY:
1207 if (!atmci_test_and_clear_pending(host,
1208 EVENT_DATA_COMPLETE))
1212 atmci_set_completed(host, EVENT_DATA_COMPLETE);
1213 status = host->data_status;
1214 if (unlikely(status & ATMCI_DATA_ERROR_FLAGS)) {
1215 if (status & MCI_DTOE) {
1216 dev_dbg(&host->pdev->dev,
1217 "data timeout error\n");
1218 data->error = -ETIMEDOUT;
1219 } else if (status & MCI_DCRCE) {
1220 dev_dbg(&host->pdev->dev,
1221 "data CRC error\n");
1222 data->error = -EILSEQ;
1224 dev_dbg(&host->pdev->dev,
1225 "data FIFO error (status=%08x)\n",
1230 data->bytes_xfered = data->blocks * data->blksz;
1235 atmci_request_end(host, host->mrq);
1239 prev_state = state = STATE_SENDING_STOP;
1241 send_stop_cmd(host, data);
1244 case STATE_SENDING_STOP:
1245 if (!atmci_test_and_clear_pending(host,
1246 EVENT_CMD_COMPLETE))
1250 atmci_command_complete(host, mrq->stop);
1251 atmci_request_end(host, host->mrq);
1254 case STATE_DATA_ERROR:
1255 if (!atmci_test_and_clear_pending(host,
1256 EVENT_XFER_COMPLETE))
1259 state = STATE_DATA_BUSY;
1262 } while (state != prev_state);
1264 host->state = state;
1267 spin_unlock(&host->lock);
1270 static void atmci_read_data_pio(struct atmel_mci *host)
1272 struct scatterlist *sg = host->sg;
1273 void *buf = sg_virt(sg);
1274 unsigned int offset = host->pio_offset;
1275 struct mmc_data *data = host->data;
1278 unsigned int nbytes = 0;
1281 value = mci_readl(host, RDR);
1282 if (likely(offset + 4 <= sg->length)) {
1283 put_unaligned(value, (u32 *)(buf + offset));
1288 if (offset == sg->length) {
1289 flush_dcache_page(sg_page(sg));
1290 host->sg = sg = sg_next(sg);
1298 unsigned int remaining = sg->length - offset;
1299 memcpy(buf + offset, &value, remaining);
1300 nbytes += remaining;
1302 flush_dcache_page(sg_page(sg));
1303 host->sg = sg = sg_next(sg);
1307 offset = 4 - remaining;
1309 memcpy(buf, (u8 *)&value + remaining, offset);
1313 status = mci_readl(host, SR);
1314 if (status & ATMCI_DATA_ERROR_FLAGS) {
1315 mci_writel(host, IDR, (MCI_NOTBUSY | MCI_RXRDY
1316 | ATMCI_DATA_ERROR_FLAGS));
1317 host->data_status = status;
1318 data->bytes_xfered += nbytes;
1320 atmci_set_pending(host, EVENT_DATA_ERROR);
1321 tasklet_schedule(&host->tasklet);
1324 } while (status & MCI_RXRDY);
1326 host->pio_offset = offset;
1327 data->bytes_xfered += nbytes;
1332 mci_writel(host, IDR, MCI_RXRDY);
1333 mci_writel(host, IER, MCI_NOTBUSY);
1334 data->bytes_xfered += nbytes;
1336 atmci_set_pending(host, EVENT_XFER_COMPLETE);
1339 static void atmci_write_data_pio(struct atmel_mci *host)
1341 struct scatterlist *sg = host->sg;
1342 void *buf = sg_virt(sg);
1343 unsigned int offset = host->pio_offset;
1344 struct mmc_data *data = host->data;
1347 unsigned int nbytes = 0;
1350 if (likely(offset + 4 <= sg->length)) {
1351 value = get_unaligned((u32 *)(buf + offset));
1352 mci_writel(host, TDR, value);
1356 if (offset == sg->length) {
1357 host->sg = sg = sg_next(sg);
1365 unsigned int remaining = sg->length - offset;
1368 memcpy(&value, buf + offset, remaining);
1369 nbytes += remaining;
1371 host->sg = sg = sg_next(sg);
1373 mci_writel(host, TDR, value);
1377 offset = 4 - remaining;
1379 memcpy((u8 *)&value + remaining, buf, offset);
1380 mci_writel(host, TDR, value);
1384 status = mci_readl(host, SR);
1385 if (status & ATMCI_DATA_ERROR_FLAGS) {
1386 mci_writel(host, IDR, (MCI_NOTBUSY | MCI_TXRDY
1387 | ATMCI_DATA_ERROR_FLAGS));
1388 host->data_status = status;
1389 data->bytes_xfered += nbytes;
1391 atmci_set_pending(host, EVENT_DATA_ERROR);
1392 tasklet_schedule(&host->tasklet);
1395 } while (status & MCI_TXRDY);
1397 host->pio_offset = offset;
1398 data->bytes_xfered += nbytes;
1403 mci_writel(host, IDR, MCI_TXRDY);
1404 mci_writel(host, IER, MCI_NOTBUSY);
1405 data->bytes_xfered += nbytes;
1407 atmci_set_pending(host, EVENT_XFER_COMPLETE);
1410 static void atmci_cmd_interrupt(struct atmel_mci *host, u32 status)
1412 mci_writel(host, IDR, MCI_CMDRDY);
1414 host->cmd_status = status;
1416 atmci_set_pending(host, EVENT_CMD_COMPLETE);
1417 tasklet_schedule(&host->tasklet);
1420 static irqreturn_t atmci_interrupt(int irq, void *dev_id)
1422 struct atmel_mci *host = dev_id;
1423 u32 status, mask, pending;
1424 unsigned int pass_count = 0;
1427 status = mci_readl(host, SR);
1428 mask = mci_readl(host, IMR);
1429 pending = status & mask;
1433 if (pending & ATMCI_DATA_ERROR_FLAGS) {
1434 mci_writel(host, IDR, ATMCI_DATA_ERROR_FLAGS
1435 | MCI_RXRDY | MCI_TXRDY);
1436 pending &= mci_readl(host, IMR);
1438 host->data_status = status;
1440 atmci_set_pending(host, EVENT_DATA_ERROR);
1441 tasklet_schedule(&host->tasklet);
1443 if (pending & MCI_NOTBUSY) {
1444 mci_writel(host, IDR,
1445 ATMCI_DATA_ERROR_FLAGS | MCI_NOTBUSY);
1446 if (!host->data_status)
1447 host->data_status = status;
1449 atmci_set_pending(host, EVENT_DATA_COMPLETE);
1450 tasklet_schedule(&host->tasklet);
1452 if (pending & MCI_RXRDY)
1453 atmci_read_data_pio(host);
1454 if (pending & MCI_TXRDY)
1455 atmci_write_data_pio(host);
1457 if (pending & MCI_CMDRDY)
1458 atmci_cmd_interrupt(host, status);
1459 } while (pass_count++ < 5);
1461 return pass_count ? IRQ_HANDLED : IRQ_NONE;
1464 static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id)
1466 struct atmel_mci_slot *slot = dev_id;
1469 * Disable interrupts until the pin has stabilized and check
1470 * the state then. Use mod_timer() since we may be in the
1471 * middle of the timer routine when this interrupt triggers.
1473 disable_irq_nosync(irq);
1474 mod_timer(&slot->detect_timer, jiffies + msecs_to_jiffies(20));
1479 static int __init atmci_init_slot(struct atmel_mci *host,
1480 struct mci_slot_pdata *slot_data, unsigned int id,
1483 struct mmc_host *mmc;
1484 struct atmel_mci_slot *slot;
1486 mmc = mmc_alloc_host(sizeof(struct atmel_mci_slot), &host->pdev->dev);
1490 slot = mmc_priv(mmc);
1493 slot->detect_pin = slot_data->detect_pin;
1494 slot->wp_pin = slot_data->wp_pin;
1495 slot->detect_is_active_high = slot_data->detect_is_active_high;
1496 slot->sdc_reg = sdc_reg;
1498 mmc->ops = &atmci_ops;
1499 mmc->f_min = DIV_ROUND_UP(host->bus_hz, 512);
1500 mmc->f_max = host->bus_hz / 2;
1501 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
1502 if (slot_data->bus_width >= 4)
1503 mmc->caps |= MMC_CAP_4_BIT_DATA;
1505 mmc->max_hw_segs = 64;
1506 mmc->max_phys_segs = 64;
1507 mmc->max_req_size = 32768 * 512;
1508 mmc->max_blk_size = 32768;
1509 mmc->max_blk_count = 512;
1511 /* Assume card is present initially */
1512 set_bit(ATMCI_CARD_PRESENT, &slot->flags);
1513 if (gpio_is_valid(slot->detect_pin)) {
1514 if (gpio_request(slot->detect_pin, "mmc_detect")) {
1515 dev_dbg(&mmc->class_dev, "no detect pin available\n");
1516 slot->detect_pin = -EBUSY;
1517 } else if (gpio_get_value(slot->detect_pin) ^
1518 slot->detect_is_active_high) {
1519 clear_bit(ATMCI_CARD_PRESENT, &slot->flags);
1523 if (!gpio_is_valid(slot->detect_pin))
1524 mmc->caps |= MMC_CAP_NEEDS_POLL;
1526 if (gpio_is_valid(slot->wp_pin)) {
1527 if (gpio_request(slot->wp_pin, "mmc_wp")) {
1528 dev_dbg(&mmc->class_dev, "no WP pin available\n");
1529 slot->wp_pin = -EBUSY;
1533 host->slot[id] = slot;
1536 if (gpio_is_valid(slot->detect_pin)) {
1539 setup_timer(&slot->detect_timer, atmci_detect_change,
1540 (unsigned long)slot);
1542 ret = request_irq(gpio_to_irq(slot->detect_pin),
1543 atmci_detect_interrupt,
1544 IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
1545 "mmc-detect", slot);
1547 dev_dbg(&mmc->class_dev,
1548 "could not request IRQ %d for detect pin\n",
1549 gpio_to_irq(slot->detect_pin));
1550 gpio_free(slot->detect_pin);
1551 slot->detect_pin = -EBUSY;
1555 atmci_init_debugfs(slot);
1560 static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot,
1563 /* Debugfs stuff is cleaned up by mmc core */
1565 set_bit(ATMCI_SHUTDOWN, &slot->flags);
1568 mmc_remove_host(slot->mmc);
1570 if (gpio_is_valid(slot->detect_pin)) {
1571 int pin = slot->detect_pin;
1573 free_irq(gpio_to_irq(pin), slot);
1574 del_timer_sync(&slot->detect_timer);
1577 if (gpio_is_valid(slot->wp_pin))
1578 gpio_free(slot->wp_pin);
1580 slot->host->slot[id] = NULL;
1581 mmc_free_host(slot->mmc);
1584 #ifdef CONFIG_MMC_ATMELMCI_DMA
1585 static bool filter(struct dma_chan *chan, void *slave)
1587 struct dw_dma_slave *dws = slave;
1589 if (dws->dma_dev == chan->device->dev) {
1590 chan->private = dws;
1597 static int __init atmci_probe(struct platform_device *pdev)
1599 struct mci_platform_data *pdata;
1600 struct atmel_mci *host;
1601 struct resource *regs;
1602 unsigned int nr_slots;
1606 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1609 pdata = pdev->dev.platform_data;
1612 irq = platform_get_irq(pdev, 0);
1616 host = kzalloc(sizeof(struct atmel_mci), GFP_KERNEL);
1621 spin_lock_init(&host->lock);
1622 INIT_LIST_HEAD(&host->queue);
1624 host->mck = clk_get(&pdev->dev, "mci_clk");
1625 if (IS_ERR(host->mck)) {
1626 ret = PTR_ERR(host->mck);
1631 host->regs = ioremap(regs->start, regs->end - regs->start + 1);
1635 clk_enable(host->mck);
1636 mci_writel(host, CR, MCI_CR_SWRST);
1637 host->bus_hz = clk_get_rate(host->mck);
1638 clk_disable(host->mck);
1640 host->mapbase = regs->start;
1642 tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host);
1644 ret = request_irq(irq, atmci_interrupt, 0, dev_name(&pdev->dev), host);
1646 goto err_request_irq;
1648 #ifdef CONFIG_MMC_ATMELMCI_DMA
1649 if (pdata->dma_slave.dma_dev) {
1650 struct dw_dma_slave *dws = &pdata->dma_slave;
1651 dma_cap_mask_t mask;
1653 dws->tx_reg = regs->start + MCI_TDR;
1654 dws->rx_reg = regs->start + MCI_RDR;
1656 /* Try to grab a DMA channel */
1658 dma_cap_set(DMA_SLAVE, mask);
1659 host->dma.chan = dma_request_channel(mask, filter, dws);
1661 if (!host->dma.chan)
1662 dev_notice(&pdev->dev, "DMA not available, using PIO\n");
1663 #endif /* CONFIG_MMC_ATMELMCI_DMA */
1665 platform_set_drvdata(pdev, host);
1667 /* We need at least one slot to succeed */
1670 if (pdata->slot[0].bus_width) {
1671 ret = atmci_init_slot(host, &pdata->slot[0],
1672 MCI_SDCSEL_SLOT_A, 0);
1676 if (pdata->slot[1].bus_width) {
1677 ret = atmci_init_slot(host, &pdata->slot[1],
1678 MCI_SDCSEL_SLOT_B, 1);
1684 dev_err(&pdev->dev, "init failed: no slot defined\n");
1688 dev_info(&pdev->dev,
1689 "Atmel MCI controller at 0x%08lx irq %d, %u slots\n",
1690 host->mapbase, irq, nr_slots);
1695 #ifdef CONFIG_MMC_ATMELMCI_DMA
1697 dma_release_channel(host->dma.chan);
1699 free_irq(irq, host);
1701 iounmap(host->regs);
1709 static int __exit atmci_remove(struct platform_device *pdev)
1711 struct atmel_mci *host = platform_get_drvdata(pdev);
1714 platform_set_drvdata(pdev, NULL);
1716 for (i = 0; i < ATMEL_MCI_MAX_NR_SLOTS; i++) {
1718 atmci_cleanup_slot(host->slot[i], i);
1721 clk_enable(host->mck);
1722 mci_writel(host, IDR, ~0UL);
1723 mci_writel(host, CR, MCI_CR_MCIDIS);
1724 mci_readl(host, SR);
1725 clk_disable(host->mck);
1727 #ifdef CONFIG_MMC_ATMELMCI_DMA
1729 dma_release_channel(host->dma.chan);
1732 free_irq(platform_get_irq(pdev, 0), host);
1733 iounmap(host->regs);
1741 static struct platform_driver atmci_driver = {
1742 .remove = __exit_p(atmci_remove),
1744 .name = "atmel_mci",
1748 static int __init atmci_init(void)
1750 return platform_driver_probe(&atmci_driver, atmci_probe);
1753 static void __exit atmci_exit(void)
1755 platform_driver_unregister(&atmci_driver);
1758 late_initcall(atmci_init); /* try to load after dma driver when built-in */
1759 module_exit(atmci_exit);
1761 MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver");
1762 MODULE_AUTHOR("Haavard Skinnemoen <haavard.skinnemoen@atmel.com>");
1763 MODULE_LICENSE("GPL v2");