2 * Driver for MMC and SSD cards for Cavium ThunderX SOCs.
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
8 * Copyright (C) 2016 Cavium Inc.
10 #include <linux/dma-mapping.h>
11 #include <linux/interrupt.h>
12 #include <linux/mmc/mmc.h>
13 #include <linux/module.h>
15 #include <linux/of_platform.h>
16 #include <linux/pci.h>
19 static void thunder_mmc_acquire_bus(struct cvm_mmc_host *host)
21 down(&host->mmc_serializer);
24 static void thunder_mmc_release_bus(struct cvm_mmc_host *host)
26 up(&host->mmc_serializer);
29 static void thunder_mmc_int_enable(struct cvm_mmc_host *host, u64 val)
31 writeq(val, host->base + MIO_EMM_INT(host));
32 writeq(val, host->base + MIO_EMM_INT_EN_SET(host));
35 static int thunder_mmc_register_interrupts(struct cvm_mmc_host *host,
40 nvec = pci_alloc_irq_vectors(pdev, 1, 9, PCI_IRQ_MSIX);
44 /* register interrupts */
45 for (i = 0; i < nvec; i++) {
46 ret = devm_request_irq(&pdev->dev, pci_irq_vector(pdev, i),
48 0, cvm_mmc_irq_names[i], host);
55 static int thunder_mmc_probe(struct pci_dev *pdev,
56 const struct pci_device_id *id)
58 struct device_node *node = pdev->dev.of_node;
59 struct device *dev = &pdev->dev;
60 struct device_node *child_node;
61 struct cvm_mmc_host *host;
64 host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL);
68 pci_set_drvdata(pdev, host);
69 ret = pcim_enable_device(pdev);
73 ret = pci_request_regions(pdev, KBUILD_MODNAME);
77 host->base = pcim_iomap(pdev, 0, pci_resource_len(pdev, 0));
81 /* On ThunderX these are identical */
82 host->dma_base = host->base;
84 host->reg_off = 0x2000;
85 host->reg_off_dma = 0x160;
87 host->clk = devm_clk_get(dev, NULL);
88 if (IS_ERR(host->clk))
89 return PTR_ERR(host->clk);
91 ret = clk_prepare_enable(host->clk);
94 host->sys_freq = clk_get_rate(host->clk);
96 spin_lock_init(&host->irq_handler_lock);
97 sema_init(&host->mmc_serializer, 1);
100 host->acquire_bus = thunder_mmc_acquire_bus;
101 host->release_bus = thunder_mmc_release_bus;
102 host->int_enable = thunder_mmc_int_enable;
105 host->big_dma_addr = true;
106 host->need_irq_handler_lock = true;
107 host->last_slot = -1;
109 ret = dma_set_mask(dev, DMA_BIT_MASK(48));
114 * Clear out any pending interrupts that may be left over from
115 * bootloader. Writing 1 to the bits clears them.
117 writeq(127, host->base + MIO_EMM_INT_EN(host));
118 writeq(3, host->base + MIO_EMM_DMA_INT_ENA_W1C(host));
120 writeq(BIT_ULL(16), host->base + MIO_EMM_DMA_FIFO_CFG(host));
122 ret = thunder_mmc_register_interrupts(host, pdev);
126 for_each_child_of_node(node, child_node) {
128 * mmc_of_parse and devm* require one device per slot.
129 * Create a dummy device per slot and set the node pointer to
130 * the slot. The easiest way to get this is using
131 * of_platform_device_create.
133 if (of_device_is_compatible(child_node, "mmc-slot")) {
134 host->slot_pdev[i] = of_platform_device_create(child_node, NULL,
136 if (!host->slot_pdev[i])
139 ret = cvm_mmc_of_slot_probe(&host->slot_pdev[i]->dev, host);
145 dev_info(dev, "probed\n");
149 clk_disable_unprepare(host->clk);
153 static void thunder_mmc_remove(struct pci_dev *pdev)
155 struct cvm_mmc_host *host = pci_get_drvdata(pdev);
159 for (i = 0; i < CAVIUM_MAX_MMC; i++)
161 cvm_mmc_of_slot_remove(host->slot[i]);
163 dma_cfg = readq(host->dma_base + MIO_EMM_DMA_CFG(host));
164 dma_cfg &= ~MIO_EMM_DMA_CFG_EN;
165 writeq(dma_cfg, host->dma_base + MIO_EMM_DMA_CFG(host));
167 clk_disable_unprepare(host->clk);
170 static const struct pci_device_id thunder_mmc_id_table[] = {
171 { PCI_DEVICE(PCI_VENDOR_ID_CAVIUM, 0xa010) },
172 { 0, } /* end of table */
175 static struct pci_driver thunder_mmc_driver = {
176 .name = KBUILD_MODNAME,
177 .id_table = thunder_mmc_id_table,
178 .probe = thunder_mmc_probe,
179 .remove = thunder_mmc_remove,
182 module_pci_driver(thunder_mmc_driver);
184 MODULE_AUTHOR("Cavium Inc.");
185 MODULE_DESCRIPTION("Cavium ThunderX eMMC Driver");
186 MODULE_LICENSE("GPL");
187 MODULE_DEVICE_TABLE(pci, thunder_mmc_id_table);