drivers/mmc/host/msm_sdcc.c

   1 /*
   2  *  linux/drivers/mmc/host/msm_sdcc.c - Qualcomm MSM 7X00A SDCC Driver
   3  *
   4  *  Copyright (C) 2007 Google Inc,
   5  *  Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved.
   6  *  Copyright (C) 2009, Code Aurora Forum. All Rights Reserved.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11  *
  12  * Based on mmci.c
  13  *
  14  * Author: San Mehat (san@android.com)
  15  *
  16  */
  17
  18 #include <linux/module.h>
  19 #include <linux/moduleparam.h>
  20 #include <linux/init.h>
  21 #include <linux/ioport.h>
  22 #include <linux/device.h>
  23 #include <linux/interrupt.h>
  24 #include <linux/delay.h>
  25 #include <linux/err.h>
  26 #include <linux/highmem.h>
  27 #include <linux/log2.h>
  28 #include <linux/mmc/host.h>
  29 #include <linux/mmc/card.h>
  30 #include <linux/mmc/sdio.h>
  31 #include <linux/clk.h>
  32 #include <linux/scatterlist.h>
  33 #include <linux/platform_device.h>
  34 #include <linux/dma-mapping.h>
  35 #include <linux/debugfs.h>
  36 #include <linux/io.h>
  37 #include <linux/memory.h>
  38
  39 #include <asm/cacheflush.h>
  40 #include <asm/div64.h>
  41 #include <asm/sizes.h>
  42
  43 #include <mach/mmc.h>
  44 #include <mach/msm_iomap.h>
  45 #include <mach/dma.h>
  46
  47 #include "msm_sdcc.h"
  48
  49 #define DRIVER_NAME "msm-sdcc"
  50
  51 #define BUSCLK_PWRSAVE 1
  52 #define BUSCLK_TIMEOUT (HZ)
  53 static unsigned int msmsdcc_fmin = 144000;
  54 static unsigned int msmsdcc_fmax = 50000000;
  55 static unsigned int msmsdcc_4bit = 1;
  56 static unsigned int msmsdcc_pwrsave = 1;
  57 static unsigned int msmsdcc_piopoll = 1;
  58 static unsigned int msmsdcc_sdioirq;
  59
  60 #define PIO_SPINMAX 30
  61 #define CMD_SPINMAX 20
  62
  63
  64 static inline void
  65 msmsdcc_disable_clocks(struct msmsdcc_host *host, int deferr)
  66 {
  67         WARN_ON(!host->clks_on);
  68
  69         BUG_ON(host->curr.mrq);
  70
  71         if (deferr) {
  72                 mod_timer(&host->busclk_timer, jiffies + BUSCLK_TIMEOUT);
  73         } else {
  74                 del_timer_sync(&host->busclk_timer);
  75                 clk_disable(host->clk);
  76                 clk_disable(host->pclk);
  77                 host->clks_on = 0;
  78         }
  79 }
  80
  81 static inline int
  82 msmsdcc_enable_clocks(struct msmsdcc_host *host)
  83 {
  84         int rc;
  85
  86         WARN_ON(host->clks_on);
  87
  88         del_timer_sync(&host->busclk_timer);
  89
  90         rc = clk_enable(host->pclk);
  91         if (rc)
  92                 return rc;
  93         rc = clk_enable(host->clk);
  94         if (rc) {
  95                 clk_disable(host->pclk);
  96                 return rc;
  97         }
  98         udelay(1 + ((3 * USEC_PER_SEC) /
  99                (host->clk_rate ? host->clk_rate : msmsdcc_fmin)));
 100         host->clks_on = 1;
 101         return 0;
 102 }
 103
 104 static inline unsigned int
 105 msmsdcc_readl(struct msmsdcc_host *host, unsigned int reg)
 106 {
 107         return readl(host->base + reg);
 108 }
 109
 110 static inline void
 111 msmsdcc_writel(struct msmsdcc_host *host, u32 data, unsigned int reg)
 112 {
 113         writel(data, host->base + reg);
 114         /* 3 clk delay required! */
 115         udelay(1 + ((3 * USEC_PER_SEC) /
 116                (host->clk_rate ? host->clk_rate : msmsdcc_fmin)));
 117 }
 118
 119 static void
 120 msmsdcc_start_command(struct msmsdcc_host *host, struct mmc_command *cmd,
 121                       u32 c);
 122
 123 static void
 124 msmsdcc_request_end(struct msmsdcc_host *host, struct mmc_request *mrq)
 125 {
 126         BUG_ON(host->curr.data);
 127
 128         host->curr.mrq = NULL;
 129         host->curr.cmd = NULL;
 130
 131         if (mrq->data)
 132                 mrq->data->bytes_xfered = host->curr.data_xfered;
 133         if (mrq->cmd->error == -ETIMEDOUT)
 134                 mdelay(5);
 135
 136 #if BUSCLK_PWRSAVE
 137         msmsdcc_disable_clocks(host, 1);
 138 #endif
 139         /*
 140          * Need to drop the host lock here; mmc_request_done may call
 141          * back into the driver...
 142          */
 143         spin_unlock(&host->lock);
 144         mmc_request_done(host->mmc, mrq);
 145         spin_lock(&host->lock);
 146 }
 147
 148 static void
 149 msmsdcc_stop_data(struct msmsdcc_host *host)
 150 {
 151         host->curr.data = NULL;
 152         host->curr.got_dataend = host->curr.got_datablkend = 0;
 153 }
 154
 155 uint32_t msmsdcc_fifo_addr(struct msmsdcc_host *host)
 156 {
 157         switch (host->pdev_id) {
 158         case 1:
 159                 return MSM_SDC1_PHYS + MMCIFIFO;
 160         case 2:
 161                 return MSM_SDC2_PHYS + MMCIFIFO;
 162         case 3:
 163                 return MSM_SDC3_PHYS + MMCIFIFO;
 164         case 4:
 165                 return MSM_SDC4_PHYS + MMCIFIFO;
 166         }
 167         BUG();
 168         return 0;
 169 }
 170
 171 static inline void
 172 msmsdcc_start_command_exec(struct msmsdcc_host *host, u32 arg, u32 c) {
 173        msmsdcc_writel(host, arg, MMCIARGUMENT);
 174        msmsdcc_writel(host, c, MMCICOMMAND);
 175 }
 176
 177 static void
 178 msmsdcc_dma_exec_func(struct msm_dmov_cmd *cmd)
 179 {
 180        struct msmsdcc_host *host = (struct msmsdcc_host *)cmd->data;
 181
 182        writel(host->cmd_timeout, host->base + MMCIDATATIMER);
 183        writel((unsigned int)host->curr.xfer_size, host->base + MMCIDATALENGTH);
 184        writel(host->cmd_pio_irqmask, host->base + MMCIMASK1);
 185        writel(host->cmd_datactrl, host->base + MMCIDATACTRL);
 186
 187        if (host->cmd_cmd) {
 188                msmsdcc_start_command_exec(host,
 189                        (u32)host->cmd_cmd->arg, (u32)host->cmd_c);
 190        }
 191         host->dma.active = 1;
 192 }
 193
 194 static void
 195 msmsdcc_dma_complete_func(struct msm_dmov_cmd *cmd,
 196                           unsigned int result,
 197                           struct msm_dmov_errdata *err)
 198 {
 199         struct msmsdcc_dma_data *dma_data =
 200                 container_of(cmd, struct msmsdcc_dma_data, hdr);
 201         struct msmsdcc_host     *host = dma_data->host;
 202         unsigned long           flags;
 203         struct mmc_request      *mrq;
 204
 205         spin_lock_irqsave(&host->lock, flags);
 206         host->dma.active = 0;
 207
 208         mrq = host->curr.mrq;
 209         BUG_ON(!mrq);
 210         WARN_ON(!mrq->data);
 211
 212         if (!(result & DMOV_RSLT_VALID)) {
 213                 pr_err("msmsdcc: Invalid DataMover result\n");
 214                 goto out;
 215         }
 216
 217         if (result & DMOV_RSLT_DONE) {
 218                 host->curr.data_xfered = host->curr.xfer_size;
 219         } else {
 220                 /* Error or flush  */
 221                 if (result & DMOV_RSLT_ERROR)
 222                         pr_err("%s: DMA error (0x%.8x)\n",
 223                                mmc_hostname(host->mmc), result);
 224                 if (result & DMOV_RSLT_FLUSH)
 225                         pr_err("%s: DMA channel flushed (0x%.8x)\n",
 226                                mmc_hostname(host->mmc), result);
 227                 if (err)
 228                         pr_err("Flush data: %.8x %.8x %.8x %.8x %.8x %.8x\n",
 229                                err->flush[0], err->flush[1], err->flush[2],
 230                                err->flush[3], err->flush[4], err->flush[5]);
 231                 if (!mrq->data->error)
 232                         mrq->data->error = -EIO;
 233         }
 234         dma_unmap_sg(mmc_dev(host->mmc), host->dma.sg, host->dma.num_ents,
 235                      host->dma.dir);
 236
 237         if (host->curr.user_pages) {
 238                 struct scatterlist *sg = host->dma.sg;
 239                 int i;
 240
 241                 for (i = 0; i < host->dma.num_ents; i++)
 242                         flush_dcache_page(sg_page(sg++));
 243         }
 244
 245         host->dma.sg = NULL;
 246         host->dma.busy = 0;
 247
 248         if ((host->curr.got_dataend && host->curr.got_datablkend)
 249              || mrq->data->error) {
 250
 251                 /*
 252                  * If we've already gotten our DATAEND / DATABLKEND
 253                  * for this request, then complete it through here.
 254                  */
 255                 msmsdcc_stop_data(host);
 256
 257                 if (!mrq->data->error)
 258                         host->curr.data_xfered = host->curr.xfer_size;
 259                 if (!mrq->data->stop || mrq->cmd->error) {
 260                         host->curr.mrq = NULL;
 261                         host->curr.cmd = NULL;
 262                         mrq->data->bytes_xfered = host->curr.data_xfered;
 263
 264                         spin_unlock_irqrestore(&host->lock, flags);
 265 #if BUSCLK_PWRSAVE
 266                         msmsdcc_disable_clocks(host, 1);
 267 #endif
 268                         mmc_request_done(host->mmc, mrq);
 269                         return;
 270                 } else
 271                         msmsdcc_start_command(host, mrq->data->stop, 0);
 272         }
 273
 274 out:
 275         spin_unlock_irqrestore(&host->lock, flags);
 276         return;
 277 }
 278
 279 static int validate_dma(struct msmsdcc_host *host, struct mmc_data *data)
 280 {
 281         if (host->dma.channel == -1)
 282                 return -ENOENT;
 283
 284         if ((data->blksz * data->blocks) < MCI_FIFOSIZE)
 285                 return -EINVAL;
 286         if ((data->blksz * data->blocks) % MCI_FIFOSIZE)
 287                 return -EINVAL;
 288         return 0;
 289 }
 290
 291 static int msmsdcc_config_dma(struct msmsdcc_host *host, struct mmc_data *data)
 292 {
 293         struct msmsdcc_nc_dmadata *nc;
 294         dmov_box *box;
 295         uint32_t rows;
 296         uint32_t crci;
 297         unsigned int n;
 298         int i, rc;
 299         struct scatterlist *sg = data->sg;
 300
 301         rc = validate_dma(host, data);
 302         if (rc)
 303                 return rc;
 304
 305         host->dma.sg = data->sg;
 306         host->dma.num_ents = data->sg_len;
 307
 308        BUG_ON(host->dma.num_ents > NR_SG); /* Prevent memory corruption */
 309
 310         nc = host->dma.nc;
 311
 312         switch (host->pdev_id) {
 313         case 1:
 314                 crci = MSMSDCC_CRCI_SDC1;
 315                 break;
 316         case 2:
 317                 crci = MSMSDCC_CRCI_SDC2;
 318                 break;
 319         case 3:
 320                 crci = MSMSDCC_CRCI_SDC3;
 321                 break;
 322         case 4:
 323                 crci = MSMSDCC_CRCI_SDC4;
 324                 break;
 325         default:
 326                 host->dma.sg = NULL;
 327                 host->dma.num_ents = 0;
 328                 return -ENOENT;
 329         }
 330
 331         if (data->flags & MMC_DATA_READ)
 332                 host->dma.dir = DMA_FROM_DEVICE;
 333         else
 334                 host->dma.dir = DMA_TO_DEVICE;
 335
 336         host->curr.user_pages = 0;
 337
 338         box = &nc->cmd[0];
 339         for (i = 0; i < host->dma.num_ents; i++) {
 340                 box->cmd = CMD_MODE_BOX;
 341
 342         /* Initialize sg dma address */
 343         sg->dma_address = page_to_dma(mmc_dev(host->mmc), sg_page(sg))
 344                                 + sg->offset;
 345
 346         if (i == (host->dma.num_ents - 1))
 347                         box->cmd |= CMD_LC;
 348                 rows = (sg_dma_len(sg) % MCI_FIFOSIZE) ?
 349                         (sg_dma_len(sg) / MCI_FIFOSIZE) + 1 :
 350                         (sg_dma_len(sg) / MCI_FIFOSIZE) ;
 351
 352                 if (data->flags & MMC_DATA_READ) {
 353                         box->src_row_addr = msmsdcc_fifo_addr(host);
 354                         box->dst_row_addr = sg_dma_address(sg);
 355
 356                         box->src_dst_len = (MCI_FIFOSIZE << 16) |
 357                                            (MCI_FIFOSIZE);
 358                         box->row_offset = MCI_FIFOSIZE;
 359
 360                         box->num_rows = rows * ((1 << 16) + 1);
 361                         box->cmd |= CMD_SRC_CRCI(crci);
 362                 } else {
 363                         box->src_row_addr = sg_dma_address(sg);
 364                         box->dst_row_addr = msmsdcc_fifo_addr(host);
 365
 366                         box->src_dst_len = (MCI_FIFOSIZE << 16) |
 367                                            (MCI_FIFOSIZE);
 368                         box->row_offset = (MCI_FIFOSIZE << 16);
 369
 370                         box->num_rows = rows * ((1 << 16) + 1);
 371                         box->cmd |= CMD_DST_CRCI(crci);
 372                 }
 373                 box++;
 374                 sg++;
 375         }
 376
 377         /* location of command block must be 64 bit aligned */
 378         BUG_ON(host->dma.cmd_busaddr & 0x07);
 379
 380         nc->cmdptr = (host->dma.cmd_busaddr >> 3) | CMD_PTR_LP;
 381         host->dma.hdr.cmdptr = DMOV_CMD_PTR_LIST |
 382                                DMOV_CMD_ADDR(host->dma.cmdptr_busaddr);
 383         host->dma.hdr.complete_func = msmsdcc_dma_complete_func;
 384
 385         n = dma_map_sg(mmc_dev(host->mmc), host->dma.sg,
 386                         host->dma.num_ents, host->dma.dir);
 387 /* dsb inside dma_map_sg will write nc out to mem as well */
 388
 389         if (n != host->dma.num_ents) {
 390                 printk(KERN_ERR "%s: Unable to map in all sg elements\n",
 391                         mmc_hostname(host->mmc));
 392                 host->dma.sg = NULL;
 393                 host->dma.num_ents = 0;
 394                 return -ENOMEM;
 395         }
 396
 397         return 0;
 398 }
 399
 400 static int
 401 snoop_cccr_abort(struct mmc_command *cmd)
 402 {
 403         if ((cmd->opcode == 52) &&
 404             (cmd->arg & 0x80000000) &&
 405             (((cmd->arg >> 9) & 0x1ffff) == SDIO_CCCR_ABORT))
 406                 return 1;
 407         return 0;
 408 }
 409
 410 static void
 411 msmsdcc_start_command_deferred(struct msmsdcc_host *host,
 412                                 struct mmc_command *cmd, u32 *c)
 413 {
 414         *c |= (cmd->opcode | MCI_CPSM_ENABLE);
 415
 416         if (cmd->flags & MMC_RSP_PRESENT) {
 417                 if (cmd->flags & MMC_RSP_136)
 418                         *c |= MCI_CPSM_LONGRSP;
 419                 *c |= MCI_CPSM_RESPONSE;
 420         }
 421
 422         if (/*interrupt*/0)
 423                 *c |= MCI_CPSM_INTERRUPT;
 424
 425         if ((((cmd->opcode == 17) || (cmd->opcode == 18))  ||
 426              ((cmd->opcode == 24) || (cmd->opcode == 25))) ||
 427               (cmd->opcode == 53))
 428                 *c |= MCI_CSPM_DATCMD;
 429
 430         if (cmd == cmd->mrq->stop)
 431                 *c |= MCI_CSPM_MCIABORT;
 432
 433         if (snoop_cccr_abort(cmd))
 434                 *c |= MCI_CSPM_MCIABORT;
 435
 436         if (host->curr.cmd != NULL) {
 437                 printk(KERN_ERR "%s: Overlapping command requests\n",
 438                         mmc_hostname(host->mmc));
 439         }
 440         host->curr.cmd = cmd;
 441 }
 442
 443 static void
 444 msmsdcc_start_data(struct msmsdcc_host *host, struct mmc_data *data,
 445                         struct mmc_command *cmd, u32 c)
 446 {
 447         unsigned int datactrl, timeout;
 448         unsigned long long clks;
 449         unsigned int pio_irqmask = 0;
 450
 451         host->curr.data = data;
 452         host->curr.xfer_size = data->blksz * data->blocks;
 453         host->curr.xfer_remain = host->curr.xfer_size;
 454         host->curr.data_xfered = 0;
 455         host->curr.got_dataend = 0;
 456         host->curr.got_datablkend = 0;
 457
 458         memset(&host->pio, 0, sizeof(host->pio));
 459
 460         datactrl = MCI_DPSM_ENABLE | (data->blksz << 4);
 461
 462         if (!msmsdcc_config_dma(host, data))
 463                 datactrl |= MCI_DPSM_DMAENABLE;
 464         else {
 465                 host->pio.sg = data->sg;
 466                 host->pio.sg_len = data->sg_len;
 467                 host->pio.sg_off = 0;
 468
 469                 if (data->flags & MMC_DATA_READ) {
 470                         pio_irqmask = MCI_RXFIFOHALFFULLMASK;
 471                         if (host->curr.xfer_remain < MCI_FIFOSIZE)
 472                                 pio_irqmask |= MCI_RXDATAAVLBLMASK;
 473                 } else
 474                         pio_irqmask = MCI_TXFIFOHALFEMPTYMASK;
 475         }
 476
 477         if (data->flags & MMC_DATA_READ)
 478                 datactrl |= MCI_DPSM_DIRECTION;
 479
 480         clks = (unsigned long long)data->timeout_ns * host->clk_rate;
 481         do_div(clks, NSEC_PER_SEC);
 482         timeout = data->timeout_clks + (unsigned int)clks*2 ;
 483
 484         if (datactrl & MCI_DPSM_DMAENABLE) {
 485                 /* Save parameters for the exec function */
 486                 host->cmd_timeout = timeout;
 487                 host->cmd_pio_irqmask = pio_irqmask;
 488                 host->cmd_datactrl = datactrl;
 489                 host->cmd_cmd = cmd;
 490
 491                 host->dma.hdr.execute_func = msmsdcc_dma_exec_func;
 492                 host->dma.hdr.data = (void *)host;
 493                 host->dma.busy = 1;
 494
 495                 if (cmd) {
 496                         msmsdcc_start_command_deferred(host, cmd, &c);
 497                         host->cmd_c = c;
 498                 }
 499                 msm_dmov_enqueue_cmd(host->dma.channel, &host->dma.hdr);
 500         } else {
 501                 msmsdcc_writel(host, timeout, MMCIDATATIMER);
 502
 503                 msmsdcc_writel(host, host->curr.xfer_size, MMCIDATALENGTH);
 504
 505                 msmsdcc_writel(host, pio_irqmask, MMCIMASK1);
 506                 msmsdcc_writel(host, datactrl, MMCIDATACTRL);
 507
 508                 if (cmd) {
 509                         /* Daisy-chain the command if requested */
 510                         msmsdcc_start_command(host, cmd, c);
 511                 }
 512         }
 513 }
 514
 515 static void
 516 msmsdcc_start_command(struct msmsdcc_host *host, struct mmc_command *cmd, u32 c)
 517 {
 518         if (cmd == cmd->mrq->stop)
 519                 c |= MCI_CSPM_MCIABORT;
 520
 521         host->stats.cmds++;
 522
 523         msmsdcc_start_command_deferred(host, cmd, &c);
 524         msmsdcc_start_command_exec(host, cmd->arg, c);
 525 }
 526
 527 static void
 528 msmsdcc_data_err(struct msmsdcc_host *host, struct mmc_data *data,
 529                  unsigned int status)
 530 {
 531         if (status & MCI_DATACRCFAIL) {
 532                 pr_err("%s: Data CRC error\n", mmc_hostname(host->mmc));
 533                 pr_err("%s: opcode 0x%.8x\n", __func__,
 534                        data->mrq->cmd->opcode);
 535                 pr_err("%s: blksz %d, blocks %d\n", __func__,
 536                        data->blksz, data->blocks);
 537                 data->error = -EILSEQ;
 538         } else if (status & MCI_DATATIMEOUT) {
 539                 pr_err("%s: Data timeout\n", mmc_hostname(host->mmc));
 540                 data->error = -ETIMEDOUT;
 541         } else if (status & MCI_RXOVERRUN) {
 542                 pr_err("%s: RX overrun\n", mmc_hostname(host->mmc));
 543                 data->error = -EIO;
 544         } else if (status & MCI_TXUNDERRUN) {
 545                 pr_err("%s: TX underrun\n", mmc_hostname(host->mmc));
 546                 data->error = -EIO;
 547         } else {
 548                 pr_err("%s: Unknown error (0x%.8x)\n",
 549                        mmc_hostname(host->mmc), status);
 550                 data->error = -EIO;
 551         }
 552 }
 553
 554
 555 static int
 556 msmsdcc_pio_read(struct msmsdcc_host *host, char *buffer, unsigned int remain)
 557 {
 558         uint32_t        *ptr = (uint32_t *) buffer;
 559         int             count = 0;
 560
 561         while (msmsdcc_readl(host, MMCISTATUS) & MCI_RXDATAAVLBL) {
 562                 *ptr = msmsdcc_readl(host, MMCIFIFO + (count % MCI_FIFOSIZE));
 563                 ptr++;
 564                 count += sizeof(uint32_t);
 565
 566                 remain -=  sizeof(uint32_t);
 567                 if (remain == 0)
 568                         break;
 569         }
 570         return count;
 571 }
 572
 573 static int
 574 msmsdcc_pio_write(struct msmsdcc_host *host, char *buffer,
 575                   unsigned int remain, u32 status)
 576 {
 577         void __iomem *base = host->base;
 578         char *ptr = buffer;
 579
 580         do {
 581                 unsigned int count, maxcnt;
 582
 583                 maxcnt = status & MCI_TXFIFOEMPTY ? MCI_FIFOSIZE :
 584                                                     MCI_FIFOHALFSIZE;
 585                 count = min(remain, maxcnt);
 586
 587                 writesl(base + MMCIFIFO, ptr, count >> 2);
 588                 ptr += count;
 589                 remain -= count;
 590
 591                 if (remain == 0)
 592                         break;
 593
 594                 status = msmsdcc_readl(host, MMCISTATUS);
 595         } while (status & MCI_TXFIFOHALFEMPTY);
 596
 597         return ptr - buffer;
 598 }
 599
 600 static int
 601 msmsdcc_spin_on_status(struct msmsdcc_host *host, uint32_t mask, int maxspin)
 602 {
 603         while (maxspin) {
 604                 if ((msmsdcc_readl(host, MMCISTATUS) & mask))
 605                         return 0;
 606                 udelay(1);
 607                 --maxspin;
 608         }
 609         return -ETIMEDOUT;
 610 }
 611
 612 static int
 613 msmsdcc_pio_irq(int irq, void *dev_id)
 614 {
 615         struct msmsdcc_host     *host = dev_id;
 616         uint32_t                status;
 617
 618         status = msmsdcc_readl(host, MMCISTATUS);
 619
 620         do {
 621                 unsigned long flags;
 622                 unsigned int remain, len;
 623                 char *buffer;
 624
 625                 if (!(status & (MCI_TXFIFOHALFEMPTY | MCI_RXDATAAVLBL))) {
 626                         if (host->curr.xfer_remain == 0 || !msmsdcc_piopoll)
 627                                 break;
 628
 629                         if (msmsdcc_spin_on_status(host,
 630                                                    (MCI_TXFIFOHALFEMPTY |
 631                                                    MCI_RXDATAAVLBL),
 632                                                    PIO_SPINMAX)) {
 633                                 break;
 634                         }
 635                 }
 636
 637                 /* Map the current scatter buffer */
 638                 local_irq_save(flags);
 639                 buffer = kmap_atomic(sg_page(host->pio.sg),
 640                                      KM_BIO_SRC_IRQ) + host->pio.sg->offset;
 641                 buffer += host->pio.sg_off;
 642                 remain = host->pio.sg->length - host->pio.sg_off;
 643                 len = 0;
 644                 if (status & MCI_RXACTIVE)
 645                         len = msmsdcc_pio_read(host, buffer, remain);
 646                 if (status & MCI_TXACTIVE)
 647                         len = msmsdcc_pio_write(host, buffer, remain, status);
 648
 649                 /* Unmap the buffer */
 650                 kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
 651                 local_irq_restore(flags);
 652
 653                 host->pio.sg_off += len;
 654                 host->curr.xfer_remain -= len;
 655                 host->curr.data_xfered += len;
 656                 remain -= len;
 657
 658                 if (remain == 0) {
 659                         /* This sg page is full - do some housekeeping */
 660                         if (status & MCI_RXACTIVE && host->curr.user_pages)
 661                                 flush_dcache_page(sg_page(host->pio.sg));
 662
 663                         if (!--host->pio.sg_len) {
 664                                 memset(&host->pio, 0, sizeof(host->pio));
 665                                 break;
 666                         }
 667
 668                         /* Advance to next sg */
 669                         host->pio.sg++;
 670                         host->pio.sg_off = 0;
 671                 }
 672
 673                 status = msmsdcc_readl(host, MMCISTATUS);
 674         } while (1);
 675
 676         if (status & MCI_RXACTIVE && host->curr.xfer_remain < MCI_FIFOSIZE)
 677                 msmsdcc_writel(host, MCI_RXDATAAVLBLMASK, MMCIMASK1);
 678
 679         if (!host->curr.xfer_remain)
 680                 msmsdcc_writel(host, 0, MMCIMASK1);
 681
 682         return IRQ_HANDLED;
 683 }
 684
 685 static void msmsdcc_do_cmdirq(struct msmsdcc_host *host, uint32_t status)
 686 {
 687         struct mmc_command *cmd = host->curr.cmd;
 688
 689         host->curr.cmd = NULL;
 690         cmd->resp[0] = msmsdcc_readl(host, MMCIRESPONSE0);
 691         cmd->resp[1] = msmsdcc_readl(host, MMCIRESPONSE1);
 692         cmd->resp[2] = msmsdcc_readl(host, MMCIRESPONSE2);
 693         cmd->resp[3] = msmsdcc_readl(host, MMCIRESPONSE3);
 694
 695         if (status & MCI_CMDTIMEOUT) {
 696                 cmd->error = -ETIMEDOUT;
 697         } else if (status & MCI_CMDCRCFAIL &&
 698                    cmd->flags & MMC_RSP_CRC) {
 699                 pr_err("%s: Command CRC error\n", mmc_hostname(host->mmc));
 700                 cmd->error = -EILSEQ;
 701         }
 702
 703         if (!cmd->data || cmd->error) {
 704                 if (host->curr.data && host->dma.sg)
 705                         msm_dmov_stop_cmd(host->dma.channel,
 706                                           &host->dma.hdr, 0);
 707                 else if (host->curr.data) { /* Non DMA */
 708                         msmsdcc_stop_data(host);
 709                         msmsdcc_request_end(host, cmd->mrq);
 710                 } else /* host->data == NULL */
 711                         msmsdcc_request_end(host, cmd->mrq);
 712         } else if (cmd->data)
 713                 if (!(cmd->data->flags & MMC_DATA_READ))
 714                         msmsdcc_start_data(host, cmd->data,
 715                                                 NULL, 0);
 716 }
 717
 718 static void
 719 msmsdcc_handle_irq_data(struct msmsdcc_host *host, u32 status,
 720                         void __iomem *base)
 721 {
 722         struct mmc_data *data = host->curr.data;
 723
 724         if (status & (MCI_CMDSENT | MCI_CMDRESPEND | MCI_CMDCRCFAIL |
 725                       MCI_CMDTIMEOUT) && host->curr.cmd) {
 726                 msmsdcc_do_cmdirq(host, status);
 727         }
 728
 729         if (!data)
 730                 return;
 731
 732         /* Check for data errors */
 733         if (status & (MCI_DATACRCFAIL | MCI_DATATIMEOUT |
 734                       MCI_TXUNDERRUN | MCI_RXOVERRUN)) {
 735                 msmsdcc_data_err(host, data, status);
 736                 host->curr.data_xfered = 0;
 737                 if (host->dma.sg)
 738                         msm_dmov_stop_cmd(host->dma.channel,
 739                                           &host->dma.hdr, 0);
 740                 else {
 741                         if (host->curr.data)
 742                                 msmsdcc_stop_data(host);
 743                         if (!data->stop)
 744                                 msmsdcc_request_end(host, data->mrq);
 745                         else
 746                                 msmsdcc_start_command(host, data->stop, 0);
 747                 }
 748         }
 749
 750         /* Check for data done */
 751         if (!host->curr.got_dataend && (status & MCI_DATAEND))
 752                 host->curr.got_dataend = 1;
 753
 754         if (!host->curr.got_datablkend && (status & MCI_DATABLOCKEND))
 755                 host->curr.got_datablkend = 1;
 756
 757         /*
 758          * If DMA is still in progress, we complete via the completion handler
 759          */
 760         if (host->curr.got_dataend && host->curr.got_datablkend &&
 761             !host->dma.busy) {
 762                 /*
 763                  * There appears to be an issue in the controller where
 764                  * if you request a small block transfer (< fifo size),
 765                  * you may get your DATAEND/DATABLKEND irq without the
 766                  * PIO data irq.
 767                  *
 768                  * Check to see if there is still data to be read,
 769                  * and simulate a PIO irq.
 770                  */
 771                 if (readl(base + MMCISTATUS) & MCI_RXDATAAVLBL)
 772                         msmsdcc_pio_irq(1, host);
 773
 774                 msmsdcc_stop_data(host);
 775                 if (!data->error)
 776                         host->curr.data_xfered = host->curr.xfer_size;
 777
 778                 if (!data->stop)
 779                         msmsdcc_request_end(host, data->mrq);
 780                 else
 781                         msmsdcc_start_command(host, data->stop, 0);
 782         }
 783 }
 784
 785 static irqreturn_t
 786 msmsdcc_irq(int irq, void *dev_id)
 787 {
 788         struct msmsdcc_host     *host = dev_id;
 789         void __iomem            *base = host->base;
 790         u32                     status;
 791         int                     ret = 0;
 792         int                     cardint = 0;
 793
 794         spin_lock(&host->lock);
 795
 796         do {
 797                 struct mmc_data *data;
 798                 status = msmsdcc_readl(host, MMCISTATUS);
 799                 status &= (msmsdcc_readl(host, MMCIMASK0) |
 800                                               MCI_DATABLOCKENDMASK);
 801                 msmsdcc_writel(host, status, MMCICLEAR);
 802
 803                 if (status & MCI_SDIOINTR)
 804                         status &= ~MCI_SDIOINTR;
 805
 806                 if (!status)
 807                         break;
 808
 809                 msmsdcc_handle_irq_data(host, status, base);
 810
 811                 if (status & MCI_SDIOINTOPER) {
 812                         cardint = 1;
 813                         status &= ~MCI_SDIOINTOPER;
 814                 }
 815                 ret = 1;
 816         } while (status);
 817
 818         spin_unlock(&host->lock);
 819
 820         /*
 821          * We have to delay handling the card interrupt as it calls
 822          * back into the driver.
 823          */
 824         if (cardint)
 825                 mmc_signal_sdio_irq(host->mmc);
 826
 827         return IRQ_RETVAL(ret);
 828 }
 829
 830 static void
 831 msmsdcc_request(struct mmc_host *mmc, struct mmc_request *mrq)
 832 {
 833         struct msmsdcc_host *host = mmc_priv(mmc);
 834         unsigned long flags;
 835
 836         WARN_ON(host->curr.mrq != NULL);
 837         WARN_ON(host->pwr == 0);
 838
 839         spin_lock_irqsave(&host->lock, flags);
 840
 841         host->stats.reqs++;
 842
 843         if (host->eject) {
 844                 if (mrq->data && !(mrq->data->flags & MMC_DATA_READ)) {
 845                         mrq->cmd->error = 0;
 846                         mrq->data->bytes_xfered = mrq->data->blksz *
 847                                                   mrq->data->blocks;
 848                 } else
 849                         mrq->cmd->error = -ENOMEDIUM;
 850
 851                 spin_unlock_irqrestore(&host->lock, flags);
 852                 mmc_request_done(mmc, mrq);
 853                 return;
 854         }
 855
 856         host->curr.mrq = mrq;
 857
 858         /* Need to drop the host lock here in case
 859          * the busclk wd fires
 860          */
 861         spin_unlock_irqrestore(&host->lock, flags);
 862         if (!host->clks_on)
 863                 msmsdcc_enable_clocks(host);
 864         spin_lock_irqsave(&host->lock, flags);
 865
 866         if (mrq->data && mrq->data->flags & MMC_DATA_READ)
 867                 /* Queue/read data, daisy-chain command when data starts */
 868                 msmsdcc_start_data(host, mrq->data, mrq->cmd, 0);
 869         else
 870                 msmsdcc_start_command(host, mrq->cmd, 0);
 871
 872         if (host->cmdpoll && !msmsdcc_spin_on_status(host,
 873                                 MCI_CMDRESPEND|MCI_CMDCRCFAIL|MCI_CMDTIMEOUT,
 874                                 CMD_SPINMAX)) {
 875                 uint32_t status = msmsdcc_readl(host, MMCISTATUS);
 876                 msmsdcc_do_cmdirq(host, status);
 877                 msmsdcc_writel(host,
 878                                MCI_CMDRESPEND | MCI_CMDCRCFAIL | MCI_CMDTIMEOUT,
 879                                MMCICLEAR);
 880                 host->stats.cmdpoll_hits++;
 881         } else {
 882                 host->stats.cmdpoll_misses++;
 883         }
 884         spin_unlock_irqrestore(&host->lock, flags);
 885 }
 886
 887 static void
 888 msmsdcc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 889 {
 890         struct msmsdcc_host *host = mmc_priv(mmc);
 891         u32 clk = 0, pwr = 0;
 892         int rc;
 893         unsigned long flags;
 894
 895         if (!host->clks_on)
 896                 msmsdcc_enable_clocks(host);
 897
 898         spin_lock_irqsave(&host->lock, flags);
 899
 900         if (ios->clock) {
 901                 if (ios->clock != host->clk_rate) {
 902                         rc = clk_set_rate(host->clk, ios->clock);
 903                         if (rc < 0)
 904                                 pr_err("%s: Error setting clock rate (%d)\n",
 905                                        mmc_hostname(host->mmc), rc);
 906                         else
 907                                 host->clk_rate = ios->clock;
 908                 }
 909                 clk |= MCI_CLK_ENABLE;
 910         }
 911
 912         if (ios->bus_width == MMC_BUS_WIDTH_4)
 913                 clk |= (2 << 10); /* Set WIDEBUS */
 914
 915         if (ios->clock > 400000 && msmsdcc_pwrsave)
 916                 clk |= (1 << 9); /* PWRSAVE */
 917
 918         clk |= (1 << 12); /* FLOW_ENA */
 919         clk |= (1 << 15); /* feedback clock */
 920
 921         if (host->plat->translate_vdd)
 922                 pwr |= host->plat->translate_vdd(mmc_dev(mmc), ios->vdd);
 923
 924         switch (ios->power_mode) {
 925         case MMC_POWER_OFF:
 926                 break;
 927         case MMC_POWER_UP:
 928                 pwr |= MCI_PWR_UP;
 929                 break;
 930         case MMC_POWER_ON:
 931                 pwr |= MCI_PWR_ON;
 932                 break;
 933         }
 934
 935         if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN)
 936                 pwr |= MCI_OD;
 937
 938         msmsdcc_writel(host, clk, MMCICLOCK);
 939
 940         if (host->pwr != pwr) {
 941                 host->pwr = pwr;
 942                 msmsdcc_writel(host, pwr, MMCIPOWER);
 943         }
 944 #if BUSCLK_PWRSAVE
 945         msmsdcc_disable_clocks(host, 1);
 946 #endif
 947         spin_unlock_irqrestore(&host->lock, flags);
 948 }
 949
 950 static void msmsdcc_enable_sdio_irq(struct mmc_host *mmc, int enable)
 951 {
 952         struct msmsdcc_host *host = mmc_priv(mmc);
 953         unsigned long flags;
 954         u32 status;
 955
 956         spin_lock_irqsave(&host->lock, flags);
 957         if (msmsdcc_sdioirq == 1) {
 958                 status = msmsdcc_readl(host, MMCIMASK0);
 959                 if (enable)
 960                         status |= MCI_SDIOINTOPERMASK;
 961                 else
 962                         status &= ~MCI_SDIOINTOPERMASK;
 963                 host->saved_irq0mask = status;
 964                 msmsdcc_writel(host, status, MMCIMASK0);
 965         }
 966         spin_unlock_irqrestore(&host->lock, flags);
 967 }
 968
 969 static const struct mmc_host_ops msmsdcc_ops = {
 970         .request        = msmsdcc_request,
 971         .set_ios        = msmsdcc_set_ios,
 972         .enable_sdio_irq = msmsdcc_enable_sdio_irq,
 973 };
 974
 975 static void
 976 msmsdcc_check_status(unsigned long data)
 977 {
 978         struct msmsdcc_host *host = (struct msmsdcc_host *)data;
 979         unsigned int status;
 980
 981         if (!host->plat->status) {
 982                 mmc_detect_change(host->mmc, 0);
 983                 goto out;
 984         }
 985
 986         status = host->plat->status(mmc_dev(host->mmc));
 987         host->eject = !status;
 988         if (status ^ host->oldstat) {
 989                 pr_info("%s: Slot status change detected (%d -> %d)\n",
 990                         mmc_hostname(host->mmc), host->oldstat, status);
 991                 if (status)
 992                         mmc_detect_change(host->mmc, (5 * HZ) / 2);
 993                 else
 994                         mmc_detect_change(host->mmc, 0);
 995         }
 996
 997         host->oldstat = status;
 998
 999 out:
1000         if (host->timer.function)
1001                 mod_timer(&host->timer, jiffies + HZ);
1002 }
1003
1004 static irqreturn_t
1005 msmsdcc_platform_status_irq(int irq, void *dev_id)
1006 {
1007         struct msmsdcc_host *host = dev_id;
1008
1009         printk(KERN_DEBUG "%s: %d\n", __func__, irq);
1010         msmsdcc_check_status((unsigned long) host);
1011         return IRQ_HANDLED;
1012 }
1013
1014 static void
1015 msmsdcc_status_notify_cb(int card_present, void *dev_id)
1016 {
1017         struct msmsdcc_host *host = dev_id;
1018
1019         printk(KERN_DEBUG "%s: card_present %d\n", mmc_hostname(host->mmc),
1020                card_present);
1021         msmsdcc_check_status((unsigned long) host);
1022 }
1023
1024 static void
1025 msmsdcc_busclk_expired(unsigned long _data)
1026 {
1027         struct msmsdcc_host     *host = (struct msmsdcc_host *) _data;
1028         unsigned long           flags;
1029
1030         spin_lock_irqsave(&host->lock, flags);
1031         dev_info(mmc_dev(host->mmc), "Bus clock timer expired\n");
1032         if (host->clks_on)
1033                 msmsdcc_disable_clocks(host, 0);
1034         spin_unlock_irqrestore(&host->lock, flags);
1035 }
1036
1037 static int
1038 msmsdcc_init_dma(struct msmsdcc_host *host)
1039 {
1040         memset(&host->dma, 0, sizeof(struct msmsdcc_dma_data));
1041         host->dma.host = host;
1042         host->dma.channel = -1;
1043
1044         if (!host->dmares)
1045                 return -ENODEV;
1046
1047         host->dma.nc = dma_alloc_coherent(NULL,
1048                                           sizeof(struct msmsdcc_nc_dmadata),
1049                                           &host->dma.nc_busaddr,
1050                                           GFP_KERNEL);
1051         if (host->dma.nc == NULL) {
1052                 pr_err("Unable to allocate DMA buffer\n");
1053                 return -ENOMEM;
1054         }
1055         memset(host->dma.nc, 0x00, sizeof(struct msmsdcc_nc_dmadata));
1056         host->dma.cmd_busaddr = host->dma.nc_busaddr;
1057         host->dma.cmdptr_busaddr = host->dma.nc_busaddr +
1058                                 offsetof(struct msmsdcc_nc_dmadata, cmdptr);
1059         host->dma.channel = host->dmares->start;
1060
1061         return 0;
1062 }
1063
1064 #ifdef CONFIG_MMC_MSM7X00A_RESUME_IN_WQ
1065 static void
1066 do_resume_work(struct work_struct *work)
1067 {
1068         struct msmsdcc_host *host =
1069                 container_of(work, struct msmsdcc_host, resume_task);
1070         struct mmc_host *mmc = host->mmc;
1071
1072         if (mmc) {
1073                 mmc_resume_host(mmc);
1074                 if (host->stat_irq)
1075                         enable_irq(host->stat_irq);
1076         }
1077 }
1078 #endif
1079
1080 static int
1081 msmsdcc_probe(struct platform_device *pdev)
1082 {
1083         struct mmc_platform_data *plat = pdev->dev.platform_data;
1084         struct msmsdcc_host *host;
1085         struct mmc_host *mmc;
1086         struct resource *cmd_irqres = NULL;
1087         struct resource *pio_irqres = NULL;
1088         struct resource *stat_irqres = NULL;
1089         struct resource *memres = NULL;
1090         struct resource *dmares = NULL;
1091         int ret;
1092
1093         /* must have platform data */
1094         if (!plat) {
1095                 pr_err("%s: Platform data not available\n", __func__);
1096                 ret = -EINVAL;
1097                 goto out;
1098         }
1099
1100         if (pdev->id < 1 || pdev->id > 4)
1101                 return -EINVAL;
1102
1103         if (pdev->resource == NULL || pdev->num_resources < 2) {
1104                 pr_err("%s: Invalid resource\n", __func__);
1105                 return -ENXIO;
1106         }
1107
1108         memres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1109         dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1110         cmd_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
1111                                                   "cmd_irq");
1112         pio_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
1113                                                   "pio_irq");
1114         stat_irqres = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
1115                                                    "status_irq");
1116
1117         if (!cmd_irqres || !pio_irqres || !memres) {
1118                 pr_err("%s: Invalid resource\n", __func__);
1119                 return -ENXIO;
1120         }
1121
1122         /*
1123          * Setup our host structure
1124          */
1125
1126         mmc = mmc_alloc_host(sizeof(struct msmsdcc_host), &pdev->dev);
1127         if (!mmc) {
1128                 ret = -ENOMEM;
1129                 goto out;
1130         }
1131
1132         host = mmc_priv(mmc);
1133         host->pdev_id = pdev->id;
1134         host->plat = plat;
1135         host->mmc = mmc;
1136         host->curr.cmd = NULL;
1137
1138         host->cmdpoll = 1;
1139
1140         host->base = ioremap(memres->start, PAGE_SIZE);
1141         if (!host->base) {
1142                 ret = -ENOMEM;
1143                 goto out;
1144         }
1145
1146         host->cmd_irqres = cmd_irqres;
1147         host->pio_irqres = pio_irqres;
1148         host->memres = memres;
1149         host->dmares = dmares;
1150         spin_lock_init(&host->lock);
1151
1152         /*
1153          * Setup DMA
1154          */
1155         msmsdcc_init_dma(host);
1156
1157         /* Get our clocks */
1158         host->pclk = clk_get(&pdev->dev, "sdc_pclk");
1159         if (IS_ERR(host->pclk)) {
1160                 ret = PTR_ERR(host->pclk);
1161                 goto host_free;
1162         }
1163
1164         host->clk = clk_get(&pdev->dev, "sdc_clk");
1165         if (IS_ERR(host->clk)) {
1166                 ret = PTR_ERR(host->clk);
1167                 goto pclk_put;
1168         }
1169
1170         /* Enable clocks */
1171         ret = msmsdcc_enable_clocks(host);
1172         if (ret)
1173                 goto clk_put;
1174
1175         ret = clk_set_rate(host->clk, msmsdcc_fmin);
1176         if (ret) {
1177                 pr_err("%s: Clock rate set failed (%d)\n", __func__, ret);
1178                 goto clk_disable;
1179         }
1180
1181         host->pclk_rate = clk_get_rate(host->pclk);
1182         host->clk_rate = clk_get_rate(host->clk);
1183
1184         /*
1185          * Setup MMC host structure
1186          */
1187         mmc->ops = &msmsdcc_ops;
1188         mmc->f_min = msmsdcc_fmin;
1189         mmc->f_max = msmsdcc_fmax;
1190         mmc->ocr_avail = plat->ocr_mask;
1191
1192         if (msmsdcc_4bit)
1193                 mmc->caps |= MMC_CAP_4_BIT_DATA;
1194         if (msmsdcc_sdioirq)
1195                 mmc->caps |= MMC_CAP_SDIO_IRQ;
1196         mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED;
1197
1198         mmc->max_phys_segs = NR_SG;
1199         mmc->max_hw_segs = NR_SG;
1200         mmc->max_blk_size = 4096;       /* MCI_DATA_CTL BLOCKSIZE up to 4096 */
1201         mmc->max_blk_count = 65536;
1202
1203         mmc->max_req_size = 33554432;   /* MCI_DATA_LENGTH is 25 bits */
1204         mmc->max_seg_size = mmc->max_req_size;
1205
1206         msmsdcc_writel(host, 0, MMCIMASK0);
1207         msmsdcc_writel(host, 0x5e007ff, MMCICLEAR);
1208
1209         msmsdcc_writel(host, MCI_IRQENABLE, MMCIMASK0);
1210         host->saved_irq0mask = MCI_IRQENABLE;
1211
1212         /*
1213          * Setup card detect change
1214          */
1215
1216         memset(&host->timer, 0, sizeof(host->timer));
1217
1218         if (stat_irqres && !(stat_irqres->flags & IORESOURCE_DISABLED)) {
1219                 unsigned long irqflags = IRQF_SHARED |
1220                         (stat_irqres->flags & IRQF_TRIGGER_MASK);
1221
1222                 host->stat_irq = stat_irqres->start;
1223                 ret = request_irq(host->stat_irq,
1224                                   msmsdcc_platform_status_irq,
1225                                   irqflags,
1226                                   DRIVER_NAME " (slot)",
1227                                   host);
1228                 if (ret) {
1229                         pr_err("%s: Unable to get slot IRQ %d (%d)\n",
1230                                mmc_hostname(mmc), host->stat_irq, ret);
1231                         goto clk_disable;
1232                 }
1233         } else if (plat->register_status_notify) {
1234                 plat->register_status_notify(msmsdcc_status_notify_cb, host);
1235         } else if (!plat->status)
1236                 pr_err("%s: No card detect facilities available\n",
1237                        mmc_hostname(mmc));
1238         else {
1239                 init_timer(&host->timer);
1240                 host->timer.data = (unsigned long)host;
1241                 host->timer.function = msmsdcc_check_status;
1242                 host->timer.expires = jiffies + HZ;
1243                 add_timer(&host->timer);
1244         }
1245
1246         if (plat->status) {
1247                 host->oldstat = host->plat->status(mmc_dev(host->mmc));
1248                 host->eject = !host->oldstat;
1249         }
1250
1251         init_timer(&host->busclk_timer);
1252         host->busclk_timer.data = (unsigned long) host;
1253         host->busclk_timer.function = msmsdcc_busclk_expired;
1254
1255         ret = request_irq(cmd_irqres->start, msmsdcc_irq, IRQF_SHARED,
1256                           DRIVER_NAME " (cmd)", host);
1257         if (ret)
1258                 goto stat_irq_free;
1259
1260         ret = request_irq(pio_irqres->start, msmsdcc_pio_irq, IRQF_SHARED,
1261                           DRIVER_NAME " (pio)", host);
1262         if (ret)
1263                 goto cmd_irq_free;
1264
1265         mmc_set_drvdata(pdev, mmc);
1266         mmc_add_host(mmc);
1267
1268         pr_info("%s: Qualcomm MSM SDCC at 0x%016llx irq %d,%d dma %d\n",
1269                 mmc_hostname(mmc), (unsigned long long)memres->start,
1270                 (unsigned int) cmd_irqres->start,
1271                 (unsigned int) host->stat_irq, host->dma.channel);
1272         pr_info("%s: 4 bit data mode %s\n", mmc_hostname(mmc),
1273                 (mmc->caps & MMC_CAP_4_BIT_DATA ? "enabled" : "disabled"));
1274         pr_info("%s: MMC clock %u -> %u Hz, PCLK %u Hz\n",
1275                 mmc_hostname(mmc), msmsdcc_fmin, msmsdcc_fmax, host->pclk_rate);
1276         pr_info("%s: Slot eject status = %d\n", mmc_hostname(mmc), host->eject);
1277         pr_info("%s: Power save feature enable = %d\n",
1278                 mmc_hostname(mmc), msmsdcc_pwrsave);
1279
1280         if (host->dma.channel != -1) {
1281                 pr_info("%s: DM non-cached buffer at %p, dma_addr 0x%.8x\n",
1282                         mmc_hostname(mmc), host->dma.nc, host->dma.nc_busaddr);
1283                 pr_info("%s: DM cmd busaddr 0x%.8x, cmdptr busaddr 0x%.8x\n",
1284                         mmc_hostname(mmc), host->dma.cmd_busaddr,
1285                         host->dma.cmdptr_busaddr);
1286         } else
1287                 pr_info("%s: PIO transfer enabled\n", mmc_hostname(mmc));
1288         if (host->timer.function)
1289                 pr_info("%s: Polling status mode enabled\n", mmc_hostname(mmc));
1290
1291 #if BUSCLK_PWRSAVE
1292         msmsdcc_disable_clocks(host, 1);
1293 #endif
1294         return 0;
1295  cmd_irq_free:
1296         free_irq(cmd_irqres->start, host);
1297  stat_irq_free:
1298         if (host->stat_irq)
1299                 free_irq(host->stat_irq, host);
1300  clk_disable:
1301         msmsdcc_disable_clocks(host, 0);
1302  clk_put:
1303         clk_put(host->clk);
1304  pclk_put:
1305         clk_put(host->pclk);
1306  host_free:
1307         mmc_free_host(mmc);
1308  out:
1309         return ret;
1310 }
1311
1312 static int
1313 msmsdcc_suspend(struct platform_device *dev, pm_message_t state)
1314 {
1315         struct mmc_host *mmc = mmc_get_drvdata(dev);
1316         int rc = 0;
1317
1318         if (mmc) {
1319                 struct msmsdcc_host *host = mmc_priv(mmc);
1320
1321                 if (host->stat_irq)
1322                         disable_irq(host->stat_irq);
1323
1324                 if (mmc->card && mmc->card->type != MMC_TYPE_SDIO)
1325                         rc = mmc_suspend_host(mmc, state);
1326                 if (!rc) {
1327                         msmsdcc_writel(host, 0, MMCIMASK0);
1328
1329                 }
1330                 if (host->clks_on)
1331                         msmsdcc_disable_clocks(host, 0);
1332         }
1333         return rc;
1334 }
1335
1336 static int
1337 msmsdcc_resume(struct platform_device *dev)
1338 {
1339         struct mmc_host *mmc = mmc_get_drvdata(dev);
1340
1341         if (mmc) {
1342                 struct msmsdcc_host *host = mmc_priv(mmc);
1343
1344                 msmsdcc_enable_clocks(host);
1345
1346                 msmsdcc_writel(host, host->saved_irq0mask, MMCIMASK0);
1347
1348                 if (mmc->card && mmc->card->type != MMC_TYPE_SDIO)
1349                         mmc_resume_host(mmc);
1350                 if (host->stat_irq)
1351                         enable_irq(host->stat_irq);
1352 #if BUSCLK_PWRSAVE
1353                 msmsdcc_disable_clocks(host, 1);
1354 #endif
1355         }
1356         return 0;
1357 }
1358
1359 static struct platform_driver msmsdcc_driver = {
1360         .probe          = msmsdcc_probe,
1361         .suspend        = msmsdcc_suspend,
1362         .resume         = msmsdcc_resume,
1363         .driver         = {
1364                 .name   = "msm_sdcc",
1365         },
1366 };
1367
1368 static int __init msmsdcc_init(void)
1369 {
1370         return platform_driver_register(&msmsdcc_driver);
1371 }
1372
1373 static void __exit msmsdcc_exit(void)
1374 {
1375         platform_driver_unregister(&msmsdcc_driver);
1376 }
1377
1378 module_init(msmsdcc_init);
1379 module_exit(msmsdcc_exit);
1380
1381 MODULE_DESCRIPTION("Qualcomm MSM 7X00A Multimedia Card Interface driver");
1382 MODULE_LICENSE("GPL");