2 * linux/drivers/mmc/host/mxcmmc.c - Freescale i.MX MMCI driver
4 * This is a driver for the SDHC controller found in Freescale MX2/MX3
5 * SoCs. It is basically the same hardware as found on MX1 (imxmmc.c).
6 * Unlike the hardware found on MX1, this hardware just works and does
7 * not need all the quirks found in imxmmc.c, hence the separate driver.
9 * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
10 * Copyright (C) 2006 Pavel Pisa, PiKRON <ppisa@pikron.com>
12 * derived from pxamci.c by Russell King
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
20 #include <linux/module.h>
21 #include <linux/init.h>
22 #include <linux/ioport.h>
23 #include <linux/platform_device.h>
24 #include <linux/interrupt.h>
25 #include <linux/irq.h>
26 #include <linux/blkdev.h>
27 #include <linux/dma-mapping.h>
28 #include <linux/mmc/host.h>
29 #include <linux/mmc/card.h>
30 #include <linux/delay.h>
31 #include <linux/clk.h>
33 #include <linux/gpio.h>
37 #include <asm/sizes.h>
40 #ifdef CONFIG_ARCH_MX2
41 #include <mach/dma-mx1-mx2.h>
45 #define DRIVER_NAME "mxc-mmc"
47 #define MMC_REG_STR_STP_CLK 0x00
48 #define MMC_REG_STATUS 0x04
49 #define MMC_REG_CLK_RATE 0x08
50 #define MMC_REG_CMD_DAT_CONT 0x0C
51 #define MMC_REG_RES_TO 0x10
52 #define MMC_REG_READ_TO 0x14
53 #define MMC_REG_BLK_LEN 0x18
54 #define MMC_REG_NOB 0x1C
55 #define MMC_REG_REV_NO 0x20
56 #define MMC_REG_INT_CNTR 0x24
57 #define MMC_REG_CMD 0x28
58 #define MMC_REG_ARG 0x2C
59 #define MMC_REG_RES_FIFO 0x34
60 #define MMC_REG_BUFFER_ACCESS 0x38
62 #define STR_STP_CLK_RESET (1 << 3)
63 #define STR_STP_CLK_START_CLK (1 << 1)
64 #define STR_STP_CLK_STOP_CLK (1 << 0)
66 #define STATUS_CARD_INSERTION (1 << 31)
67 #define STATUS_CARD_REMOVAL (1 << 30)
68 #define STATUS_YBUF_EMPTY (1 << 29)
69 #define STATUS_XBUF_EMPTY (1 << 28)
70 #define STATUS_YBUF_FULL (1 << 27)
71 #define STATUS_XBUF_FULL (1 << 26)
72 #define STATUS_BUF_UND_RUN (1 << 25)
73 #define STATUS_BUF_OVFL (1 << 24)
74 #define STATUS_SDIO_INT_ACTIVE (1 << 14)
75 #define STATUS_END_CMD_RESP (1 << 13)
76 #define STATUS_WRITE_OP_DONE (1 << 12)
77 #define STATUS_DATA_TRANS_DONE (1 << 11)
78 #define STATUS_READ_OP_DONE (1 << 11)
79 #define STATUS_WR_CRC_ERROR_CODE_MASK (3 << 10)
80 #define STATUS_CARD_BUS_CLK_RUN (1 << 8)
81 #define STATUS_BUF_READ_RDY (1 << 7)
82 #define STATUS_BUF_WRITE_RDY (1 << 6)
83 #define STATUS_RESP_CRC_ERR (1 << 5)
84 #define STATUS_CRC_READ_ERR (1 << 3)
85 #define STATUS_CRC_WRITE_ERR (1 << 2)
86 #define STATUS_TIME_OUT_RESP (1 << 1)
87 #define STATUS_TIME_OUT_READ (1 << 0)
88 #define STATUS_ERR_MASK 0x2f
90 #define CMD_DAT_CONT_CMD_RESP_LONG_OFF (1 << 12)
91 #define CMD_DAT_CONT_STOP_READWAIT (1 << 11)
92 #define CMD_DAT_CONT_START_READWAIT (1 << 10)
93 #define CMD_DAT_CONT_BUS_WIDTH_4 (2 << 8)
94 #define CMD_DAT_CONT_INIT (1 << 7)
95 #define CMD_DAT_CONT_WRITE (1 << 4)
96 #define CMD_DAT_CONT_DATA_ENABLE (1 << 3)
97 #define CMD_DAT_CONT_RESPONSE_48BIT_CRC (1 << 0)
98 #define CMD_DAT_CONT_RESPONSE_136BIT (2 << 0)
99 #define CMD_DAT_CONT_RESPONSE_48BIT (3 << 0)
101 #define INT_SDIO_INT_WKP_EN (1 << 18)
102 #define INT_CARD_INSERTION_WKP_EN (1 << 17)
103 #define INT_CARD_REMOVAL_WKP_EN (1 << 16)
104 #define INT_CARD_INSERTION_EN (1 << 15)
105 #define INT_CARD_REMOVAL_EN (1 << 14)
106 #define INT_SDIO_IRQ_EN (1 << 13)
107 #define INT_DAT0_EN (1 << 12)
108 #define INT_BUF_READ_EN (1 << 4)
109 #define INT_BUF_WRITE_EN (1 << 3)
110 #define INT_END_CMD_RES_EN (1 << 2)
111 #define INT_WRITE_OP_DONE_EN (1 << 1)
112 #define INT_READ_OP_EN (1 << 0)
115 struct mmc_host *mmc;
116 struct resource *res;
122 int default_irq_mask;
124 unsigned int power_mode;
125 struct imxmmc_platform_data *pdata;
127 struct mmc_request *req;
128 struct mmc_command *cmd;
129 struct mmc_data *data;
131 unsigned int dma_nents;
132 unsigned int datasize;
133 unsigned int dma_dir;
142 struct work_struct datawork;
146 static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios);
148 static inline int mxcmci_use_dma(struct mxcmci_host *host)
153 static void mxcmci_softreset(struct mxcmci_host *host)
157 dev_dbg(mmc_dev(host->mmc), "mxcmci_softreset\n");
160 writew(STR_STP_CLK_RESET, host->base + MMC_REG_STR_STP_CLK);
161 writew(STR_STP_CLK_RESET | STR_STP_CLK_START_CLK,
162 host->base + MMC_REG_STR_STP_CLK);
164 for (i = 0; i < 8; i++)
165 writew(STR_STP_CLK_START_CLK, host->base + MMC_REG_STR_STP_CLK);
167 writew(0xff, host->base + MMC_REG_RES_TO);
170 static int mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data)
172 unsigned int nob = data->blocks;
173 unsigned int blksz = data->blksz;
174 unsigned int datasize = nob * blksz;
176 struct scatterlist *sg;
180 if (data->flags & MMC_DATA_STREAM)
184 data->bytes_xfered = 0;
186 writew(nob, host->base + MMC_REG_NOB);
187 writew(blksz, host->base + MMC_REG_BLK_LEN);
188 host->datasize = datasize;
191 for_each_sg(data->sg, sg, data->sg_len, i) {
192 if (sg->offset & 3 || sg->length & 3) {
198 if (data->flags & MMC_DATA_READ) {
199 host->dma_dir = DMA_FROM_DEVICE;
200 host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg,
201 data->sg_len, host->dma_dir);
203 ret = imx_dma_setup_sg(host->dma, data->sg, host->dma_nents,
205 host->res->start + MMC_REG_BUFFER_ACCESS,
208 host->dma_dir = DMA_TO_DEVICE;
209 host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg,
210 data->sg_len, host->dma_dir);
212 ret = imx_dma_setup_sg(host->dma, data->sg, host->dma_nents,
214 host->res->start + MMC_REG_BUFFER_ACCESS,
219 dev_err(mmc_dev(host->mmc), "failed to setup DMA : %d\n", ret);
224 imx_dma_enable(host->dma);
229 static int mxcmci_start_cmd(struct mxcmci_host *host, struct mmc_command *cmd,
232 u32 int_cntr = host->default_irq_mask;
235 WARN_ON(host->cmd != NULL);
238 switch (mmc_resp_type(cmd)) {
239 case MMC_RSP_R1: /* short CRC, OPCODE */
240 case MMC_RSP_R1B:/* short CRC, OPCODE, BUSY */
241 cmdat |= CMD_DAT_CONT_RESPONSE_48BIT_CRC;
243 case MMC_RSP_R2: /* long 136 bit + CRC */
244 cmdat |= CMD_DAT_CONT_RESPONSE_136BIT;
246 case MMC_RSP_R3: /* short */
247 cmdat |= CMD_DAT_CONT_RESPONSE_48BIT;
252 dev_err(mmc_dev(host->mmc), "unhandled response type 0x%x\n",
254 cmd->error = -EINVAL;
258 int_cntr = INT_END_CMD_RES_EN;
260 if (mxcmci_use_dma(host))
261 int_cntr |= INT_READ_OP_EN | INT_WRITE_OP_DONE_EN;
263 spin_lock_irqsave(&host->lock, flags);
265 int_cntr |= INT_SDIO_IRQ_EN;
266 writel(int_cntr, host->base + MMC_REG_INT_CNTR);
267 spin_unlock_irqrestore(&host->lock, flags);
269 writew(cmd->opcode, host->base + MMC_REG_CMD);
270 writel(cmd->arg, host->base + MMC_REG_ARG);
271 writew(cmdat, host->base + MMC_REG_CMD_DAT_CONT);
276 static void mxcmci_finish_request(struct mxcmci_host *host,
277 struct mmc_request *req)
279 u32 int_cntr = host->default_irq_mask;
282 spin_lock_irqsave(&host->lock, flags);
284 int_cntr |= INT_SDIO_IRQ_EN;
285 writel(int_cntr, host->base + MMC_REG_INT_CNTR);
286 spin_unlock_irqrestore(&host->lock, flags);
292 mmc_request_done(host->mmc, req);
295 static int mxcmci_finish_data(struct mxcmci_host *host, unsigned int stat)
297 struct mmc_data *data = host->data;
301 if (mxcmci_use_dma(host)) {
302 imx_dma_disable(host->dma);
303 dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_nents,
308 if (stat & STATUS_ERR_MASK) {
309 dev_dbg(mmc_dev(host->mmc), "request failed. status: 0x%08x\n",
311 if (stat & STATUS_CRC_READ_ERR) {
312 dev_err(mmc_dev(host->mmc), "%s: -EILSEQ\n", __func__);
313 data->error = -EILSEQ;
314 } else if (stat & STATUS_CRC_WRITE_ERR) {
315 u32 err_code = (stat >> 9) & 0x3;
316 if (err_code == 2) { /* No CRC response */
317 dev_err(mmc_dev(host->mmc),
318 "%s: No CRC -ETIMEDOUT\n", __func__);
319 data->error = -ETIMEDOUT;
321 dev_err(mmc_dev(host->mmc),
322 "%s: -EILSEQ\n", __func__);
323 data->error = -EILSEQ;
325 } else if (stat & STATUS_TIME_OUT_READ) {
326 dev_err(mmc_dev(host->mmc),
327 "%s: read -ETIMEDOUT\n", __func__);
328 data->error = -ETIMEDOUT;
330 dev_err(mmc_dev(host->mmc), "%s: -EIO\n", __func__);
334 data->bytes_xfered = host->datasize;
337 data_error = data->error;
344 static void mxcmci_read_response(struct mxcmci_host *host, unsigned int stat)
346 struct mmc_command *cmd = host->cmd;
353 if (stat & STATUS_TIME_OUT_RESP) {
354 dev_dbg(mmc_dev(host->mmc), "CMD TIMEOUT\n");
355 cmd->error = -ETIMEDOUT;
356 } else if (stat & STATUS_RESP_CRC_ERR && cmd->flags & MMC_RSP_CRC) {
357 dev_dbg(mmc_dev(host->mmc), "cmd crc error\n");
358 cmd->error = -EILSEQ;
361 if (cmd->flags & MMC_RSP_PRESENT) {
362 if (cmd->flags & MMC_RSP_136) {
363 for (i = 0; i < 4; i++) {
364 a = readw(host->base + MMC_REG_RES_FIFO);
365 b = readw(host->base + MMC_REG_RES_FIFO);
366 cmd->resp[i] = a << 16 | b;
369 a = readw(host->base + MMC_REG_RES_FIFO);
370 b = readw(host->base + MMC_REG_RES_FIFO);
371 c = readw(host->base + MMC_REG_RES_FIFO);
372 cmd->resp[0] = a << 24 | b << 8 | c >> 8;
377 static int mxcmci_poll_status(struct mxcmci_host *host, u32 mask)
380 unsigned long timeout = jiffies + HZ;
383 stat = readl(host->base + MMC_REG_STATUS);
384 if (stat & STATUS_ERR_MASK)
386 if (time_after(jiffies, timeout)) {
387 mxcmci_softreset(host);
388 mxcmci_set_clk_rate(host, host->clock);
389 return STATUS_TIME_OUT_READ;
397 static int mxcmci_pull(struct mxcmci_host *host, void *_buf, int bytes)
403 stat = mxcmci_poll_status(host,
404 STATUS_BUF_READ_RDY | STATUS_READ_OP_DONE);
407 *buf++ = readl(host->base + MMC_REG_BUFFER_ACCESS);
415 stat = mxcmci_poll_status(host,
416 STATUS_BUF_READ_RDY | STATUS_READ_OP_DONE);
419 tmp = readl(host->base + MMC_REG_BUFFER_ACCESS);
420 memcpy(b, &tmp, bytes);
426 static int mxcmci_push(struct mxcmci_host *host, void *_buf, int bytes)
432 stat = mxcmci_poll_status(host, STATUS_BUF_WRITE_RDY);
435 writel(*buf++, host->base + MMC_REG_BUFFER_ACCESS);
443 stat = mxcmci_poll_status(host, STATUS_BUF_WRITE_RDY);
447 memcpy(&tmp, b, bytes);
448 writel(tmp, host->base + MMC_REG_BUFFER_ACCESS);
451 stat = mxcmci_poll_status(host, STATUS_BUF_WRITE_RDY);
458 static int mxcmci_transfer_data(struct mxcmci_host *host)
460 struct mmc_data *data = host->req->data;
461 struct scatterlist *sg;
467 if (data->flags & MMC_DATA_READ) {
468 for_each_sg(data->sg, sg, data->sg_len, i) {
469 stat = mxcmci_pull(host, sg_virt(sg), sg->length);
472 host->datasize += sg->length;
475 for_each_sg(data->sg, sg, data->sg_len, i) {
476 stat = mxcmci_push(host, sg_virt(sg), sg->length);
479 host->datasize += sg->length;
481 stat = mxcmci_poll_status(host, STATUS_WRITE_OP_DONE);
488 static void mxcmci_datawork(struct work_struct *work)
490 struct mxcmci_host *host = container_of(work, struct mxcmci_host,
492 int datastat = mxcmci_transfer_data(host);
494 writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE,
495 host->base + MMC_REG_STATUS);
496 mxcmci_finish_data(host, datastat);
498 if (host->req->stop) {
499 if (mxcmci_start_cmd(host, host->req->stop, 0)) {
500 mxcmci_finish_request(host, host->req);
504 mxcmci_finish_request(host, host->req);
509 static void mxcmci_data_done(struct mxcmci_host *host, unsigned int stat)
511 struct mmc_data *data = host->data;
517 data_error = mxcmci_finish_data(host, stat);
519 mxcmci_read_response(host, stat);
522 if (host->req->stop) {
523 if (mxcmci_start_cmd(host, host->req->stop, 0)) {
524 mxcmci_finish_request(host, host->req);
528 mxcmci_finish_request(host, host->req);
533 static void mxcmci_cmd_done(struct mxcmci_host *host, unsigned int stat)
535 mxcmci_read_response(host, stat);
538 if (!host->data && host->req) {
539 mxcmci_finish_request(host, host->req);
543 /* For the DMA case the DMA engine handles the data transfer
544 * automatically. For non DMA we have to do it ourselves.
545 * Don't do it in interrupt context though.
547 if (!mxcmci_use_dma(host) && host->data)
548 schedule_work(&host->datawork);
552 static irqreturn_t mxcmci_irq(int irq, void *devid)
554 struct mxcmci_host *host = devid;
559 stat = readl(host->base + MMC_REG_STATUS);
560 writel(stat & ~(STATUS_SDIO_INT_ACTIVE | STATUS_DATA_TRANS_DONE |
561 STATUS_WRITE_OP_DONE), host->base + MMC_REG_STATUS);
563 dev_dbg(mmc_dev(host->mmc), "%s: 0x%08x\n", __func__, stat);
565 spin_lock_irqsave(&host->lock, flags);
566 sdio_irq = (stat & STATUS_SDIO_INT_ACTIVE) && host->use_sdio;
567 spin_unlock_irqrestore(&host->lock, flags);
570 if (mxcmci_use_dma(host) &&
571 (stat & (STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE)))
572 writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE,
573 host->base + MMC_REG_STATUS);
577 writel(STATUS_SDIO_INT_ACTIVE, host->base + MMC_REG_STATUS);
578 mmc_signal_sdio_irq(host->mmc);
581 if (stat & STATUS_END_CMD_RESP)
582 mxcmci_cmd_done(host, stat);
585 if (mxcmci_use_dma(host) &&
586 (stat & (STATUS_DATA_TRANS_DONE | STATUS_WRITE_OP_DONE)))
587 mxcmci_data_done(host, stat);
589 if (host->default_irq_mask &&
590 (stat & (STATUS_CARD_INSERTION | STATUS_CARD_REMOVAL)))
591 mmc_detect_change(host->mmc, msecs_to_jiffies(200));
595 static void mxcmci_request(struct mmc_host *mmc, struct mmc_request *req)
597 struct mxcmci_host *host = mmc_priv(mmc);
598 unsigned int cmdat = host->cmdat;
601 WARN_ON(host->req != NULL);
604 host->cmdat &= ~CMD_DAT_CONT_INIT;
609 error = mxcmci_setup_data(host, req->data);
611 req->cmd->error = error;
616 cmdat |= CMD_DAT_CONT_DATA_ENABLE;
618 if (req->data->flags & MMC_DATA_WRITE)
619 cmdat |= CMD_DAT_CONT_WRITE;
622 error = mxcmci_start_cmd(host, req->cmd, cmdat);
625 mxcmci_finish_request(host, req);
628 static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios)
630 unsigned int divider;
632 unsigned int clk_in = clk_get_rate(host->clk);
634 while (prescaler <= 0x800) {
635 for (divider = 1; divider <= 0xF; divider++) {
638 x = (clk_in / (divider + 1));
641 x /= (prescaler * 2);
655 writew((prescaler << 4) | divider, host->base + MMC_REG_CLK_RATE);
657 dev_dbg(mmc_dev(host->mmc), "scaler: %d divider: %d in: %d out: %d\n",
658 prescaler, divider, clk_in, clk_ios);
661 static void mxcmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
663 struct mxcmci_host *host = mmc_priv(mmc);
667 * use burstlen of 64 in 4 bit mode (--> reg value 0)
668 * use burstlen of 16 in 1 bit mode (--> reg value 16)
670 if (ios->bus_width == MMC_BUS_WIDTH_4)
675 imx_dma_config_burstlen(host->dma, blen);
677 if (ios->bus_width == MMC_BUS_WIDTH_4)
678 host->cmdat |= CMD_DAT_CONT_BUS_WIDTH_4;
680 host->cmdat &= ~CMD_DAT_CONT_BUS_WIDTH_4;
682 if (host->power_mode != ios->power_mode) {
683 if (host->pdata && host->pdata->setpower)
684 host->pdata->setpower(mmc_dev(mmc), ios->vdd);
685 host->power_mode = ios->power_mode;
686 if (ios->power_mode == MMC_POWER_ON)
687 host->cmdat |= CMD_DAT_CONT_INIT;
691 mxcmci_set_clk_rate(host, ios->clock);
692 writew(STR_STP_CLK_START_CLK, host->base + MMC_REG_STR_STP_CLK);
694 writew(STR_STP_CLK_STOP_CLK, host->base + MMC_REG_STR_STP_CLK);
697 host->clock = ios->clock;
700 static irqreturn_t mxcmci_detect_irq(int irq, void *data)
702 struct mmc_host *mmc = data;
704 dev_dbg(mmc_dev(mmc), "%s\n", __func__);
706 mmc_detect_change(mmc, msecs_to_jiffies(250));
710 static int mxcmci_get_ro(struct mmc_host *mmc)
712 struct mxcmci_host *host = mmc_priv(mmc);
714 if (host->pdata && host->pdata->get_ro)
715 return !!host->pdata->get_ro(mmc_dev(mmc));
717 * Board doesn't support read only detection; let the mmc core
723 static void mxcmci_enable_sdio_irq(struct mmc_host *mmc, int enable)
725 struct mxcmci_host *host = mmc_priv(mmc);
729 spin_lock_irqsave(&host->lock, flags);
730 host->use_sdio = enable;
731 int_cntr = readl(host->base + MMC_REG_INT_CNTR);
734 int_cntr |= INT_SDIO_IRQ_EN;
736 int_cntr &= ~INT_SDIO_IRQ_EN;
738 writel(int_cntr, host->base + MMC_REG_INT_CNTR);
739 spin_unlock_irqrestore(&host->lock, flags);
742 static void mxcmci_init_card(struct mmc_host *host, struct mmc_card *card)
745 * MX3 SoCs have a silicon bug which corrupts CRC calculation of
746 * multi-block transfers when connected SDIO peripheral doesn't
747 * drive the BUSY line as required by the specs.
748 * One way to prevent this is to only allow 1-bit transfers.
751 if (cpu_is_mx3() && card->type == MMC_TYPE_SDIO)
752 host->caps &= ~MMC_CAP_4_BIT_DATA;
754 host->caps |= MMC_CAP_4_BIT_DATA;
757 static const struct mmc_host_ops mxcmci_ops = {
758 .request = mxcmci_request,
759 .set_ios = mxcmci_set_ios,
760 .get_ro = mxcmci_get_ro,
761 .enable_sdio_irq = mxcmci_enable_sdio_irq,
762 .init_card = mxcmci_init_card,
765 static int mxcmci_probe(struct platform_device *pdev)
767 struct mmc_host *mmc;
768 struct mxcmci_host *host = NULL;
769 struct resource *iores, *r;
772 printk(KERN_INFO "i.MX SDHC driver\n");
774 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
775 irq = platform_get_irq(pdev, 0);
776 if (!iores || irq < 0)
779 r = request_mem_region(iores->start, resource_size(iores), pdev->name);
783 mmc = mmc_alloc_host(sizeof(struct mxcmci_host), &pdev->dev);
786 goto out_release_mem;
789 mmc->ops = &mxcmci_ops;
790 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
792 /* MMC core transfer sizes tunable parameters */
794 mmc->max_blk_size = 2048;
795 mmc->max_blk_count = 65535;
796 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
797 mmc->max_seg_size = mmc->max_req_size;
799 host = mmc_priv(mmc);
800 host->base = ioremap(r->start, resource_size(r));
807 host->pdata = pdev->dev.platform_data;
808 spin_lock_init(&host->lock);
810 if (host->pdata && host->pdata->ocr_avail)
811 mmc->ocr_avail = host->pdata->ocr_avail;
813 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
815 if (host->pdata && host->pdata->dat3_card_detect)
816 host->default_irq_mask =
817 INT_CARD_INSERTION_EN | INT_CARD_REMOVAL_EN;
819 host->default_irq_mask = 0;
824 host->clk = clk_get(&pdev->dev, NULL);
825 if (IS_ERR(host->clk)) {
826 ret = PTR_ERR(host->clk);
829 clk_enable(host->clk);
831 mxcmci_softreset(host);
833 host->rev_no = readw(host->base + MMC_REG_REV_NO);
834 if (host->rev_no != 0x400) {
836 dev_err(mmc_dev(host->mmc), "wrong rev.no. 0x%08x. aborting.\n",
841 mmc->f_min = clk_get_rate(host->clk) >> 16;
842 mmc->f_max = clk_get_rate(host->clk) >> 1;
844 /* recommended in data sheet */
845 writew(0x2db4, host->base + MMC_REG_READ_TO);
847 writel(host->default_irq_mask, host->base + MMC_REG_INT_CNTR);
850 host->dma = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_LOW);
852 dev_err(mmc_dev(host->mmc), "imx_dma_request_by_prio failed\n");
857 r = platform_get_resource(pdev, IORESOURCE_DMA, 0);
863 ret = imx_dma_config_channel(host->dma,
864 IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_FIFO,
865 IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR,
868 dev_err(mmc_dev(host->mmc), "failed to config DMA channel\n");
872 INIT_WORK(&host->datawork, mxcmci_datawork);
874 ret = request_irq(host->irq, mxcmci_irq, 0, DRIVER_NAME, host);
878 platform_set_drvdata(pdev, mmc);
880 if (host->pdata && host->pdata->init) {
881 ret = host->pdata->init(&pdev->dev, mxcmci_detect_irq,
892 free_irq(host->irq, host);
895 imx_dma_free(host->dma);
898 clk_disable(host->clk);
905 release_mem_region(iores->start, resource_size(iores));
909 static int mxcmci_remove(struct platform_device *pdev)
911 struct mmc_host *mmc = platform_get_drvdata(pdev);
912 struct mxcmci_host *host = mmc_priv(mmc);
914 platform_set_drvdata(pdev, NULL);
916 mmc_remove_host(mmc);
918 if (host->pdata && host->pdata->exit)
919 host->pdata->exit(&pdev->dev, mmc);
921 free_irq(host->irq, host);
924 imx_dma_free(host->dma);
926 clk_disable(host->clk);
929 release_mem_region(host->res->start, resource_size(host->res));
930 release_resource(host->res);
938 static int mxcmci_suspend(struct device *dev)
940 struct mmc_host *mmc = dev_get_drvdata(dev);
941 struct mxcmci_host *host = mmc_priv(mmc);
945 ret = mmc_suspend_host(mmc);
946 clk_disable(host->clk);
951 static int mxcmci_resume(struct device *dev)
953 struct mmc_host *mmc = dev_get_drvdata(dev);
954 struct mxcmci_host *host = mmc_priv(mmc);
957 clk_enable(host->clk);
959 ret = mmc_resume_host(mmc);
964 static const struct dev_pm_ops mxcmci_pm_ops = {
965 .suspend = mxcmci_suspend,
966 .resume = mxcmci_resume,
970 static struct platform_driver mxcmci_driver = {
971 .probe = mxcmci_probe,
972 .remove = mxcmci_remove,
975 .owner = THIS_MODULE,
977 .pm = &mxcmci_pm_ops,
982 static int __init mxcmci_init(void)
984 return platform_driver_register(&mxcmci_driver);
987 static void __exit mxcmci_exit(void)
989 platform_driver_unregister(&mxcmci_driver);
992 module_init(mxcmci_init);
993 module_exit(mxcmci_exit);
995 MODULE_DESCRIPTION("i.MX Multimedia Card Interface Driver");
996 MODULE_AUTHOR("Sascha Hauer, Pengutronix");
997 MODULE_LICENSE("GPL");
998 MODULE_ALIAS("platform:imx-mmc");