2 * linux/drivers/mmc/host/pxa.c - PXA MMCI driver
4 * Copyright (C) 2003 Russell King, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This hardware is really sick:
11 * - No way to clear interrupts.
12 * - Have to turn off the clock whenever we touch the device.
13 * - Doesn't tell you how many data blocks were transferred.
16 * 1 and 3 byte data transfers not supported
17 * max block length up to 1023
19 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/ioport.h>
22 #include <linux/platform_device.h>
23 #include <linux/delay.h>
24 #include <linux/interrupt.h>
25 #include <linux/dma-mapping.h>
26 #include <linux/clk.h>
27 #include <linux/err.h>
28 #include <linux/mmc/host.h>
30 #include <linux/regulator/consumer.h>
31 #include <linux/gpio.h>
33 #include <asm/sizes.h>
35 #include <mach/hardware.h>
41 #define DRIVER_NAME "pxa2xx-mci"
44 #define CLKRT_OFF (~0)
52 unsigned long clkrate;
58 unsigned int power_mode;
59 struct pxamci_platform_data *pdata;
61 struct mmc_request *mrq;
62 struct mmc_command *cmd;
63 struct mmc_data *data;
66 struct pxa_dma_desc *sg_cpu;
70 unsigned int dma_drcmrrx;
71 unsigned int dma_drcmrtx;
73 struct regulator *vcc;
76 static inline void pxamci_init_ocr(struct pxamci_host *host)
78 #ifdef CONFIG_REGULATOR
79 host->vcc = regulator_get(mmc_dev(host->mmc), "vmmc");
81 if (IS_ERR(host->vcc))
84 host->mmc->ocr_avail = mmc_regulator_get_ocrmask(host->vcc);
85 if (host->pdata && host->pdata->ocr_mask)
86 dev_warn(mmc_dev(host->mmc),
87 "ocr_mask/setpower will not be used\n");
90 if (host->vcc == NULL) {
91 /* fall-back to platform data */
92 host->mmc->ocr_avail = host->pdata ?
93 host->pdata->ocr_mask :
94 MMC_VDD_32_33 | MMC_VDD_33_34;
98 static inline void pxamci_set_power(struct pxamci_host *host, unsigned int vdd)
102 #ifdef CONFIG_REGULATOR
104 mmc_regulator_set_ocr(host->vcc, vdd);
106 if (!host->vcc && host->pdata &&
107 gpio_is_valid(host->pdata->gpio_power)) {
108 on = ((1 << vdd) & host->pdata->ocr_mask);
109 gpio_set_value(host->pdata->gpio_power,
110 !!on ^ host->pdata->gpio_power_invert);
112 if (!host->vcc && host->pdata && host->pdata->setpower)
113 host->pdata->setpower(mmc_dev(host->mmc), vdd);
116 static void pxamci_stop_clock(struct pxamci_host *host)
118 if (readl(host->base + MMC_STAT) & STAT_CLK_EN) {
119 unsigned long timeout = 10000;
122 writel(STOP_CLOCK, host->base + MMC_STRPCL);
125 v = readl(host->base + MMC_STAT);
126 if (!(v & STAT_CLK_EN))
132 dev_err(mmc_dev(host->mmc), "unable to stop clock\n");
136 static void pxamci_enable_irq(struct pxamci_host *host, unsigned int mask)
140 spin_lock_irqsave(&host->lock, flags);
141 host->imask &= ~mask;
142 writel(host->imask, host->base + MMC_I_MASK);
143 spin_unlock_irqrestore(&host->lock, flags);
146 static void pxamci_disable_irq(struct pxamci_host *host, unsigned int mask)
150 spin_lock_irqsave(&host->lock, flags);
152 writel(host->imask, host->base + MMC_I_MASK);
153 spin_unlock_irqrestore(&host->lock, flags);
156 static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
158 unsigned int nob = data->blocks;
159 unsigned long long clks;
160 unsigned int timeout;
167 if (data->flags & MMC_DATA_STREAM)
170 writel(nob, host->base + MMC_NOB);
171 writel(data->blksz, host->base + MMC_BLKLEN);
173 clks = (unsigned long long)data->timeout_ns * host->clkrate;
174 do_div(clks, 1000000000UL);
175 timeout = (unsigned int)clks + (data->timeout_clks << host->clkrt);
176 writel((timeout + 255) / 256, host->base + MMC_RDTO);
178 if (data->flags & MMC_DATA_READ) {
179 host->dma_dir = DMA_FROM_DEVICE;
180 dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC;
181 DRCMR(host->dma_drcmrtx) = 0;
182 DRCMR(host->dma_drcmrrx) = host->dma | DRCMR_MAPVLD;
184 host->dma_dir = DMA_TO_DEVICE;
185 dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG;
186 DRCMR(host->dma_drcmrrx) = 0;
187 DRCMR(host->dma_drcmrtx) = host->dma | DRCMR_MAPVLD;
190 dcmd |= DCMD_BURST32 | DCMD_WIDTH1;
192 host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
195 for (i = 0; i < host->dma_len; i++) {
196 unsigned int length = sg_dma_len(&data->sg[i]);
197 host->sg_cpu[i].dcmd = dcmd | length;
198 if (length & 31 && !(data->flags & MMC_DATA_READ))
199 host->sg_cpu[i].dcmd |= DCMD_ENDIRQEN;
200 /* Not aligned to 8-byte boundary? */
201 if (sg_dma_address(&data->sg[i]) & 0x7)
203 if (data->flags & MMC_DATA_READ) {
204 host->sg_cpu[i].dsadr = host->res->start + MMC_RXFIFO;
205 host->sg_cpu[i].dtadr = sg_dma_address(&data->sg[i]);
207 host->sg_cpu[i].dsadr = sg_dma_address(&data->sg[i]);
208 host->sg_cpu[i].dtadr = host->res->start + MMC_TXFIFO;
210 host->sg_cpu[i].ddadr = host->sg_dma + (i + 1) *
211 sizeof(struct pxa_dma_desc);
213 host->sg_cpu[host->dma_len - 1].ddadr = DDADR_STOP;
217 * The PXA27x DMA controller encounters overhead when working with
218 * unaligned (to 8-byte boundaries) data, so switch on byte alignment
219 * mode only if we have unaligned data.
222 DALGN |= (1 << host->dma);
224 DALGN &= ~(1 << host->dma);
225 DDADR(host->dma) = host->sg_dma;
228 * workaround for erratum #91:
229 * only start DMA now if we are doing a read,
230 * otherwise we wait until CMD/RESP has finished
231 * before starting DMA.
233 if (!cpu_is_pxa27x() || data->flags & MMC_DATA_READ)
234 DCSR(host->dma) = DCSR_RUN;
237 static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd, unsigned int cmdat)
239 WARN_ON(host->cmd != NULL);
242 if (cmd->flags & MMC_RSP_BUSY)
245 #define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE))
246 switch (RSP_TYPE(mmc_resp_type(cmd))) {
247 case RSP_TYPE(MMC_RSP_R1): /* r1, r1b, r6, r7 */
248 cmdat |= CMDAT_RESP_SHORT;
250 case RSP_TYPE(MMC_RSP_R3):
251 cmdat |= CMDAT_RESP_R3;
253 case RSP_TYPE(MMC_RSP_R2):
254 cmdat |= CMDAT_RESP_R2;
260 writel(cmd->opcode, host->base + MMC_CMD);
261 writel(cmd->arg >> 16, host->base + MMC_ARGH);
262 writel(cmd->arg & 0xffff, host->base + MMC_ARGL);
263 writel(cmdat, host->base + MMC_CMDAT);
264 writel(host->clkrt, host->base + MMC_CLKRT);
266 writel(START_CLOCK, host->base + MMC_STRPCL);
268 pxamci_enable_irq(host, END_CMD_RES);
271 static void pxamci_finish_request(struct pxamci_host *host, struct mmc_request *mrq)
276 mmc_request_done(host->mmc, mrq);
279 static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat)
281 struct mmc_command *cmd = host->cmd;
291 * Did I mention this is Sick. We always need to
292 * discard the upper 8 bits of the first 16-bit word.
294 v = readl(host->base + MMC_RES) & 0xffff;
295 for (i = 0; i < 4; i++) {
296 u32 w1 = readl(host->base + MMC_RES) & 0xffff;
297 u32 w2 = readl(host->base + MMC_RES) & 0xffff;
298 cmd->resp[i] = v << 24 | w1 << 8 | w2 >> 8;
302 if (stat & STAT_TIME_OUT_RESPONSE) {
303 cmd->error = -ETIMEDOUT;
304 } else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) {
306 * workaround for erratum #42:
307 * Intel PXA27x Family Processor Specification Update Rev 001
308 * A bogus CRC error can appear if the msb of a 136 bit
311 if (cpu_is_pxa27x() &&
312 (cmd->flags & MMC_RSP_136 && cmd->resp[0] & 0x80000000))
313 pr_debug("ignoring CRC from command %d - *risky*\n", cmd->opcode);
315 cmd->error = -EILSEQ;
318 pxamci_disable_irq(host, END_CMD_RES);
319 if (host->data && !cmd->error) {
320 pxamci_enable_irq(host, DATA_TRAN_DONE);
322 * workaround for erratum #91, if doing write
325 if (cpu_is_pxa27x() && host->data->flags & MMC_DATA_WRITE)
326 DCSR(host->dma) = DCSR_RUN;
328 pxamci_finish_request(host, host->mrq);
334 static int pxamci_data_done(struct pxamci_host *host, unsigned int stat)
336 struct mmc_data *data = host->data;
342 dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
345 if (stat & STAT_READ_TIME_OUT)
346 data->error = -ETIMEDOUT;
347 else if (stat & (STAT_CRC_READ_ERROR|STAT_CRC_WRITE_ERROR))
348 data->error = -EILSEQ;
351 * There appears to be a hardware design bug here. There seems to
352 * be no way to find out how much data was transferred to the card.
353 * This means that if there was an error on any block, we mark all
354 * data blocks as being in error.
357 data->bytes_xfered = data->blocks * data->blksz;
359 data->bytes_xfered = 0;
361 pxamci_disable_irq(host, DATA_TRAN_DONE);
364 if (host->mrq->stop) {
365 pxamci_stop_clock(host);
366 pxamci_start_cmd(host, host->mrq->stop, host->cmdat);
368 pxamci_finish_request(host, host->mrq);
374 static irqreturn_t pxamci_irq(int irq, void *devid)
376 struct pxamci_host *host = devid;
380 ireg = readl(host->base + MMC_I_REG) & ~readl(host->base + MMC_I_MASK);
383 unsigned stat = readl(host->base + MMC_STAT);
385 pr_debug("PXAMCI: irq %08x stat %08x\n", ireg, stat);
387 if (ireg & END_CMD_RES)
388 handled |= pxamci_cmd_done(host, stat);
389 if (ireg & DATA_TRAN_DONE)
390 handled |= pxamci_data_done(host, stat);
391 if (ireg & SDIO_INT) {
392 mmc_signal_sdio_irq(host->mmc);
397 return IRQ_RETVAL(handled);
400 static void pxamci_request(struct mmc_host *mmc, struct mmc_request *mrq)
402 struct pxamci_host *host = mmc_priv(mmc);
405 WARN_ON(host->mrq != NULL);
409 pxamci_stop_clock(host);
412 host->cmdat &= ~CMDAT_INIT;
415 pxamci_setup_data(host, mrq->data);
417 cmdat &= ~CMDAT_BUSY;
418 cmdat |= CMDAT_DATAEN | CMDAT_DMAEN;
419 if (mrq->data->flags & MMC_DATA_WRITE)
420 cmdat |= CMDAT_WRITE;
422 if (mrq->data->flags & MMC_DATA_STREAM)
423 cmdat |= CMDAT_STREAM;
426 pxamci_start_cmd(host, mrq->cmd, cmdat);
429 static int pxamci_get_ro(struct mmc_host *mmc)
431 struct pxamci_host *host = mmc_priv(mmc);
433 if (host->pdata && gpio_is_valid(host->pdata->gpio_card_ro)) {
434 if (host->pdata->gpio_card_ro_invert)
435 return !gpio_get_value(host->pdata->gpio_card_ro);
437 return gpio_get_value(host->pdata->gpio_card_ro);
439 if (host->pdata && host->pdata->get_ro)
440 return !!host->pdata->get_ro(mmc_dev(mmc));
442 * Board doesn't support read only detection; let the mmc core
448 static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
450 struct pxamci_host *host = mmc_priv(mmc);
453 unsigned long rate = host->clkrate;
454 unsigned int clk = rate / ios->clock;
456 if (host->clkrt == CLKRT_OFF)
457 clk_enable(host->clk);
459 if (ios->clock == 26000000) {
460 /* to support 26MHz on pxa300/pxa310 */
463 /* to handle (19.5MHz, 26MHz) */
468 * clk might result in a lower divisor than we
469 * desire. check for that condition and adjust
472 if (rate / clk > ios->clock)
474 host->clkrt = fls(clk) - 1;
478 * we write clkrt on the next command
481 pxamci_stop_clock(host);
482 if (host->clkrt != CLKRT_OFF) {
483 host->clkrt = CLKRT_OFF;
484 clk_disable(host->clk);
488 if (host->power_mode != ios->power_mode) {
489 host->power_mode = ios->power_mode;
491 pxamci_set_power(host, ios->vdd);
493 if (ios->power_mode == MMC_POWER_ON)
494 host->cmdat |= CMDAT_INIT;
497 if (ios->bus_width == MMC_BUS_WIDTH_4)
498 host->cmdat |= CMDAT_SD_4DAT;
500 host->cmdat &= ~CMDAT_SD_4DAT;
502 pr_debug("PXAMCI: clkrt = %x cmdat = %x\n",
503 host->clkrt, host->cmdat);
506 static void pxamci_enable_sdio_irq(struct mmc_host *host, int enable)
508 struct pxamci_host *pxa_host = mmc_priv(host);
511 pxamci_enable_irq(pxa_host, SDIO_INT);
513 pxamci_disable_irq(pxa_host, SDIO_INT);
516 static const struct mmc_host_ops pxamci_ops = {
517 .request = pxamci_request,
518 .get_ro = pxamci_get_ro,
519 .set_ios = pxamci_set_ios,
520 .enable_sdio_irq = pxamci_enable_sdio_irq,
523 static void pxamci_dma_irq(int dma, void *devid)
525 struct pxamci_host *host = devid;
526 int dcsr = DCSR(dma);
527 DCSR(dma) = dcsr & ~DCSR_STOPIRQEN;
529 if (dcsr & DCSR_ENDINTR) {
530 writel(BUF_PART_FULL, host->base + MMC_PRTBUF);
532 printk(KERN_ERR "%s: DMA error on channel %d (DCSR=%#x)\n",
533 mmc_hostname(host->mmc), dma, dcsr);
534 host->data->error = -EIO;
535 pxamci_data_done(host, 0);
539 static irqreturn_t pxamci_detect_irq(int irq, void *devid)
541 struct pxamci_host *host = mmc_priv(devid);
543 mmc_detect_change(devid, host->pdata->detect_delay);
547 static int pxamci_probe(struct platform_device *pdev)
549 struct mmc_host *mmc;
550 struct pxamci_host *host = NULL;
551 struct resource *r, *dmarx, *dmatx;
552 int ret, irq, gpio_cd = -1, gpio_ro = -1, gpio_power = -1;
554 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
555 irq = platform_get_irq(pdev, 0);
559 r = request_mem_region(r->start, SZ_4K, DRIVER_NAME);
563 mmc = mmc_alloc_host(sizeof(struct pxamci_host), &pdev->dev);
569 mmc->ops = &pxamci_ops;
572 * We can do SG-DMA, but we don't because we never know how much
573 * data we successfully wrote to the card.
575 mmc->max_phys_segs = NR_SG;
578 * Our hardware DMA can handle a maximum of one page per SG entry.
580 mmc->max_seg_size = PAGE_SIZE;
583 * Block length register is only 10 bits before PXA27x.
585 mmc->max_blk_size = cpu_is_pxa25x() ? 1023 : 2048;
588 * Block count register is 16 bits.
590 mmc->max_blk_count = 65535;
592 host = mmc_priv(mmc);
595 host->pdata = pdev->dev.platform_data;
596 host->clkrt = CLKRT_OFF;
598 host->clk = clk_get(&pdev->dev, NULL);
599 if (IS_ERR(host->clk)) {
600 ret = PTR_ERR(host->clk);
605 host->clkrate = clk_get_rate(host->clk);
608 * Calculate minimum clock rate, rounding up.
610 mmc->f_min = (host->clkrate + 63) / 64;
611 mmc->f_max = (cpu_is_pxa300() || cpu_is_pxa310()) ? 26000000
614 pxamci_init_ocr(host);
618 if (!cpu_is_pxa25x()) {
619 mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
620 host->cmdat |= CMDAT_SDIO_INT_EN;
621 if (cpu_is_pxa300() || cpu_is_pxa310())
622 mmc->caps |= MMC_CAP_MMC_HIGHSPEED |
623 MMC_CAP_SD_HIGHSPEED;
626 host->sg_cpu = dma_alloc_coherent(&pdev->dev, PAGE_SIZE, &host->sg_dma, GFP_KERNEL);
632 spin_lock_init(&host->lock);
635 host->imask = MMC_I_MASK_ALL;
637 host->base = ioremap(r->start, SZ_4K);
644 * Ensure that the host controller is shut down, and setup
647 pxamci_stop_clock(host);
648 writel(0, host->base + MMC_SPI);
649 writel(64, host->base + MMC_RESTO);
650 writel(host->imask, host->base + MMC_I_MASK);
652 host->dma = pxa_request_dma(DRIVER_NAME, DMA_PRIO_LOW,
653 pxamci_dma_irq, host);
659 ret = request_irq(host->irq, pxamci_irq, 0, DRIVER_NAME, host);
663 platform_set_drvdata(pdev, mmc);
665 dmarx = platform_get_resource(pdev, IORESOURCE_DMA, 0);
670 host->dma_drcmrrx = dmarx->start;
672 dmatx = platform_get_resource(pdev, IORESOURCE_DMA, 1);
677 host->dma_drcmrtx = dmatx->start;
680 gpio_cd = host->pdata->gpio_card_detect;
681 gpio_ro = host->pdata->gpio_card_ro;
682 gpio_power = host->pdata->gpio_power;
684 if (gpio_is_valid(gpio_power)) {
685 ret = gpio_request(gpio_power, "mmc card power");
687 dev_err(&pdev->dev, "Failed requesting gpio_power %d\n", gpio_power);
690 gpio_direction_output(gpio_power,
691 host->pdata->gpio_power_invert);
693 if (gpio_is_valid(gpio_ro)) {
694 ret = gpio_request(gpio_ro, "mmc card read only");
696 dev_err(&pdev->dev, "Failed requesting gpio_ro %d\n", gpio_power);
699 gpio_direction_input(gpio_ro);
701 if (gpio_is_valid(gpio_cd)) {
702 ret = gpio_request(gpio_cd, "mmc card detect");
704 dev_err(&pdev->dev, "Failed requesting gpio_cd %d\n", gpio_power);
707 gpio_direction_input(gpio_cd);
709 ret = request_irq(gpio_to_irq(gpio_cd), pxamci_detect_irq,
710 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
711 "mmc card detect", mmc);
713 dev_err(&pdev->dev, "failed to request card detect IRQ\n");
714 goto err_request_irq;
718 if (host->pdata && host->pdata->init)
719 host->pdata->init(&pdev->dev, pxamci_detect_irq, mmc);
721 if (gpio_is_valid(gpio_power) && host->pdata->setpower)
722 dev_warn(&pdev->dev, "gpio_power and setpower() both defined\n");
723 if (gpio_is_valid(gpio_ro) && host->pdata->get_ro)
724 dev_warn(&pdev->dev, "gpio_ro and get_ro() both defined\n");
735 gpio_free(gpio_power);
739 pxa_free_dma(host->dma);
743 dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
753 static int pxamci_remove(struct platform_device *pdev)
755 struct mmc_host *mmc = platform_get_drvdata(pdev);
756 int gpio_cd = -1, gpio_ro = -1, gpio_power = -1;
758 platform_set_drvdata(pdev, NULL);
761 struct pxamci_host *host = mmc_priv(mmc);
764 gpio_cd = host->pdata->gpio_card_detect;
765 gpio_ro = host->pdata->gpio_card_ro;
766 gpio_power = host->pdata->gpio_power;
768 if (gpio_is_valid(gpio_cd)) {
769 free_irq(gpio_to_irq(gpio_cd), mmc);
772 if (gpio_is_valid(gpio_ro))
774 if (gpio_is_valid(gpio_power))
775 gpio_free(gpio_power);
777 regulator_put(host->vcc);
779 if (host->pdata && host->pdata->exit)
780 host->pdata->exit(&pdev->dev, mmc);
782 mmc_remove_host(mmc);
784 pxamci_stop_clock(host);
785 writel(TXFIFO_WR_REQ|RXFIFO_RD_REQ|CLK_IS_OFF|STOP_CMD|
786 END_CMD_RES|PRG_DONE|DATA_TRAN_DONE,
787 host->base + MMC_I_MASK);
789 DRCMR(host->dma_drcmrrx) = 0;
790 DRCMR(host->dma_drcmrtx) = 0;
792 free_irq(host->irq, host);
793 pxa_free_dma(host->dma);
795 dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma);
799 release_resource(host->res);
807 static int pxamci_suspend(struct device *dev)
809 struct mmc_host *mmc = dev_get_drvdata(dev);
813 ret = mmc_suspend_host(mmc, PMSG_SUSPEND);
818 static int pxamci_resume(struct device *dev)
820 struct mmc_host *mmc = dev_get_drvdata(dev);
824 ret = mmc_resume_host(mmc);
829 static struct dev_pm_ops pxamci_pm_ops = {
830 .suspend = pxamci_suspend,
831 .resume = pxamci_resume,
835 static struct platform_driver pxamci_driver = {
836 .probe = pxamci_probe,
837 .remove = pxamci_remove,
840 .owner = THIS_MODULE,
842 .pm = &pxamci_pm_ops,
847 static int __init pxamci_init(void)
849 return platform_driver_register(&pxamci_driver);
852 static void __exit pxamci_exit(void)
854 platform_driver_unregister(&pxamci_driver);
857 module_init(pxamci_init);
858 module_exit(pxamci_exit);
860 MODULE_DESCRIPTION("PXA Multimedia Card Interface Driver");
861 MODULE_LICENSE("GPL");
862 MODULE_ALIAS("platform:pxa2xx-mci");