drivers/mmc/host/s3cmci.c

   1 /*
   2  *  linux/drivers/mmc/s3cmci.h - Samsung S3C MCI driver
   3  *
   4  *  Copyright (C) 2004-2006 maintech GmbH, Thomas Kleffel <tk@maintech.de>
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #include <linux/module.h>
  12 #include <linux/dma-mapping.h>
  13 #include <linux/clk.h>
  14 #include <linux/mmc/host.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/irq.h>
  17 #include <linux/io.h>
  18
  19 #include <asm/dma.h>
  20
  21 #include <asm/arch/regs-sdi.h>
  22 #include <asm/arch/regs-gpio.h>
  23
  24 #include "s3cmci.h"
  25
  26 #define DRIVER_NAME "s3c-mci"
  27
  28 enum dbg_channels {
  29         dbg_err   = (1 << 0),
  30         dbg_debug = (1 << 1),
  31         dbg_info  = (1 << 2),
  32         dbg_irq   = (1 << 3),
  33         dbg_sg    = (1 << 4),
  34         dbg_dma   = (1 << 5),
  35         dbg_pio   = (1 << 6),
  36         dbg_fail  = (1 << 7),
  37         dbg_conf  = (1 << 8),
  38 };
  39
  40 static const int dbgmap_err   = dbg_err | dbg_fail;
  41 static const int dbgmap_info  = dbg_info | dbg_conf;
  42 static const int dbgmap_debug = dbg_debug;
  43
  44 #define dbg(host, channels, args...)              \
  45         do {                                      \
  46         if (dbgmap_err & channels)                \
  47                 dev_err(&host->pdev->dev, args);  \
  48         else if (dbgmap_info & channels)          \
  49                 dev_info(&host->pdev->dev, args); \
  50         else if (dbgmap_debug & channels)         \
  51                 dev_dbg(&host->pdev->dev, args);  \
  52         } while (0)
  53
  54 #define RESSIZE(ressource) (((ressource)->end - (ressource)->start)+1)
  55
  56 static struct s3c2410_dma_client s3cmci_dma_client = {
  57         .name           = "s3c-mci",
  58 };
  59
  60 static void finalize_request(struct s3cmci_host *host);
  61 static void s3cmci_send_request(struct mmc_host *mmc);
  62 static void s3cmci_reset(struct s3cmci_host *host);
  63
  64 #ifdef CONFIG_MMC_DEBUG
  65
  66 static void dbg_dumpregs(struct s3cmci_host *host, char *prefix)
  67 {
  68         u32 con, pre, cmdarg, cmdcon, cmdsta, r0, r1, r2, r3, timer, bsize;
  69         u32 datcon, datcnt, datsta, fsta, imask;
  70
  71         con     = readl(host->base + S3C2410_SDICON);
  72         pre     = readl(host->base + S3C2410_SDIPRE);
  73         cmdarg  = readl(host->base + S3C2410_SDICMDARG);
  74         cmdcon  = readl(host->base + S3C2410_SDICMDCON);
  75         cmdsta  = readl(host->base + S3C2410_SDICMDSTAT);
  76         r0      = readl(host->base + S3C2410_SDIRSP0);
  77         r1      = readl(host->base + S3C2410_SDIRSP1);
  78         r2      = readl(host->base + S3C2410_SDIRSP2);
  79         r3      = readl(host->base + S3C2410_SDIRSP3);
  80         timer   = readl(host->base + S3C2410_SDITIMER);
  81         bsize   = readl(host->base + S3C2410_SDIBSIZE);
  82         datcon  = readl(host->base + S3C2410_SDIDCON);
  83         datcnt  = readl(host->base + S3C2410_SDIDCNT);
  84         datsta  = readl(host->base + S3C2410_SDIDSTA);
  85         fsta    = readl(host->base + S3C2410_SDIFSTA);
  86         imask   = readl(host->base + host->sdiimsk);
  87
  88         dbg(host, dbg_debug, "%s  CON:[%08x]  PRE:[%08x]  TMR:[%08x]\n",
  89                                 prefix, con, pre, timer);
  90
  91         dbg(host, dbg_debug, "%s CCON:[%08x] CARG:[%08x] CSTA:[%08x]\n",
  92                                 prefix, cmdcon, cmdarg, cmdsta);
  93
  94         dbg(host, dbg_debug, "%s DCON:[%08x] FSTA:[%08x]"
  95                                " DSTA:[%08x] DCNT:[%08x]\n",
  96                                 prefix, datcon, fsta, datsta, datcnt);
  97
  98         dbg(host, dbg_debug, "%s   R0:[%08x]   R1:[%08x]"
  99                                "   R2:[%08x]   R3:[%08x]\n",
 100                                 prefix, r0, r1, r2, r3);
 101 }
 102
 103 static void prepare_dbgmsg(struct s3cmci_host *host, struct mmc_command *cmd,
 104                            int stop)
 105 {
 106         snprintf(host->dbgmsg_cmd, 300,
 107                  "#%u%s op:%i arg:0x%08x flags:0x08%x retries:%u",
 108                  host->ccnt, (stop ? " (STOP)" : ""),
 109                  cmd->opcode, cmd->arg, cmd->flags, cmd->retries);
 110
 111         if (cmd->data) {
 112                 snprintf(host->dbgmsg_dat, 300,
 113                          "#%u bsize:%u blocks:%u bytes:%u",
 114                          host->dcnt, cmd->data->blksz,
 115                          cmd->data->blocks,
 116                          cmd->data->blocks * cmd->data->blksz);
 117         } else {
 118                 host->dbgmsg_dat[0] = '\0';
 119         }
 120 }
 121
 122 static void dbg_dumpcmd(struct s3cmci_host *host, struct mmc_command *cmd,
 123                         int fail)
 124 {
 125         unsigned int dbglvl = fail ? dbg_fail : dbg_debug;
 126
 127         if (!cmd)
 128                 return;
 129
 130         if (cmd->error == 0) {
 131                 dbg(host, dbglvl, "CMD[OK] %s R0:0x%08x\n",
 132                         host->dbgmsg_cmd, cmd->resp[0]);
 133         } else {
 134                 dbg(host, dbglvl, "CMD[ERR %i] %s Status:%s\n",
 135                         cmd->error, host->dbgmsg_cmd, host->status);
 136         }
 137
 138         if (!cmd->data)
 139                 return;
 140
 141         if (cmd->data->error == 0) {
 142                 dbg(host, dbglvl, "DAT[OK] %s\n", host->dbgmsg_dat);
 143         } else {
 144                 dbg(host, dbglvl, "DAT[ERR %i] %s DCNT:0x%08x\n",
 145                         cmd->data->error, host->dbgmsg_dat,
 146                         readl(host->base + S3C2410_SDIDCNT));
 147         }
 148 }
 149 #else
 150 static void dbg_dumpcmd(struct s3cmci_host *host,
 151                         struct mmc_command *cmd, int fail) { }
 152
 153 static void prepare_dbgmsg(struct s3cmci_host *host, struct mmc_command *cmd,
 154                            int stop) { }
 155
 156 static void dbg_dumpregs(struct s3cmci_host *host, char *prefix) { }
 157
 158 #endif /* CONFIG_MMC_DEBUG */
 159
 160 static inline u32 enable_imask(struct s3cmci_host *host, u32 imask)
 161 {
 162         u32 newmask;
 163
 164         newmask = readl(host->base + host->sdiimsk);
 165         newmask |= imask;
 166
 167         writel(newmask, host->base + host->sdiimsk);
 168
 169         return newmask;
 170 }
 171
 172 static inline u32 disable_imask(struct s3cmci_host *host, u32 imask)
 173 {
 174         u32 newmask;
 175
 176         newmask = readl(host->base + host->sdiimsk);
 177         newmask &= ~imask;
 178
 179         writel(newmask, host->base + host->sdiimsk);
 180
 181         return newmask;
 182 }
 183
 184 static inline void clear_imask(struct s3cmci_host *host)
 185 {
 186         writel(0, host->base + host->sdiimsk);
 187 }
 188
 189 static inline int get_data_buffer(struct s3cmci_host *host,
 190                                   u32 *words, u32 **pointer)
 191 {
 192         struct scatterlist *sg;
 193
 194         if (host->pio_active == XFER_NONE)
 195                 return -EINVAL;
 196
 197         if ((!host->mrq) || (!host->mrq->data))
 198                 return -EINVAL;
 199
 200         if (host->pio_sgptr >= host->mrq->data->sg_len) {
 201                 dbg(host, dbg_debug, "no more buffers (%i/%i)\n",
 202                       host->pio_sgptr, host->mrq->data->sg_len);
 203                 return -EBUSY;
 204         }
 205         sg = &host->mrq->data->sg[host->pio_sgptr];
 206
 207         *words = sg->length >> 2;
 208         *pointer = sg_virt(sg);
 209
 210         host->pio_sgptr++;
 211
 212         dbg(host, dbg_sg, "new buffer (%i/%i)\n",
 213             host->pio_sgptr, host->mrq->data->sg_len);
 214
 215         return 0;
 216 }
 217
 218 static inline u32 fifo_count(struct s3cmci_host *host)
 219 {
 220         u32 fifostat = readl(host->base + S3C2410_SDIFSTA);
 221
 222         fifostat &= S3C2410_SDIFSTA_COUNTMASK;
 223         return fifostat >> 2;
 224 }
 225
 226 static inline u32 fifo_free(struct s3cmci_host *host)
 227 {
 228         u32 fifostat = readl(host->base + S3C2410_SDIFSTA);
 229
 230         fifostat &= S3C2410_SDIFSTA_COUNTMASK;
 231         return (63 - fifostat) >> 2;
 232 }
 233
 234 static void do_pio_read(struct s3cmci_host *host)
 235 {
 236         int res;
 237         u32 fifo;
 238         void __iomem *from_ptr;
 239
 240         /* write real prescaler to host, it might be set slow to fix */
 241         writel(host->prescaler, host->base + S3C2410_SDIPRE);
 242
 243         from_ptr = host->base + host->sdidata;
 244
 245         while ((fifo = fifo_count(host))) {
 246                 if (!host->pio_words) {
 247                         res = get_data_buffer(host, &host->pio_words,
 248                                               &host->pio_ptr);
 249                         if (res) {
 250                                 host->pio_active = XFER_NONE;
 251                                 host->complete_what = COMPLETION_FINALIZE;
 252
 253                                 dbg(host, dbg_pio, "pio_read(): "
 254                                     "complete (no more data).\n");
 255                                 return;
 256                         }
 257
 258                         dbg(host, dbg_pio,
 259                             "pio_read(): new target: [%i]@[%p]\n",
 260                             host->pio_words, host->pio_ptr);
 261                 }
 262
 263                 dbg(host, dbg_pio,
 264                     "pio_read(): fifo:[%02i] buffer:[%03i] dcnt:[%08X]\n",
 265                     fifo, host->pio_words,
 266                     readl(host->base + S3C2410_SDIDCNT));
 267
 268                 if (fifo > host->pio_words)
 269                         fifo = host->pio_words;
 270
 271                 host->pio_words -= fifo;
 272                 host->pio_count += fifo;
 273
 274                 while (fifo--)
 275                         *(host->pio_ptr++) = readl(from_ptr);
 276         }
 277
 278         if (!host->pio_words) {
 279                 res = get_data_buffer(host, &host->pio_words, &host->pio_ptr);
 280                 if (res) {
 281                         dbg(host, dbg_pio,
 282                             "pio_read(): complete (no more buffers).\n");
 283                         host->pio_active = XFER_NONE;
 284                         host->complete_what = COMPLETION_FINALIZE;
 285
 286                         return;
 287                 }
 288         }
 289
 290         enable_imask(host,
 291                      S3C2410_SDIIMSK_RXFIFOHALF | S3C2410_SDIIMSK_RXFIFOLAST);
 292 }
 293
 294 static void do_pio_write(struct s3cmci_host *host)
 295 {
 296         void __iomem *to_ptr;
 297         int res;
 298         u32 fifo;
 299
 300         to_ptr = host->base + host->sdidata;
 301
 302         while ((fifo = fifo_free(host))) {
 303                 if (!host->pio_words) {
 304                         res = get_data_buffer(host, &host->pio_words,
 305                                                         &host->pio_ptr);
 306                         if (res) {
 307                                 dbg(host, dbg_pio,
 308                                     "pio_write(): complete (no more data).\n");
 309                                 host->pio_active = XFER_NONE;
 310
 311                                 return;
 312                         }
 313
 314                         dbg(host, dbg_pio,
 315                             "pio_write(): new source: [%i]@[%p]\n",
 316                             host->pio_words, host->pio_ptr);
 317
 318                 }
 319
 320                 if (fifo > host->pio_words)
 321                         fifo = host->pio_words;
 322
 323                 host->pio_words -= fifo;
 324                 host->pio_count += fifo;
 325
 326                 while (fifo--)
 327                         writel(*(host->pio_ptr++), to_ptr);
 328         }
 329
 330         enable_imask(host, S3C2410_SDIIMSK_TXFIFOHALF);
 331 }
 332
 333 static void pio_tasklet(unsigned long data)
 334 {
 335         struct s3cmci_host *host = (struct s3cmci_host *) data;
 336
 337
 338         disable_irq(host->irq);
 339
 340         if (host->pio_active == XFER_WRITE)
 341                 do_pio_write(host);
 342
 343         if (host->pio_active == XFER_READ)
 344                 do_pio_read(host);
 345
 346         if (host->complete_what == COMPLETION_FINALIZE) {
 347                 clear_imask(host);
 348                 if (host->pio_active != XFER_NONE) {
 349                         dbg(host, dbg_err, "unfinished %s "
 350                             "- pio_count:[%u] pio_words:[%u]\n",
 351                             (host->pio_active == XFER_READ) ? "read" : "write",
 352                             host->pio_count, host->pio_words);
 353
 354                         host->mrq->data->error = -EINVAL;
 355                 }
 356
 357                 finalize_request(host);
 358         } else
 359                 enable_irq(host->irq);
 360 }
 361
 362 /*
 363  * ISR for SDI Interface IRQ
 364  * Communication between driver and ISR works as follows:
 365  *   host->mrq                  points to current request
 366  *   host->complete_what        Indicates when the request is considered done
 367  *     COMPLETION_CMDSENT         when the command was sent
 368  *     COMPLETION_RSPFIN          when a response was received
 369  *     COMPLETION_XFERFINISH      when the data transfer is finished
 370  *     COMPLETION_XFERFINISH_RSPFIN both of the above.
 371  *   host->complete_request     is the completion-object the driver waits for
 372  *
 373  * 1) Driver sets up host->mrq and host->complete_what
 374  * 2) Driver prepares the transfer
 375  * 3) Driver enables interrupts
 376  * 4) Driver starts transfer
 377  * 5) Driver waits for host->complete_rquest
 378  * 6) ISR checks for request status (errors and success)
 379  * 6) ISR sets host->mrq->cmd->error and host->mrq->data->error
 380  * 7) ISR completes host->complete_request
 381  * 8) ISR disables interrupts
 382  * 9) Driver wakes up and takes care of the request
 383  *
 384  * Note: "->error"-fields are expected to be set to 0 before the request
 385  *       was issued by mmc.c - therefore they are only set, when an error
 386  *       contition comes up
 387  */
 388
 389 static irqreturn_t s3cmci_irq(int irq, void *dev_id)
 390 {
 391         struct s3cmci_host *host = dev_id;
 392         struct mmc_command *cmd;
 393         u32 mci_csta, mci_dsta, mci_fsta, mci_dcnt, mci_imsk;
 394         u32 mci_cclear, mci_dclear;
 395         unsigned long iflags;
 396
 397         spin_lock_irqsave(&host->complete_lock, iflags);
 398
 399         mci_csta = readl(host->base + S3C2410_SDICMDSTAT);
 400         mci_dsta = readl(host->base + S3C2410_SDIDSTA);
 401         mci_dcnt = readl(host->base + S3C2410_SDIDCNT);
 402         mci_fsta = readl(host->base + S3C2410_SDIFSTA);
 403         mci_imsk = readl(host->base + host->sdiimsk);
 404         mci_cclear = 0;
 405         mci_dclear = 0;
 406
 407         if ((host->complete_what == COMPLETION_NONE) ||
 408             (host->complete_what == COMPLETION_FINALIZE)) {
 409                 host->status = "nothing to complete";
 410                 clear_imask(host);
 411                 goto irq_out;
 412         }
 413
 414         if (!host->mrq) {
 415                 host->status = "no active mrq";
 416                 clear_imask(host);
 417                 goto irq_out;
 418         }
 419
 420         cmd = host->cmd_is_stop ? host->mrq->stop : host->mrq->cmd;
 421
 422         if (!cmd) {
 423                 host->status = "no active cmd";
 424                 clear_imask(host);
 425                 goto irq_out;
 426         }
 427
 428         if (!host->dodma) {
 429                 if ((host->pio_active == XFER_WRITE) &&
 430                     (mci_fsta & S3C2410_SDIFSTA_TFDET)) {
 431
 432                         disable_imask(host, S3C2410_SDIIMSK_TXFIFOHALF);
 433                         tasklet_schedule(&host->pio_tasklet);
 434                         host->status = "pio tx";
 435                 }
 436
 437                 if ((host->pio_active == XFER_READ) &&
 438                     (mci_fsta & S3C2410_SDIFSTA_RFDET)) {
 439
 440                         disable_imask(host,
 441                                       S3C2410_SDIIMSK_RXFIFOHALF |
 442                                       S3C2410_SDIIMSK_RXFIFOLAST);
 443
 444                         tasklet_schedule(&host->pio_tasklet);
 445                         host->status = "pio rx";
 446                 }
 447         }
 448
 449         if (mci_csta & S3C2410_SDICMDSTAT_CMDTIMEOUT) {
 450                 cmd->error = -ETIMEDOUT;
 451                 host->status = "error: command timeout";
 452                 goto fail_transfer;
 453         }
 454
 455         if (mci_csta & S3C2410_SDICMDSTAT_CMDSENT) {
 456                 if (host->complete_what == COMPLETION_CMDSENT) {
 457                         host->status = "ok: command sent";
 458                         goto close_transfer;
 459                 }
 460
 461                 mci_cclear |= S3C2410_SDICMDSTAT_CMDSENT;
 462         }
 463
 464         if (mci_csta & S3C2410_SDICMDSTAT_CRCFAIL) {
 465                 if (cmd->flags & MMC_RSP_CRC) {
 466                         if (host->mrq->cmd->flags & MMC_RSP_136) {
 467                                 dbg(host, dbg_irq,
 468                                     "fixup: ignore CRC fail with long rsp\n");
 469                         } else {
 470                                 /* note, we used to fail the transfer
 471                                  * here, but it seems that this is just
 472                                  * the hardware getting it wrong.
 473                                  *
 474                                  * cmd->error = -EILSEQ;
 475                                  * host->status = "error: bad command crc";
 476                                  * goto fail_transfer;
 477                                 */
 478                         }
 479                 }
 480
 481                 mci_cclear |= S3C2410_SDICMDSTAT_CRCFAIL;
 482         }
 483
 484         if (mci_csta & S3C2410_SDICMDSTAT_RSPFIN) {
 485                 if (host->complete_what == COMPLETION_RSPFIN) {
 486                         host->status = "ok: command response received";
 487                         goto close_transfer;
 488                 }
 489
 490                 if (host->complete_what == COMPLETION_XFERFINISH_RSPFIN)
 491                         host->complete_what = COMPLETION_XFERFINISH;
 492
 493                 mci_cclear |= S3C2410_SDICMDSTAT_RSPFIN;
 494         }
 495
 496         /* errors handled after this point are only relevant
 497            when a data transfer is in progress */
 498
 499         if (!cmd->data)
 500                 goto clear_status_bits;
 501
 502         /* Check for FIFO failure */
 503         if (host->is2440) {
 504                 if (mci_fsta & S3C2440_SDIFSTA_FIFOFAIL) {
 505                         host->mrq->data->error = -EILSEQ;
 506                         host->status = "error: 2440 fifo failure";
 507                         goto fail_transfer;
 508                 }
 509         } else {
 510                 if (mci_dsta & S3C2410_SDIDSTA_FIFOFAIL) {
 511                         cmd->data->error = -EILSEQ;
 512                         host->status = "error:  fifo failure";
 513                         goto fail_transfer;
 514                 }
 515         }
 516
 517         if (mci_dsta & S3C2410_SDIDSTA_RXCRCFAIL) {
 518                 cmd->data->error = -EILSEQ;
 519                 host->status = "error: bad data crc (outgoing)";
 520                 goto fail_transfer;
 521         }
 522
 523         if (mci_dsta & S3C2410_SDIDSTA_CRCFAIL) {
 524                 cmd->data->error = -EILSEQ;
 525                 host->status = "error: bad data crc (incoming)";
 526                 goto fail_transfer;
 527         }
 528
 529         if (mci_dsta & S3C2410_SDIDSTA_DATATIMEOUT) {
 530                 cmd->data->error = -ETIMEDOUT;
 531                 host->status = "error: data timeout";
 532                 goto fail_transfer;
 533         }
 534
 535         if (mci_dsta & S3C2410_SDIDSTA_XFERFINISH) {
 536                 if (host->complete_what == COMPLETION_XFERFINISH) {
 537                         host->status = "ok: data transfer completed";
 538                         goto close_transfer;
 539                 }
 540
 541                 if (host->complete_what == COMPLETION_XFERFINISH_RSPFIN)
 542                         host->complete_what = COMPLETION_RSPFIN;
 543
 544                 mci_dclear |= S3C2410_SDIDSTA_XFERFINISH;
 545         }
 546
 547 clear_status_bits:
 548         writel(mci_cclear, host->base + S3C2410_SDICMDSTAT);
 549         writel(mci_dclear, host->base + S3C2410_SDIDSTA);
 550
 551         goto irq_out;
 552
 553 fail_transfer:
 554         host->pio_active = XFER_NONE;
 555
 556 close_transfer:
 557         host->complete_what = COMPLETION_FINALIZE;
 558
 559         clear_imask(host);
 560         tasklet_schedule(&host->pio_tasklet);
 561
 562         goto irq_out;
 563
 564 irq_out:
 565         dbg(host, dbg_irq,
 566             "csta:0x%08x dsta:0x%08x fsta:0x%08x dcnt:0x%08x status:%s.\n",
 567             mci_csta, mci_dsta, mci_fsta, mci_dcnt, host->status);
 568
 569         spin_unlock_irqrestore(&host->complete_lock, iflags);
 570         return IRQ_HANDLED;
 571
 572 }
 573
 574 /*
 575  * ISR for the CardDetect Pin
 576 */
 577
 578 static irqreturn_t s3cmci_irq_cd(int irq, void *dev_id)
 579 {
 580         struct s3cmci_host *host = (struct s3cmci_host *)dev_id;
 581
 582         dbg(host, dbg_irq, "card detect\n");
 583
 584         mmc_detect_change(host->mmc, 500);
 585
 586         return IRQ_HANDLED;
 587 }
 588
 589 void s3cmci_dma_done_callback(struct s3c2410_dma_chan *dma_ch, void *buf_id,
 590                               int size, enum s3c2410_dma_buffresult result)
 591 {
 592         struct s3cmci_host *host = buf_id;
 593         unsigned long iflags;
 594         u32 mci_csta, mci_dsta, mci_fsta, mci_dcnt;
 595
 596         mci_csta = readl(host->base + S3C2410_SDICMDSTAT);
 597         mci_dsta = readl(host->base + S3C2410_SDIDSTA);
 598         mci_fsta = readl(host->base + S3C2410_SDIFSTA);
 599         mci_dcnt = readl(host->base + S3C2410_SDIDCNT);
 600
 601         BUG_ON(!host->mrq);
 602         BUG_ON(!host->mrq->data);
 603         BUG_ON(!host->dmatogo);
 604
 605         spin_lock_irqsave(&host->complete_lock, iflags);
 606
 607         if (result != S3C2410_RES_OK) {
 608                 dbg(host, dbg_fail, "DMA FAILED: csta=0x%08x dsta=0x%08x "
 609                         "fsta=0x%08x dcnt:0x%08x result:0x%08x toGo:%u\n",
 610                         mci_csta, mci_dsta, mci_fsta,
 611                         mci_dcnt, result, host->dmatogo);
 612
 613                 goto fail_request;
 614         }
 615
 616         host->dmatogo--;
 617         if (host->dmatogo) {
 618                 dbg(host, dbg_dma, "DMA DONE  Size:%i DSTA:[%08x] "
 619                         "DCNT:[%08x] toGo:%u\n",
 620                         size, mci_dsta, mci_dcnt, host->dmatogo);
 621
 622                 goto out;
 623         }
 624
 625         dbg(host, dbg_dma, "DMA FINISHED Size:%i DSTA:%08x DCNT:%08x\n",
 626                 size, mci_dsta, mci_dcnt);
 627
 628         host->complete_what = COMPLETION_FINALIZE;
 629
 630 out:
 631         tasklet_schedule(&host->pio_tasklet);
 632         spin_unlock_irqrestore(&host->complete_lock, iflags);
 633         return;
 634
 635 fail_request:
 636         host->mrq->data->error = -EINVAL;
 637         host->complete_what = COMPLETION_FINALIZE;
 638         writel(0, host->base + host->sdiimsk);
 639         goto out;
 640
 641 }
 642
 643 static void finalize_request(struct s3cmci_host *host)
 644 {
 645         struct mmc_request *mrq = host->mrq;
 646         struct mmc_command *cmd = host->cmd_is_stop ? mrq->stop : mrq->cmd;
 647         int debug_as_failure = 0;
 648
 649         if (host->complete_what != COMPLETION_FINALIZE)
 650                 return;
 651
 652         if (!mrq)
 653                 return;
 654
 655         if (cmd->data && (cmd->error == 0) &&
 656             (cmd->data->error == 0)) {
 657                 if (host->dodma && (!host->dma_complete)) {
 658                         dbg(host, dbg_dma, "DMA Missing!\n");
 659                         return;
 660                 }
 661         }
 662
 663         /* Read response from controller. */
 664         cmd->resp[0] = readl(host->base + S3C2410_SDIRSP0);
 665         cmd->resp[1] = readl(host->base + S3C2410_SDIRSP1);
 666         cmd->resp[2] = readl(host->base + S3C2410_SDIRSP2);
 667         cmd->resp[3] = readl(host->base + S3C2410_SDIRSP3);
 668
 669         writel(host->prescaler, host->base + S3C2410_SDIPRE);
 670
 671         if (cmd->error)
 672                 debug_as_failure = 1;
 673
 674         if (cmd->data && cmd->data->error)
 675                 debug_as_failure = 1;
 676
 677         dbg_dumpcmd(host, cmd, debug_as_failure);
 678
 679         /* Cleanup controller */
 680         writel(0, host->base + S3C2410_SDICMDARG);
 681         writel(S3C2410_SDIDCON_STOP, host->base + S3C2410_SDIDCON);
 682         writel(0, host->base + S3C2410_SDICMDCON);
 683         writel(0, host->base + host->sdiimsk);
 684
 685         if (cmd->data && cmd->error)
 686                 cmd->data->error = cmd->error;
 687
 688         if (cmd->data && cmd->data->stop && (!host->cmd_is_stop)) {
 689                 host->cmd_is_stop = 1;
 690                 s3cmci_send_request(host->mmc);
 691                 return;
 692         }
 693
 694         /* If we have no data transfer we are finished here */
 695         if (!mrq->data)
 696                 goto request_done;
 697
 698         /* Calulate the amout of bytes transfer if there was no error */
 699         if (mrq->data->error == 0) {
 700                 mrq->data->bytes_xfered =
 701                         (mrq->data->blocks * mrq->data->blksz);
 702         } else {
 703                 mrq->data->bytes_xfered = 0;
 704         }
 705
 706         /* If we had an error while transfering data we flush the
 707          * DMA channel and the fifo to clear out any garbage. */
 708         if (mrq->data->error != 0) {
 709                 if (host->dodma)
 710                         s3c2410_dma_ctrl(host->dma, S3C2410_DMAOP_FLUSH);
 711
 712                 if (host->is2440) {
 713                         /* Clear failure register and reset fifo. */
 714                         writel(S3C2440_SDIFSTA_FIFORESET |
 715                                S3C2440_SDIFSTA_FIFOFAIL,
 716                                host->base + S3C2410_SDIFSTA);
 717                 } else {
 718                         u32 mci_con;
 719
 720                         /* reset fifo */
 721                         mci_con = readl(host->base + S3C2410_SDICON);
 722                         mci_con |= S3C2410_SDICON_FIFORESET;
 723
 724                         writel(mci_con, host->base + S3C2410_SDICON);
 725                 }
 726         }
 727
 728 request_done:
 729         host->complete_what = COMPLETION_NONE;
 730         host->mrq = NULL;
 731         mmc_request_done(host->mmc, mrq);
 732 }
 733
 734
 735 void s3cmci_dma_setup(struct s3cmci_host *host, enum s3c2410_dmasrc source)
 736 {
 737         static enum s3c2410_dmasrc last_source = -1;
 738         static int setup_ok;
 739
 740         if (last_source == source)
 741                 return;
 742
 743         last_source = source;
 744
 745         s3c2410_dma_devconfig(host->dma, source, 3,
 746                               host->mem->start + host->sdidata);
 747
 748         if (!setup_ok) {
 749                 s3c2410_dma_config(host->dma, 4,
 750                         (S3C2410_DCON_HWTRIG | S3C2410_DCON_CH0_SDI));
 751                 s3c2410_dma_set_buffdone_fn(host->dma,
 752                                             s3cmci_dma_done_callback);
 753                 s3c2410_dma_setflags(host->dma, S3C2410_DMAF_AUTOSTART);
 754                 setup_ok = 1;
 755         }
 756 }
 757
 758 static void s3cmci_send_command(struct s3cmci_host *host,
 759                                         struct mmc_command *cmd)
 760 {
 761         u32 ccon, imsk;
 762
 763         imsk  = S3C2410_SDIIMSK_CRCSTATUS | S3C2410_SDIIMSK_CMDTIMEOUT |
 764                 S3C2410_SDIIMSK_RESPONSEND | S3C2410_SDIIMSK_CMDSENT |
 765                 S3C2410_SDIIMSK_RESPONSECRC;
 766
 767         enable_imask(host, imsk);
 768
 769         if (cmd->data)
 770                 host->complete_what = COMPLETION_XFERFINISH_RSPFIN;
 771         else if (cmd->flags & MMC_RSP_PRESENT)
 772                 host->complete_what = COMPLETION_RSPFIN;
 773         else
 774                 host->complete_what = COMPLETION_CMDSENT;
 775
 776         writel(cmd->arg, host->base + S3C2410_SDICMDARG);
 777
 778         ccon  = cmd->opcode & S3C2410_SDICMDCON_INDEX;
 779         ccon |= S3C2410_SDICMDCON_SENDERHOST | S3C2410_SDICMDCON_CMDSTART;
 780
 781         if (cmd->flags & MMC_RSP_PRESENT)
 782                 ccon |= S3C2410_SDICMDCON_WAITRSP;
 783
 784         if (cmd->flags & MMC_RSP_136)
 785                 ccon |= S3C2410_SDICMDCON_LONGRSP;
 786
 787         writel(ccon, host->base + S3C2410_SDICMDCON);
 788 }
 789
 790 static int s3cmci_setup_data(struct s3cmci_host *host, struct mmc_data *data)
 791 {
 792         u32 dcon, imsk, stoptries = 3;
 793
 794         /* write DCON register */
 795
 796         if (!data) {
 797                 writel(0, host->base + S3C2410_SDIDCON);
 798                 return 0;
 799         }
 800
 801         while (readl(host->base + S3C2410_SDIDSTA) &
 802                (S3C2410_SDIDSTA_TXDATAON | S3C2410_SDIDSTA_RXDATAON)) {
 803
 804                 dbg(host, dbg_err,
 805                     "mci_setup_data() transfer stillin progress.\n");
 806
 807                 writel(S3C2410_SDIDCON_STOP, host->base + S3C2410_SDIDCON);
 808                 s3cmci_reset(host);
 809
 810                 if ((stoptries--) == 0) {
 811                         dbg_dumpregs(host, "DRF");
 812                         return -EINVAL;
 813                 }
 814         }
 815
 816         dcon  = data->blocks & S3C2410_SDIDCON_BLKNUM_MASK;
 817
 818         if (host->dodma)
 819                 dcon |= S3C2410_SDIDCON_DMAEN;
 820
 821         if (host->bus_width == MMC_BUS_WIDTH_4)
 822                 dcon |= S3C2410_SDIDCON_WIDEBUS;
 823
 824         if (!(data->flags & MMC_DATA_STREAM))
 825                 dcon |= S3C2410_SDIDCON_BLOCKMODE;
 826
 827         if (data->flags & MMC_DATA_WRITE) {
 828                 dcon |= S3C2410_SDIDCON_TXAFTERRESP;
 829                 dcon |= S3C2410_SDIDCON_XFER_TXSTART;
 830         }
 831
 832         if (data->flags & MMC_DATA_READ) {
 833                 dcon |= S3C2410_SDIDCON_RXAFTERCMD;
 834                 dcon |= S3C2410_SDIDCON_XFER_RXSTART;
 835         }
 836
 837         if (host->is2440) {
 838                 dcon |= S3C2440_SDIDCON_DS_WORD;
 839                 dcon |= S3C2440_SDIDCON_DATSTART;
 840         }
 841
 842         writel(dcon, host->base + S3C2410_SDIDCON);
 843
 844         /* write BSIZE register */
 845
 846         writel(data->blksz, host->base + S3C2410_SDIBSIZE);
 847
 848         /* add to IMASK register */
 849         imsk = S3C2410_SDIIMSK_FIFOFAIL | S3C2410_SDIIMSK_DATACRC |
 850                S3C2410_SDIIMSK_DATATIMEOUT | S3C2410_SDIIMSK_DATAFINISH;
 851
 852         enable_imask(host, imsk);
 853
 854         /* write TIMER register */
 855
 856         if (host->is2440) {
 857                 writel(0x007FFFFF, host->base + S3C2410_SDITIMER);
 858         } else {
 859                 writel(0x0000FFFF, host->base + S3C2410_SDITIMER);
 860
 861                 /* FIX: set slow clock to prevent timeouts on read */
 862                 if (data->flags & MMC_DATA_READ)
 863                         writel(0xFF, host->base + S3C2410_SDIPRE);
 864         }
 865
 866         return 0;
 867 }
 868
 869 #define BOTH_DIR (MMC_DATA_WRITE | MMC_DATA_READ)
 870
 871 static int s3cmci_prepare_pio(struct s3cmci_host *host, struct mmc_data *data)
 872 {
 873         int rw = (data->flags & MMC_DATA_WRITE) ? 1 : 0;
 874
 875         BUG_ON((data->flags & BOTH_DIR) == BOTH_DIR);
 876
 877         host->pio_sgptr = 0;
 878         host->pio_words = 0;
 879         host->pio_count = 0;
 880         host->pio_active = rw ? XFER_WRITE : XFER_READ;
 881
 882         if (rw) {
 883                 do_pio_write(host);
 884                 enable_imask(host, S3C2410_SDIIMSK_TXFIFOHALF);
 885         } else {
 886                 enable_imask(host, S3C2410_SDIIMSK_RXFIFOHALF
 887                              | S3C2410_SDIIMSK_RXFIFOLAST);
 888         }
 889
 890         return 0;
 891 }
 892
 893 static int s3cmci_prepare_dma(struct s3cmci_host *host, struct mmc_data *data)
 894 {
 895         int dma_len, i;
 896         int rw = (data->flags & MMC_DATA_WRITE) ? 1 : 0;
 897
 898         BUG_ON((data->flags & BOTH_DIR) == BOTH_DIR);
 899
 900         s3cmci_dma_setup(host, rw ? S3C2410_DMASRC_MEM : S3C2410_DMASRC_HW);
 901         s3c2410_dma_ctrl(host->dma, S3C2410_DMAOP_FLUSH);
 902
 903         dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, data->sg_len,
 904                              (rw) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 905
 906         if (dma_len == 0)
 907                 return -ENOMEM;
 908
 909         host->dma_complete = 0;
 910         host->dmatogo = dma_len;
 911
 912         for (i = 0; i < dma_len; i++) {
 913                 int res;
 914
 915                 dbg(host, dbg_dma, "enqueue %i:%u@%u\n", i,
 916                         sg_dma_address(&data->sg[i]),
 917                         sg_dma_len(&data->sg[i]));
 918
 919                 res = s3c2410_dma_enqueue(host->dma, (void *) host,
 920                                           sg_dma_address(&data->sg[i]),
 921                                           sg_dma_len(&data->sg[i]));
 922
 923                 if (res) {
 924                         s3c2410_dma_ctrl(host->dma, S3C2410_DMAOP_FLUSH);
 925                         return -EBUSY;
 926                 }
 927         }
 928
 929         s3c2410_dma_ctrl(host->dma, S3C2410_DMAOP_START);
 930
 931         return 0;
 932 }
 933
 934 static void s3cmci_send_request(struct mmc_host *mmc)
 935 {
 936         struct s3cmci_host *host = mmc_priv(mmc);
 937         struct mmc_request *mrq = host->mrq;
 938         struct mmc_command *cmd = host->cmd_is_stop ? mrq->stop : mrq->cmd;
 939
 940         host->ccnt++;
 941         prepare_dbgmsg(host, cmd, host->cmd_is_stop);
 942
 943         /* Clear command, data and fifo status registers
 944            Fifo clear only necessary on 2440, but doesn't hurt on 2410
 945         */
 946         writel(0xFFFFFFFF, host->base + S3C2410_SDICMDSTAT);
 947         writel(0xFFFFFFFF, host->base + S3C2410_SDIDSTA);
 948         writel(0xFFFFFFFF, host->base + S3C2410_SDIFSTA);
 949
 950         if (cmd->data) {
 951                 int res = s3cmci_setup_data(host, cmd->data);
 952
 953                 host->dcnt++;
 954
 955                 if (res) {
 956                         cmd->error = -EINVAL;
 957                         cmd->data->error = -EINVAL;
 958
 959                         mmc_request_done(mmc, mrq);
 960                         return;
 961                 }
 962
 963                 if (host->dodma)
 964                         res = s3cmci_prepare_dma(host, cmd->data);
 965                 else
 966                         res = s3cmci_prepare_pio(host, cmd->data);
 967
 968                 if (res) {
 969                         cmd->error = res;
 970                         cmd->data->error = res;
 971
 972                         mmc_request_done(mmc, mrq);
 973                         return;
 974                 }
 975         }
 976
 977         /* Send command */
 978         s3cmci_send_command(host, cmd);
 979
 980         /* Enable Interrupt */
 981         enable_irq(host->irq);
 982 }
 983
 984 static void s3cmci_request(struct mmc_host *mmc, struct mmc_request *mrq)
 985 {
 986         struct s3cmci_host *host = mmc_priv(mmc);
 987
 988         host->status = "mmc request";
 989         host->cmd_is_stop = 0;
 990         host->mrq = mrq;
 991
 992         s3cmci_send_request(mmc);
 993 }
 994
 995 static void s3cmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 996 {
 997         struct s3cmci_host *host = mmc_priv(mmc);
 998         u32 mci_psc, mci_con;
 999
1000         /* Set the power state */
1001
1002         mci_con = readl(host->base + S3C2410_SDICON);
1003
1004         switch (ios->power_mode) {
1005         case MMC_POWER_ON:
1006         case MMC_POWER_UP:
1007                 s3c2410_gpio_cfgpin(S3C2410_GPE5, S3C2410_GPE5_SDCLK);
1008                 s3c2410_gpio_cfgpin(S3C2410_GPE6, S3C2410_GPE6_SDCMD);
1009                 s3c2410_gpio_cfgpin(S3C2410_GPE7, S3C2410_GPE7_SDDAT0);
1010                 s3c2410_gpio_cfgpin(S3C2410_GPE8, S3C2410_GPE8_SDDAT1);
1011                 s3c2410_gpio_cfgpin(S3C2410_GPE9, S3C2410_GPE9_SDDAT2);
1012                 s3c2410_gpio_cfgpin(S3C2410_GPE10, S3C2410_GPE10_SDDAT3);
1013
1014                 if (!host->is2440)
1015                         mci_con |= S3C2410_SDICON_FIFORESET;
1016
1017                 break;
1018
1019         case MMC_POWER_OFF:
1020         default:
1021                 s3c2410_gpio_setpin(S3C2410_GPE5, 0);
1022                 s3c2410_gpio_cfgpin(S3C2410_GPE5, S3C2410_GPE5_OUTP);
1023
1024                 if (host->is2440)
1025                         mci_con |= S3C2440_SDICON_SDRESET;
1026
1027                 break;
1028         }
1029
1030         /* Set clock */
1031         for (mci_psc = 0; mci_psc < 255; mci_psc++) {
1032                 host->real_rate = host->clk_rate / (host->clk_div*(mci_psc+1));
1033
1034                 if (host->real_rate <= ios->clock)
1035                         break;
1036         }
1037
1038         if (mci_psc > 255)
1039                 mci_psc = 255;
1040
1041         host->prescaler = mci_psc;
1042         writel(host->prescaler, host->base + S3C2410_SDIPRE);
1043
1044         /* If requested clock is 0, real_rate will be 0, too */
1045         if (ios->clock == 0)
1046                 host->real_rate = 0;
1047
1048         /* Set CLOCK_ENABLE */
1049         if (ios->clock)
1050                 mci_con |= S3C2410_SDICON_CLOCKTYPE;
1051         else
1052                 mci_con &= ~S3C2410_SDICON_CLOCKTYPE;
1053
1054         writel(mci_con, host->base + S3C2410_SDICON);
1055
1056         if ((ios->power_mode == MMC_POWER_ON) ||
1057             (ios->power_mode == MMC_POWER_UP)) {
1058                 dbg(host, dbg_conf, "running at %lukHz (requested: %ukHz).\n",
1059                         host->real_rate/1000, ios->clock/1000);
1060         } else {
1061                 dbg(host, dbg_conf, "powered down.\n");
1062         }
1063
1064         host->bus_width = ios->bus_width;
1065 }
1066
1067 static void s3cmci_reset(struct s3cmci_host *host)
1068 {
1069         u32 con = readl(host->base + S3C2410_SDICON);
1070
1071         con |= S3C2440_SDICON_SDRESET;
1072         writel(con, host->base + S3C2410_SDICON);
1073 }
1074
1075 static struct mmc_host_ops s3cmci_ops = {
1076         .request        = s3cmci_request,
1077         .set_ios        = s3cmci_set_ios,
1078 };
1079
1080 static int __devinit s3cmci_probe(struct platform_device *pdev, int is2440)
1081 {
1082         struct s3cmci_host *host;
1083         struct mmc_host *mmc;
1084         int ret;
1085
1086         mmc = mmc_alloc_host(sizeof(struct s3cmci_host), &pdev->dev);
1087         if (!mmc) {
1088                 ret = -ENOMEM;
1089                 goto probe_out;
1090         }
1091
1092         host = mmc_priv(mmc);
1093         host->mmc       = mmc;
1094         host->pdev      = pdev;
1095         host->is2440    = is2440;
1096
1097         spin_lock_init(&host->complete_lock);
1098         tasklet_init(&host->pio_tasklet, pio_tasklet, (unsigned long) host);
1099
1100         if (is2440) {
1101                 host->sdiimsk   = S3C2440_SDIIMSK;
1102                 host->sdidata   = S3C2440_SDIDATA;
1103                 host->clk_div   = 1;
1104         } else {
1105                 host->sdiimsk   = S3C2410_SDIIMSK;
1106                 host->sdidata   = S3C2410_SDIDATA;
1107                 host->clk_div   = 2;
1108         }
1109
1110         host->dodma             = 0;
1111         host->complete_what     = COMPLETION_NONE;
1112         host->pio_active        = XFER_NONE;
1113
1114         host->dma               = S3CMCI_DMA;
1115         host->irq_cd            = IRQ_EINT2;
1116
1117         host->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1118         if (!host->mem) {
1119                 dev_err(&pdev->dev,
1120                         "failed to get io memory region resouce.\n");
1121
1122                 ret = -ENOENT;
1123                 goto probe_free_host;
1124         }
1125
1126         host->mem = request_mem_region(host->mem->start,
1127                                        RESSIZE(host->mem), pdev->name);
1128
1129         if (!host->mem) {
1130                 dev_err(&pdev->dev, "failed to request io memory region.\n");
1131                 ret = -ENOENT;
1132                 goto probe_free_host;
1133         }
1134
1135         host->base = ioremap(host->mem->start, RESSIZE(host->mem));
1136         if (host->base == 0) {
1137                 dev_err(&pdev->dev, "failed to ioremap() io memory region.\n");
1138                 ret = -EINVAL;
1139                 goto probe_free_mem_region;
1140         }
1141
1142         host->irq = platform_get_irq(pdev, 0);
1143         if (host->irq == 0) {
1144                 dev_err(&pdev->dev, "failed to get interrupt resouce.\n");
1145                 ret = -EINVAL;
1146                 goto probe_iounmap;
1147         }
1148
1149         if (request_irq(host->irq, s3cmci_irq, 0, DRIVER_NAME, host)) {
1150                 dev_err(&pdev->dev, "failed to request mci interrupt.\n");
1151                 ret = -ENOENT;
1152                 goto probe_iounmap;
1153         }
1154
1155         /* We get spurious interrupts even when we have set the IMSK
1156          * register to ignore everything, so use disable_irq() to make
1157          * ensure we don't lock the system with un-serviceable requests. */
1158
1159         disable_irq(host->irq);
1160
1161         s3c2410_gpio_cfgpin(S3C2410_GPF2, S3C2410_GPF2_EINT2);
1162         set_irq_type(host->irq_cd, IRQT_BOTHEDGE);
1163
1164         if (request_irq(host->irq_cd, s3cmci_irq_cd, 0, DRIVER_NAME, host)) {
1165                 dev_err(&pdev->dev,
1166                         "failed to request card detect interrupt.\n");
1167                 ret = -ENOENT;
1168                 goto probe_free_irq;
1169         }
1170
1171         if (s3c2410_dma_request(S3CMCI_DMA, &s3cmci_dma_client, NULL)) {
1172                 dev_err(&pdev->dev, "unable to get DMA channel.\n");
1173                 ret = -EBUSY;
1174                 goto probe_free_irq_cd;
1175         }
1176
1177         host->clk = clk_get(&pdev->dev, "sdi");
1178         if (IS_ERR(host->clk)) {
1179                 dev_err(&pdev->dev, "failed to find clock source.\n");
1180                 ret = PTR_ERR(host->clk);
1181                 host->clk = NULL;
1182                 goto probe_free_host;
1183         }
1184
1185         ret = clk_enable(host->clk);
1186         if (ret) {
1187                 dev_err(&pdev->dev, "failed to enable clock source.\n");
1188                 goto clk_free;
1189         }
1190
1191         host->clk_rate = clk_get_rate(host->clk);
1192
1193         mmc->ops        = &s3cmci_ops;
1194         mmc->ocr_avail  = MMC_VDD_32_33;
1195         mmc->caps       = MMC_CAP_4_BIT_DATA;
1196         mmc->f_min      = host->clk_rate / (host->clk_div * 256);
1197         mmc->f_max      = host->clk_rate / host->clk_div;
1198
1199         mmc->max_blk_count      = 4095;
1200         mmc->max_blk_size       = 4095;
1201         mmc->max_req_size       = 4095 * 512;
1202         mmc->max_seg_size       = mmc->max_req_size;
1203
1204         mmc->max_phys_segs      = 128;
1205         mmc->max_hw_segs        = 128;
1206
1207         dbg(host, dbg_debug,
1208             "probe: mode:%s mapped mci_base:%p irq:%u irq_cd:%u dma:%u.\n",
1209             (host->is2440?"2440":""),
1210             host->base, host->irq, host->irq_cd, host->dma);
1211
1212         ret = mmc_add_host(mmc);
1213         if (ret) {
1214                 dev_err(&pdev->dev, "failed to add mmc host.\n");
1215                 goto free_dmabuf;
1216         }
1217
1218         platform_set_drvdata(pdev, mmc);
1219         dev_info(&pdev->dev, "initialisation done.\n");
1220
1221         return 0;
1222
1223  free_dmabuf:
1224         clk_disable(host->clk);
1225
1226  clk_free:
1227         clk_put(host->clk);
1228
1229  probe_free_irq_cd:
1230         free_irq(host->irq_cd, host);
1231
1232  probe_free_irq:
1233         free_irq(host->irq, host);
1234
1235  probe_iounmap:
1236         iounmap(host->base);
1237
1238  probe_free_mem_region:
1239         release_mem_region(host->mem->start, RESSIZE(host->mem));
1240
1241  probe_free_host:
1242         mmc_free_host(mmc);
1243  probe_out:
1244         return ret;
1245 }
1246
1247 static int __devexit s3cmci_remove(struct platform_device *pdev)
1248 {
1249         struct mmc_host         *mmc  = platform_get_drvdata(pdev);
1250         struct s3cmci_host      *host = mmc_priv(mmc);
1251
1252         mmc_remove_host(mmc);
1253
1254         clk_disable(host->clk);
1255         clk_put(host->clk);
1256
1257         tasklet_disable(&host->pio_tasklet);
1258         s3c2410_dma_free(S3CMCI_DMA, &s3cmci_dma_client);
1259
1260         free_irq(host->irq_cd, host);
1261         free_irq(host->irq, host);
1262
1263         iounmap(host->base);
1264         release_mem_region(host->mem->start, RESSIZE(host->mem));
1265
1266         mmc_free_host(mmc);
1267         return 0;
1268 }
1269
1270 static int __devinit s3cmci_probe_2410(struct platform_device *dev)
1271 {
1272         return s3cmci_probe(dev, 0);
1273 }
1274
1275 static int __devinit s3cmci_probe_2412(struct platform_device *dev)
1276 {
1277         return s3cmci_probe(dev, 1);
1278 }
1279
1280 static int __devinit s3cmci_probe_2440(struct platform_device *dev)
1281 {
1282         return s3cmci_probe(dev, 1);
1283 }
1284
1285 #ifdef CONFIG_PM
1286
1287 static int s3cmci_suspend(struct platform_device *dev, pm_message_t state)
1288 {
1289         struct mmc_host *mmc = platform_get_drvdata(dev);
1290
1291         return  mmc_suspend_host(mmc, state);
1292 }
1293
1294 static int s3cmci_resume(struct platform_device *dev)
1295 {
1296         struct mmc_host *mmc = platform_get_drvdata(dev);
1297
1298         return mmc_resume_host(mmc);
1299 }
1300
1301 #else /* CONFIG_PM */
1302 #define s3cmci_suspend NULL
1303 #define s3cmci_resume NULL
1304 #endif /* CONFIG_PM */
1305
1306
1307 static struct platform_driver s3cmci_driver_2410 = {
1308         .driver.name    = "s3c2410-sdi",
1309         .driver.owner   = THIS_MODULE,
1310         .probe          = s3cmci_probe_2410,
1311         .remove         = __devexit_p(s3cmci_remove),
1312         .suspend        = s3cmci_suspend,
1313         .resume         = s3cmci_resume,
1314 };
1315
1316 static struct platform_driver s3cmci_driver_2412 = {
1317         .driver.name    = "s3c2412-sdi",
1318         .driver.owner   = THIS_MODULE,
1319         .probe          = s3cmci_probe_2412,
1320         .remove         = __devexit_p(s3cmci_remove),
1321         .suspend        = s3cmci_suspend,
1322         .resume         = s3cmci_resume,
1323 };
1324
1325 static struct platform_driver s3cmci_driver_2440 = {
1326         .driver.name    = "s3c2440-sdi",
1327         .driver.owner   = THIS_MODULE,
1328         .probe          = s3cmci_probe_2440,
1329         .remove         = __devexit_p(s3cmci_remove),
1330         .suspend        = s3cmci_suspend,
1331         .resume         = s3cmci_resume,
1332 };
1333
1334
1335 static int __init s3cmci_init(void)
1336 {
1337         platform_driver_register(&s3cmci_driver_2410);
1338         platform_driver_register(&s3cmci_driver_2412);
1339         platform_driver_register(&s3cmci_driver_2440);
1340         return 0;
1341 }
1342
1343 static void __exit s3cmci_exit(void)
1344 {
1345         platform_driver_unregister(&s3cmci_driver_2410);
1346         platform_driver_unregister(&s3cmci_driver_2412);
1347         platform_driver_unregister(&s3cmci_driver_2440);
1348 }
1349
1350 module_init(s3cmci_init);
1351 module_exit(s3cmci_exit);
1352
1353 MODULE_DESCRIPTION("Samsung S3C MMC/SD Card Interface driver");
1354 MODULE_LICENSE("GPL v2");
1355 MODULE_AUTHOR("Thomas Kleffel <tk@maintech.de>");