2 * OpenFirmware bindings for Secure Digital Host Controller Interface.
4 * Copyright (c) 2007 Freescale Semiconductor, Inc.
5 * Copyright (c) 2009 MontaVista Software, Inc.
7 * Authors: Xiaobo Xie <X.Xie@freescale.com>
8 * Anton Vorontsov <avorontsov@ru.mvista.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
16 #include <linux/module.h>
17 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/delay.h>
22 #include <linux/of_platform.h>
23 #include <linux/mmc/host.h>
24 #include <asm/machdep.h>
27 struct sdhci_of_data {
32 struct sdhci_of_host {
38 * Ops and quirks for the Freescale eSDHC controller.
41 #define ESDHC_DMA_SYSCTL 0x40c
42 #define ESDHC_DMA_SNOOP 0x00000040
44 #define ESDHC_SYSTEM_CONTROL 0x2c
45 #define ESDHC_CLOCK_MASK 0x0000fff0
46 #define ESDHC_PREDIV_SHIFT 8
47 #define ESDHC_DIVIDER_SHIFT 4
48 #define ESDHC_CLOCK_PEREN 0x00000004
49 #define ESDHC_CLOCK_HCKEN 0x00000002
50 #define ESDHC_CLOCK_IPGEN 0x00000001
52 #define ESDHC_HOST_CONTROL_RES 0x05
54 static u32 esdhc_readl(struct sdhci_host *host, int reg)
56 return in_be32(host->ioaddr + reg);
59 static u16 esdhc_readw(struct sdhci_host *host, int reg)
63 if (unlikely(reg == SDHCI_HOST_VERSION))
64 ret = in_be16(host->ioaddr + reg);
66 ret = in_be16(host->ioaddr + (reg ^ 0x2));
70 static u8 esdhc_readb(struct sdhci_host *host, int reg)
72 return in_8(host->ioaddr + (reg ^ 0x3));
75 static void esdhc_writel(struct sdhci_host *host, u32 val, int reg)
77 out_be32(host->ioaddr + reg, val);
80 static void esdhc_writew(struct sdhci_host *host, u16 val, int reg)
82 struct sdhci_of_host *of_host = sdhci_priv(host);
83 int base = reg & ~0x3;
84 int shift = (reg & 0x2) * 8;
87 case SDHCI_TRANSFER_MODE:
89 * Postpone this write, we must do it together with a
90 * command write that is down below.
92 of_host->xfer_mode_shadow = val;
95 esdhc_writel(host, val << 16 | of_host->xfer_mode_shadow,
98 case SDHCI_BLOCK_SIZE:
100 * Two last DMA bits are reserved, and first one is used for
101 * non-standard blksz of 4096 bytes that we don't support
102 * yet. So clear the DMA boundary bits.
104 val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);
107 clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift);
110 static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg)
112 int base = reg & ~0x3;
113 int shift = (reg & 0x3) * 8;
115 /* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */
116 if (reg == SDHCI_HOST_CONTROL)
117 val &= ~ESDHC_HOST_CONTROL_RES;
119 clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift);
122 static void esdhc_set_clock(struct sdhci_host *host, unsigned int clock)
127 clrbits32(host->ioaddr + ESDHC_SYSTEM_CONTROL, ESDHC_CLOCK_IPGEN |
128 ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN | ESDHC_CLOCK_MASK);
133 if (host->max_clk / 16 > clock) {
134 for (; pre_div < 256; pre_div *= 2) {
135 if (host->max_clk / pre_div < clock * 16)
140 for (div = 1; div <= 16; div++) {
141 if (host->max_clk / (div * pre_div) <= clock)
148 setbits32(host->ioaddr + ESDHC_SYSTEM_CONTROL, ESDHC_CLOCK_IPGEN |
149 ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN |
150 div << ESDHC_DIVIDER_SHIFT | pre_div << ESDHC_PREDIV_SHIFT);
156 static int esdhc_enable_dma(struct sdhci_host *host)
158 setbits32(host->ioaddr + ESDHC_DMA_SYSCTL, ESDHC_DMA_SNOOP);
162 static unsigned int esdhc_get_max_clock(struct sdhci_host *host)
164 struct sdhci_of_host *of_host = sdhci_priv(host);
166 return of_host->clock;
169 static unsigned int esdhc_get_min_clock(struct sdhci_host *host)
171 struct sdhci_of_host *of_host = sdhci_priv(host);
173 return of_host->clock / 256 / 16;
176 static struct sdhci_of_data sdhci_esdhc = {
177 .quirks = SDHCI_QUIRK_FORCE_BLK_SZ_2048 |
178 SDHCI_QUIRK_BROKEN_CARD_DETECTION |
179 SDHCI_QUIRK_NO_BUSY_IRQ |
180 SDHCI_QUIRK_NONSTANDARD_CLOCK |
181 SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
182 SDHCI_QUIRK_PIO_NEEDS_DELAY |
183 SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET |
184 SDHCI_QUIRK_NO_CARD_NO_RESET,
186 .readl = esdhc_readl,
187 .readw = esdhc_readw,
188 .readb = esdhc_readb,
189 .writel = esdhc_writel,
190 .writew = esdhc_writew,
191 .writeb = esdhc_writeb,
192 .set_clock = esdhc_set_clock,
193 .enable_dma = esdhc_enable_dma,
194 .get_max_clock = esdhc_get_max_clock,
195 .get_min_clock = esdhc_get_min_clock,
201 static int sdhci_of_suspend(struct of_device *ofdev, pm_message_t state)
203 struct sdhci_host *host = dev_get_drvdata(&ofdev->dev);
205 return mmc_suspend_host(host->mmc, state);
208 static int sdhci_of_resume(struct of_device *ofdev)
210 struct sdhci_host *host = dev_get_drvdata(&ofdev->dev);
212 return mmc_resume_host(host->mmc);
217 #define sdhci_of_suspend NULL
218 #define sdhci_of_resume NULL
222 static bool __devinit sdhci_of_wp_inverted(struct device_node *np)
224 if (of_get_property(np, "sdhci,wp-inverted", NULL))
227 /* Old device trees don't have the wp-inverted property. */
228 return machine_is(mpc837x_rdb) || machine_is(mpc837x_mds);
231 static int __devinit sdhci_of_probe(struct of_device *ofdev,
232 const struct of_device_id *match)
234 struct device_node *np = ofdev->node;
235 struct sdhci_of_data *sdhci_of_data = match->data;
236 struct sdhci_host *host;
237 struct sdhci_of_host *of_host;
242 if (!of_device_is_available(np))
245 host = sdhci_alloc_host(&ofdev->dev, sizeof(*of_host));
249 of_host = sdhci_priv(host);
250 dev_set_drvdata(&ofdev->dev, host);
252 host->ioaddr = of_iomap(np, 0);
258 host->irq = irq_of_parse_and_map(np, 0);
264 host->hw_name = dev_name(&ofdev->dev);
266 host->quirks = sdhci_of_data->quirks;
267 host->ops = &sdhci_of_data->ops;
270 if (of_get_property(np, "sdhci,1-bit-only", NULL))
271 host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA;
273 if (sdhci_of_wp_inverted(np))
274 host->quirks |= SDHCI_QUIRK_INVERTED_WRITE_PROTECT;
276 clk = of_get_property(np, "clock-frequency", &size);
277 if (clk && size == sizeof(*clk) && *clk)
278 of_host->clock = *clk;
280 ret = sdhci_add_host(host);
287 irq_dispose_mapping(host->irq);
289 iounmap(host->ioaddr);
291 sdhci_free_host(host);
295 static int __devexit sdhci_of_remove(struct of_device *ofdev)
297 struct sdhci_host *host = dev_get_drvdata(&ofdev->dev);
299 sdhci_remove_host(host, 0);
300 sdhci_free_host(host);
301 irq_dispose_mapping(host->irq);
302 iounmap(host->ioaddr);
306 static const struct of_device_id sdhci_of_match[] = {
307 { .compatible = "fsl,mpc8379-esdhc", .data = &sdhci_esdhc, },
308 { .compatible = "fsl,mpc8536-esdhc", .data = &sdhci_esdhc, },
309 { .compatible = "fsl,esdhc", .data = &sdhci_esdhc, },
310 { .compatible = "generic-sdhci", },
313 MODULE_DEVICE_TABLE(of, sdhci_of_match);
315 static struct of_platform_driver sdhci_of_driver = {
316 .driver.name = "sdhci-of",
317 .match_table = sdhci_of_match,
318 .probe = sdhci_of_probe,
319 .remove = __devexit_p(sdhci_of_remove),
320 .suspend = sdhci_of_suspend,
321 .resume = sdhci_of_resume,
324 static int __init sdhci_of_init(void)
326 return of_register_platform_driver(&sdhci_of_driver);
328 module_init(sdhci_of_init);
330 static void __exit sdhci_of_exit(void)
332 of_unregister_platform_driver(&sdhci_of_driver);
334 module_exit(sdhci_of_exit);
336 MODULE_DESCRIPTION("Secure Digital Host Controller Interface OF driver");
337 MODULE_AUTHOR("Xiaobo Xie <X.Xie@freescale.com>, "
338 "Anton Vorontsov <avorontsov@ru.mvista.com>");
339 MODULE_LICENSE("GPL");