1 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
3 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version.
10 * Thanks to the following companies for their support:
12 * - JMicron (hardware and technical support)
15 #include <linux/delay.h>
16 #include <linux/highmem.h>
17 #include <linux/module.h>
18 #include <linux/pci.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/slab.h>
21 #include <linux/device.h>
22 #include <linux/mmc/host.h>
23 #include <linux/scatterlist.h>
25 #include <linux/gpio.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/mmc/sdhci-pci-data.h>
30 #include "sdhci-pci.h"
31 #include "sdhci-pci-o2micro.h"
33 /*****************************************************************************\
35 * Hardware specific quirk handling *
37 \*****************************************************************************/
39 static int ricoh_probe(struct sdhci_pci_chip *chip)
41 if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
42 chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
43 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
47 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
50 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
51 & SDHCI_TIMEOUT_CLK_MASK) |
53 ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
54 & SDHCI_CLOCK_BASE_MASK) |
56 SDHCI_TIMEOUT_CLK_UNIT |
63 static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
65 /* Apply a delay to allow controller to settle */
66 /* Otherwise it becomes confused if card state changed
72 static const struct sdhci_pci_fixes sdhci_ricoh = {
74 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
75 SDHCI_QUIRK_FORCE_DMA |
76 SDHCI_QUIRK_CLOCK_BEFORE_RESET,
79 static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
80 .probe_slot = ricoh_mmc_probe_slot,
81 .resume = ricoh_mmc_resume,
82 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
83 SDHCI_QUIRK_CLOCK_BEFORE_RESET |
84 SDHCI_QUIRK_NO_CARD_NO_RESET |
85 SDHCI_QUIRK_MISSING_CAPS
88 static const struct sdhci_pci_fixes sdhci_ene_712 = {
89 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
90 SDHCI_QUIRK_BROKEN_DMA,
93 static const struct sdhci_pci_fixes sdhci_ene_714 = {
94 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
95 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
96 SDHCI_QUIRK_BROKEN_DMA,
99 static const struct sdhci_pci_fixes sdhci_cafe = {
100 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
101 SDHCI_QUIRK_NO_BUSY_IRQ |
102 SDHCI_QUIRK_BROKEN_CARD_DETECTION |
103 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
106 static const struct sdhci_pci_fixes sdhci_intel_qrk = {
107 .quirks = SDHCI_QUIRK_NO_HISPD_BIT,
110 static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
112 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
117 * ADMA operation is disabled for Moorestown platform due to
120 static int mrst_hc_probe(struct sdhci_pci_chip *chip)
123 * slots number is fixed here for MRST as SDIO3/5 are never used and
124 * have hardware bugs.
130 static int pch_hc_probe_slot(struct sdhci_pci_slot *slot)
132 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
136 #ifdef CONFIG_PM_RUNTIME
138 static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id)
140 struct sdhci_pci_slot *slot = dev_id;
141 struct sdhci_host *host = slot->host;
143 mmc_detect_change(host->mmc, msecs_to_jiffies(200));
147 static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
149 int err, irq, gpio = slot->cd_gpio;
151 slot->cd_gpio = -EINVAL;
152 slot->cd_irq = -EINVAL;
154 if (!gpio_is_valid(gpio))
157 err = gpio_request(gpio, "sd_cd");
161 err = gpio_direction_input(gpio);
165 irq = gpio_to_irq(gpio);
169 err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING |
170 IRQF_TRIGGER_FALLING, "sd_cd", slot);
174 slot->cd_gpio = gpio;
182 dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n");
185 static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
187 if (slot->cd_irq >= 0)
188 free_irq(slot->cd_irq, slot);
189 if (gpio_is_valid(slot->cd_gpio))
190 gpio_free(slot->cd_gpio);
195 static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
199 static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
205 static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot)
207 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
208 slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC |
209 MMC_CAP2_HC_ERASE_SZ;
213 static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot)
215 slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
219 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
220 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
221 .probe_slot = mrst_hc_probe_slot,
224 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
225 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
226 .probe = mrst_hc_probe,
229 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
230 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
231 .allow_runtime_pm = true,
232 .own_cd_for_runtime_pm = true,
235 static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = {
236 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
237 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
238 .allow_runtime_pm = true,
239 .probe_slot = mfd_sdio_probe_slot,
242 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = {
243 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
244 .allow_runtime_pm = true,
245 .probe_slot = mfd_emmc_probe_slot,
248 static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = {
249 .quirks = SDHCI_QUIRK_BROKEN_ADMA,
250 .probe_slot = pch_hc_probe_slot,
253 static void sdhci_pci_int_hw_reset(struct sdhci_host *host)
257 reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
259 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
260 /* For eMMC, minimum is 1us but give it 9us for good measure */
263 sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
264 /* For eMMC, minimum is 200us but give it 300us for good measure */
265 usleep_range(300, 1000);
268 static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
270 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
271 MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR;
272 slot->host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ;
273 slot->hw_reset = sdhci_pci_int_hw_reset;
277 static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
279 slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
283 static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = {
284 .allow_runtime_pm = true,
285 .probe_slot = byt_emmc_probe_slot,
286 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
289 static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = {
290 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON |
291 SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
292 .allow_runtime_pm = true,
293 .probe_slot = byt_sdio_probe_slot,
296 static const struct sdhci_pci_fixes sdhci_intel_byt_sd = {
297 .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
298 SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
299 .allow_runtime_pm = true,
300 .own_cd_for_runtime_pm = true,
303 /* Define Host controllers for Intel Merrifield platform */
304 #define INTEL_MRFL_EMMC_0 0
305 #define INTEL_MRFL_EMMC_1 1
307 static int intel_mrfl_mmc_probe_slot(struct sdhci_pci_slot *slot)
309 if ((PCI_FUNC(slot->chip->pdev->devfn) != INTEL_MRFL_EMMC_0) &&
310 (PCI_FUNC(slot->chip->pdev->devfn) != INTEL_MRFL_EMMC_1))
311 /* SD support is not ready yet */
314 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
320 static const struct sdhci_pci_fixes sdhci_intel_mrfl_mmc = {
321 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
322 .quirks2 = SDHCI_QUIRK2_BROKEN_HS200 |
323 SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
324 .allow_runtime_pm = true,
325 .probe_slot = intel_mrfl_mmc_probe_slot,
328 /* O2Micro extra registers */
329 #define O2_SD_LOCK_WP 0xD3
330 #define O2_SD_MULTI_VCC3V 0xEE
331 #define O2_SD_CLKREQ 0xEC
332 #define O2_SD_CAPS 0xE0
333 #define O2_SD_ADMA1 0xE2
334 #define O2_SD_ADMA2 0xE7
335 #define O2_SD_INF_MOD 0xF1
337 static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
342 ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
347 * Turn PMOS on [bit 0], set over current detection to 2.4 V
348 * [bit 1:2] and enable over current debouncing [bit 6].
355 ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
362 static int jmicron_probe(struct sdhci_pci_chip *chip)
367 if (chip->pdev->revision == 0) {
368 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
369 SDHCI_QUIRK_32BIT_DMA_SIZE |
370 SDHCI_QUIRK_32BIT_ADMA_SIZE |
371 SDHCI_QUIRK_RESET_AFTER_REQUEST |
372 SDHCI_QUIRK_BROKEN_SMALL_PIO;
376 * JMicron chips can have two interfaces to the same hardware
377 * in order to work around limitations in Microsoft's driver.
378 * We need to make sure we only bind to one of them.
380 * This code assumes two things:
382 * 1. The PCI code adds subfunctions in order.
384 * 2. The MMC interface has a lower subfunction number
385 * than the SD interface.
387 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
388 mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
389 else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
390 mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;
393 struct pci_dev *sd_dev;
396 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
397 mmcdev, sd_dev)) != NULL) {
398 if ((PCI_SLOT(chip->pdev->devfn) ==
399 PCI_SLOT(sd_dev->devfn)) &&
400 (chip->pdev->bus == sd_dev->bus))
406 dev_info(&chip->pdev->dev, "Refusing to bind to "
407 "secondary interface.\n");
413 * JMicron chips need a bit of a nudge to enable the power
416 ret = jmicron_pmos(chip, 1);
418 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
422 /* quirk for unsable RO-detection on JM388 chips */
423 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD ||
424 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
425 chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT;
430 static void jmicron_enable_mmc(struct sdhci_host *host, int on)
434 scratch = readb(host->ioaddr + 0xC0);
441 writeb(scratch, host->ioaddr + 0xC0);
444 static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
446 if (slot->chip->pdev->revision == 0) {
449 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
450 version = (version & SDHCI_VENDOR_VER_MASK) >>
451 SDHCI_VENDOR_VER_SHIFT;
454 * Older versions of the chip have lots of nasty glitches
455 * in the ADMA engine. It's best just to avoid it
459 slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
462 /* JM388 MMC doesn't support 1.8V while SD supports it */
463 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
464 slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
465 MMC_VDD_29_30 | MMC_VDD_30_31 |
466 MMC_VDD_165_195; /* allow 1.8V */
467 slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
468 MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */
472 * The secondary interface requires a bit set to get the
475 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
476 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
477 jmicron_enable_mmc(slot->host, 1);
479 slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;
484 static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
489 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
490 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
491 jmicron_enable_mmc(slot->host, 0);
494 static int jmicron_suspend(struct sdhci_pci_chip *chip)
498 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
499 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
500 for (i = 0; i < chip->num_slots; i++)
501 jmicron_enable_mmc(chip->slots[i]->host, 0);
507 static int jmicron_resume(struct sdhci_pci_chip *chip)
511 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
512 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
513 for (i = 0; i < chip->num_slots; i++)
514 jmicron_enable_mmc(chip->slots[i]->host, 1);
517 ret = jmicron_pmos(chip, 1);
519 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
526 static const struct sdhci_pci_fixes sdhci_o2 = {
527 .probe = sdhci_pci_o2_probe,
528 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
529 .probe_slot = sdhci_pci_o2_probe_slot,
530 .resume = sdhci_pci_o2_resume,
533 static const struct sdhci_pci_fixes sdhci_jmicron = {
534 .probe = jmicron_probe,
536 .probe_slot = jmicron_probe_slot,
537 .remove_slot = jmicron_remove_slot,
539 .suspend = jmicron_suspend,
540 .resume = jmicron_resume,
543 /* SysKonnect CardBus2SDIO extra registers */
544 #define SYSKT_CTRL 0x200
545 #define SYSKT_RDFIFO_STAT 0x204
546 #define SYSKT_WRFIFO_STAT 0x208
547 #define SYSKT_POWER_DATA 0x20c
548 #define SYSKT_POWER_330 0xef
549 #define SYSKT_POWER_300 0xf8
550 #define SYSKT_POWER_184 0xcc
551 #define SYSKT_POWER_CMD 0x20d
552 #define SYSKT_POWER_START (1 << 7)
553 #define SYSKT_POWER_STATUS 0x20e
554 #define SYSKT_POWER_STATUS_OK (1 << 0)
555 #define SYSKT_BOARD_REV 0x210
556 #define SYSKT_CHIP_REV 0x211
557 #define SYSKT_CONF_DATA 0x212
558 #define SYSKT_CONF_DATA_1V8 (1 << 2)
559 #define SYSKT_CONF_DATA_2V5 (1 << 1)
560 #define SYSKT_CONF_DATA_3V3 (1 << 0)
562 static int syskt_probe(struct sdhci_pci_chip *chip)
564 if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
565 chip->pdev->class &= ~0x0000FF;
566 chip->pdev->class |= PCI_SDHCI_IFDMA;
571 static int syskt_probe_slot(struct sdhci_pci_slot *slot)
575 u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
576 u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
577 dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
578 "board rev %d.%d, chip rev %d.%d\n",
579 board_rev >> 4, board_rev & 0xf,
580 chip_rev >> 4, chip_rev & 0xf);
581 if (chip_rev >= 0x20)
582 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
584 writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
585 writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
587 tm = 10; /* Wait max 1 ms */
589 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
590 if (ps & SYSKT_POWER_STATUS_OK)
595 dev_err(&slot->chip->pdev->dev,
596 "power regulator never stabilized");
597 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
604 static const struct sdhci_pci_fixes sdhci_syskt = {
605 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
606 .probe = syskt_probe,
607 .probe_slot = syskt_probe_slot,
610 static int via_probe(struct sdhci_pci_chip *chip)
612 if (chip->pdev->revision == 0x10)
613 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
618 static const struct sdhci_pci_fixes sdhci_via = {
622 static int rtsx_probe_slot(struct sdhci_pci_slot *slot)
624 slot->host->mmc->caps2 |= MMC_CAP2_HS200;
628 static const struct sdhci_pci_fixes sdhci_rtsx = {
629 .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
630 SDHCI_QUIRK2_BROKEN_DDR50,
631 .probe_slot = rtsx_probe_slot,
634 static const struct pci_device_id pci_ids[] = {
636 .vendor = PCI_VENDOR_ID_RICOH,
637 .device = PCI_DEVICE_ID_RICOH_R5C822,
638 .subvendor = PCI_ANY_ID,
639 .subdevice = PCI_ANY_ID,
640 .driver_data = (kernel_ulong_t)&sdhci_ricoh,
644 .vendor = PCI_VENDOR_ID_RICOH,
646 .subvendor = PCI_ANY_ID,
647 .subdevice = PCI_ANY_ID,
648 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
652 .vendor = PCI_VENDOR_ID_RICOH,
654 .subvendor = PCI_ANY_ID,
655 .subdevice = PCI_ANY_ID,
656 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
660 .vendor = PCI_VENDOR_ID_RICOH,
662 .subvendor = PCI_ANY_ID,
663 .subdevice = PCI_ANY_ID,
664 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
668 .vendor = PCI_VENDOR_ID_ENE,
669 .device = PCI_DEVICE_ID_ENE_CB712_SD,
670 .subvendor = PCI_ANY_ID,
671 .subdevice = PCI_ANY_ID,
672 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
676 .vendor = PCI_VENDOR_ID_ENE,
677 .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
678 .subvendor = PCI_ANY_ID,
679 .subdevice = PCI_ANY_ID,
680 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
684 .vendor = PCI_VENDOR_ID_ENE,
685 .device = PCI_DEVICE_ID_ENE_CB714_SD,
686 .subvendor = PCI_ANY_ID,
687 .subdevice = PCI_ANY_ID,
688 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
692 .vendor = PCI_VENDOR_ID_ENE,
693 .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
694 .subvendor = PCI_ANY_ID,
695 .subdevice = PCI_ANY_ID,
696 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
700 .vendor = PCI_VENDOR_ID_MARVELL,
701 .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
702 .subvendor = PCI_ANY_ID,
703 .subdevice = PCI_ANY_ID,
704 .driver_data = (kernel_ulong_t)&sdhci_cafe,
708 .vendor = PCI_VENDOR_ID_JMICRON,
709 .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
710 .subvendor = PCI_ANY_ID,
711 .subdevice = PCI_ANY_ID,
712 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
716 .vendor = PCI_VENDOR_ID_JMICRON,
717 .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
718 .subvendor = PCI_ANY_ID,
719 .subdevice = PCI_ANY_ID,
720 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
724 .vendor = PCI_VENDOR_ID_JMICRON,
725 .device = PCI_DEVICE_ID_JMICRON_JMB388_SD,
726 .subvendor = PCI_ANY_ID,
727 .subdevice = PCI_ANY_ID,
728 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
732 .vendor = PCI_VENDOR_ID_JMICRON,
733 .device = PCI_DEVICE_ID_JMICRON_JMB388_ESD,
734 .subvendor = PCI_ANY_ID,
735 .subdevice = PCI_ANY_ID,
736 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
740 .vendor = PCI_VENDOR_ID_SYSKONNECT,
742 .subvendor = PCI_ANY_ID,
743 .subdevice = PCI_ANY_ID,
744 .driver_data = (kernel_ulong_t)&sdhci_syskt,
748 .vendor = PCI_VENDOR_ID_VIA,
750 .subvendor = PCI_ANY_ID,
751 .subdevice = PCI_ANY_ID,
752 .driver_data = (kernel_ulong_t)&sdhci_via,
756 .vendor = PCI_VENDOR_ID_REALTEK,
758 .subvendor = PCI_ANY_ID,
759 .subdevice = PCI_ANY_ID,
760 .driver_data = (kernel_ulong_t)&sdhci_rtsx,
764 .vendor = PCI_VENDOR_ID_INTEL,
765 .device = PCI_DEVICE_ID_INTEL_QRK_SD,
766 .subvendor = PCI_ANY_ID,
767 .subdevice = PCI_ANY_ID,
768 .driver_data = (kernel_ulong_t)&sdhci_intel_qrk,
772 .vendor = PCI_VENDOR_ID_INTEL,
773 .device = PCI_DEVICE_ID_INTEL_MRST_SD0,
774 .subvendor = PCI_ANY_ID,
775 .subdevice = PCI_ANY_ID,
776 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
780 .vendor = PCI_VENDOR_ID_INTEL,
781 .device = PCI_DEVICE_ID_INTEL_MRST_SD1,
782 .subvendor = PCI_ANY_ID,
783 .subdevice = PCI_ANY_ID,
784 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
788 .vendor = PCI_VENDOR_ID_INTEL,
789 .device = PCI_DEVICE_ID_INTEL_MRST_SD2,
790 .subvendor = PCI_ANY_ID,
791 .subdevice = PCI_ANY_ID,
792 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
796 .vendor = PCI_VENDOR_ID_INTEL,
797 .device = PCI_DEVICE_ID_INTEL_MFD_SD,
798 .subvendor = PCI_ANY_ID,
799 .subdevice = PCI_ANY_ID,
800 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sd,
804 .vendor = PCI_VENDOR_ID_INTEL,
805 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
806 .subvendor = PCI_ANY_ID,
807 .subdevice = PCI_ANY_ID,
808 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
812 .vendor = PCI_VENDOR_ID_INTEL,
813 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
814 .subvendor = PCI_ANY_ID,
815 .subdevice = PCI_ANY_ID,
816 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
820 .vendor = PCI_VENDOR_ID_INTEL,
821 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
822 .subvendor = PCI_ANY_ID,
823 .subdevice = PCI_ANY_ID,
824 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
828 .vendor = PCI_VENDOR_ID_INTEL,
829 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
830 .subvendor = PCI_ANY_ID,
831 .subdevice = PCI_ANY_ID,
832 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
836 .vendor = PCI_VENDOR_ID_INTEL,
837 .device = PCI_DEVICE_ID_INTEL_PCH_SDIO0,
838 .subvendor = PCI_ANY_ID,
839 .subdevice = PCI_ANY_ID,
840 .driver_data = (kernel_ulong_t)&sdhci_intel_pch_sdio,
844 .vendor = PCI_VENDOR_ID_INTEL,
845 .device = PCI_DEVICE_ID_INTEL_PCH_SDIO1,
846 .subvendor = PCI_ANY_ID,
847 .subdevice = PCI_ANY_ID,
848 .driver_data = (kernel_ulong_t)&sdhci_intel_pch_sdio,
852 .vendor = PCI_VENDOR_ID_INTEL,
853 .device = PCI_DEVICE_ID_INTEL_BYT_EMMC,
854 .subvendor = PCI_ANY_ID,
855 .subdevice = PCI_ANY_ID,
856 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
860 .vendor = PCI_VENDOR_ID_INTEL,
861 .device = PCI_DEVICE_ID_INTEL_BYT_SDIO,
862 .subvendor = PCI_ANY_ID,
863 .subdevice = PCI_ANY_ID,
864 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sdio,
868 .vendor = PCI_VENDOR_ID_INTEL,
869 .device = PCI_DEVICE_ID_INTEL_BYT_SD,
870 .subvendor = PCI_ANY_ID,
871 .subdevice = PCI_ANY_ID,
872 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sd,
876 .vendor = PCI_VENDOR_ID_INTEL,
877 .device = PCI_DEVICE_ID_INTEL_BYT_EMMC2,
878 .subvendor = PCI_ANY_ID,
879 .subdevice = PCI_ANY_ID,
880 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
884 .vendor = PCI_VENDOR_ID_INTEL,
885 .device = PCI_DEVICE_ID_INTEL_BSW_EMMC,
886 .subvendor = PCI_ANY_ID,
887 .subdevice = PCI_ANY_ID,
888 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_emmc,
892 .vendor = PCI_VENDOR_ID_INTEL,
893 .device = PCI_DEVICE_ID_INTEL_BSW_SDIO,
894 .subvendor = PCI_ANY_ID,
895 .subdevice = PCI_ANY_ID,
896 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sdio,
900 .vendor = PCI_VENDOR_ID_INTEL,
901 .device = PCI_DEVICE_ID_INTEL_BSW_SD,
902 .subvendor = PCI_ANY_ID,
903 .subdevice = PCI_ANY_ID,
904 .driver_data = (kernel_ulong_t)&sdhci_intel_byt_sd,
908 .vendor = PCI_VENDOR_ID_INTEL,
909 .device = PCI_DEVICE_ID_INTEL_CLV_SDIO0,
910 .subvendor = PCI_ANY_ID,
911 .subdevice = PCI_ANY_ID,
912 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sd,
916 .vendor = PCI_VENDOR_ID_INTEL,
917 .device = PCI_DEVICE_ID_INTEL_CLV_SDIO1,
918 .subvendor = PCI_ANY_ID,
919 .subdevice = PCI_ANY_ID,
920 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
924 .vendor = PCI_VENDOR_ID_INTEL,
925 .device = PCI_DEVICE_ID_INTEL_CLV_SDIO2,
926 .subvendor = PCI_ANY_ID,
927 .subdevice = PCI_ANY_ID,
928 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
932 .vendor = PCI_VENDOR_ID_INTEL,
933 .device = PCI_DEVICE_ID_INTEL_CLV_EMMC0,
934 .subvendor = PCI_ANY_ID,
935 .subdevice = PCI_ANY_ID,
936 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
940 .vendor = PCI_VENDOR_ID_INTEL,
941 .device = PCI_DEVICE_ID_INTEL_CLV_EMMC1,
942 .subvendor = PCI_ANY_ID,
943 .subdevice = PCI_ANY_ID,
944 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
948 .vendor = PCI_VENDOR_ID_INTEL,
949 .device = PCI_DEVICE_ID_INTEL_MRFL_MMC,
950 .subvendor = PCI_ANY_ID,
951 .subdevice = PCI_ANY_ID,
952 .driver_data = (kernel_ulong_t)&sdhci_intel_mrfl_mmc,
955 .vendor = PCI_VENDOR_ID_O2,
956 .device = PCI_DEVICE_ID_O2_8120,
957 .subvendor = PCI_ANY_ID,
958 .subdevice = PCI_ANY_ID,
959 .driver_data = (kernel_ulong_t)&sdhci_o2,
963 .vendor = PCI_VENDOR_ID_O2,
964 .device = PCI_DEVICE_ID_O2_8220,
965 .subvendor = PCI_ANY_ID,
966 .subdevice = PCI_ANY_ID,
967 .driver_data = (kernel_ulong_t)&sdhci_o2,
971 .vendor = PCI_VENDOR_ID_O2,
972 .device = PCI_DEVICE_ID_O2_8221,
973 .subvendor = PCI_ANY_ID,
974 .subdevice = PCI_ANY_ID,
975 .driver_data = (kernel_ulong_t)&sdhci_o2,
979 .vendor = PCI_VENDOR_ID_O2,
980 .device = PCI_DEVICE_ID_O2_8320,
981 .subvendor = PCI_ANY_ID,
982 .subdevice = PCI_ANY_ID,
983 .driver_data = (kernel_ulong_t)&sdhci_o2,
987 .vendor = PCI_VENDOR_ID_O2,
988 .device = PCI_DEVICE_ID_O2_8321,
989 .subvendor = PCI_ANY_ID,
990 .subdevice = PCI_ANY_ID,
991 .driver_data = (kernel_ulong_t)&sdhci_o2,
995 .vendor = PCI_VENDOR_ID_O2,
996 .device = PCI_DEVICE_ID_O2_FUJIN2,
997 .subvendor = PCI_ANY_ID,
998 .subdevice = PCI_ANY_ID,
999 .driver_data = (kernel_ulong_t)&sdhci_o2,
1003 .vendor = PCI_VENDOR_ID_O2,
1004 .device = PCI_DEVICE_ID_O2_SDS0,
1005 .subvendor = PCI_ANY_ID,
1006 .subdevice = PCI_ANY_ID,
1007 .driver_data = (kernel_ulong_t)&sdhci_o2,
1011 .vendor = PCI_VENDOR_ID_O2,
1012 .device = PCI_DEVICE_ID_O2_SDS1,
1013 .subvendor = PCI_ANY_ID,
1014 .subdevice = PCI_ANY_ID,
1015 .driver_data = (kernel_ulong_t)&sdhci_o2,
1019 .vendor = PCI_VENDOR_ID_O2,
1020 .device = PCI_DEVICE_ID_O2_SEABIRD0,
1021 .subvendor = PCI_ANY_ID,
1022 .subdevice = PCI_ANY_ID,
1023 .driver_data = (kernel_ulong_t)&sdhci_o2,
1027 .vendor = PCI_VENDOR_ID_O2,
1028 .device = PCI_DEVICE_ID_O2_SEABIRD1,
1029 .subvendor = PCI_ANY_ID,
1030 .subdevice = PCI_ANY_ID,
1031 .driver_data = (kernel_ulong_t)&sdhci_o2,
1034 { /* Generic SD host controller */
1035 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
1038 { /* end: all zeroes */ },
1041 MODULE_DEVICE_TABLE(pci, pci_ids);
1043 /*****************************************************************************\
1045 * SDHCI core callbacks *
1047 \*****************************************************************************/
1049 static int sdhci_pci_enable_dma(struct sdhci_host *host)
1051 struct sdhci_pci_slot *slot;
1052 struct pci_dev *pdev;
1055 slot = sdhci_priv(host);
1056 pdev = slot->chip->pdev;
1058 if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
1059 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
1060 (host->flags & SDHCI_USE_SDMA)) {
1061 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
1062 "doesn't fully claim to support it.\n");
1065 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1069 pci_set_master(pdev);
1074 static void sdhci_pci_set_bus_width(struct sdhci_host *host, int width)
1078 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
1081 case MMC_BUS_WIDTH_8:
1082 ctrl |= SDHCI_CTRL_8BITBUS;
1083 ctrl &= ~SDHCI_CTRL_4BITBUS;
1085 case MMC_BUS_WIDTH_4:
1086 ctrl |= SDHCI_CTRL_4BITBUS;
1087 ctrl &= ~SDHCI_CTRL_8BITBUS;
1090 ctrl &= ~(SDHCI_CTRL_8BITBUS | SDHCI_CTRL_4BITBUS);
1094 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1097 static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host)
1099 struct sdhci_pci_slot *slot = sdhci_priv(host);
1100 int rst_n_gpio = slot->rst_n_gpio;
1102 if (!gpio_is_valid(rst_n_gpio))
1104 gpio_set_value_cansleep(rst_n_gpio, 0);
1105 /* For eMMC, minimum is 1us but give it 10us for good measure */
1107 gpio_set_value_cansleep(rst_n_gpio, 1);
1108 /* For eMMC, minimum is 200us but give it 300us for good measure */
1109 usleep_range(300, 1000);
1112 static void sdhci_pci_hw_reset(struct sdhci_host *host)
1114 struct sdhci_pci_slot *slot = sdhci_priv(host);
1117 slot->hw_reset(host);
1120 static const struct sdhci_ops sdhci_pci_ops = {
1121 .set_clock = sdhci_set_clock,
1122 .enable_dma = sdhci_pci_enable_dma,
1123 .set_bus_width = sdhci_pci_set_bus_width,
1124 .reset = sdhci_reset,
1125 .set_uhs_signaling = sdhci_set_uhs_signaling,
1126 .hw_reset = sdhci_pci_hw_reset,
1129 /*****************************************************************************\
1133 \*****************************************************************************/
1137 static int sdhci_pci_suspend(struct device *dev)
1139 struct pci_dev *pdev = to_pci_dev(dev);
1140 struct sdhci_pci_chip *chip;
1141 struct sdhci_pci_slot *slot;
1142 mmc_pm_flag_t slot_pm_flags;
1143 mmc_pm_flag_t pm_flags = 0;
1146 chip = pci_get_drvdata(pdev);
1150 for (i = 0; i < chip->num_slots; i++) {
1151 slot = chip->slots[i];
1155 ret = sdhci_suspend_host(slot->host);
1158 goto err_pci_suspend;
1160 slot_pm_flags = slot->host->mmc->pm_flags;
1161 if (slot_pm_flags & MMC_PM_WAKE_SDIO_IRQ)
1162 sdhci_enable_irq_wakeups(slot->host);
1164 pm_flags |= slot_pm_flags;
1167 if (chip->fixes && chip->fixes->suspend) {
1168 ret = chip->fixes->suspend(chip);
1170 goto err_pci_suspend;
1173 if (pm_flags & MMC_PM_KEEP_POWER) {
1174 if (pm_flags & MMC_PM_WAKE_SDIO_IRQ)
1175 device_init_wakeup(dev, true);
1177 device_init_wakeup(dev, false);
1179 device_init_wakeup(dev, false);
1185 sdhci_resume_host(chip->slots[i]->host);
1189 static int sdhci_pci_resume(struct device *dev)
1191 struct pci_dev *pdev = to_pci_dev(dev);
1192 struct sdhci_pci_chip *chip;
1193 struct sdhci_pci_slot *slot;
1196 chip = pci_get_drvdata(pdev);
1200 if (chip->fixes && chip->fixes->resume) {
1201 ret = chip->fixes->resume(chip);
1206 for (i = 0; i < chip->num_slots; i++) {
1207 slot = chip->slots[i];
1211 ret = sdhci_resume_host(slot->host);
1219 #else /* CONFIG_PM */
1221 #define sdhci_pci_suspend NULL
1222 #define sdhci_pci_resume NULL
1224 #endif /* CONFIG_PM */
1226 #ifdef CONFIG_PM_RUNTIME
1228 static int sdhci_pci_runtime_suspend(struct device *dev)
1230 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1231 struct sdhci_pci_chip *chip;
1232 struct sdhci_pci_slot *slot;
1235 chip = pci_get_drvdata(pdev);
1239 for (i = 0; i < chip->num_slots; i++) {
1240 slot = chip->slots[i];
1244 ret = sdhci_runtime_suspend_host(slot->host);
1247 goto err_pci_runtime_suspend;
1250 if (chip->fixes && chip->fixes->suspend) {
1251 ret = chip->fixes->suspend(chip);
1253 goto err_pci_runtime_suspend;
1258 err_pci_runtime_suspend:
1260 sdhci_runtime_resume_host(chip->slots[i]->host);
1264 static int sdhci_pci_runtime_resume(struct device *dev)
1266 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1267 struct sdhci_pci_chip *chip;
1268 struct sdhci_pci_slot *slot;
1271 chip = pci_get_drvdata(pdev);
1275 if (chip->fixes && chip->fixes->resume) {
1276 ret = chip->fixes->resume(chip);
1281 for (i = 0; i < chip->num_slots; i++) {
1282 slot = chip->slots[i];
1286 ret = sdhci_runtime_resume_host(slot->host);
1294 static int sdhci_pci_runtime_idle(struct device *dev)
1301 static const struct dev_pm_ops sdhci_pci_pm_ops = {
1302 .suspend = sdhci_pci_suspend,
1303 .resume = sdhci_pci_resume,
1304 SET_RUNTIME_PM_OPS(sdhci_pci_runtime_suspend,
1305 sdhci_pci_runtime_resume, sdhci_pci_runtime_idle)
1308 /*****************************************************************************\
1310 * Device probing/removal *
1312 \*****************************************************************************/
1314 static struct sdhci_pci_slot *sdhci_pci_probe_slot(
1315 struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar,
1318 struct sdhci_pci_slot *slot;
1319 struct sdhci_host *host;
1320 int ret, bar = first_bar + slotno;
1322 if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
1323 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
1324 return ERR_PTR(-ENODEV);
1327 if (pci_resource_len(pdev, bar) < 0x100) {
1328 dev_err(&pdev->dev, "Invalid iomem size. You may "
1329 "experience problems.\n");
1332 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1333 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
1334 return ERR_PTR(-ENODEV);
1337 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1338 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
1339 return ERR_PTR(-ENODEV);
1342 host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
1344 dev_err(&pdev->dev, "cannot allocate host\n");
1345 return ERR_CAST(host);
1348 slot = sdhci_priv(host);
1352 slot->pci_bar = bar;
1353 slot->rst_n_gpio = -EINVAL;
1354 slot->cd_gpio = -EINVAL;
1356 /* Retrieve platform data if there is any */
1357 if (*sdhci_pci_get_data)
1358 slot->data = sdhci_pci_get_data(pdev, slotno);
1361 if (slot->data->setup) {
1362 ret = slot->data->setup(slot->data);
1364 dev_err(&pdev->dev, "platform setup failed\n");
1368 slot->rst_n_gpio = slot->data->rst_n_gpio;
1369 slot->cd_gpio = slot->data->cd_gpio;
1372 host->hw_name = "PCI";
1373 host->ops = &sdhci_pci_ops;
1374 host->quirks = chip->quirks;
1375 host->quirks2 = chip->quirks2;
1377 host->irq = pdev->irq;
1379 ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
1381 dev_err(&pdev->dev, "cannot request region\n");
1385 host->ioaddr = pci_ioremap_bar(pdev, bar);
1386 if (!host->ioaddr) {
1387 dev_err(&pdev->dev, "failed to remap registers\n");
1392 if (chip->fixes && chip->fixes->probe_slot) {
1393 ret = chip->fixes->probe_slot(slot);
1398 if (gpio_is_valid(slot->rst_n_gpio)) {
1399 if (!gpio_request(slot->rst_n_gpio, "eMMC_reset")) {
1400 gpio_direction_output(slot->rst_n_gpio, 1);
1401 slot->host->mmc->caps |= MMC_CAP_HW_RESET;
1402 slot->hw_reset = sdhci_pci_gpio_hw_reset;
1404 dev_warn(&pdev->dev, "failed to request rst_n_gpio\n");
1405 slot->rst_n_gpio = -EINVAL;
1409 host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
1410 host->mmc->slotno = slotno;
1411 host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
1413 ret = sdhci_add_host(host);
1417 sdhci_pci_add_own_cd(slot);
1420 * Check if the chip needs a separate GPIO for card detect to wake up
1421 * from runtime suspend. If it is not there, don't allow runtime PM.
1422 * Note sdhci_pci_add_own_cd() sets slot->cd_gpio to -EINVAL on failure.
1424 if (chip->fixes && chip->fixes->own_cd_for_runtime_pm &&
1425 !gpio_is_valid(slot->cd_gpio))
1426 chip->allow_runtime_pm = false;
1431 if (gpio_is_valid(slot->rst_n_gpio))
1432 gpio_free(slot->rst_n_gpio);
1434 if (chip->fixes && chip->fixes->remove_slot)
1435 chip->fixes->remove_slot(slot, 0);
1438 iounmap(host->ioaddr);
1441 pci_release_region(pdev, bar);
1444 if (slot->data && slot->data->cleanup)
1445 slot->data->cleanup(slot->data);
1448 sdhci_free_host(host);
1450 return ERR_PTR(ret);
1453 static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
1458 sdhci_pci_remove_own_cd(slot);
1461 scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
1462 if (scratch == (u32)-1)
1465 sdhci_remove_host(slot->host, dead);
1467 if (gpio_is_valid(slot->rst_n_gpio))
1468 gpio_free(slot->rst_n_gpio);
1470 if (slot->chip->fixes && slot->chip->fixes->remove_slot)
1471 slot->chip->fixes->remove_slot(slot, dead);
1473 if (slot->data && slot->data->cleanup)
1474 slot->data->cleanup(slot->data);
1476 pci_release_region(slot->chip->pdev, slot->pci_bar);
1478 sdhci_free_host(slot->host);
1481 static void sdhci_pci_runtime_pm_allow(struct device *dev)
1483 pm_runtime_put_noidle(dev);
1484 pm_runtime_allow(dev);
1485 pm_runtime_set_autosuspend_delay(dev, 50);
1486 pm_runtime_use_autosuspend(dev);
1487 pm_suspend_ignore_children(dev, 1);
1490 static void sdhci_pci_runtime_pm_forbid(struct device *dev)
1492 pm_runtime_forbid(dev);
1493 pm_runtime_get_noresume(dev);
1496 static int sdhci_pci_probe(struct pci_dev *pdev,
1497 const struct pci_device_id *ent)
1499 struct sdhci_pci_chip *chip;
1500 struct sdhci_pci_slot *slot;
1502 u8 slots, first_bar;
1505 BUG_ON(pdev == NULL);
1506 BUG_ON(ent == NULL);
1508 dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1509 (int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
1511 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1515 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1516 dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
1520 BUG_ON(slots > MAX_SLOTS);
1522 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1526 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1528 if (first_bar > 5) {
1529 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
1533 ret = pci_enable_device(pdev);
1537 chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
1544 chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data;
1546 chip->quirks = chip->fixes->quirks;
1547 chip->quirks2 = chip->fixes->quirks2;
1548 chip->allow_runtime_pm = chip->fixes->allow_runtime_pm;
1550 chip->num_slots = slots;
1552 pci_set_drvdata(pdev, chip);
1554 if (chip->fixes && chip->fixes->probe) {
1555 ret = chip->fixes->probe(chip);
1560 slots = chip->num_slots; /* Quirk may have changed this */
1562 for (i = 0; i < slots; i++) {
1563 slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i);
1565 for (i--; i >= 0; i--)
1566 sdhci_pci_remove_slot(chip->slots[i]);
1567 ret = PTR_ERR(slot);
1571 chip->slots[i] = slot;
1574 if (chip->allow_runtime_pm)
1575 sdhci_pci_runtime_pm_allow(&pdev->dev);
1580 pci_set_drvdata(pdev, NULL);
1584 pci_disable_device(pdev);
1588 static void sdhci_pci_remove(struct pci_dev *pdev)
1591 struct sdhci_pci_chip *chip;
1593 chip = pci_get_drvdata(pdev);
1596 if (chip->allow_runtime_pm)
1597 sdhci_pci_runtime_pm_forbid(&pdev->dev);
1599 for (i = 0; i < chip->num_slots; i++)
1600 sdhci_pci_remove_slot(chip->slots[i]);
1602 pci_set_drvdata(pdev, NULL);
1606 pci_disable_device(pdev);
1609 static struct pci_driver sdhci_driver = {
1610 .name = "sdhci-pci",
1611 .id_table = pci_ids,
1612 .probe = sdhci_pci_probe,
1613 .remove = sdhci_pci_remove,
1615 .pm = &sdhci_pci_pm_ops
1619 module_pci_driver(sdhci_driver);
1621 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1622 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1623 MODULE_LICENSE("GPL");