1 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
3 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version.
10 * Thanks to the following companies for their support:
12 * - JMicron (hardware and technical support)
15 #include <linux/delay.h>
16 #include <linux/highmem.h>
17 #include <linux/module.h>
18 #include <linux/pci.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/slab.h>
21 #include <linux/device.h>
22 #include <linux/mmc/host.h>
23 #include <linux/scatterlist.h>
25 #include <linux/gpio.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/mmc/sdhci-pci-data.h>
34 #define PCI_DEVICE_ID_INTEL_PCH_SDIO0 0x8809
35 #define PCI_DEVICE_ID_INTEL_PCH_SDIO1 0x880a
41 #define PCI_SDHCI_IFPIO 0x00
42 #define PCI_SDHCI_IFDMA 0x01
43 #define PCI_SDHCI_IFVENDOR 0x02
45 #define PCI_SLOT_INFO 0x40 /* 8 bits */
46 #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
47 #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
51 struct sdhci_pci_chip;
52 struct sdhci_pci_slot;
54 struct sdhci_pci_fixes {
57 bool allow_runtime_pm;
59 int (*probe) (struct sdhci_pci_chip *);
61 int (*probe_slot) (struct sdhci_pci_slot *);
62 void (*remove_slot) (struct sdhci_pci_slot *, int);
64 int (*suspend) (struct sdhci_pci_chip *);
65 int (*resume) (struct sdhci_pci_chip *);
68 struct sdhci_pci_slot {
69 struct sdhci_pci_chip *chip;
70 struct sdhci_host *host;
71 struct sdhci_pci_data *data;
79 struct sdhci_pci_chip {
84 bool allow_runtime_pm;
85 const struct sdhci_pci_fixes *fixes;
87 int num_slots; /* Slots on controller */
88 struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
92 /*****************************************************************************\
94 * Hardware specific quirk handling *
96 \*****************************************************************************/
98 static int ricoh_probe(struct sdhci_pci_chip *chip)
100 if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
101 chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
102 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
106 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
109 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
110 & SDHCI_TIMEOUT_CLK_MASK) |
112 ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
113 & SDHCI_CLOCK_BASE_MASK) |
115 SDHCI_TIMEOUT_CLK_UNIT |
121 static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
123 /* Apply a delay to allow controller to settle */
124 /* Otherwise it becomes confused if card state changed
130 static const struct sdhci_pci_fixes sdhci_ricoh = {
131 .probe = ricoh_probe,
132 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
133 SDHCI_QUIRK_FORCE_DMA |
134 SDHCI_QUIRK_CLOCK_BEFORE_RESET,
137 static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
138 .probe_slot = ricoh_mmc_probe_slot,
139 .resume = ricoh_mmc_resume,
140 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
141 SDHCI_QUIRK_CLOCK_BEFORE_RESET |
142 SDHCI_QUIRK_NO_CARD_NO_RESET |
143 SDHCI_QUIRK_MISSING_CAPS
146 static const struct sdhci_pci_fixes sdhci_ene_712 = {
147 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
148 SDHCI_QUIRK_BROKEN_DMA,
151 static const struct sdhci_pci_fixes sdhci_ene_714 = {
152 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
153 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
154 SDHCI_QUIRK_BROKEN_DMA,
157 static const struct sdhci_pci_fixes sdhci_cafe = {
158 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
159 SDHCI_QUIRK_NO_BUSY_IRQ |
160 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
163 static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
165 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
170 * ADMA operation is disabled for Moorestown platform due to
173 static int mrst_hc_probe(struct sdhci_pci_chip *chip)
176 * slots number is fixed here for MRST as SDIO3/5 are never used and
177 * have hardware bugs.
183 static int pch_hc_probe_slot(struct sdhci_pci_slot *slot)
185 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
189 #ifdef CONFIG_PM_RUNTIME
191 static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id)
193 struct sdhci_pci_slot *slot = dev_id;
194 struct sdhci_host *host = slot->host;
196 mmc_detect_change(host->mmc, msecs_to_jiffies(200));
200 static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
202 int err, irq, gpio = slot->cd_gpio;
204 slot->cd_gpio = -EINVAL;
205 slot->cd_irq = -EINVAL;
207 if (!gpio_is_valid(gpio))
210 err = gpio_request(gpio, "sd_cd");
214 err = gpio_direction_input(gpio);
218 irq = gpio_to_irq(gpio);
222 err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING |
223 IRQF_TRIGGER_FALLING, "sd_cd", slot);
227 slot->cd_gpio = gpio;
235 dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n");
238 static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
240 if (slot->cd_irq >= 0)
241 free_irq(slot->cd_irq, slot);
242 if (gpio_is_valid(slot->cd_gpio))
243 gpio_free(slot->cd_gpio);
248 static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
252 static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
258 static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot)
260 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
261 slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC |
262 MMC_CAP2_HC_ERASE_SZ;
266 static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot)
268 slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
272 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
273 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
274 .probe_slot = mrst_hc_probe_slot,
277 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
278 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
279 .probe = mrst_hc_probe,
282 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
283 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
284 .allow_runtime_pm = true,
287 static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = {
288 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
289 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
290 .allow_runtime_pm = true,
291 .probe_slot = mfd_sdio_probe_slot,
294 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = {
295 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
296 .allow_runtime_pm = true,
297 .probe_slot = mfd_emmc_probe_slot,
300 static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = {
301 .quirks = SDHCI_QUIRK_BROKEN_ADMA,
302 .probe_slot = pch_hc_probe_slot,
305 /* O2Micro extra registers */
306 #define O2_SD_LOCK_WP 0xD3
307 #define O2_SD_MULTI_VCC3V 0xEE
308 #define O2_SD_CLKREQ 0xEC
309 #define O2_SD_CAPS 0xE0
310 #define O2_SD_ADMA1 0xE2
311 #define O2_SD_ADMA2 0xE7
312 #define O2_SD_INF_MOD 0xF1
314 static int o2_probe(struct sdhci_pci_chip *chip)
319 switch (chip->pdev->device) {
320 case PCI_DEVICE_ID_O2_8220:
321 case PCI_DEVICE_ID_O2_8221:
322 case PCI_DEVICE_ID_O2_8320:
323 case PCI_DEVICE_ID_O2_8321:
324 /* This extra setup is required due to broken ADMA. */
325 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
329 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
331 /* Set Multi 3 to VCC3V# */
332 pci_write_config_byte(chip->pdev, O2_SD_MULTI_VCC3V, 0x08);
334 /* Disable CLK_REQ# support after media DET */
335 ret = pci_read_config_byte(chip->pdev, O2_SD_CLKREQ, &scratch);
339 pci_write_config_byte(chip->pdev, O2_SD_CLKREQ, scratch);
341 /* Choose capabilities, enable SDMA. We have to write 0x01
342 * to the capabilities register first to unlock it.
344 ret = pci_read_config_byte(chip->pdev, O2_SD_CAPS, &scratch);
348 pci_write_config_byte(chip->pdev, O2_SD_CAPS, scratch);
349 pci_write_config_byte(chip->pdev, O2_SD_CAPS, 0x73);
351 /* Disable ADMA1/2 */
352 pci_write_config_byte(chip->pdev, O2_SD_ADMA1, 0x39);
353 pci_write_config_byte(chip->pdev, O2_SD_ADMA2, 0x08);
355 /* Disable the infinite transfer mode */
356 ret = pci_read_config_byte(chip->pdev, O2_SD_INF_MOD, &scratch);
360 pci_write_config_byte(chip->pdev, O2_SD_INF_MOD, scratch);
363 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
367 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
373 static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
378 ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
383 * Turn PMOS on [bit 0], set over current detection to 2.4 V
384 * [bit 1:2] and enable over current debouncing [bit 6].
391 ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
398 static int jmicron_probe(struct sdhci_pci_chip *chip)
403 if (chip->pdev->revision == 0) {
404 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
405 SDHCI_QUIRK_32BIT_DMA_SIZE |
406 SDHCI_QUIRK_32BIT_ADMA_SIZE |
407 SDHCI_QUIRK_RESET_AFTER_REQUEST |
408 SDHCI_QUIRK_BROKEN_SMALL_PIO;
412 * JMicron chips can have two interfaces to the same hardware
413 * in order to work around limitations in Microsoft's driver.
414 * We need to make sure we only bind to one of them.
416 * This code assumes two things:
418 * 1. The PCI code adds subfunctions in order.
420 * 2. The MMC interface has a lower subfunction number
421 * than the SD interface.
423 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
424 mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
425 else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
426 mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;
429 struct pci_dev *sd_dev;
432 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
433 mmcdev, sd_dev)) != NULL) {
434 if ((PCI_SLOT(chip->pdev->devfn) ==
435 PCI_SLOT(sd_dev->devfn)) &&
436 (chip->pdev->bus == sd_dev->bus))
442 dev_info(&chip->pdev->dev, "Refusing to bind to "
443 "secondary interface.\n");
449 * JMicron chips need a bit of a nudge to enable the power
452 ret = jmicron_pmos(chip, 1);
454 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
458 /* quirk for unsable RO-detection on JM388 chips */
459 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD ||
460 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
461 chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT;
466 static void jmicron_enable_mmc(struct sdhci_host *host, int on)
470 scratch = readb(host->ioaddr + 0xC0);
477 writeb(scratch, host->ioaddr + 0xC0);
480 static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
482 if (slot->chip->pdev->revision == 0) {
485 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
486 version = (version & SDHCI_VENDOR_VER_MASK) >>
487 SDHCI_VENDOR_VER_SHIFT;
490 * Older versions of the chip have lots of nasty glitches
491 * in the ADMA engine. It's best just to avoid it
495 slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
498 /* JM388 MMC doesn't support 1.8V while SD supports it */
499 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
500 slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
501 MMC_VDD_29_30 | MMC_VDD_30_31 |
502 MMC_VDD_165_195; /* allow 1.8V */
503 slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
504 MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */
508 * The secondary interface requires a bit set to get the
511 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
512 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
513 jmicron_enable_mmc(slot->host, 1);
515 slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;
520 static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
525 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
526 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
527 jmicron_enable_mmc(slot->host, 0);
530 static int jmicron_suspend(struct sdhci_pci_chip *chip)
534 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
535 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
536 for (i = 0; i < chip->num_slots; i++)
537 jmicron_enable_mmc(chip->slots[i]->host, 0);
543 static int jmicron_resume(struct sdhci_pci_chip *chip)
547 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
548 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
549 for (i = 0; i < chip->num_slots; i++)
550 jmicron_enable_mmc(chip->slots[i]->host, 1);
553 ret = jmicron_pmos(chip, 1);
555 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
562 static const struct sdhci_pci_fixes sdhci_o2 = {
566 static const struct sdhci_pci_fixes sdhci_jmicron = {
567 .probe = jmicron_probe,
569 .probe_slot = jmicron_probe_slot,
570 .remove_slot = jmicron_remove_slot,
572 .suspend = jmicron_suspend,
573 .resume = jmicron_resume,
576 /* SysKonnect CardBus2SDIO extra registers */
577 #define SYSKT_CTRL 0x200
578 #define SYSKT_RDFIFO_STAT 0x204
579 #define SYSKT_WRFIFO_STAT 0x208
580 #define SYSKT_POWER_DATA 0x20c
581 #define SYSKT_POWER_330 0xef
582 #define SYSKT_POWER_300 0xf8
583 #define SYSKT_POWER_184 0xcc
584 #define SYSKT_POWER_CMD 0x20d
585 #define SYSKT_POWER_START (1 << 7)
586 #define SYSKT_POWER_STATUS 0x20e
587 #define SYSKT_POWER_STATUS_OK (1 << 0)
588 #define SYSKT_BOARD_REV 0x210
589 #define SYSKT_CHIP_REV 0x211
590 #define SYSKT_CONF_DATA 0x212
591 #define SYSKT_CONF_DATA_1V8 (1 << 2)
592 #define SYSKT_CONF_DATA_2V5 (1 << 1)
593 #define SYSKT_CONF_DATA_3V3 (1 << 0)
595 static int syskt_probe(struct sdhci_pci_chip *chip)
597 if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
598 chip->pdev->class &= ~0x0000FF;
599 chip->pdev->class |= PCI_SDHCI_IFDMA;
604 static int syskt_probe_slot(struct sdhci_pci_slot *slot)
608 u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
609 u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
610 dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
611 "board rev %d.%d, chip rev %d.%d\n",
612 board_rev >> 4, board_rev & 0xf,
613 chip_rev >> 4, chip_rev & 0xf);
614 if (chip_rev >= 0x20)
615 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
617 writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
618 writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
620 tm = 10; /* Wait max 1 ms */
622 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
623 if (ps & SYSKT_POWER_STATUS_OK)
628 dev_err(&slot->chip->pdev->dev,
629 "power regulator never stabilized");
630 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
637 static const struct sdhci_pci_fixes sdhci_syskt = {
638 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
639 .probe = syskt_probe,
640 .probe_slot = syskt_probe_slot,
643 static int via_probe(struct sdhci_pci_chip *chip)
645 if (chip->pdev->revision == 0x10)
646 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
651 static const struct sdhci_pci_fixes sdhci_via = {
655 static const struct pci_device_id pci_ids[] __devinitdata = {
657 .vendor = PCI_VENDOR_ID_RICOH,
658 .device = PCI_DEVICE_ID_RICOH_R5C822,
659 .subvendor = PCI_ANY_ID,
660 .subdevice = PCI_ANY_ID,
661 .driver_data = (kernel_ulong_t)&sdhci_ricoh,
665 .vendor = PCI_VENDOR_ID_RICOH,
667 .subvendor = PCI_ANY_ID,
668 .subdevice = PCI_ANY_ID,
669 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
673 .vendor = PCI_VENDOR_ID_RICOH,
675 .subvendor = PCI_ANY_ID,
676 .subdevice = PCI_ANY_ID,
677 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
681 .vendor = PCI_VENDOR_ID_RICOH,
683 .subvendor = PCI_ANY_ID,
684 .subdevice = PCI_ANY_ID,
685 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
689 .vendor = PCI_VENDOR_ID_ENE,
690 .device = PCI_DEVICE_ID_ENE_CB712_SD,
691 .subvendor = PCI_ANY_ID,
692 .subdevice = PCI_ANY_ID,
693 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
697 .vendor = PCI_VENDOR_ID_ENE,
698 .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
699 .subvendor = PCI_ANY_ID,
700 .subdevice = PCI_ANY_ID,
701 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
705 .vendor = PCI_VENDOR_ID_ENE,
706 .device = PCI_DEVICE_ID_ENE_CB714_SD,
707 .subvendor = PCI_ANY_ID,
708 .subdevice = PCI_ANY_ID,
709 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
713 .vendor = PCI_VENDOR_ID_ENE,
714 .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
715 .subvendor = PCI_ANY_ID,
716 .subdevice = PCI_ANY_ID,
717 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
721 .vendor = PCI_VENDOR_ID_MARVELL,
722 .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
723 .subvendor = PCI_ANY_ID,
724 .subdevice = PCI_ANY_ID,
725 .driver_data = (kernel_ulong_t)&sdhci_cafe,
729 .vendor = PCI_VENDOR_ID_JMICRON,
730 .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
731 .subvendor = PCI_ANY_ID,
732 .subdevice = PCI_ANY_ID,
733 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
737 .vendor = PCI_VENDOR_ID_JMICRON,
738 .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
739 .subvendor = PCI_ANY_ID,
740 .subdevice = PCI_ANY_ID,
741 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
745 .vendor = PCI_VENDOR_ID_JMICRON,
746 .device = PCI_DEVICE_ID_JMICRON_JMB388_SD,
747 .subvendor = PCI_ANY_ID,
748 .subdevice = PCI_ANY_ID,
749 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
753 .vendor = PCI_VENDOR_ID_JMICRON,
754 .device = PCI_DEVICE_ID_JMICRON_JMB388_ESD,
755 .subvendor = PCI_ANY_ID,
756 .subdevice = PCI_ANY_ID,
757 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
761 .vendor = PCI_VENDOR_ID_SYSKONNECT,
763 .subvendor = PCI_ANY_ID,
764 .subdevice = PCI_ANY_ID,
765 .driver_data = (kernel_ulong_t)&sdhci_syskt,
769 .vendor = PCI_VENDOR_ID_VIA,
771 .subvendor = PCI_ANY_ID,
772 .subdevice = PCI_ANY_ID,
773 .driver_data = (kernel_ulong_t)&sdhci_via,
777 .vendor = PCI_VENDOR_ID_INTEL,
778 .device = PCI_DEVICE_ID_INTEL_MRST_SD0,
779 .subvendor = PCI_ANY_ID,
780 .subdevice = PCI_ANY_ID,
781 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
785 .vendor = PCI_VENDOR_ID_INTEL,
786 .device = PCI_DEVICE_ID_INTEL_MRST_SD1,
787 .subvendor = PCI_ANY_ID,
788 .subdevice = PCI_ANY_ID,
789 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
793 .vendor = PCI_VENDOR_ID_INTEL,
794 .device = PCI_DEVICE_ID_INTEL_MRST_SD2,
795 .subvendor = PCI_ANY_ID,
796 .subdevice = PCI_ANY_ID,
797 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
801 .vendor = PCI_VENDOR_ID_INTEL,
802 .device = PCI_DEVICE_ID_INTEL_MFD_SD,
803 .subvendor = PCI_ANY_ID,
804 .subdevice = PCI_ANY_ID,
805 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sd,
809 .vendor = PCI_VENDOR_ID_INTEL,
810 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
811 .subvendor = PCI_ANY_ID,
812 .subdevice = PCI_ANY_ID,
813 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
817 .vendor = PCI_VENDOR_ID_INTEL,
818 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
819 .subvendor = PCI_ANY_ID,
820 .subdevice = PCI_ANY_ID,
821 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
825 .vendor = PCI_VENDOR_ID_INTEL,
826 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
827 .subvendor = PCI_ANY_ID,
828 .subdevice = PCI_ANY_ID,
829 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
833 .vendor = PCI_VENDOR_ID_INTEL,
834 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
835 .subvendor = PCI_ANY_ID,
836 .subdevice = PCI_ANY_ID,
837 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
841 .vendor = PCI_VENDOR_ID_INTEL,
842 .device = PCI_DEVICE_ID_INTEL_PCH_SDIO0,
843 .subvendor = PCI_ANY_ID,
844 .subdevice = PCI_ANY_ID,
845 .driver_data = (kernel_ulong_t)&sdhci_intel_pch_sdio,
849 .vendor = PCI_VENDOR_ID_INTEL,
850 .device = PCI_DEVICE_ID_INTEL_PCH_SDIO1,
851 .subvendor = PCI_ANY_ID,
852 .subdevice = PCI_ANY_ID,
853 .driver_data = (kernel_ulong_t)&sdhci_intel_pch_sdio,
857 .vendor = PCI_VENDOR_ID_O2,
858 .device = PCI_DEVICE_ID_O2_8120,
859 .subvendor = PCI_ANY_ID,
860 .subdevice = PCI_ANY_ID,
861 .driver_data = (kernel_ulong_t)&sdhci_o2,
865 .vendor = PCI_VENDOR_ID_O2,
866 .device = PCI_DEVICE_ID_O2_8220,
867 .subvendor = PCI_ANY_ID,
868 .subdevice = PCI_ANY_ID,
869 .driver_data = (kernel_ulong_t)&sdhci_o2,
873 .vendor = PCI_VENDOR_ID_O2,
874 .device = PCI_DEVICE_ID_O2_8221,
875 .subvendor = PCI_ANY_ID,
876 .subdevice = PCI_ANY_ID,
877 .driver_data = (kernel_ulong_t)&sdhci_o2,
881 .vendor = PCI_VENDOR_ID_O2,
882 .device = PCI_DEVICE_ID_O2_8320,
883 .subvendor = PCI_ANY_ID,
884 .subdevice = PCI_ANY_ID,
885 .driver_data = (kernel_ulong_t)&sdhci_o2,
889 .vendor = PCI_VENDOR_ID_O2,
890 .device = PCI_DEVICE_ID_O2_8321,
891 .subvendor = PCI_ANY_ID,
892 .subdevice = PCI_ANY_ID,
893 .driver_data = (kernel_ulong_t)&sdhci_o2,
896 { /* Generic SD host controller */
897 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
900 { /* end: all zeroes */ },
903 MODULE_DEVICE_TABLE(pci, pci_ids);
905 /*****************************************************************************\
907 * SDHCI core callbacks *
909 \*****************************************************************************/
911 static int sdhci_pci_enable_dma(struct sdhci_host *host)
913 struct sdhci_pci_slot *slot;
914 struct pci_dev *pdev;
917 slot = sdhci_priv(host);
918 pdev = slot->chip->pdev;
920 if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
921 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
922 (host->flags & SDHCI_USE_SDMA)) {
923 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
924 "doesn't fully claim to support it.\n");
927 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
931 pci_set_master(pdev);
936 static int sdhci_pci_8bit_width(struct sdhci_host *host, int width)
940 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
943 case MMC_BUS_WIDTH_8:
944 ctrl |= SDHCI_CTRL_8BITBUS;
945 ctrl &= ~SDHCI_CTRL_4BITBUS;
947 case MMC_BUS_WIDTH_4:
948 ctrl |= SDHCI_CTRL_4BITBUS;
949 ctrl &= ~SDHCI_CTRL_8BITBUS;
952 ctrl &= ~(SDHCI_CTRL_8BITBUS | SDHCI_CTRL_4BITBUS);
956 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
961 static void sdhci_pci_hw_reset(struct sdhci_host *host)
963 struct sdhci_pci_slot *slot = sdhci_priv(host);
964 int rst_n_gpio = slot->rst_n_gpio;
966 if (!gpio_is_valid(rst_n_gpio))
968 gpio_set_value_cansleep(rst_n_gpio, 0);
969 /* For eMMC, minimum is 1us but give it 10us for good measure */
971 gpio_set_value_cansleep(rst_n_gpio, 1);
972 /* For eMMC, minimum is 200us but give it 300us for good measure */
973 usleep_range(300, 1000);
976 static struct sdhci_ops sdhci_pci_ops = {
977 .enable_dma = sdhci_pci_enable_dma,
978 .platform_8bit_width = sdhci_pci_8bit_width,
979 .hw_reset = sdhci_pci_hw_reset,
982 /*****************************************************************************\
986 \*****************************************************************************/
990 static int sdhci_pci_suspend(struct device *dev)
992 struct pci_dev *pdev = to_pci_dev(dev);
993 struct sdhci_pci_chip *chip;
994 struct sdhci_pci_slot *slot;
995 mmc_pm_flag_t slot_pm_flags;
996 mmc_pm_flag_t pm_flags = 0;
999 chip = pci_get_drvdata(pdev);
1003 for (i = 0; i < chip->num_slots; i++) {
1004 slot = chip->slots[i];
1008 ret = sdhci_suspend_host(slot->host);
1011 goto err_pci_suspend;
1013 slot_pm_flags = slot->host->mmc->pm_flags;
1014 if (slot_pm_flags & MMC_PM_WAKE_SDIO_IRQ)
1015 sdhci_enable_irq_wakeups(slot->host);
1017 pm_flags |= slot_pm_flags;
1020 if (chip->fixes && chip->fixes->suspend) {
1021 ret = chip->fixes->suspend(chip);
1023 goto err_pci_suspend;
1026 pci_save_state(pdev);
1027 if (pm_flags & MMC_PM_KEEP_POWER) {
1028 if (pm_flags & MMC_PM_WAKE_SDIO_IRQ) {
1029 pci_pme_active(pdev, true);
1030 pci_enable_wake(pdev, PCI_D3hot, 1);
1032 pci_set_power_state(pdev, PCI_D3hot);
1034 pci_enable_wake(pdev, PCI_D3hot, 0);
1035 pci_disable_device(pdev);
1036 pci_set_power_state(pdev, PCI_D3hot);
1043 sdhci_resume_host(chip->slots[i]->host);
1047 static int sdhci_pci_resume(struct device *dev)
1049 struct pci_dev *pdev = to_pci_dev(dev);
1050 struct sdhci_pci_chip *chip;
1051 struct sdhci_pci_slot *slot;
1054 chip = pci_get_drvdata(pdev);
1058 pci_set_power_state(pdev, PCI_D0);
1059 pci_restore_state(pdev);
1060 ret = pci_enable_device(pdev);
1064 if (chip->fixes && chip->fixes->resume) {
1065 ret = chip->fixes->resume(chip);
1070 for (i = 0; i < chip->num_slots; i++) {
1071 slot = chip->slots[i];
1075 ret = sdhci_resume_host(slot->host);
1083 #else /* CONFIG_PM */
1085 #define sdhci_pci_suspend NULL
1086 #define sdhci_pci_resume NULL
1088 #endif /* CONFIG_PM */
1090 #ifdef CONFIG_PM_RUNTIME
1092 static int sdhci_pci_runtime_suspend(struct device *dev)
1094 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1095 struct sdhci_pci_chip *chip;
1096 struct sdhci_pci_slot *slot;
1099 chip = pci_get_drvdata(pdev);
1103 for (i = 0; i < chip->num_slots; i++) {
1104 slot = chip->slots[i];
1108 ret = sdhci_runtime_suspend_host(slot->host);
1111 goto err_pci_runtime_suspend;
1114 if (chip->fixes && chip->fixes->suspend) {
1115 ret = chip->fixes->suspend(chip);
1117 goto err_pci_runtime_suspend;
1122 err_pci_runtime_suspend:
1124 sdhci_runtime_resume_host(chip->slots[i]->host);
1128 static int sdhci_pci_runtime_resume(struct device *dev)
1130 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1131 struct sdhci_pci_chip *chip;
1132 struct sdhci_pci_slot *slot;
1135 chip = pci_get_drvdata(pdev);
1139 if (chip->fixes && chip->fixes->resume) {
1140 ret = chip->fixes->resume(chip);
1145 for (i = 0; i < chip->num_slots; i++) {
1146 slot = chip->slots[i];
1150 ret = sdhci_runtime_resume_host(slot->host);
1158 static int sdhci_pci_runtime_idle(struct device *dev)
1165 #define sdhci_pci_runtime_suspend NULL
1166 #define sdhci_pci_runtime_resume NULL
1167 #define sdhci_pci_runtime_idle NULL
1171 static const struct dev_pm_ops sdhci_pci_pm_ops = {
1172 .suspend = sdhci_pci_suspend,
1173 .resume = sdhci_pci_resume,
1174 .runtime_suspend = sdhci_pci_runtime_suspend,
1175 .runtime_resume = sdhci_pci_runtime_resume,
1176 .runtime_idle = sdhci_pci_runtime_idle,
1179 /*****************************************************************************\
1181 * Device probing/removal *
1183 \*****************************************************************************/
1185 static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot(
1186 struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar,
1189 struct sdhci_pci_slot *slot;
1190 struct sdhci_host *host;
1191 int ret, bar = first_bar + slotno;
1193 if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
1194 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
1195 return ERR_PTR(-ENODEV);
1198 if (pci_resource_len(pdev, bar) != 0x100) {
1199 dev_err(&pdev->dev, "Invalid iomem size. You may "
1200 "experience problems.\n");
1203 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1204 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
1205 return ERR_PTR(-ENODEV);
1208 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1209 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
1210 return ERR_PTR(-ENODEV);
1213 host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
1215 dev_err(&pdev->dev, "cannot allocate host\n");
1216 return ERR_CAST(host);
1219 slot = sdhci_priv(host);
1223 slot->pci_bar = bar;
1224 slot->rst_n_gpio = -EINVAL;
1225 slot->cd_gpio = -EINVAL;
1227 /* Retrieve platform data if there is any */
1228 if (*sdhci_pci_get_data)
1229 slot->data = sdhci_pci_get_data(pdev, slotno);
1232 if (slot->data->setup) {
1233 ret = slot->data->setup(slot->data);
1235 dev_err(&pdev->dev, "platform setup failed\n");
1239 slot->rst_n_gpio = slot->data->rst_n_gpio;
1240 slot->cd_gpio = slot->data->cd_gpio;
1243 host->hw_name = "PCI";
1244 host->ops = &sdhci_pci_ops;
1245 host->quirks = chip->quirks;
1246 host->quirks2 = chip->quirks2;
1248 host->irq = pdev->irq;
1250 ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
1252 dev_err(&pdev->dev, "cannot request region\n");
1256 host->ioaddr = pci_ioremap_bar(pdev, bar);
1257 if (!host->ioaddr) {
1258 dev_err(&pdev->dev, "failed to remap registers\n");
1263 if (chip->fixes && chip->fixes->probe_slot) {
1264 ret = chip->fixes->probe_slot(slot);
1269 if (gpio_is_valid(slot->rst_n_gpio)) {
1270 if (!gpio_request(slot->rst_n_gpio, "eMMC_reset")) {
1271 gpio_direction_output(slot->rst_n_gpio, 1);
1272 slot->host->mmc->caps |= MMC_CAP_HW_RESET;
1274 dev_warn(&pdev->dev, "failed to request rst_n_gpio\n");
1275 slot->rst_n_gpio = -EINVAL;
1279 host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
1281 ret = sdhci_add_host(host);
1285 sdhci_pci_add_own_cd(slot);
1290 if (gpio_is_valid(slot->rst_n_gpio))
1291 gpio_free(slot->rst_n_gpio);
1293 if (chip->fixes && chip->fixes->remove_slot)
1294 chip->fixes->remove_slot(slot, 0);
1297 iounmap(host->ioaddr);
1300 pci_release_region(pdev, bar);
1303 if (slot->data && slot->data->cleanup)
1304 slot->data->cleanup(slot->data);
1307 sdhci_free_host(host);
1309 return ERR_PTR(ret);
1312 static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
1317 sdhci_pci_remove_own_cd(slot);
1320 scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
1321 if (scratch == (u32)-1)
1324 sdhci_remove_host(slot->host, dead);
1326 if (gpio_is_valid(slot->rst_n_gpio))
1327 gpio_free(slot->rst_n_gpio);
1329 if (slot->chip->fixes && slot->chip->fixes->remove_slot)
1330 slot->chip->fixes->remove_slot(slot, dead);
1332 if (slot->data && slot->data->cleanup)
1333 slot->data->cleanup(slot->data);
1335 pci_release_region(slot->chip->pdev, slot->pci_bar);
1337 sdhci_free_host(slot->host);
1340 static void __devinit sdhci_pci_runtime_pm_allow(struct device *dev)
1342 pm_runtime_put_noidle(dev);
1343 pm_runtime_allow(dev);
1344 pm_runtime_set_autosuspend_delay(dev, 50);
1345 pm_runtime_use_autosuspend(dev);
1346 pm_suspend_ignore_children(dev, 1);
1349 static void __devexit sdhci_pci_runtime_pm_forbid(struct device *dev)
1351 pm_runtime_forbid(dev);
1352 pm_runtime_get_noresume(dev);
1355 static int __devinit sdhci_pci_probe(struct pci_dev *pdev,
1356 const struct pci_device_id *ent)
1358 struct sdhci_pci_chip *chip;
1359 struct sdhci_pci_slot *slot;
1361 u8 slots, first_bar;
1364 BUG_ON(pdev == NULL);
1365 BUG_ON(ent == NULL);
1367 dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1368 (int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
1370 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1374 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1375 dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
1379 BUG_ON(slots > MAX_SLOTS);
1381 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1385 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1387 if (first_bar > 5) {
1388 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
1392 ret = pci_enable_device(pdev);
1396 chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
1403 chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data;
1405 chip->quirks = chip->fixes->quirks;
1406 chip->quirks2 = chip->fixes->quirks2;
1407 chip->allow_runtime_pm = chip->fixes->allow_runtime_pm;
1409 chip->num_slots = slots;
1411 pci_set_drvdata(pdev, chip);
1413 if (chip->fixes && chip->fixes->probe) {
1414 ret = chip->fixes->probe(chip);
1419 slots = chip->num_slots; /* Quirk may have changed this */
1421 for (i = 0; i < slots; i++) {
1422 slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i);
1424 for (i--; i >= 0; i--)
1425 sdhci_pci_remove_slot(chip->slots[i]);
1426 ret = PTR_ERR(slot);
1430 chip->slots[i] = slot;
1433 if (chip->allow_runtime_pm)
1434 sdhci_pci_runtime_pm_allow(&pdev->dev);
1439 pci_set_drvdata(pdev, NULL);
1443 pci_disable_device(pdev);
1447 static void __devexit sdhci_pci_remove(struct pci_dev *pdev)
1450 struct sdhci_pci_chip *chip;
1452 chip = pci_get_drvdata(pdev);
1455 if (chip->allow_runtime_pm)
1456 sdhci_pci_runtime_pm_forbid(&pdev->dev);
1458 for (i = 0; i < chip->num_slots; i++)
1459 sdhci_pci_remove_slot(chip->slots[i]);
1461 pci_set_drvdata(pdev, NULL);
1465 pci_disable_device(pdev);
1468 static struct pci_driver sdhci_driver = {
1469 .name = "sdhci-pci",
1470 .id_table = pci_ids,
1471 .probe = sdhci_pci_probe,
1472 .remove = __devexit_p(sdhci_pci_remove),
1474 .pm = &sdhci_pci_pm_ops
1478 /*****************************************************************************\
1480 * Driver init/exit *
1482 \*****************************************************************************/
1484 static int __init sdhci_drv_init(void)
1486 return pci_register_driver(&sdhci_driver);
1489 static void __exit sdhci_drv_exit(void)
1491 pci_unregister_driver(&sdhci_driver);
1494 module_init(sdhci_drv_init);
1495 module_exit(sdhci_drv_exit);
1497 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1498 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1499 MODULE_LICENSE("GPL");