1 /* linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
3 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or (at
8 * your option) any later version.
10 * Thanks to the following companies for their support:
12 * - JMicron (hardware and technical support)
15 #include <linux/delay.h>
16 #include <linux/highmem.h>
17 #include <linux/module.h>
18 #include <linux/pci.h>
19 #include <linux/dma-mapping.h>
20 #include <linux/slab.h>
21 #include <linux/device.h>
22 #include <linux/mmc/host.h>
23 #include <linux/scatterlist.h>
25 #include <linux/gpio.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/mmc/sdhci-pci-data.h>
34 #define PCI_DEVICE_ID_INTEL_PCH_SDIO0 0x8809
35 #define PCI_DEVICE_ID_INTEL_PCH_SDIO1 0x880a
41 #define PCI_SDHCI_IFPIO 0x00
42 #define PCI_SDHCI_IFDMA 0x01
43 #define PCI_SDHCI_IFVENDOR 0x02
45 #define PCI_SLOT_INFO 0x40 /* 8 bits */
46 #define PCI_SLOT_INFO_SLOTS(x) ((x >> 4) & 7)
47 #define PCI_SLOT_INFO_FIRST_BAR_MASK 0x07
51 struct sdhci_pci_chip;
52 struct sdhci_pci_slot;
54 struct sdhci_pci_fixes {
57 bool allow_runtime_pm;
59 int (*probe) (struct sdhci_pci_chip *);
61 int (*probe_slot) (struct sdhci_pci_slot *);
62 void (*remove_slot) (struct sdhci_pci_slot *, int);
64 int (*suspend) (struct sdhci_pci_chip *);
65 int (*resume) (struct sdhci_pci_chip *);
68 struct sdhci_pci_slot {
69 struct sdhci_pci_chip *chip;
70 struct sdhci_host *host;
71 struct sdhci_pci_data *data;
79 struct sdhci_pci_chip {
84 bool allow_runtime_pm;
85 const struct sdhci_pci_fixes *fixes;
87 int num_slots; /* Slots on controller */
88 struct sdhci_pci_slot *slots[MAX_SLOTS]; /* Pointers to host slots */
92 /*****************************************************************************\
94 * Hardware specific quirk handling *
96 \*****************************************************************************/
98 static int ricoh_probe(struct sdhci_pci_chip *chip)
100 if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
101 chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
102 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
106 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
109 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
110 & SDHCI_TIMEOUT_CLK_MASK) |
112 ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
113 & SDHCI_CLOCK_BASE_MASK) |
115 SDHCI_TIMEOUT_CLK_UNIT |
121 static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
123 /* Apply a delay to allow controller to settle */
124 /* Otherwise it becomes confused if card state changed
130 static const struct sdhci_pci_fixes sdhci_ricoh = {
131 .probe = ricoh_probe,
132 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
133 SDHCI_QUIRK_FORCE_DMA |
134 SDHCI_QUIRK_CLOCK_BEFORE_RESET,
137 static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
138 .probe_slot = ricoh_mmc_probe_slot,
139 .resume = ricoh_mmc_resume,
140 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
141 SDHCI_QUIRK_CLOCK_BEFORE_RESET |
142 SDHCI_QUIRK_NO_CARD_NO_RESET |
143 SDHCI_QUIRK_MISSING_CAPS
146 static const struct sdhci_pci_fixes sdhci_ene_712 = {
147 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
148 SDHCI_QUIRK_BROKEN_DMA,
151 static const struct sdhci_pci_fixes sdhci_ene_714 = {
152 .quirks = SDHCI_QUIRK_SINGLE_POWER_WRITE |
153 SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
154 SDHCI_QUIRK_BROKEN_DMA,
157 static const struct sdhci_pci_fixes sdhci_cafe = {
158 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
159 SDHCI_QUIRK_NO_BUSY_IRQ |
160 SDHCI_QUIRK_BROKEN_CARD_DETECTION |
161 SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
164 static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
166 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
171 * ADMA operation is disabled for Moorestown platform due to
174 static int mrst_hc_probe(struct sdhci_pci_chip *chip)
177 * slots number is fixed here for MRST as SDIO3/5 are never used and
178 * have hardware bugs.
184 static int pch_hc_probe_slot(struct sdhci_pci_slot *slot)
186 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
190 #ifdef CONFIG_PM_RUNTIME
192 static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id)
194 struct sdhci_pci_slot *slot = dev_id;
195 struct sdhci_host *host = slot->host;
197 mmc_detect_change(host->mmc, msecs_to_jiffies(200));
201 static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
203 int err, irq, gpio = slot->cd_gpio;
205 slot->cd_gpio = -EINVAL;
206 slot->cd_irq = -EINVAL;
208 if (!gpio_is_valid(gpio))
211 err = gpio_request(gpio, "sd_cd");
215 err = gpio_direction_input(gpio);
219 irq = gpio_to_irq(gpio);
223 err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING |
224 IRQF_TRIGGER_FALLING, "sd_cd", slot);
228 slot->cd_gpio = gpio;
236 dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n");
239 static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
241 if (slot->cd_irq >= 0)
242 free_irq(slot->cd_irq, slot);
243 if (gpio_is_valid(slot->cd_gpio))
244 gpio_free(slot->cd_gpio);
249 static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
253 static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
259 static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot)
261 slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
262 slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC |
263 MMC_CAP2_HC_ERASE_SZ;
267 static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot)
269 slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
273 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
274 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
275 .probe_slot = mrst_hc_probe_slot,
278 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
279 .quirks = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
280 .probe = mrst_hc_probe,
283 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
284 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
285 .allow_runtime_pm = true,
288 static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = {
289 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
290 .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
291 .allow_runtime_pm = true,
292 .probe_slot = mfd_sdio_probe_slot,
295 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = {
296 .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
297 .allow_runtime_pm = true,
298 .probe_slot = mfd_emmc_probe_slot,
301 static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = {
302 .quirks = SDHCI_QUIRK_BROKEN_ADMA,
303 .probe_slot = pch_hc_probe_slot,
306 /* O2Micro extra registers */
307 #define O2_SD_LOCK_WP 0xD3
308 #define O2_SD_MULTI_VCC3V 0xEE
309 #define O2_SD_CLKREQ 0xEC
310 #define O2_SD_CAPS 0xE0
311 #define O2_SD_ADMA1 0xE2
312 #define O2_SD_ADMA2 0xE7
313 #define O2_SD_INF_MOD 0xF1
315 static int o2_probe(struct sdhci_pci_chip *chip)
320 switch (chip->pdev->device) {
321 case PCI_DEVICE_ID_O2_8220:
322 case PCI_DEVICE_ID_O2_8221:
323 case PCI_DEVICE_ID_O2_8320:
324 case PCI_DEVICE_ID_O2_8321:
325 /* This extra setup is required due to broken ADMA. */
326 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
330 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
332 /* Set Multi 3 to VCC3V# */
333 pci_write_config_byte(chip->pdev, O2_SD_MULTI_VCC3V, 0x08);
335 /* Disable CLK_REQ# support after media DET */
336 ret = pci_read_config_byte(chip->pdev, O2_SD_CLKREQ, &scratch);
340 pci_write_config_byte(chip->pdev, O2_SD_CLKREQ, scratch);
342 /* Choose capabilities, enable SDMA. We have to write 0x01
343 * to the capabilities register first to unlock it.
345 ret = pci_read_config_byte(chip->pdev, O2_SD_CAPS, &scratch);
349 pci_write_config_byte(chip->pdev, O2_SD_CAPS, scratch);
350 pci_write_config_byte(chip->pdev, O2_SD_CAPS, 0x73);
352 /* Disable ADMA1/2 */
353 pci_write_config_byte(chip->pdev, O2_SD_ADMA1, 0x39);
354 pci_write_config_byte(chip->pdev, O2_SD_ADMA2, 0x08);
356 /* Disable the infinite transfer mode */
357 ret = pci_read_config_byte(chip->pdev, O2_SD_INF_MOD, &scratch);
361 pci_write_config_byte(chip->pdev, O2_SD_INF_MOD, scratch);
364 ret = pci_read_config_byte(chip->pdev, O2_SD_LOCK_WP, &scratch);
368 pci_write_config_byte(chip->pdev, O2_SD_LOCK_WP, scratch);
374 static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
379 ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
384 * Turn PMOS on [bit 0], set over current detection to 2.4 V
385 * [bit 1:2] and enable over current debouncing [bit 6].
392 ret = pci_write_config_byte(chip->pdev, 0xAE, scratch);
399 static int jmicron_probe(struct sdhci_pci_chip *chip)
404 if (chip->pdev->revision == 0) {
405 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
406 SDHCI_QUIRK_32BIT_DMA_SIZE |
407 SDHCI_QUIRK_32BIT_ADMA_SIZE |
408 SDHCI_QUIRK_RESET_AFTER_REQUEST |
409 SDHCI_QUIRK_BROKEN_SMALL_PIO;
413 * JMicron chips can have two interfaces to the same hardware
414 * in order to work around limitations in Microsoft's driver.
415 * We need to make sure we only bind to one of them.
417 * This code assumes two things:
419 * 1. The PCI code adds subfunctions in order.
421 * 2. The MMC interface has a lower subfunction number
422 * than the SD interface.
424 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
425 mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
426 else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
427 mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;
430 struct pci_dev *sd_dev;
433 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
434 mmcdev, sd_dev)) != NULL) {
435 if ((PCI_SLOT(chip->pdev->devfn) ==
436 PCI_SLOT(sd_dev->devfn)) &&
437 (chip->pdev->bus == sd_dev->bus))
443 dev_info(&chip->pdev->dev, "Refusing to bind to "
444 "secondary interface.\n");
450 * JMicron chips need a bit of a nudge to enable the power
453 ret = jmicron_pmos(chip, 1);
455 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
459 /* quirk for unsable RO-detection on JM388 chips */
460 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD ||
461 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
462 chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT;
467 static void jmicron_enable_mmc(struct sdhci_host *host, int on)
471 scratch = readb(host->ioaddr + 0xC0);
478 writeb(scratch, host->ioaddr + 0xC0);
481 static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
483 if (slot->chip->pdev->revision == 0) {
486 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
487 version = (version & SDHCI_VENDOR_VER_MASK) >>
488 SDHCI_VENDOR_VER_SHIFT;
491 * Older versions of the chip have lots of nasty glitches
492 * in the ADMA engine. It's best just to avoid it
496 slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
499 /* JM388 MMC doesn't support 1.8V while SD supports it */
500 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
501 slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
502 MMC_VDD_29_30 | MMC_VDD_30_31 |
503 MMC_VDD_165_195; /* allow 1.8V */
504 slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
505 MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */
509 * The secondary interface requires a bit set to get the
512 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
513 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
514 jmicron_enable_mmc(slot->host, 1);
516 slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;
521 static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
526 if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
527 slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
528 jmicron_enable_mmc(slot->host, 0);
531 static int jmicron_suspend(struct sdhci_pci_chip *chip)
535 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
536 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
537 for (i = 0; i < chip->num_slots; i++)
538 jmicron_enable_mmc(chip->slots[i]->host, 0);
544 static int jmicron_resume(struct sdhci_pci_chip *chip)
548 if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
549 chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
550 for (i = 0; i < chip->num_slots; i++)
551 jmicron_enable_mmc(chip->slots[i]->host, 1);
554 ret = jmicron_pmos(chip, 1);
556 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
563 static const struct sdhci_pci_fixes sdhci_o2 = {
567 static const struct sdhci_pci_fixes sdhci_jmicron = {
568 .probe = jmicron_probe,
570 .probe_slot = jmicron_probe_slot,
571 .remove_slot = jmicron_remove_slot,
573 .suspend = jmicron_suspend,
574 .resume = jmicron_resume,
577 /* SysKonnect CardBus2SDIO extra registers */
578 #define SYSKT_CTRL 0x200
579 #define SYSKT_RDFIFO_STAT 0x204
580 #define SYSKT_WRFIFO_STAT 0x208
581 #define SYSKT_POWER_DATA 0x20c
582 #define SYSKT_POWER_330 0xef
583 #define SYSKT_POWER_300 0xf8
584 #define SYSKT_POWER_184 0xcc
585 #define SYSKT_POWER_CMD 0x20d
586 #define SYSKT_POWER_START (1 << 7)
587 #define SYSKT_POWER_STATUS 0x20e
588 #define SYSKT_POWER_STATUS_OK (1 << 0)
589 #define SYSKT_BOARD_REV 0x210
590 #define SYSKT_CHIP_REV 0x211
591 #define SYSKT_CONF_DATA 0x212
592 #define SYSKT_CONF_DATA_1V8 (1 << 2)
593 #define SYSKT_CONF_DATA_2V5 (1 << 1)
594 #define SYSKT_CONF_DATA_3V3 (1 << 0)
596 static int syskt_probe(struct sdhci_pci_chip *chip)
598 if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
599 chip->pdev->class &= ~0x0000FF;
600 chip->pdev->class |= PCI_SDHCI_IFDMA;
605 static int syskt_probe_slot(struct sdhci_pci_slot *slot)
609 u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
610 u8 chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
611 dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
612 "board rev %d.%d, chip rev %d.%d\n",
613 board_rev >> 4, board_rev & 0xf,
614 chip_rev >> 4, chip_rev & 0xf);
615 if (chip_rev >= 0x20)
616 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
618 writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
619 writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
621 tm = 10; /* Wait max 1 ms */
623 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
624 if (ps & SYSKT_POWER_STATUS_OK)
629 dev_err(&slot->chip->pdev->dev,
630 "power regulator never stabilized");
631 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
638 static const struct sdhci_pci_fixes sdhci_syskt = {
639 .quirks = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
640 .probe = syskt_probe,
641 .probe_slot = syskt_probe_slot,
644 static int via_probe(struct sdhci_pci_chip *chip)
646 if (chip->pdev->revision == 0x10)
647 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
652 static const struct sdhci_pci_fixes sdhci_via = {
656 static const struct pci_device_id pci_ids[] __devinitdata = {
658 .vendor = PCI_VENDOR_ID_RICOH,
659 .device = PCI_DEVICE_ID_RICOH_R5C822,
660 .subvendor = PCI_ANY_ID,
661 .subdevice = PCI_ANY_ID,
662 .driver_data = (kernel_ulong_t)&sdhci_ricoh,
666 .vendor = PCI_VENDOR_ID_RICOH,
668 .subvendor = PCI_ANY_ID,
669 .subdevice = PCI_ANY_ID,
670 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
674 .vendor = PCI_VENDOR_ID_RICOH,
676 .subvendor = PCI_ANY_ID,
677 .subdevice = PCI_ANY_ID,
678 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
682 .vendor = PCI_VENDOR_ID_RICOH,
684 .subvendor = PCI_ANY_ID,
685 .subdevice = PCI_ANY_ID,
686 .driver_data = (kernel_ulong_t)&sdhci_ricoh_mmc,
690 .vendor = PCI_VENDOR_ID_ENE,
691 .device = PCI_DEVICE_ID_ENE_CB712_SD,
692 .subvendor = PCI_ANY_ID,
693 .subdevice = PCI_ANY_ID,
694 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
698 .vendor = PCI_VENDOR_ID_ENE,
699 .device = PCI_DEVICE_ID_ENE_CB712_SD_2,
700 .subvendor = PCI_ANY_ID,
701 .subdevice = PCI_ANY_ID,
702 .driver_data = (kernel_ulong_t)&sdhci_ene_712,
706 .vendor = PCI_VENDOR_ID_ENE,
707 .device = PCI_DEVICE_ID_ENE_CB714_SD,
708 .subvendor = PCI_ANY_ID,
709 .subdevice = PCI_ANY_ID,
710 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
714 .vendor = PCI_VENDOR_ID_ENE,
715 .device = PCI_DEVICE_ID_ENE_CB714_SD_2,
716 .subvendor = PCI_ANY_ID,
717 .subdevice = PCI_ANY_ID,
718 .driver_data = (kernel_ulong_t)&sdhci_ene_714,
722 .vendor = PCI_VENDOR_ID_MARVELL,
723 .device = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
724 .subvendor = PCI_ANY_ID,
725 .subdevice = PCI_ANY_ID,
726 .driver_data = (kernel_ulong_t)&sdhci_cafe,
730 .vendor = PCI_VENDOR_ID_JMICRON,
731 .device = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
732 .subvendor = PCI_ANY_ID,
733 .subdevice = PCI_ANY_ID,
734 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
738 .vendor = PCI_VENDOR_ID_JMICRON,
739 .device = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
740 .subvendor = PCI_ANY_ID,
741 .subdevice = PCI_ANY_ID,
742 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
746 .vendor = PCI_VENDOR_ID_JMICRON,
747 .device = PCI_DEVICE_ID_JMICRON_JMB388_SD,
748 .subvendor = PCI_ANY_ID,
749 .subdevice = PCI_ANY_ID,
750 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
754 .vendor = PCI_VENDOR_ID_JMICRON,
755 .device = PCI_DEVICE_ID_JMICRON_JMB388_ESD,
756 .subvendor = PCI_ANY_ID,
757 .subdevice = PCI_ANY_ID,
758 .driver_data = (kernel_ulong_t)&sdhci_jmicron,
762 .vendor = PCI_VENDOR_ID_SYSKONNECT,
764 .subvendor = PCI_ANY_ID,
765 .subdevice = PCI_ANY_ID,
766 .driver_data = (kernel_ulong_t)&sdhci_syskt,
770 .vendor = PCI_VENDOR_ID_VIA,
772 .subvendor = PCI_ANY_ID,
773 .subdevice = PCI_ANY_ID,
774 .driver_data = (kernel_ulong_t)&sdhci_via,
778 .vendor = PCI_VENDOR_ID_INTEL,
779 .device = PCI_DEVICE_ID_INTEL_MRST_SD0,
780 .subvendor = PCI_ANY_ID,
781 .subdevice = PCI_ANY_ID,
782 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
786 .vendor = PCI_VENDOR_ID_INTEL,
787 .device = PCI_DEVICE_ID_INTEL_MRST_SD1,
788 .subvendor = PCI_ANY_ID,
789 .subdevice = PCI_ANY_ID,
790 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
794 .vendor = PCI_VENDOR_ID_INTEL,
795 .device = PCI_DEVICE_ID_INTEL_MRST_SD2,
796 .subvendor = PCI_ANY_ID,
797 .subdevice = PCI_ANY_ID,
798 .driver_data = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
802 .vendor = PCI_VENDOR_ID_INTEL,
803 .device = PCI_DEVICE_ID_INTEL_MFD_SD,
804 .subvendor = PCI_ANY_ID,
805 .subdevice = PCI_ANY_ID,
806 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sd,
810 .vendor = PCI_VENDOR_ID_INTEL,
811 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
812 .subvendor = PCI_ANY_ID,
813 .subdevice = PCI_ANY_ID,
814 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
818 .vendor = PCI_VENDOR_ID_INTEL,
819 .device = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
820 .subvendor = PCI_ANY_ID,
821 .subdevice = PCI_ANY_ID,
822 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
826 .vendor = PCI_VENDOR_ID_INTEL,
827 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
828 .subvendor = PCI_ANY_ID,
829 .subdevice = PCI_ANY_ID,
830 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
834 .vendor = PCI_VENDOR_ID_INTEL,
835 .device = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
836 .subvendor = PCI_ANY_ID,
837 .subdevice = PCI_ANY_ID,
838 .driver_data = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
842 .vendor = PCI_VENDOR_ID_INTEL,
843 .device = PCI_DEVICE_ID_INTEL_PCH_SDIO0,
844 .subvendor = PCI_ANY_ID,
845 .subdevice = PCI_ANY_ID,
846 .driver_data = (kernel_ulong_t)&sdhci_intel_pch_sdio,
850 .vendor = PCI_VENDOR_ID_INTEL,
851 .device = PCI_DEVICE_ID_INTEL_PCH_SDIO1,
852 .subvendor = PCI_ANY_ID,
853 .subdevice = PCI_ANY_ID,
854 .driver_data = (kernel_ulong_t)&sdhci_intel_pch_sdio,
858 .vendor = PCI_VENDOR_ID_O2,
859 .device = PCI_DEVICE_ID_O2_8120,
860 .subvendor = PCI_ANY_ID,
861 .subdevice = PCI_ANY_ID,
862 .driver_data = (kernel_ulong_t)&sdhci_o2,
866 .vendor = PCI_VENDOR_ID_O2,
867 .device = PCI_DEVICE_ID_O2_8220,
868 .subvendor = PCI_ANY_ID,
869 .subdevice = PCI_ANY_ID,
870 .driver_data = (kernel_ulong_t)&sdhci_o2,
874 .vendor = PCI_VENDOR_ID_O2,
875 .device = PCI_DEVICE_ID_O2_8221,
876 .subvendor = PCI_ANY_ID,
877 .subdevice = PCI_ANY_ID,
878 .driver_data = (kernel_ulong_t)&sdhci_o2,
882 .vendor = PCI_VENDOR_ID_O2,
883 .device = PCI_DEVICE_ID_O2_8320,
884 .subvendor = PCI_ANY_ID,
885 .subdevice = PCI_ANY_ID,
886 .driver_data = (kernel_ulong_t)&sdhci_o2,
890 .vendor = PCI_VENDOR_ID_O2,
891 .device = PCI_DEVICE_ID_O2_8321,
892 .subvendor = PCI_ANY_ID,
893 .subdevice = PCI_ANY_ID,
894 .driver_data = (kernel_ulong_t)&sdhci_o2,
897 { /* Generic SD host controller */
898 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
901 { /* end: all zeroes */ },
904 MODULE_DEVICE_TABLE(pci, pci_ids);
906 /*****************************************************************************\
908 * SDHCI core callbacks *
910 \*****************************************************************************/
912 static int sdhci_pci_enable_dma(struct sdhci_host *host)
914 struct sdhci_pci_slot *slot;
915 struct pci_dev *pdev;
918 slot = sdhci_priv(host);
919 pdev = slot->chip->pdev;
921 if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
922 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
923 (host->flags & SDHCI_USE_SDMA)) {
924 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
925 "doesn't fully claim to support it.\n");
928 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
932 pci_set_master(pdev);
937 static int sdhci_pci_8bit_width(struct sdhci_host *host, int width)
941 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
944 case MMC_BUS_WIDTH_8:
945 ctrl |= SDHCI_CTRL_8BITBUS;
946 ctrl &= ~SDHCI_CTRL_4BITBUS;
948 case MMC_BUS_WIDTH_4:
949 ctrl |= SDHCI_CTRL_4BITBUS;
950 ctrl &= ~SDHCI_CTRL_8BITBUS;
953 ctrl &= ~(SDHCI_CTRL_8BITBUS | SDHCI_CTRL_4BITBUS);
957 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
962 static void sdhci_pci_hw_reset(struct sdhci_host *host)
964 struct sdhci_pci_slot *slot = sdhci_priv(host);
965 int rst_n_gpio = slot->rst_n_gpio;
967 if (!gpio_is_valid(rst_n_gpio))
969 gpio_set_value_cansleep(rst_n_gpio, 0);
970 /* For eMMC, minimum is 1us but give it 10us for good measure */
972 gpio_set_value_cansleep(rst_n_gpio, 1);
973 /* For eMMC, minimum is 200us but give it 300us for good measure */
974 usleep_range(300, 1000);
977 static struct sdhci_ops sdhci_pci_ops = {
978 .enable_dma = sdhci_pci_enable_dma,
979 .platform_8bit_width = sdhci_pci_8bit_width,
980 .hw_reset = sdhci_pci_hw_reset,
983 /*****************************************************************************\
987 \*****************************************************************************/
991 static int sdhci_pci_suspend(struct device *dev)
993 struct pci_dev *pdev = to_pci_dev(dev);
994 struct sdhci_pci_chip *chip;
995 struct sdhci_pci_slot *slot;
996 mmc_pm_flag_t slot_pm_flags;
997 mmc_pm_flag_t pm_flags = 0;
1000 chip = pci_get_drvdata(pdev);
1004 for (i = 0; i < chip->num_slots; i++) {
1005 slot = chip->slots[i];
1009 ret = sdhci_suspend_host(slot->host);
1012 goto err_pci_suspend;
1014 slot_pm_flags = slot->host->mmc->pm_flags;
1015 if (slot_pm_flags & MMC_PM_WAKE_SDIO_IRQ)
1016 sdhci_enable_irq_wakeups(slot->host);
1018 pm_flags |= slot_pm_flags;
1021 if (chip->fixes && chip->fixes->suspend) {
1022 ret = chip->fixes->suspend(chip);
1024 goto err_pci_suspend;
1027 pci_save_state(pdev);
1028 if (pm_flags & MMC_PM_KEEP_POWER) {
1029 if (pm_flags & MMC_PM_WAKE_SDIO_IRQ) {
1030 pci_pme_active(pdev, true);
1031 pci_enable_wake(pdev, PCI_D3hot, 1);
1033 pci_set_power_state(pdev, PCI_D3hot);
1035 pci_enable_wake(pdev, PCI_D3hot, 0);
1036 pci_disable_device(pdev);
1037 pci_set_power_state(pdev, PCI_D3hot);
1044 sdhci_resume_host(chip->slots[i]->host);
1048 static int sdhci_pci_resume(struct device *dev)
1050 struct pci_dev *pdev = to_pci_dev(dev);
1051 struct sdhci_pci_chip *chip;
1052 struct sdhci_pci_slot *slot;
1055 chip = pci_get_drvdata(pdev);
1059 pci_set_power_state(pdev, PCI_D0);
1060 pci_restore_state(pdev);
1061 ret = pci_enable_device(pdev);
1065 if (chip->fixes && chip->fixes->resume) {
1066 ret = chip->fixes->resume(chip);
1071 for (i = 0; i < chip->num_slots; i++) {
1072 slot = chip->slots[i];
1076 ret = sdhci_resume_host(slot->host);
1084 #else /* CONFIG_PM */
1086 #define sdhci_pci_suspend NULL
1087 #define sdhci_pci_resume NULL
1089 #endif /* CONFIG_PM */
1091 #ifdef CONFIG_PM_RUNTIME
1093 static int sdhci_pci_runtime_suspend(struct device *dev)
1095 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1096 struct sdhci_pci_chip *chip;
1097 struct sdhci_pci_slot *slot;
1100 chip = pci_get_drvdata(pdev);
1104 for (i = 0; i < chip->num_slots; i++) {
1105 slot = chip->slots[i];
1109 ret = sdhci_runtime_suspend_host(slot->host);
1112 goto err_pci_runtime_suspend;
1115 if (chip->fixes && chip->fixes->suspend) {
1116 ret = chip->fixes->suspend(chip);
1118 goto err_pci_runtime_suspend;
1123 err_pci_runtime_suspend:
1125 sdhci_runtime_resume_host(chip->slots[i]->host);
1129 static int sdhci_pci_runtime_resume(struct device *dev)
1131 struct pci_dev *pdev = container_of(dev, struct pci_dev, dev);
1132 struct sdhci_pci_chip *chip;
1133 struct sdhci_pci_slot *slot;
1136 chip = pci_get_drvdata(pdev);
1140 if (chip->fixes && chip->fixes->resume) {
1141 ret = chip->fixes->resume(chip);
1146 for (i = 0; i < chip->num_slots; i++) {
1147 slot = chip->slots[i];
1151 ret = sdhci_runtime_resume_host(slot->host);
1159 static int sdhci_pci_runtime_idle(struct device *dev)
1166 #define sdhci_pci_runtime_suspend NULL
1167 #define sdhci_pci_runtime_resume NULL
1168 #define sdhci_pci_runtime_idle NULL
1172 static const struct dev_pm_ops sdhci_pci_pm_ops = {
1173 .suspend = sdhci_pci_suspend,
1174 .resume = sdhci_pci_resume,
1175 .runtime_suspend = sdhci_pci_runtime_suspend,
1176 .runtime_resume = sdhci_pci_runtime_resume,
1177 .runtime_idle = sdhci_pci_runtime_idle,
1180 /*****************************************************************************\
1182 * Device probing/removal *
1184 \*****************************************************************************/
1186 static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot(
1187 struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar,
1190 struct sdhci_pci_slot *slot;
1191 struct sdhci_host *host;
1192 int ret, bar = first_bar + slotno;
1194 if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
1195 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
1196 return ERR_PTR(-ENODEV);
1199 if (pci_resource_len(pdev, bar) != 0x100) {
1200 dev_err(&pdev->dev, "Invalid iomem size. You may "
1201 "experience problems.\n");
1204 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1205 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
1206 return ERR_PTR(-ENODEV);
1209 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1210 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
1211 return ERR_PTR(-ENODEV);
1214 host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
1216 dev_err(&pdev->dev, "cannot allocate host\n");
1217 return ERR_CAST(host);
1220 slot = sdhci_priv(host);
1224 slot->pci_bar = bar;
1225 slot->rst_n_gpio = -EINVAL;
1226 slot->cd_gpio = -EINVAL;
1228 /* Retrieve platform data if there is any */
1229 if (*sdhci_pci_get_data)
1230 slot->data = sdhci_pci_get_data(pdev, slotno);
1233 if (slot->data->setup) {
1234 ret = slot->data->setup(slot->data);
1236 dev_err(&pdev->dev, "platform setup failed\n");
1240 slot->rst_n_gpio = slot->data->rst_n_gpio;
1241 slot->cd_gpio = slot->data->cd_gpio;
1244 host->hw_name = "PCI";
1245 host->ops = &sdhci_pci_ops;
1246 host->quirks = chip->quirks;
1247 host->quirks2 = chip->quirks2;
1249 host->irq = pdev->irq;
1251 ret = pci_request_region(pdev, bar, mmc_hostname(host->mmc));
1253 dev_err(&pdev->dev, "cannot request region\n");
1257 host->ioaddr = pci_ioremap_bar(pdev, bar);
1258 if (!host->ioaddr) {
1259 dev_err(&pdev->dev, "failed to remap registers\n");
1264 if (chip->fixes && chip->fixes->probe_slot) {
1265 ret = chip->fixes->probe_slot(slot);
1270 if (gpio_is_valid(slot->rst_n_gpio)) {
1271 if (!gpio_request(slot->rst_n_gpio, "eMMC_reset")) {
1272 gpio_direction_output(slot->rst_n_gpio, 1);
1273 slot->host->mmc->caps |= MMC_CAP_HW_RESET;
1275 dev_warn(&pdev->dev, "failed to request rst_n_gpio\n");
1276 slot->rst_n_gpio = -EINVAL;
1280 host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
1282 ret = sdhci_add_host(host);
1286 sdhci_pci_add_own_cd(slot);
1291 if (gpio_is_valid(slot->rst_n_gpio))
1292 gpio_free(slot->rst_n_gpio);
1294 if (chip->fixes && chip->fixes->remove_slot)
1295 chip->fixes->remove_slot(slot, 0);
1298 iounmap(host->ioaddr);
1301 pci_release_region(pdev, bar);
1304 if (slot->data && slot->data->cleanup)
1305 slot->data->cleanup(slot->data);
1308 sdhci_free_host(host);
1310 return ERR_PTR(ret);
1313 static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
1318 sdhci_pci_remove_own_cd(slot);
1321 scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
1322 if (scratch == (u32)-1)
1325 sdhci_remove_host(slot->host, dead);
1327 if (gpio_is_valid(slot->rst_n_gpio))
1328 gpio_free(slot->rst_n_gpio);
1330 if (slot->chip->fixes && slot->chip->fixes->remove_slot)
1331 slot->chip->fixes->remove_slot(slot, dead);
1333 if (slot->data && slot->data->cleanup)
1334 slot->data->cleanup(slot->data);
1336 pci_release_region(slot->chip->pdev, slot->pci_bar);
1338 sdhci_free_host(slot->host);
1341 static void __devinit sdhci_pci_runtime_pm_allow(struct device *dev)
1343 pm_runtime_put_noidle(dev);
1344 pm_runtime_allow(dev);
1345 pm_runtime_set_autosuspend_delay(dev, 50);
1346 pm_runtime_use_autosuspend(dev);
1347 pm_suspend_ignore_children(dev, 1);
1350 static void __devexit sdhci_pci_runtime_pm_forbid(struct device *dev)
1352 pm_runtime_forbid(dev);
1353 pm_runtime_get_noresume(dev);
1356 static int __devinit sdhci_pci_probe(struct pci_dev *pdev,
1357 const struct pci_device_id *ent)
1359 struct sdhci_pci_chip *chip;
1360 struct sdhci_pci_slot *slot;
1362 u8 slots, first_bar;
1365 BUG_ON(pdev == NULL);
1366 BUG_ON(ent == NULL);
1368 dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1369 (int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
1371 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1375 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1376 dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
1380 BUG_ON(slots > MAX_SLOTS);
1382 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1386 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1388 if (first_bar > 5) {
1389 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
1393 ret = pci_enable_device(pdev);
1397 chip = kzalloc(sizeof(struct sdhci_pci_chip), GFP_KERNEL);
1404 chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data;
1406 chip->quirks = chip->fixes->quirks;
1407 chip->quirks2 = chip->fixes->quirks2;
1408 chip->allow_runtime_pm = chip->fixes->allow_runtime_pm;
1410 chip->num_slots = slots;
1412 pci_set_drvdata(pdev, chip);
1414 if (chip->fixes && chip->fixes->probe) {
1415 ret = chip->fixes->probe(chip);
1420 slots = chip->num_slots; /* Quirk may have changed this */
1422 for (i = 0; i < slots; i++) {
1423 slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i);
1425 for (i--; i >= 0; i--)
1426 sdhci_pci_remove_slot(chip->slots[i]);
1427 ret = PTR_ERR(slot);
1431 chip->slots[i] = slot;
1434 if (chip->allow_runtime_pm)
1435 sdhci_pci_runtime_pm_allow(&pdev->dev);
1440 pci_set_drvdata(pdev, NULL);
1444 pci_disable_device(pdev);
1448 static void __devexit sdhci_pci_remove(struct pci_dev *pdev)
1451 struct sdhci_pci_chip *chip;
1453 chip = pci_get_drvdata(pdev);
1456 if (chip->allow_runtime_pm)
1457 sdhci_pci_runtime_pm_forbid(&pdev->dev);
1459 for (i = 0; i < chip->num_slots; i++)
1460 sdhci_pci_remove_slot(chip->slots[i]);
1462 pci_set_drvdata(pdev, NULL);
1466 pci_disable_device(pdev);
1469 static struct pci_driver sdhci_driver = {
1470 .name = "sdhci-pci",
1471 .id_table = pci_ids,
1472 .probe = sdhci_pci_probe,
1473 .remove = __devexit_p(sdhci_pci_remove),
1475 .pm = &sdhci_pci_pm_ops
1479 /*****************************************************************************\
1481 * Driver init/exit *
1483 \*****************************************************************************/
1485 static int __init sdhci_drv_init(void)
1487 return pci_register_driver(&sdhci_driver);
1490 static void __exit sdhci_drv_exit(void)
1492 pci_unregister_driver(&sdhci_driver);
1495 module_init(sdhci_drv_init);
1496 module_exit(sdhci_drv_exit);
1498 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1499 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1500 MODULE_LICENSE("GPL");