1 /* linux/drivers/mmc/host/sdhci-s3c.c
3 * Copyright 2008 Openmoko Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
8 * SDHCI (HSMMC) support for Samsung SoC
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/delay.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/platform_device.h>
18 #include <linux/platform_data/mmc-sdhci-s3c.h>
19 #include <linux/slab.h>
20 #include <linux/clk.h>
22 #include <linux/gpio.h>
23 #include <linux/module.h>
25 #include <linux/of_gpio.h>
27 #include <linux/pm_runtime.h>
28 #include <linux/pinctrl/consumer.h>
30 #include <linux/mmc/host.h>
32 #include "sdhci-s3c-regs.h"
35 #define MAX_BUS_CLK (4)
37 /* Number of gpio's used is max data bus width + command and clock lines */
38 #define NUM_GPIOS(x) (x + 2)
41 * struct sdhci_s3c - S3C SDHCI instance
42 * @host: The SDHCI host created
43 * @pdev: The platform device we where created from.
44 * @ioarea: The resource created when we claimed the IO area.
45 * @pdata: The platform data for this controller.
46 * @cur_clk: The index of the current bus clock.
47 * @gpios: List of gpio numbers parsed from device tree.
48 * @clk_io: The clock for the internal bus interface.
49 * @clk_bus: The clocks that are available for the SD/MMC bus clock.
52 struct sdhci_host *host;
53 struct platform_device *pdev;
54 struct resource *ioarea;
55 struct s3c_sdhci_platdata *pdata;
60 struct pinctrl *pctrl;
63 struct clk *clk_bus[MAX_BUS_CLK];
67 * struct sdhci_s3c_driver_data - S3C SDHCI platform specific driver data
68 * @sdhci_quirks: sdhci host specific quirks.
70 * Specifies platform specific configuration of sdhci controller.
71 * Note: A structure for driver specific platform data is used for future
72 * expansion of its usage.
74 struct sdhci_s3c_drv_data {
75 unsigned int sdhci_quirks;
78 static inline struct sdhci_s3c *to_s3c(struct sdhci_host *host)
80 return sdhci_priv(host);
84 * get_curclk - convert ctrl2 register to clock source number
85 * @ctrl2: Control2 register value.
87 static u32 get_curclk(u32 ctrl2)
89 ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
90 ctrl2 >>= S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
95 static void sdhci_s3c_check_sclk(struct sdhci_host *host)
97 struct sdhci_s3c *ourhost = to_s3c(host);
98 u32 tmp = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
100 if (get_curclk(tmp) != ourhost->cur_clk) {
101 dev_dbg(&ourhost->pdev->dev, "restored ctrl2 clock setting\n");
103 tmp &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK;
104 tmp |= ourhost->cur_clk << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
105 writel(tmp, host->ioaddr + S3C_SDHCI_CONTROL2);
110 * sdhci_s3c_get_max_clk - callback to get maximum clock frequency.
111 * @host: The SDHCI host instance.
113 * Callback to return the maximum clock rate acheivable by the controller.
115 static unsigned int sdhci_s3c_get_max_clk(struct sdhci_host *host)
117 struct sdhci_s3c *ourhost = to_s3c(host);
119 unsigned int rate, max;
122 /* note, a reset will reset the clock source */
124 sdhci_s3c_check_sclk(host);
126 for (max = 0, clk = 0; clk < MAX_BUS_CLK; clk++) {
127 busclk = ourhost->clk_bus[clk];
131 rate = clk_get_rate(busclk);
140 * sdhci_s3c_consider_clock - consider one the bus clocks for current setting
141 * @ourhost: Our SDHCI instance.
142 * @src: The source clock index.
143 * @wanted: The clock frequency wanted.
145 static unsigned int sdhci_s3c_consider_clock(struct sdhci_s3c *ourhost,
150 struct clk *clksrc = ourhost->clk_bus[src];
157 * If controller uses a non-standard clock division, find the best clock
158 * speed possible with selected clock source and skip the division.
160 if (ourhost->host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK) {
161 rate = clk_round_rate(clksrc, wanted);
162 return wanted - rate;
165 rate = clk_get_rate(clksrc);
167 for (div = 1; div < 256; div *= 2) {
168 if ((rate / div) <= wanted)
172 dev_dbg(&ourhost->pdev->dev, "clk %d: rate %ld, want %d, got %ld\n",
173 src, rate, wanted, rate / div);
175 return wanted - (rate / div);
179 * sdhci_s3c_set_clock - callback on clock change
180 * @host: The SDHCI host being changed
181 * @clock: The clock rate being requested.
183 * When the card's clock is going to be changed, look at the new frequency
184 * and find the best clock source to go with it.
186 static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock)
188 struct sdhci_s3c *ourhost = to_s3c(host);
189 unsigned int best = UINT_MAX;
195 /* don't bother if the clock is going off. */
199 for (src = 0; src < MAX_BUS_CLK; src++) {
200 delta = sdhci_s3c_consider_clock(ourhost, src, clock);
207 dev_dbg(&ourhost->pdev->dev,
208 "selected source %d, clock %d, delta %d\n",
209 best_src, clock, best);
211 /* select the new clock source */
212 if (ourhost->cur_clk != best_src) {
213 struct clk *clk = ourhost->clk_bus[best_src];
215 clk_prepare_enable(clk);
216 clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]);
218 /* turn clock off to card before changing clock source */
219 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
221 ourhost->cur_clk = best_src;
222 host->max_clk = clk_get_rate(clk);
224 ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
225 ctrl &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK;
226 ctrl |= best_src << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
227 writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
230 /* reprogram default hardware configuration */
231 writel(S3C64XX_SDHCI_CONTROL4_DRIVE_9mA,
232 host->ioaddr + S3C64XX_SDHCI_CONTROL4);
234 ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
235 ctrl |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
236 S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
237 S3C_SDHCI_CTRL2_ENFBCLKRX |
238 S3C_SDHCI_CTRL2_DFCNT_NONE |
239 S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
240 writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
242 /* reconfigure the controller for new clock rate */
243 ctrl = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
244 if (clock < 25 * 1000000)
245 ctrl |= (S3C_SDHCI_CTRL3_FCSEL3 | S3C_SDHCI_CTRL3_FCSEL2);
246 writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL3);
250 * sdhci_s3c_get_min_clock - callback to get minimal supported clock value
251 * @host: The SDHCI host being queried
253 * To init mmc host properly a minimal clock value is needed. For high system
254 * bus clock's values the standard formula gives values out of allowed range.
255 * The clock still can be set to lower values, if clock source other then
256 * system bus is selected.
258 static unsigned int sdhci_s3c_get_min_clock(struct sdhci_host *host)
260 struct sdhci_s3c *ourhost = to_s3c(host);
261 unsigned int delta, min = UINT_MAX;
264 for (src = 0; src < MAX_BUS_CLK; src++) {
265 delta = sdhci_s3c_consider_clock(ourhost, src, 0);
266 if (delta == UINT_MAX)
268 /* delta is a negative value in this case */
275 /* sdhci_cmu_get_max_clk - callback to get maximum clock frequency.*/
276 static unsigned int sdhci_cmu_get_max_clock(struct sdhci_host *host)
278 struct sdhci_s3c *ourhost = to_s3c(host);
280 return clk_round_rate(ourhost->clk_bus[ourhost->cur_clk], UINT_MAX);
283 /* sdhci_cmu_get_min_clock - callback to get minimal supported clock value. */
284 static unsigned int sdhci_cmu_get_min_clock(struct sdhci_host *host)
286 struct sdhci_s3c *ourhost = to_s3c(host);
289 * initial clock can be in the frequency range of
290 * 100KHz-400KHz, so we set it as max value.
292 return clk_round_rate(ourhost->clk_bus[ourhost->cur_clk], 400000);
295 /* sdhci_cmu_set_clock - callback on clock change.*/
296 static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock)
298 struct sdhci_s3c *ourhost = to_s3c(host);
299 struct device *dev = &ourhost->pdev->dev;
300 unsigned long timeout;
303 /* don't bother if the clock is going off */
307 sdhci_s3c_set_clock(host, clock);
309 clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock);
313 clk = SDHCI_CLOCK_INT_EN;
314 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
318 while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
319 & SDHCI_CLOCK_INT_STABLE)) {
321 dev_err(dev, "%s: Internal clock never stabilised.\n",
322 mmc_hostname(host->mmc));
329 clk |= SDHCI_CLOCK_CARD_EN;
330 sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
334 * sdhci_s3c_platform_bus_width - support 8bit buswidth
335 * @host: The SDHCI host being queried
336 * @width: MMC_BUS_WIDTH_ macro for the bus width being requested
338 * We have 8-bit width support but is not a v3 controller.
339 * So we add platform_bus_width() and support 8bit width.
341 static int sdhci_s3c_platform_bus_width(struct sdhci_host *host, int width)
345 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
348 case MMC_BUS_WIDTH_8:
349 ctrl |= SDHCI_CTRL_8BITBUS;
350 ctrl &= ~SDHCI_CTRL_4BITBUS;
352 case MMC_BUS_WIDTH_4:
353 ctrl |= SDHCI_CTRL_4BITBUS;
354 ctrl &= ~SDHCI_CTRL_8BITBUS;
357 ctrl &= ~SDHCI_CTRL_4BITBUS;
358 ctrl &= ~SDHCI_CTRL_8BITBUS;
362 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
367 static struct sdhci_ops sdhci_s3c_ops = {
368 .get_max_clock = sdhci_s3c_get_max_clk,
369 .set_clock = sdhci_s3c_set_clock,
370 .get_min_clock = sdhci_s3c_get_min_clock,
371 .platform_bus_width = sdhci_s3c_platform_bus_width,
374 static void sdhci_s3c_notify_change(struct platform_device *dev, int state)
376 struct sdhci_host *host = platform_get_drvdata(dev);
377 #ifdef CONFIG_PM_RUNTIME
378 struct sdhci_s3c *sc = sdhci_priv(host);
383 spin_lock_irqsave(&host->lock, flags);
385 dev_dbg(&dev->dev, "card inserted.\n");
386 #ifdef CONFIG_PM_RUNTIME
387 clk_prepare_enable(sc->clk_io);
389 host->flags &= ~SDHCI_DEVICE_DEAD;
390 host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
392 dev_dbg(&dev->dev, "card removed.\n");
393 host->flags |= SDHCI_DEVICE_DEAD;
394 host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
395 #ifdef CONFIG_PM_RUNTIME
396 clk_disable_unprepare(sc->clk_io);
399 tasklet_schedule(&host->card_tasklet);
400 spin_unlock_irqrestore(&host->lock, flags);
404 static irqreturn_t sdhci_s3c_gpio_card_detect_thread(int irq, void *dev_id)
406 struct sdhci_s3c *sc = dev_id;
407 int status = gpio_get_value(sc->ext_cd_gpio);
408 if (sc->pdata->ext_cd_gpio_invert)
410 sdhci_s3c_notify_change(sc->pdev, status);
414 static void sdhci_s3c_setup_card_detect_gpio(struct sdhci_s3c *sc)
416 struct s3c_sdhci_platdata *pdata = sc->pdata;
417 struct device *dev = &sc->pdev->dev;
419 if (devm_gpio_request(dev, pdata->ext_cd_gpio, "SDHCI EXT CD") == 0) {
420 sc->ext_cd_gpio = pdata->ext_cd_gpio;
421 sc->ext_cd_irq = gpio_to_irq(pdata->ext_cd_gpio);
422 if (sc->ext_cd_irq &&
423 request_threaded_irq(sc->ext_cd_irq, NULL,
424 sdhci_s3c_gpio_card_detect_thread,
425 IRQF_TRIGGER_RISING |
426 IRQF_TRIGGER_FALLING |
428 dev_name(dev), sc) == 0) {
429 int status = gpio_get_value(sc->ext_cd_gpio);
430 if (pdata->ext_cd_gpio_invert)
432 sdhci_s3c_notify_change(sc->pdev, status);
434 dev_warn(dev, "cannot request irq for card detect\n");
438 dev_err(dev, "cannot request gpio for card detect\n");
443 static int sdhci_s3c_parse_dt(struct device *dev,
444 struct sdhci_host *host, struct s3c_sdhci_platdata *pdata)
446 struct device_node *node = dev->of_node;
447 struct sdhci_s3c *ourhost = to_s3c(host);
451 /* if the bus-width property is not specified, assume width as 1 */
452 if (of_property_read_u32(node, "bus-width", &max_width))
454 pdata->max_width = max_width;
456 ourhost->gpios = devm_kzalloc(dev, NUM_GPIOS(pdata->max_width) *
457 sizeof(int), GFP_KERNEL);
461 /* get the card detection method */
462 if (of_get_property(node, "broken-cd", NULL)) {
463 pdata->cd_type = S3C_SDHCI_CD_NONE;
467 if (of_get_property(node, "non-removable", NULL)) {
468 pdata->cd_type = S3C_SDHCI_CD_PERMANENT;
472 gpio = of_get_named_gpio(node, "cd-gpios", 0);
473 if (gpio_is_valid(gpio)) {
474 pdata->cd_type = S3C_SDHCI_CD_GPIO;
476 } else if (gpio != -ENOENT) {
477 dev_err(dev, "invalid card detect gpio specified\n");
481 gpio = of_get_named_gpio(node, "samsung,cd-pinmux-gpio", 0);
482 if (gpio_is_valid(gpio)) {
483 pdata->cd_type = S3C_SDHCI_CD_INTERNAL;
485 } else if (gpio != -ENOENT) {
486 dev_err(dev, "invalid card detect gpio specified\n");
490 /* assuming internal card detect that will be configured by pinctrl */
491 pdata->cd_type = S3C_SDHCI_CD_INTERNAL;
495 if (pdata->cd_type == S3C_SDHCI_CD_GPIO) {
496 pdata->ext_cd_gpio = gpio;
497 ourhost->ext_cd_gpio = -1;
498 if (of_get_property(node, "cd-inverted", NULL))
499 pdata->ext_cd_gpio_invert = 1;
500 } else if (pdata->cd_type == S3C_SDHCI_CD_INTERNAL) {
501 ret = devm_gpio_request(dev, gpio, "sdhci-cd");
503 dev_err(dev, "card detect gpio request failed\n");
506 ourhost->ext_cd_gpio = gpio;
510 if (!IS_ERR(ourhost->pctrl))
513 /* get the gpios for command, clock and data lines */
514 for (cnt = 0; cnt < NUM_GPIOS(pdata->max_width); cnt++) {
515 gpio = of_get_gpio(node, cnt);
516 if (!gpio_is_valid(gpio)) {
517 dev_err(dev, "invalid gpio[%d]\n", cnt);
520 ourhost->gpios[cnt] = gpio;
523 for (cnt = 0; cnt < NUM_GPIOS(pdata->max_width); cnt++) {
524 ret = devm_gpio_request(dev, ourhost->gpios[cnt], "sdhci-gpio");
526 dev_err(dev, "gpio[%d] request failed\n", cnt);
534 static int sdhci_s3c_parse_dt(struct device *dev,
535 struct sdhci_host *host, struct s3c_sdhci_platdata *pdata)
541 static const struct of_device_id sdhci_s3c_dt_match[];
543 static inline struct sdhci_s3c_drv_data *sdhci_s3c_get_driver_data(
544 struct platform_device *pdev)
547 if (pdev->dev.of_node) {
548 const struct of_device_id *match;
549 match = of_match_node(sdhci_s3c_dt_match, pdev->dev.of_node);
550 return (struct sdhci_s3c_drv_data *)match->data;
553 return (struct sdhci_s3c_drv_data *)
554 platform_get_device_id(pdev)->driver_data;
557 static int sdhci_s3c_probe(struct platform_device *pdev)
559 struct s3c_sdhci_platdata *pdata;
560 struct sdhci_s3c_drv_data *drv_data;
561 struct device *dev = &pdev->dev;
562 struct sdhci_host *host;
563 struct sdhci_s3c *sc;
564 struct resource *res;
565 int ret, irq, ptr, clks;
567 if (!pdev->dev.platform_data && !pdev->dev.of_node) {
568 dev_err(dev, "no device data specified\n");
572 irq = platform_get_irq(pdev, 0);
574 dev_err(dev, "no irq specified\n");
578 host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c));
580 dev_err(dev, "sdhci_alloc_host() failed\n");
581 return PTR_ERR(host);
583 sc = sdhci_priv(host);
585 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
588 goto err_pdata_io_clk;
591 sc->pctrl = devm_pinctrl_get_select_default(&pdev->dev);
593 if (pdev->dev.of_node) {
594 ret = sdhci_s3c_parse_dt(&pdev->dev, host, pdata);
596 goto err_pdata_io_clk;
598 memcpy(pdata, pdev->dev.platform_data, sizeof(*pdata));
599 sc->ext_cd_gpio = -1; /* invalid gpio number */
602 drv_data = sdhci_s3c_get_driver_data(pdev);
608 platform_set_drvdata(pdev, host);
610 sc->clk_io = clk_get(dev, "hsmmc");
611 if (IS_ERR(sc->clk_io)) {
612 dev_err(dev, "failed to get io clock\n");
613 ret = PTR_ERR(sc->clk_io);
614 goto err_pdata_io_clk;
617 /* enable the local io clock and keep it running for the moment. */
618 clk_prepare_enable(sc->clk_io);
620 for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
624 snprintf(name, 14, "mmc_busclk.%d", ptr);
625 clk = clk_get(dev, name);
630 sc->clk_bus[ptr] = clk;
633 * save current clock index to know which clock bus
634 * is used later in overriding functions.
638 dev_info(dev, "clock source %d: %s (%ld Hz)\n",
639 ptr, name, clk_get_rate(clk));
643 dev_err(dev, "failed to find any bus clocks\n");
648 #ifndef CONFIG_PM_RUNTIME
649 clk_prepare_enable(sc->clk_bus[sc->cur_clk]);
652 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
653 host->ioaddr = devm_ioremap_resource(&pdev->dev, res);
654 if (IS_ERR(host->ioaddr)) {
655 ret = PTR_ERR(host->ioaddr);
659 /* Ensure we have minimal gpio selected CMD/CLK/Detect */
661 pdata->cfg_gpio(pdev, pdata->max_width);
663 host->hw_name = "samsung-hsmmc";
664 host->ops = &sdhci_s3c_ops;
668 /* Setup quirks for the controller */
669 host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC;
670 host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
672 host->quirks |= drv_data->sdhci_quirks;
674 #ifndef CONFIG_MMC_SDHCI_S3C_DMA
676 /* we currently see overruns on errors, so disable the SDMA
677 * support as well. */
678 host->quirks |= SDHCI_QUIRK_BROKEN_DMA;
680 #endif /* CONFIG_MMC_SDHCI_S3C_DMA */
682 /* It seems we do not get an DATA transfer complete on non-busy
683 * transfers, not sure if this is a problem with this specific
684 * SDHCI block, or a missing configuration that needs to be set. */
685 host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ;
687 /* This host supports the Auto CMD12 */
688 host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;
690 /* Samsung SoCs need BROKEN_ADMA_ZEROLEN_DESC */
691 host->quirks |= SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC;
693 if (pdata->cd_type == S3C_SDHCI_CD_NONE ||
694 pdata->cd_type == S3C_SDHCI_CD_PERMANENT)
695 host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
697 if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT)
698 host->mmc->caps = MMC_CAP_NONREMOVABLE;
700 switch (pdata->max_width) {
702 host->mmc->caps |= MMC_CAP_8_BIT_DATA;
704 host->mmc->caps |= MMC_CAP_4_BIT_DATA;
709 host->mmc->pm_caps |= pdata->pm_caps;
711 host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR |
712 SDHCI_QUIRK_32BIT_DMA_SIZE);
714 /* HSMMC on Samsung SoCs uses SDCLK as timeout clock */
715 host->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK;
718 * If controller does not have internal clock divider,
719 * we can use overriding functions instead of default.
721 if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK) {
722 sdhci_s3c_ops.set_clock = sdhci_cmu_set_clock;
723 sdhci_s3c_ops.get_min_clock = sdhci_cmu_get_min_clock;
724 sdhci_s3c_ops.get_max_clock = sdhci_cmu_get_max_clock;
727 /* It supports additional host capabilities if needed */
728 if (pdata->host_caps)
729 host->mmc->caps |= pdata->host_caps;
731 if (pdata->host_caps2)
732 host->mmc->caps2 |= pdata->host_caps2;
734 pm_runtime_enable(&pdev->dev);
735 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
736 pm_runtime_use_autosuspend(&pdev->dev);
737 pm_suspend_ignore_children(&pdev->dev, 1);
739 ret = sdhci_add_host(host);
741 dev_err(dev, "sdhci_add_host() failed\n");
742 pm_runtime_forbid(&pdev->dev);
743 pm_runtime_get_noresume(&pdev->dev);
747 /* The following two methods of card detection might call
748 sdhci_s3c_notify_change() immediately, so they can be called
749 only after sdhci_add_host(). Setup errors are ignored. */
750 if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_init)
751 pdata->ext_cd_init(&sdhci_s3c_notify_change);
752 if (pdata->cd_type == S3C_SDHCI_CD_GPIO &&
753 gpio_is_valid(pdata->ext_cd_gpio))
754 sdhci_s3c_setup_card_detect_gpio(sc);
756 #ifdef CONFIG_PM_RUNTIME
757 if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL)
758 clk_disable_unprepare(sc->clk_io);
763 #ifndef CONFIG_PM_RUNTIME
764 clk_disable_unprepare(sc->clk_bus[sc->cur_clk]);
766 for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
767 if (sc->clk_bus[ptr]) {
768 clk_put(sc->clk_bus[ptr]);
773 clk_disable_unprepare(sc->clk_io);
777 sdhci_free_host(host);
782 static int sdhci_s3c_remove(struct platform_device *pdev)
784 struct sdhci_host *host = platform_get_drvdata(pdev);
785 struct sdhci_s3c *sc = sdhci_priv(host);
786 struct s3c_sdhci_platdata *pdata = sc->pdata;
789 if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_cleanup)
790 pdata->ext_cd_cleanup(&sdhci_s3c_notify_change);
793 free_irq(sc->ext_cd_irq, sc);
795 #ifdef CONFIG_PM_RUNTIME
796 if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL)
797 clk_prepare_enable(sc->clk_io);
799 sdhci_remove_host(host, 1);
801 pm_runtime_dont_use_autosuspend(&pdev->dev);
802 pm_runtime_disable(&pdev->dev);
804 #ifndef CONFIG_PM_RUNTIME
805 clk_disable_unprepare(sc->clk_bus[sc->cur_clk]);
807 for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
808 if (sc->clk_bus[ptr]) {
809 clk_put(sc->clk_bus[ptr]);
812 clk_disable_unprepare(sc->clk_io);
815 sdhci_free_host(host);
816 platform_set_drvdata(pdev, NULL);
821 #ifdef CONFIG_PM_SLEEP
822 static int sdhci_s3c_suspend(struct device *dev)
824 struct sdhci_host *host = dev_get_drvdata(dev);
826 return sdhci_suspend_host(host);
829 static int sdhci_s3c_resume(struct device *dev)
831 struct sdhci_host *host = dev_get_drvdata(dev);
833 return sdhci_resume_host(host);
837 #ifdef CONFIG_PM_RUNTIME
838 static int sdhci_s3c_runtime_suspend(struct device *dev)
840 struct sdhci_host *host = dev_get_drvdata(dev);
841 struct sdhci_s3c *ourhost = to_s3c(host);
842 struct clk *busclk = ourhost->clk_io;
845 ret = sdhci_runtime_suspend_host(host);
847 clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]);
848 clk_disable_unprepare(busclk);
852 static int sdhci_s3c_runtime_resume(struct device *dev)
854 struct sdhci_host *host = dev_get_drvdata(dev);
855 struct sdhci_s3c *ourhost = to_s3c(host);
856 struct clk *busclk = ourhost->clk_io;
859 clk_prepare_enable(busclk);
860 clk_prepare_enable(ourhost->clk_bus[ourhost->cur_clk]);
861 ret = sdhci_runtime_resume_host(host);
867 static const struct dev_pm_ops sdhci_s3c_pmops = {
868 SET_SYSTEM_SLEEP_PM_OPS(sdhci_s3c_suspend, sdhci_s3c_resume)
869 SET_RUNTIME_PM_OPS(sdhci_s3c_runtime_suspend, sdhci_s3c_runtime_resume,
873 #define SDHCI_S3C_PMOPS (&sdhci_s3c_pmops)
876 #define SDHCI_S3C_PMOPS NULL
879 #if defined(CONFIG_CPU_EXYNOS4210) || defined(CONFIG_SOC_EXYNOS4212)
880 static struct sdhci_s3c_drv_data exynos4_sdhci_drv_data = {
881 .sdhci_quirks = SDHCI_QUIRK_NONSTANDARD_CLOCK,
883 #define EXYNOS4_SDHCI_DRV_DATA ((kernel_ulong_t)&exynos4_sdhci_drv_data)
885 #define EXYNOS4_SDHCI_DRV_DATA ((kernel_ulong_t)NULL)
888 static struct platform_device_id sdhci_s3c_driver_ids[] = {
891 .driver_data = (kernel_ulong_t)NULL,
893 .name = "exynos4-sdhci",
894 .driver_data = EXYNOS4_SDHCI_DRV_DATA,
898 MODULE_DEVICE_TABLE(platform, sdhci_s3c_driver_ids);
901 static const struct of_device_id sdhci_s3c_dt_match[] = {
902 { .compatible = "samsung,s3c6410-sdhci", },
903 { .compatible = "samsung,exynos4210-sdhci",
904 .data = (void *)EXYNOS4_SDHCI_DRV_DATA },
907 MODULE_DEVICE_TABLE(of, sdhci_s3c_dt_match);
910 static struct platform_driver sdhci_s3c_driver = {
911 .probe = sdhci_s3c_probe,
912 .remove = sdhci_s3c_remove,
913 .id_table = sdhci_s3c_driver_ids,
915 .owner = THIS_MODULE,
917 .of_match_table = of_match_ptr(sdhci_s3c_dt_match),
918 .pm = SDHCI_S3C_PMOPS,
922 module_platform_driver(sdhci_s3c_driver);
924 MODULE_DESCRIPTION("Samsung SDHCI (HSMMC) glue");
925 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
926 MODULE_LICENSE("GPL v2");
927 MODULE_ALIAS("platform:s3c-sdhci");