2 * linux/drivers/mmc/tmio_mmc.c
4 * Copyright (C) 2004 Ian Molton
5 * Copyright (C) 2007 Ian Molton
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * Driver for the MMC / SD / SDIO cell found in:
13 * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
15 * This driver draws mainly on scattered spec sheets, Reverse engineering
16 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
17 * support). (Further 4 bit support from a later datasheet).
20 * Investigate using a workqueue for PIO transfers
23 * Better Power management
24 * Handle MMC errors better
25 * double buffer support
28 #include <linux/module.h>
29 #include <linux/irq.h>
30 #include <linux/device.h>
31 #include <linux/delay.h>
32 #include <linux/mmc/host.h>
33 #include <linux/mfd/core.h>
34 #include <linux/mfd/tmio.h>
38 static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
43 for (clock = host->mmc->f_min, clk = 0x80000080;
44 new_clock >= (clock<<1); clk >>= 1)
49 if (host->set_clk_div)
50 host->set_clk_div(host->pdev, (clk>>22) & 1);
52 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff);
55 static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
57 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
59 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
60 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
64 static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
66 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 |
67 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
69 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
73 static void reset(struct tmio_mmc_host *host)
75 /* FIXME - should we set stop clock reg here */
76 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
77 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
79 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
80 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
85 tmio_mmc_finish_request(struct tmio_mmc_host *host)
87 struct mmc_request *mrq = host->mrq;
93 mmc_request_done(host->mmc, mrq);
96 /* These are the bitmasks the tmio chip requires to implement the MMC response
97 * types. Note that R1 and R6 are the same in this scheme. */
98 #define APP_CMD 0x0040
99 #define RESP_NONE 0x0300
100 #define RESP_R1 0x0400
101 #define RESP_R1B 0x0500
102 #define RESP_R2 0x0600
103 #define RESP_R3 0x0700
104 #define DATA_PRESENT 0x0800
105 #define TRANSFER_READ 0x1000
106 #define TRANSFER_MULTI 0x2000
107 #define SECURITY_CMD 0x4000
110 tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
112 struct mmc_data *data = host->data;
115 /* Command 12 is handled by hardware */
116 if (cmd->opcode == 12 && !cmd->arg) {
117 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
121 switch (mmc_resp_type(cmd)) {
122 case MMC_RSP_NONE: c |= RESP_NONE; break;
123 case MMC_RSP_R1: c |= RESP_R1; break;
124 case MMC_RSP_R1B: c |= RESP_R1B; break;
125 case MMC_RSP_R2: c |= RESP_R2; break;
126 case MMC_RSP_R3: c |= RESP_R3; break;
128 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
134 /* FIXME - this seems to be ok comented out but the spec suggest this bit should
135 * be set when issuing app commands.
136 * if(cmd->flags & MMC_FLAG_ACMD)
141 if (data->blocks > 1) {
142 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
145 if (data->flags & MMC_DATA_READ)
149 enable_mmc_irqs(host, TMIO_MASK_CMD);
151 /* Fire off the command */
152 sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
153 sd_ctrl_write16(host, CTL_SD_CMD, c);
158 /* This chip always returns (at least?) as much data as you ask for.
159 * I'm unsure what happens if you ask for less than a block. This should be
160 * looked into to ensure that a funny length read doesnt hose the controller.
163 static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
165 struct mmc_data *data = host->data;
171 pr_debug("Spurious PIO IRQ\n");
175 buf = (unsigned short *)(tmio_mmc_kmap_atomic(host, &flags) +
178 count = host->sg_ptr->length - host->sg_off;
179 if (count > data->blksz)
182 pr_debug("count: %08x offset: %08x flags %08x\n",
183 count, host->sg_off, data->flags);
185 /* Transfer the data */
186 if (data->flags & MMC_DATA_READ)
187 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
189 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
191 host->sg_off += count;
193 tmio_mmc_kunmap_atomic(host, &flags);
195 if (host->sg_off == host->sg_ptr->length)
196 tmio_mmc_next_sg(host);
201 static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
203 struct mmc_data *data = host->data;
204 struct mmc_command *stop;
209 pr_debug("Spurious data end IRQ\n");
214 /* FIXME - return correct transfer count on errors */
216 data->bytes_xfered = data->blocks * data->blksz;
218 data->bytes_xfered = 0;
220 pr_debug("Completed data request\n");
222 /*FIXME - other drivers allow an optional stop command of any given type
223 * which we dont do, as the chip can auto generate them.
224 * Perhaps we can be smarter about when to use auto CMD12 and
225 * only issue the auto request when we know this is the desired
226 * stop command, allowing fallback to the stop command the
227 * upper layers expect. For now, we do what works.
230 if (data->flags & MMC_DATA_READ)
231 disable_mmc_irqs(host, TMIO_MASK_READOP);
233 disable_mmc_irqs(host, TMIO_MASK_WRITEOP);
236 if (stop->opcode == 12 && !stop->arg)
237 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
242 tmio_mmc_finish_request(host);
245 static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
248 struct mmc_command *cmd = host->cmd;
252 pr_debug("Spurious CMD irq\n");
258 /* This controller is sicker than the PXA one. Not only do we need to
259 * drop the top 8 bits of the first response word, we also need to
260 * modify the order of the response for short response command types.
263 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
264 cmd->resp[i] = sd_ctrl_read32(host, addr);
266 if (cmd->flags & MMC_RSP_136) {
267 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
268 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
269 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
271 } else if (cmd->flags & MMC_RSP_R3) {
272 cmd->resp[0] = cmd->resp[3];
275 if (stat & TMIO_STAT_CMDTIMEOUT)
276 cmd->error = -ETIMEDOUT;
277 else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
278 cmd->error = -EILSEQ;
280 /* If there is data to handle we enable data IRQs here, and
281 * we will ultimatley finish the request in the data_end handler.
282 * If theres no data or we encountered an error, finish now.
284 if (host->data && !cmd->error) {
285 if (host->data->flags & MMC_DATA_READ)
286 enable_mmc_irqs(host, TMIO_MASK_READOP);
288 enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
290 tmio_mmc_finish_request(host);
297 static irqreturn_t tmio_mmc_irq(int irq, void *devid)
299 struct tmio_mmc_host *host = devid;
300 unsigned int ireg, irq_mask, status;
302 pr_debug("MMC IRQ begin\n");
304 status = sd_ctrl_read32(host, CTL_STATUS);
305 irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
306 ireg = status & TMIO_MASK_IRQ & ~irq_mask;
308 pr_debug_status(status);
309 pr_debug_status(ireg);
312 disable_mmc_irqs(host, status & ~irq_mask);
314 pr_debug("tmio_mmc: Spurious irq, disabling! "
315 "0x%08x 0x%08x 0x%08x\n", status, irq_mask, ireg);
316 pr_debug_status(status);
322 /* Card insert / remove attempts */
323 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
324 ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
325 TMIO_STAT_CARD_REMOVE);
326 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
329 /* CRC and other errors */
330 /* if (ireg & TMIO_STAT_ERR_IRQ)
331 * handled |= tmio_error_irq(host, irq, stat);
334 /* Command completion */
335 if (ireg & TMIO_MASK_CMD) {
336 ack_mmc_irqs(host, TMIO_MASK_CMD);
337 tmio_mmc_cmd_irq(host, status);
341 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
342 ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
343 tmio_mmc_pio_irq(host);
346 /* Data transfer completion */
347 if (ireg & TMIO_STAT_DATAEND) {
348 ack_mmc_irqs(host, TMIO_STAT_DATAEND);
349 tmio_mmc_data_irq(host);
352 /* Check status - keep going until we've handled it all */
353 status = sd_ctrl_read32(host, CTL_STATUS);
354 irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
355 ireg = status & TMIO_MASK_IRQ & ~irq_mask;
357 pr_debug("Status at end of loop: %08x\n", status);
358 pr_debug_status(status);
360 pr_debug("MMC IRQ end\n");
366 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
367 struct mmc_data *data)
369 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
370 data->blksz, data->blocks);
372 /* Hardware cannot perform 1 and 2 byte requests in 4 bit mode */
373 if (data->blksz < 4 && host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
374 printk(KERN_ERR "%s: %d byte block unsupported in 4 bit mode\n",
375 mmc_hostname(host->mmc), data->blksz);
379 tmio_mmc_init_sg(host, data);
382 /* Set transfer length / blocksize */
383 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
384 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
389 /* Process requests from the MMC layer */
390 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
392 struct tmio_mmc_host *host = mmc_priv(mmc);
396 pr_debug("request not null\n");
401 ret = tmio_mmc_start_data(host, mrq->data);
406 ret = tmio_mmc_start_command(host, mrq->cmd);
412 mrq->cmd->error = ret;
413 mmc_request_done(mmc, mrq);
416 /* Set MMC clock / power.
417 * Note: This controller uses a simple divider scheme therefore it cannot
418 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
419 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
422 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
424 struct tmio_mmc_host *host = mmc_priv(mmc);
427 tmio_mmc_set_clock(host, ios->clock);
429 /* Power sequence - OFF -> ON -> UP */
430 switch (ios->power_mode) {
431 case MMC_POWER_OFF: /* power down SD bus */
433 host->set_pwr(host->pdev, 0);
434 tmio_mmc_clk_stop(host);
436 case MMC_POWER_ON: /* power up SD bus */
438 host->set_pwr(host->pdev, 1);
440 case MMC_POWER_UP: /* start bus clock */
441 tmio_mmc_clk_start(host);
445 switch (ios->bus_width) {
446 case MMC_BUS_WIDTH_1:
447 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
449 case MMC_BUS_WIDTH_4:
450 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
454 /* Let things settle. delay taken from winCE driver */
458 static int tmio_mmc_get_ro(struct mmc_host *mmc)
460 struct tmio_mmc_host *host = mmc_priv(mmc);
462 return (sd_ctrl_read16(host, CTL_STATUS) & TMIO_STAT_WRPROTECT) ? 0 : 1;
465 static struct mmc_host_ops tmio_mmc_ops = {
466 .request = tmio_mmc_request,
467 .set_ios = tmio_mmc_set_ios,
468 .get_ro = tmio_mmc_get_ro,
472 static int tmio_mmc_suspend(struct platform_device *dev, pm_message_t state)
474 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
475 struct mmc_host *mmc = platform_get_drvdata(dev);
478 ret = mmc_suspend_host(mmc, state);
480 /* Tell MFD core it can disable us now.*/
481 if (!ret && cell->disable)
487 static int tmio_mmc_resume(struct platform_device *dev)
489 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
490 struct mmc_host *mmc = platform_get_drvdata(dev);
493 /* Tell the MFD core we are ready to be enabled */
495 ret = cell->resume(dev);
500 mmc_resume_host(mmc);
506 #define tmio_mmc_suspend NULL
507 #define tmio_mmc_resume NULL
510 static int __devinit tmio_mmc_probe(struct platform_device *dev)
512 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
513 struct tmio_mmc_data *pdata;
514 struct resource *res_ctl;
515 struct tmio_mmc_host *host;
516 struct mmc_host *mmc;
519 if (dev->num_resources != 2)
522 res_ctl = platform_get_resource(dev, IORESOURCE_MEM, 0);
526 pdata = cell->driver_data;
527 if (!pdata || !pdata->hclk)
532 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &dev->dev);
536 host = mmc_priv(mmc);
539 platform_set_drvdata(dev, mmc);
541 host->set_pwr = pdata->set_pwr;
542 host->set_clk_div = pdata->set_clk_div;
544 /* SD control register space size is 0x200, 0x400 for bus_shift=1 */
545 host->bus_shift = resource_size(res_ctl) >> 10;
547 host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
551 mmc->ops = &tmio_mmc_ops;
552 mmc->caps = MMC_CAP_4_BIT_DATA;
553 mmc->caps |= pdata->capabilities;
554 mmc->f_max = pdata->hclk;
555 mmc->f_min = mmc->f_max / 512;
556 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
558 /* Tell the MFD core we are ready to be enabled */
560 ret = cell->enable(dev);
565 tmio_mmc_clk_stop(host);
568 ret = platform_get_irq(dev, 0);
574 disable_mmc_irqs(host, TMIO_MASK_ALL);
576 ret = request_irq(host->irq, tmio_mmc_irq, IRQF_DISABLED |
577 IRQF_TRIGGER_FALLING, dev_name(&dev->dev), host);
583 printk(KERN_INFO "%s at 0x%08lx irq %d\n", mmc_hostname(host->mmc),
584 (unsigned long)host->ctl, host->irq);
586 /* Unmask the IRQs we want to know about */
587 enable_mmc_irqs(host, TMIO_MASK_IRQ);
602 static int __devexit tmio_mmc_remove(struct platform_device *dev)
604 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
605 struct mmc_host *mmc = platform_get_drvdata(dev);
607 platform_set_drvdata(dev, NULL);
610 struct tmio_mmc_host *host = mmc_priv(mmc);
611 mmc_remove_host(mmc);
612 free_irq(host->irq, host);
622 /* ------------------- device registration ----------------------- */
624 static struct platform_driver tmio_mmc_driver = {
627 .owner = THIS_MODULE,
629 .probe = tmio_mmc_probe,
630 .remove = __devexit_p(tmio_mmc_remove),
631 .suspend = tmio_mmc_suspend,
632 .resume = tmio_mmc_resume,
636 static int __init tmio_mmc_init(void)
638 return platform_driver_register(&tmio_mmc_driver);
641 static void __exit tmio_mmc_exit(void)
643 platform_driver_unregister(&tmio_mmc_driver);
646 module_init(tmio_mmc_init);
647 module_exit(tmio_mmc_exit);
649 MODULE_DESCRIPTION("Toshiba TMIO SD/MMC driver");
650 MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
651 MODULE_LICENSE("GPL v2");
652 MODULE_ALIAS("platform:tmio-mmc");