2 * linux/drivers/mmc/tmio_mmc.c
4 * Copyright (C) 2004 Ian Molton
5 * Copyright (C) 2007 Ian Molton
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * Driver for the MMC / SD / SDIO cell found in:
13 * TC6393XB TC6391XB TC6387XB T7L66XB
15 * This driver draws mainly on scattered spec sheets, Reverse engineering
16 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
17 * support). (Further 4 bit support from a later datasheet).
20 * Investigate using a workqueue for PIO transfers
23 * Better Power management
24 * Handle MMC errors better
25 * double buffer support
28 #include <linux/module.h>
29 #include <linux/irq.h>
30 #include <linux/device.h>
31 #include <linux/delay.h>
32 #include <linux/mmc/host.h>
33 #include <linux/mfd/core.h>
34 #include <linux/mfd/tmio.h>
38 static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
40 u32 clk = 0, clock, f_min = host->mmc->f_min;
43 for (clock = f_min, clk = 0x100; new_clock >= (clock<<1); ) {
51 sd_config_write8(host, CNF_SD_CLK_MODE, (clk & 0x8000) ? 0 : 1);
55 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk);
58 static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
60 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
62 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
63 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
67 static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
69 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 |
70 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
72 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
76 static void reset(struct tmio_mmc_host *host)
78 /* FIXME - should we set stop clock reg here */
79 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
80 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
82 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
83 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
88 tmio_mmc_finish_request(struct tmio_mmc_host *host)
90 struct mmc_request *mrq = host->mrq;
96 mmc_request_done(host->mmc, mrq);
99 /* These are the bitmasks the tmio chip requires to implement the MMC response
100 * types. Note that R1 and R6 are the same in this scheme. */
101 #define APP_CMD 0x0040
102 #define RESP_NONE 0x0300
103 #define RESP_R1 0x0400
104 #define RESP_R1B 0x0500
105 #define RESP_R2 0x0600
106 #define RESP_R3 0x0700
107 #define DATA_PRESENT 0x0800
108 #define TRANSFER_READ 0x1000
109 #define TRANSFER_MULTI 0x2000
110 #define SECURITY_CMD 0x4000
113 tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
115 struct mmc_data *data = host->data;
118 /* Command 12 is handled by hardware */
119 if (cmd->opcode == 12 && !cmd->arg) {
120 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
124 switch (mmc_resp_type(cmd)) {
125 case MMC_RSP_NONE: c |= RESP_NONE; break;
126 case MMC_RSP_R1: c |= RESP_R1; break;
127 case MMC_RSP_R1B: c |= RESP_R1B; break;
128 case MMC_RSP_R2: c |= RESP_R2; break;
129 case MMC_RSP_R3: c |= RESP_R3; break;
131 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
137 /* FIXME - this seems to be ok comented out but the spec suggest this bit should
138 * be set when issuing app commands.
139 * if(cmd->flags & MMC_FLAG_ACMD)
144 if (data->blocks > 1) {
145 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
148 if (data->flags & MMC_DATA_READ)
152 enable_mmc_irqs(host, TMIO_MASK_CMD);
154 /* Fire off the command */
155 sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
156 sd_ctrl_write16(host, CTL_SD_CMD, c);
161 /* This chip always returns (at least?) as much data as you ask for.
162 * I'm unsure what happens if you ask for less than a block. This should be
163 * looked into to ensure that a funny length read doesnt hose the controller.
166 static inline void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
168 struct mmc_data *data = host->data;
174 pr_debug("Spurious PIO IRQ\n");
178 buf = (unsigned short *)(tmio_mmc_kmap_atomic(host, &flags) +
181 count = host->sg_ptr->length - host->sg_off;
182 if (count > data->blksz)
185 pr_debug("count: %08x offset: %08x flags %08x\n",
186 count, host->sg_off, data->flags);
188 /* Transfer the data */
189 if (data->flags & MMC_DATA_READ)
190 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
192 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
194 host->sg_off += count;
196 tmio_mmc_kunmap_atomic(host, &flags);
198 if (host->sg_off == host->sg_ptr->length)
199 tmio_mmc_next_sg(host);
204 static inline void tmio_mmc_data_irq(struct tmio_mmc_host *host)
206 struct mmc_data *data = host->data;
207 struct mmc_command *stop;
212 pr_debug("Spurious data end IRQ\n");
217 /* FIXME - return correct transfer count on errors */
219 data->bytes_xfered = data->blocks * data->blksz;
221 data->bytes_xfered = 0;
223 pr_debug("Completed data request\n");
225 /*FIXME - other drivers allow an optional stop command of any given type
226 * which we dont do, as the chip can auto generate them.
227 * Perhaps we can be smarter about when to use auto CMD12 and
228 * only issue the auto request when we know this is the desired
229 * stop command, allowing fallback to the stop command the
230 * upper layers expect. For now, we do what works.
233 if (data->flags & MMC_DATA_READ)
234 disable_mmc_irqs(host, TMIO_MASK_READOP);
236 disable_mmc_irqs(host, TMIO_MASK_WRITEOP);
239 if (stop->opcode == 12 && !stop->arg)
240 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
245 tmio_mmc_finish_request(host);
248 static inline void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
251 struct mmc_command *cmd = host->cmd;
255 pr_debug("Spurious CMD irq\n");
261 /* This controller is sicker than the PXA one. Not only do we need to
262 * drop the top 8 bits of the first response word, we also need to
263 * modify the order of the response for short response command types.
266 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
267 cmd->resp[i] = sd_ctrl_read32(host, addr);
269 if (cmd->flags & MMC_RSP_136) {
270 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
271 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
272 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
274 } else if (cmd->flags & MMC_RSP_R3) {
275 cmd->resp[0] = cmd->resp[3];
278 if (stat & TMIO_STAT_CMDTIMEOUT)
279 cmd->error = -ETIMEDOUT;
280 else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
281 cmd->error = -EILSEQ;
283 /* If there is data to handle we enable data IRQs here, and
284 * we will ultimatley finish the request in the data_end handler.
285 * If theres no data or we encountered an error, finish now.
287 if (host->data && !cmd->error) {
288 if (host->data->flags & MMC_DATA_READ)
289 enable_mmc_irqs(host, TMIO_MASK_READOP);
291 enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
293 tmio_mmc_finish_request(host);
300 static irqreturn_t tmio_mmc_irq(int irq, void *devid)
302 struct tmio_mmc_host *host = devid;
303 unsigned int ireg, irq_mask, status;
305 pr_debug("MMC IRQ begin\n");
307 status = sd_ctrl_read32(host, CTL_STATUS);
308 irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
309 ireg = status & TMIO_MASK_IRQ & ~irq_mask;
311 pr_debug_status(status);
312 pr_debug_status(ireg);
315 disable_mmc_irqs(host, status & ~irq_mask);
317 pr_debug("tmio_mmc: Spurious irq, disabling! "
318 "0x%08x 0x%08x 0x%08x\n", status, irq_mask, ireg);
319 pr_debug_status(status);
325 /* Card insert / remove attempts */
326 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
327 ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
328 TMIO_STAT_CARD_REMOVE);
329 mmc_detect_change(host->mmc, 0);
332 /* CRC and other errors */
333 /* if (ireg & TMIO_STAT_ERR_IRQ)
334 * handled |= tmio_error_irq(host, irq, stat);
337 /* Command completion */
338 if (ireg & TMIO_MASK_CMD) {
339 ack_mmc_irqs(host, TMIO_MASK_CMD);
340 tmio_mmc_cmd_irq(host, status);
344 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
345 ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
346 tmio_mmc_pio_irq(host);
349 /* Data transfer completion */
350 if (ireg & TMIO_STAT_DATAEND) {
351 ack_mmc_irqs(host, TMIO_STAT_DATAEND);
352 tmio_mmc_data_irq(host);
355 /* Check status - keep going until we've handled it all */
356 status = sd_ctrl_read32(host, CTL_STATUS);
357 irq_mask = sd_ctrl_read32(host, CTL_IRQ_MASK);
358 ireg = status & TMIO_MASK_IRQ & ~irq_mask;
360 pr_debug("Status at end of loop: %08x\n", status);
361 pr_debug_status(status);
363 pr_debug("MMC IRQ end\n");
369 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
370 struct mmc_data *data)
372 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
373 data->blksz, data->blocks);
375 /* Hardware cannot perform 1 and 2 byte requests in 4 bit mode */
376 if (data->blksz < 4 && host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
377 printk(KERN_ERR "%s: %d byte block unsupported in 4 bit mode\n",
378 mmc_hostname(host->mmc), data->blksz);
382 tmio_mmc_init_sg(host, data);
385 /* Set transfer length / blocksize */
386 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
387 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
392 /* Process requests from the MMC layer */
393 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
395 struct tmio_mmc_host *host = mmc_priv(mmc);
399 pr_debug("request not null\n");
404 ret = tmio_mmc_start_data(host, mrq->data);
409 ret = tmio_mmc_start_command(host, mrq->cmd);
415 mrq->cmd->error = ret;
416 mmc_request_done(mmc, mrq);
419 /* Set MMC clock / power.
420 * Note: This controller uses a simple divider scheme therefore it cannot
421 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
422 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
425 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
427 struct tmio_mmc_host *host = mmc_priv(mmc);
430 tmio_mmc_set_clock(host, ios->clock);
432 /* Power sequence - OFF -> ON -> UP */
433 switch (ios->power_mode) {
434 case MMC_POWER_OFF: /* power down SD bus */
435 sd_config_write8(host, CNF_PWR_CTL_2, 0x00);
436 tmio_mmc_clk_stop(host);
438 case MMC_POWER_ON: /* power up SD bus */
440 sd_config_write8(host, CNF_PWR_CTL_2, 0x02);
442 case MMC_POWER_UP: /* start bus clock */
443 tmio_mmc_clk_start(host);
447 switch (ios->bus_width) {
448 case MMC_BUS_WIDTH_1:
449 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
451 case MMC_BUS_WIDTH_4:
452 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
456 /* Let things settle. delay taken from winCE driver */
460 static int tmio_mmc_get_ro(struct mmc_host *mmc)
462 struct tmio_mmc_host *host = mmc_priv(mmc);
464 return (sd_ctrl_read16(host, CTL_STATUS) & TMIO_STAT_WRPROTECT) ? 0 : 1;
467 static struct mmc_host_ops tmio_mmc_ops = {
468 .request = tmio_mmc_request,
469 .set_ios = tmio_mmc_set_ios,
470 .get_ro = tmio_mmc_get_ro,
474 static int tmio_mmc_suspend(struct platform_device *dev, pm_message_t state)
476 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
477 struct mmc_host *mmc = platform_get_drvdata(dev);
480 ret = mmc_suspend_host(mmc, state);
482 /* Tell MFD core it can disable us now.*/
483 if (!ret && cell->disable)
489 static int tmio_mmc_resume(struct platform_device *dev)
491 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
492 struct mmc_host *mmc = platform_get_drvdata(dev);
493 struct tmio_mmc_host *host = mmc_priv(mmc);
496 /* Tell the MFD core we are ready to be enabled */
498 ret = cell->enable(dev);
503 /* Enable the MMC/SD Control registers */
504 sd_config_write16(host, CNF_CMD, SDCREN);
505 sd_config_write32(host, CNF_CTL_BASE,
506 (dev->resource[0].start >> host->bus_shift) & 0xfffe);
508 mmc_resume_host(mmc);
514 #define tmio_mmc_suspend NULL
515 #define tmio_mmc_resume NULL
518 static int __devinit tmio_mmc_probe(struct platform_device *dev)
520 struct mfd_cell *cell = (struct mfd_cell *)dev->dev.platform_data;
521 struct tmio_mmc_data *pdata;
522 struct resource *res_ctl, *res_cnf;
523 struct tmio_mmc_host *host;
524 struct mmc_host *mmc;
527 if (dev->num_resources != 3)
530 res_ctl = platform_get_resource(dev, IORESOURCE_MEM, 0);
531 res_cnf = platform_get_resource(dev, IORESOURCE_MEM, 1);
532 if (!res_ctl || !res_cnf)
535 pdata = cell->driver_data;
536 if (!pdata || !pdata->hclk)
541 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &dev->dev);
545 host = mmc_priv(mmc);
547 platform_set_drvdata(dev, mmc);
549 /* SD control register space size is 0x200, 0x400 for bus_shift=1 */
550 host->bus_shift = resource_size(res_ctl) >> 10;
552 host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
556 host->cnf = ioremap(res_cnf->start, resource_size(res_cnf));
560 mmc->ops = &tmio_mmc_ops;
561 mmc->caps = MMC_CAP_4_BIT_DATA;
562 mmc->f_max = pdata->hclk;
563 mmc->f_min = mmc->f_max / 512;
564 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
566 /* Tell the MFD core we are ready to be enabled */
568 ret = cell->enable(dev);
573 /* Enable the MMC/SD Control registers */
574 sd_config_write16(host, CNF_CMD, SDCREN);
575 sd_config_write32(host, CNF_CTL_BASE,
576 (dev->resource[0].start >> host->bus_shift) & 0xfffe);
578 /* Disable SD power during suspend */
579 sd_config_write8(host, CNF_PWR_CTL_3, 0x01);
581 /* The below is required but why? FIXME */
582 sd_config_write8(host, CNF_STOP_CLK_CTL, 0x1f);
584 /* Power down SD bus*/
585 sd_config_write8(host, CNF_PWR_CTL_2, 0x00);
587 tmio_mmc_clk_stop(host);
590 ret = platform_get_irq(dev, 0);
596 disable_mmc_irqs(host, TMIO_MASK_ALL);
598 ret = request_irq(host->irq, tmio_mmc_irq, IRQF_DISABLED |
599 IRQF_TRIGGER_FALLING, "tmio-mmc", host);
605 printk(KERN_INFO "%s at 0x%08lx irq %d\n", mmc_hostname(host->mmc),
606 (unsigned long)host->ctl, host->irq);
608 /* Unmask the IRQs we want to know about */
609 enable_mmc_irqs(host, TMIO_MASK_IRQ);
623 static int __devexit tmio_mmc_remove(struct platform_device *dev)
625 struct mmc_host *mmc = platform_get_drvdata(dev);
627 platform_set_drvdata(dev, NULL);
630 struct tmio_mmc_host *host = mmc_priv(mmc);
631 mmc_remove_host(mmc);
632 free_irq(host->irq, host);
641 /* ------------------- device registration ----------------------- */
643 static struct platform_driver tmio_mmc_driver = {
646 .owner = THIS_MODULE,
648 .probe = tmio_mmc_probe,
649 .remove = __devexit_p(tmio_mmc_remove),
650 .suspend = tmio_mmc_suspend,
651 .resume = tmio_mmc_resume,
655 static int __init tmio_mmc_init(void)
657 return platform_driver_register(&tmio_mmc_driver);
660 static void __exit tmio_mmc_exit(void)
662 platform_driver_unregister(&tmio_mmc_driver);
665 module_init(tmio_mmc_init);
666 module_exit(tmio_mmc_exit);
668 MODULE_DESCRIPTION("Toshiba TMIO SD/MMC driver");
669 MODULE_AUTHOR("Ian Molton <spyro@f2s.com>");
670 MODULE_LICENSE("GPL v2");
671 MODULE_ALIAS("platform:tmio-mmc");