2 * linux/drivers/mmc/host/tmio_mmc.h
4 * Copyright (C) 2016 Sang Engineering, Wolfram Sang
5 * Copyright (C) 2015-16 Renesas Electronics Corporation
6 * Copyright (C) 2007 Ian Molton
7 * Copyright (C) 2004 Ian Molton
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * Driver for the MMC / SD / SDIO cell found in:
15 * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
21 #include <linux/dmaengine.h>
22 #include <linux/highmem.h>
23 #include <linux/mutex.h>
24 #include <linux/pagemap.h>
25 #include <linux/scatterlist.h>
26 #include <linux/spinlock.h>
27 #include <linux/interrupt.h>
29 #define CTL_SD_CMD 0x00
30 #define CTL_ARG_REG 0x04
31 #define CTL_STOP_INTERNAL_ACTION 0x08
32 #define CTL_XFER_BLK_COUNT 0xa
33 #define CTL_RESPONSE 0x0c
34 /* driver merges STATUS and following STATUS2 */
35 #define CTL_STATUS 0x1c
36 /* driver merges IRQ_MASK and following IRQ_MASK2 */
37 #define CTL_IRQ_MASK 0x20
38 #define CTL_SD_CARD_CLK_CTL 0x24
39 #define CTL_SD_XFER_LEN 0x26
40 #define CTL_SD_MEM_CARD_OPT 0x28
41 #define CTL_SD_ERROR_DETAIL_STATUS 0x2c
42 #define CTL_SD_DATA_PORT 0x30
43 #define CTL_TRANSACTION_CTL 0x34
44 #define CTL_SDIO_STATUS 0x36
45 #define CTL_SDIO_IRQ_MASK 0x38
46 #define CTL_DMA_ENABLE 0xd8
47 #define CTL_RESET_SD 0xe0
48 #define CTL_VERSION 0xe2
49 #define CTL_SDIO_REGS 0x100
50 #define CTL_CLK_AND_WAIT_CTL 0x138
51 #define CTL_RESET_SDIO 0x1e0
53 /* Definitions for values the CTRL_STATUS register can take. */
54 #define TMIO_STAT_CMDRESPEND BIT(0)
55 #define TMIO_STAT_DATAEND BIT(2)
56 #define TMIO_STAT_CARD_REMOVE BIT(3)
57 #define TMIO_STAT_CARD_INSERT BIT(4)
58 #define TMIO_STAT_SIGSTATE BIT(5)
59 #define TMIO_STAT_WRPROTECT BIT(7)
60 #define TMIO_STAT_CARD_REMOVE_A BIT(8)
61 #define TMIO_STAT_CARD_INSERT_A BIT(9)
62 #define TMIO_STAT_SIGSTATE_A BIT(10)
64 /* These belong technically to CTRL_STATUS2, but the driver merges them */
65 #define TMIO_STAT_CMD_IDX_ERR BIT(16)
66 #define TMIO_STAT_CRCFAIL BIT(17)
67 #define TMIO_STAT_STOPBIT_ERR BIT(18)
68 #define TMIO_STAT_DATATIMEOUT BIT(19)
69 #define TMIO_STAT_RXOVERFLOW BIT(20)
70 #define TMIO_STAT_TXUNDERRUN BIT(21)
71 #define TMIO_STAT_CMDTIMEOUT BIT(22)
72 #define TMIO_STAT_DAT0 BIT(23) /* only known on R-Car so far */
73 #define TMIO_STAT_RXRDY BIT(24)
74 #define TMIO_STAT_TXRQ BIT(25)
75 #define TMIO_STAT_ILL_FUNC BIT(29) /* only when !TMIO_MMC_HAS_IDLE_WAIT */
76 #define TMIO_STAT_SCLKDIVEN BIT(29) /* only when TMIO_MMC_HAS_IDLE_WAIT */
77 #define TMIO_STAT_CMD_BUSY BIT(30)
78 #define TMIO_STAT_ILL_ACCESS BIT(31)
80 #define CLK_CTL_DIV_MASK 0xff
81 #define CLK_CTL_SCLKEN BIT(8)
83 #define CARD_OPT_WIDTH8 BIT(13)
84 #define CARD_OPT_WIDTH BIT(15)
86 #define TMIO_BBS 512 /* Boot block size */
88 /* Definitions for values the CTRL_SDIO_STATUS register can take. */
89 #define TMIO_SDIO_STAT_IOIRQ 0x0001
90 #define TMIO_SDIO_STAT_EXPUB52 0x4000
91 #define TMIO_SDIO_STAT_EXWT 0x8000
92 #define TMIO_SDIO_MASK_ALL 0xc007
94 #define TMIO_SDIO_SETBITS_MASK 0x0006
96 /* Define some IRQ masks */
97 /* This is the mask used at reset by the chip */
98 #define TMIO_MASK_ALL 0x837f031d
99 #define TMIO_MASK_READOP (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND)
100 #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND)
101 #define TMIO_MASK_CMD (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \
102 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
103 #define TMIO_MASK_IRQ (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
105 struct tmio_mmc_data;
106 struct tmio_mmc_host;
108 struct tmio_mmc_dma {
109 enum dma_slave_buswidth dma_buswidth;
110 bool (*filter)(struct dma_chan *chan, void *arg);
111 void (*enable)(struct tmio_mmc_host *host, bool enable);
114 struct tmio_mmc_host {
116 struct mmc_command *cmd;
117 struct mmc_request *mrq;
118 struct mmc_data *data;
119 struct mmc_host *mmc;
121 /* Callbacks for clock / power control */
122 void (*set_pwr)(struct platform_device *host, int state);
123 void (*set_clk_div)(struct platform_device *host, int state);
125 /* pio related stuff */
126 struct scatterlist *sg_ptr;
127 struct scatterlist *sg_orig;
130 unsigned long bus_shift;
132 struct platform_device *pdev;
133 struct tmio_mmc_data *pdata;
134 struct tmio_mmc_dma *dma;
138 struct dma_chan *chan_rx;
139 struct dma_chan *chan_tx;
140 struct tasklet_struct dma_complete;
141 struct tasklet_struct dma_issue;
142 struct scatterlist bounce_sg;
145 /* Track lost interrupts */
146 struct delayed_work delayed_reset_work;
147 struct work_struct done;
152 unsigned int clk_cache;
154 spinlock_t lock; /* protect host private data */
155 unsigned long last_req_ts;
156 struct mutex ios_lock; /* protect set_ios() context */
158 bool sdio_irq_enabled;
161 /* Mandatory callback */
162 int (*clk_enable)(struct tmio_mmc_host *host);
164 /* Optional callbacks */
165 unsigned int (*clk_update)(struct tmio_mmc_host *host,
166 unsigned int new_clock);
167 void (*clk_disable)(struct tmio_mmc_host *host);
168 int (*multi_io_quirk)(struct mmc_card *card,
169 unsigned int direction, int blk_size);
170 int (*card_busy)(struct mmc_host *mmc);
171 int (*start_signal_voltage_switch)(struct mmc_host *mmc,
172 struct mmc_ios *ios);
173 int (*write16_hook)(struct tmio_mmc_host *host, int addr);
174 void (*hw_reset)(struct tmio_mmc_host *host);
175 void (*prepare_tuning)(struct tmio_mmc_host *host, unsigned long tap);
176 bool (*check_scc_error)(struct tmio_mmc_host *host);
179 * Mandatory callback for tuning to occur which is optional for SDR50
180 * and mandatory for SDR104.
182 unsigned int (*init_tuning)(struct tmio_mmc_host *host);
183 int (*select_tuning)(struct tmio_mmc_host *host);
185 /* Tuning values: 1 for success, 0 for failure */
186 DECLARE_BITMAP(taps, BITS_PER_BYTE * sizeof(long));
187 unsigned int tap_num;
190 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev);
191 void tmio_mmc_host_free(struct tmio_mmc_host *host);
192 int tmio_mmc_host_probe(struct tmio_mmc_host *host,
193 struct tmio_mmc_data *pdata);
194 void tmio_mmc_host_remove(struct tmio_mmc_host *host);
195 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host);
197 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
198 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
199 irqreturn_t tmio_mmc_irq(int irq, void *devid);
201 static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg,
202 unsigned long *flags)
204 local_irq_save(*flags);
205 return kmap_atomic(sg_page(sg)) + sg->offset;
208 static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg,
209 unsigned long *flags, void *virt)
211 kunmap_atomic(virt - sg->offset);
212 local_irq_restore(*flags);
215 #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE)
216 void tmio_mmc_start_dma(struct tmio_mmc_host *host, struct mmc_data *data);
217 void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable);
218 void tmio_mmc_request_dma(struct tmio_mmc_host *host, struct tmio_mmc_data *pdata);
219 void tmio_mmc_release_dma(struct tmio_mmc_host *host);
220 void tmio_mmc_abort_dma(struct tmio_mmc_host *host);
222 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
223 struct mmc_data *data)
227 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
231 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
232 struct tmio_mmc_data *pdata)
234 host->chan_tx = NULL;
235 host->chan_rx = NULL;
238 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
242 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
248 int tmio_mmc_host_runtime_suspend(struct device *dev);
249 int tmio_mmc_host_runtime_resume(struct device *dev);
252 static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
254 return readw(host->ctl + (addr << host->bus_shift));
257 static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
260 readsw(host->ctl + (addr << host->bus_shift), buf, count);
263 static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host, int addr)
265 return readw(host->ctl + (addr << host->bus_shift)) |
266 readw(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
269 static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr,
272 readsl(host->ctl + (addr << host->bus_shift), buf, count);
275 static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr, u16 val)
277 /* If there is a hook and it returns non-zero then there
278 * is an error and the write should be skipped
280 if (host->write16_hook && host->write16_hook(host, addr))
282 writew(val, host->ctl + (addr << host->bus_shift));
285 static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
288 writesw(host->ctl + (addr << host->bus_shift), buf, count);
291 static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host, int addr, u32 val)
293 writew(val & 0xffff, host->ctl + (addr << host->bus_shift));
294 writew(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
297 static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr,
298 const u32 *buf, int count)
300 writesl(host->ctl + (addr << host->bus_shift), buf, count);