2 * linux/drivers/mmc/host/tmio_mmc_pio.c
4 * Copyright (C) 2016 Sang Engineering, Wolfram Sang
5 * Copyright (C) 2015-16 Renesas Electronics Corporation
6 * Copyright (C) 2011 Guennadi Liakhovetski
7 * Copyright (C) 2007 Ian Molton
8 * Copyright (C) 2004 Ian Molton
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * Driver for the MMC / SD / SDIO IP found in:
16 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
18 * This driver draws mainly on scattered spec sheets, Reverse engineering
19 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
20 * support). (Further 4 bit support from a later datasheet).
23 * Investigate using a workqueue for PIO transfers
25 * Better Power management
26 * Handle MMC errors better
27 * double buffer support
31 #include <linux/delay.h>
32 #include <linux/device.h>
33 #include <linux/highmem.h>
34 #include <linux/interrupt.h>
36 #include <linux/irq.h>
37 #include <linux/mfd/tmio.h>
38 #include <linux/mmc/card.h>
39 #include <linux/mmc/host.h>
40 #include <linux/mmc/mmc.h>
41 #include <linux/mmc/slot-gpio.h>
42 #include <linux/module.h>
43 #include <linux/pagemap.h>
44 #include <linux/platform_device.h>
45 #include <linux/pm_qos.h>
46 #include <linux/pm_runtime.h>
47 #include <linux/regulator/consumer.h>
48 #include <linux/mmc/sdio.h>
49 #include <linux/scatterlist.h>
50 #include <linux/spinlock.h>
51 #include <linux/workqueue.h>
55 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
57 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
58 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
61 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
63 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
64 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
67 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
69 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
72 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
74 host->sg_len = data->sg_len;
75 host->sg_ptr = data->sg;
76 host->sg_orig = data->sg;
80 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
82 host->sg_ptr = sg_next(host->sg_ptr);
84 return --host->sg_len;
87 #define CMDREQ_TIMEOUT 5000
89 #ifdef CONFIG_MMC_DEBUG
91 #define STATUS_TO_TEXT(a, status, i) \
93 if (status & TMIO_STAT_##a) { \
100 static void pr_debug_status(u32 status)
103 pr_debug("status: %08x = ", status);
104 STATUS_TO_TEXT(CARD_REMOVE, status, i);
105 STATUS_TO_TEXT(CARD_INSERT, status, i);
106 STATUS_TO_TEXT(SIGSTATE, status, i);
107 STATUS_TO_TEXT(WRPROTECT, status, i);
108 STATUS_TO_TEXT(CARD_REMOVE_A, status, i);
109 STATUS_TO_TEXT(CARD_INSERT_A, status, i);
110 STATUS_TO_TEXT(SIGSTATE_A, status, i);
111 STATUS_TO_TEXT(CMD_IDX_ERR, status, i);
112 STATUS_TO_TEXT(STOPBIT_ERR, status, i);
113 STATUS_TO_TEXT(ILL_FUNC, status, i);
114 STATUS_TO_TEXT(CMD_BUSY, status, i);
115 STATUS_TO_TEXT(CMDRESPEND, status, i);
116 STATUS_TO_TEXT(DATAEND, status, i);
117 STATUS_TO_TEXT(CRCFAIL, status, i);
118 STATUS_TO_TEXT(DATATIMEOUT, status, i);
119 STATUS_TO_TEXT(CMDTIMEOUT, status, i);
120 STATUS_TO_TEXT(RXOVERFLOW, status, i);
121 STATUS_TO_TEXT(TXUNDERRUN, status, i);
122 STATUS_TO_TEXT(RXRDY, status, i);
123 STATUS_TO_TEXT(TXRQ, status, i);
124 STATUS_TO_TEXT(ILL_ACCESS, status, i);
129 #define pr_debug_status(s) do { } while (0)
132 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
134 struct tmio_mmc_host *host = mmc_priv(mmc);
136 if (enable && !host->sdio_irq_enabled) {
137 /* Keep device active while SDIO irq is enabled */
138 pm_runtime_get_sync(mmc_dev(mmc));
139 host->sdio_irq_enabled = true;
141 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL &
142 ~TMIO_SDIO_STAT_IOIRQ;
143 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
144 } else if (!enable && host->sdio_irq_enabled) {
145 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
146 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
148 host->sdio_irq_enabled = false;
149 pm_runtime_mark_last_busy(mmc_dev(mmc));
150 pm_runtime_put_autosuspend(mmc_dev(mmc));
154 static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
156 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN |
157 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
158 msleep(host->pdata->flags & TMIO_MMC_MIN_RCAR2 ? 1 : 10);
160 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
161 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
166 static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
168 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
169 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
173 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
174 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
175 msleep(host->pdata->flags & TMIO_MMC_MIN_RCAR2 ? 5 : 10);
178 static void tmio_mmc_set_clock(struct tmio_mmc_host *host,
179 unsigned int new_clock)
183 if (new_clock == 0) {
184 tmio_mmc_clk_stop(host);
188 if (host->clk_update)
189 clock = host->clk_update(host, new_clock) / 512;
191 clock = host->mmc->f_min;
193 for (clk = 0x80000080; new_clock >= (clock << 1); clk >>= 1)
196 /* 1/1 clock is option */
197 if ((host->pdata->flags & TMIO_MMC_CLK_ACTUAL) && ((clk >> 22) & 0x1))
200 if (host->set_clk_div)
201 host->set_clk_div(host->pdev, (clk >> 22) & 1);
203 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
204 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
205 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & CLK_CTL_DIV_MASK);
206 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
209 tmio_mmc_clk_start(host);
212 static void tmio_mmc_reset(struct tmio_mmc_host *host)
214 /* FIXME - should we set stop clock reg here */
215 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
216 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
217 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
219 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
220 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
221 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
225 static void tmio_mmc_reset_work(struct work_struct *work)
227 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
228 delayed_reset_work.work);
229 struct mmc_request *mrq;
232 spin_lock_irqsave(&host->lock, flags);
236 * is request already finished? Since we use a non-blocking
237 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
238 * us, so, have to check for IS_ERR(host->mrq)
240 if (IS_ERR_OR_NULL(mrq)
241 || time_is_after_jiffies(host->last_req_ts +
242 msecs_to_jiffies(CMDREQ_TIMEOUT))) {
243 spin_unlock_irqrestore(&host->lock, flags);
247 dev_warn(&host->pdev->dev,
248 "timeout waiting for hardware interrupt (CMD%u)\n",
252 host->data->error = -ETIMEDOUT;
254 host->cmd->error = -ETIMEDOUT;
256 mrq->cmd->error = -ETIMEDOUT;
260 host->force_pio = false;
262 spin_unlock_irqrestore(&host->lock, flags);
264 tmio_mmc_reset(host);
266 /* Ready for new calls */
269 tmio_mmc_abort_dma(host);
270 mmc_request_done(host->mmc, mrq);
273 /* called with host->lock held, interrupts disabled */
274 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
276 struct mmc_request *mrq;
279 spin_lock_irqsave(&host->lock, flags);
282 if (IS_ERR_OR_NULL(mrq)) {
283 spin_unlock_irqrestore(&host->lock, flags);
289 host->force_pio = false;
291 cancel_delayed_work(&host->delayed_reset_work);
294 spin_unlock_irqrestore(&host->lock, flags);
296 if (mrq->cmd->error || (mrq->data && mrq->data->error))
297 tmio_mmc_abort_dma(host);
299 if (host->check_scc_error)
300 host->check_scc_error(host);
302 mmc_request_done(host->mmc, mrq);
305 static void tmio_mmc_done_work(struct work_struct *work)
307 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
309 tmio_mmc_finish_request(host);
312 /* These are the bitmasks the tmio chip requires to implement the MMC response
313 * types. Note that R1 and R6 are the same in this scheme. */
314 #define APP_CMD 0x0040
315 #define RESP_NONE 0x0300
316 #define RESP_R1 0x0400
317 #define RESP_R1B 0x0500
318 #define RESP_R2 0x0600
319 #define RESP_R3 0x0700
320 #define DATA_PRESENT 0x0800
321 #define TRANSFER_READ 0x1000
322 #define TRANSFER_MULTI 0x2000
323 #define SECURITY_CMD 0x4000
324 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
326 static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
328 struct mmc_data *data = host->data;
330 u32 irq_mask = TMIO_MASK_CMD;
332 /* CMD12 is handled by hardware */
333 if (cmd->opcode == MMC_STOP_TRANSMISSION && !cmd->arg) {
334 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
338 switch (mmc_resp_type(cmd)) {
339 case MMC_RSP_NONE: c |= RESP_NONE; break;
341 case MMC_RSP_R1_NO_CRC:
343 case MMC_RSP_R1B: c |= RESP_R1B; break;
344 case MMC_RSP_R2: c |= RESP_R2; break;
345 case MMC_RSP_R3: c |= RESP_R3; break;
347 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
353 /* FIXME - this seems to be ok commented out but the spec suggest this bit
354 * should be set when issuing app commands.
355 * if(cmd->flags & MMC_FLAG_ACMD)
360 if (data->blocks > 1) {
361 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
365 * Disable auto CMD12 at IO_RW_EXTENDED when
366 * multiple block transfer
368 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
369 (cmd->opcode == SD_IO_RW_EXTENDED))
372 if (data->flags & MMC_DATA_READ)
376 if (!host->native_hotplug)
377 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
378 tmio_mmc_enable_mmc_irqs(host, irq_mask);
380 /* Fire off the command */
381 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
382 sd_ctrl_write16(host, CTL_SD_CMD, c);
387 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
391 int is_read = host->data->flags & MMC_DATA_READ;
397 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
401 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, (u32 *)buf,
404 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, (u32 *)buf,
407 /* if count was multiple of 4 */
411 buf8 = (u8 *)(buf + (count >> 2));
415 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT,
417 memcpy(buf8, data, count);
419 memcpy(data, buf8, count);
420 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT,
428 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
430 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
432 /* if count was even number */
436 /* if count was odd number */
437 buf8 = (u8 *)(buf + (count >> 1));
442 * driver and this function are assuming that
443 * it is used as little endian
446 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
448 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
452 * This chip always returns (at least?) as much data as you ask for.
453 * I'm unsure what happens if you ask for less than a block. This should be
454 * looked into to ensure that a funny length read doesn't hose the controller.
456 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
458 struct mmc_data *data = host->data;
464 if ((host->chan_tx || host->chan_rx) && !host->force_pio) {
465 pr_err("PIO IRQ in DMA mode!\n");
468 pr_debug("Spurious PIO IRQ\n");
472 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
473 buf = (unsigned short *)(sg_virt + host->sg_off);
475 count = host->sg_ptr->length - host->sg_off;
476 if (count > data->blksz)
479 pr_debug("count: %08x offset: %08x flags %08x\n",
480 count, host->sg_off, data->flags);
482 /* Transfer the data */
483 tmio_mmc_transfer_data(host, buf, count);
485 host->sg_off += count;
487 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
489 if (host->sg_off == host->sg_ptr->length)
490 tmio_mmc_next_sg(host);
495 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
497 if (host->sg_ptr == &host->bounce_sg) {
499 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
500 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
501 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
505 /* needs to be called with host->lock held */
506 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
508 struct mmc_data *data = host->data;
509 struct mmc_command *stop;
514 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
519 /* FIXME - return correct transfer count on errors */
521 data->bytes_xfered = data->blocks * data->blksz;
523 data->bytes_xfered = 0;
525 pr_debug("Completed data request\n");
528 * FIXME: other drivers allow an optional stop command of any given type
529 * which we dont do, as the chip can auto generate them.
530 * Perhaps we can be smarter about when to use auto CMD12 and
531 * only issue the auto request when we know this is the desired
532 * stop command, allowing fallback to the stop command the
533 * upper layers expect. For now, we do what works.
536 if (data->flags & MMC_DATA_READ) {
537 if (host->chan_rx && !host->force_pio)
538 tmio_mmc_check_bounce_buffer(host);
539 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
542 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
547 if (stop->opcode == MMC_STOP_TRANSMISSION && !stop->arg)
548 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
553 schedule_work(&host->done);
556 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
558 struct mmc_data *data;
559 spin_lock(&host->lock);
565 if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
566 stat & TMIO_STAT_TXUNDERRUN)
567 data->error = -EILSEQ;
568 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
569 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
573 * Has all data been written out yet? Testing on SuperH showed,
574 * that in most cases the first interrupt comes already with the
575 * BUSY status bit clear, but on some operations, like mount or
576 * in the beginning of a write / sync / umount, there is one
577 * DATAEND interrupt with the BUSY bit set, in this cases
578 * waiting for one more interrupt fixes the problem.
580 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
581 if (status & TMIO_STAT_SCLKDIVEN)
584 if (!(status & TMIO_STAT_CMD_BUSY))
589 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
590 tasklet_schedule(&host->dma_complete);
592 } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
593 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
594 tasklet_schedule(&host->dma_complete);
596 tmio_mmc_do_data_irq(host);
597 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
600 spin_unlock(&host->lock);
603 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
606 struct mmc_command *cmd = host->cmd;
609 spin_lock(&host->lock);
612 pr_debug("Spurious CMD irq\n");
616 /* This controller is sicker than the PXA one. Not only do we need to
617 * drop the top 8 bits of the first response word, we also need to
618 * modify the order of the response for short response command types.
621 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
622 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
624 if (cmd->flags & MMC_RSP_136) {
625 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
626 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
627 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
629 } else if (cmd->flags & MMC_RSP_R3) {
630 cmd->resp[0] = cmd->resp[3];
633 if (stat & TMIO_STAT_CMDTIMEOUT)
634 cmd->error = -ETIMEDOUT;
635 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
636 stat & TMIO_STAT_STOPBIT_ERR ||
637 stat & TMIO_STAT_CMD_IDX_ERR)
638 cmd->error = -EILSEQ;
640 /* If there is data to handle we enable data IRQs here, and
641 * we will ultimatley finish the request in the data_end handler.
642 * If theres no data or we encountered an error, finish now.
644 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
645 if (host->data->flags & MMC_DATA_READ) {
646 if (host->force_pio || !host->chan_rx)
647 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
649 tasklet_schedule(&host->dma_issue);
651 if (host->force_pio || !host->chan_tx)
652 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
654 tasklet_schedule(&host->dma_issue);
657 schedule_work(&host->done);
661 spin_unlock(&host->lock);
664 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
665 int ireg, int status)
667 struct mmc_host *mmc = host->mmc;
669 /* Card insert / remove attempts */
670 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
671 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
672 TMIO_STAT_CARD_REMOVE);
673 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
674 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
675 !work_pending(&mmc->detect.work))
676 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
683 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host,
684 int ireg, int status)
686 /* Command completion */
687 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
688 tmio_mmc_ack_mmc_irqs(host,
689 TMIO_STAT_CMDRESPEND |
690 TMIO_STAT_CMDTIMEOUT);
691 tmio_mmc_cmd_irq(host, status);
696 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
697 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
698 tmio_mmc_pio_irq(host);
702 /* Data transfer completion */
703 if (ireg & TMIO_STAT_DATAEND) {
704 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
705 tmio_mmc_data_irq(host, status);
712 static void tmio_mmc_sdio_irq(int irq, void *devid)
714 struct tmio_mmc_host *host = devid;
715 struct mmc_host *mmc = host->mmc;
716 struct tmio_mmc_data *pdata = host->pdata;
717 unsigned int ireg, status;
718 unsigned int sdio_status;
720 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
723 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
724 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
726 sdio_status = status & ~TMIO_SDIO_MASK_ALL;
727 if (pdata->flags & TMIO_MMC_SDIO_STATUS_QUIRK)
730 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
732 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
733 mmc_signal_sdio_irq(mmc);
736 irqreturn_t tmio_mmc_irq(int irq, void *devid)
738 struct tmio_mmc_host *host = devid;
739 unsigned int ireg, status;
741 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
742 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
744 pr_debug_status(status);
745 pr_debug_status(ireg);
747 /* Clear the status except the interrupt status */
748 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
750 if (__tmio_mmc_card_detect_irq(host, ireg, status))
752 if (__tmio_mmc_sdcard_irq(host, ireg, status))
755 tmio_mmc_sdio_irq(irq, devid);
759 EXPORT_SYMBOL(tmio_mmc_irq);
761 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
762 struct mmc_data *data)
764 struct tmio_mmc_data *pdata = host->pdata;
766 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
767 data->blksz, data->blocks);
769 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
770 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
771 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
772 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
774 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
775 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
776 mmc_hostname(host->mmc), data->blksz);
781 tmio_mmc_init_sg(host, data);
784 /* Set transfer length / blocksize */
785 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
786 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
788 tmio_mmc_start_dma(host, data);
793 static void tmio_mmc_hw_reset(struct mmc_host *mmc)
795 struct tmio_mmc_host *host = mmc_priv(mmc);
798 host->hw_reset(host);
801 static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
803 struct tmio_mmc_host *host = mmc_priv(mmc);
806 if (!host->tap_num) {
807 if (!host->init_tuning || !host->select_tuning)
808 /* Tuning is not supported */
811 host->tap_num = host->init_tuning(host);
813 /* Tuning is not supported */
817 if (host->tap_num * 2 >= sizeof(host->taps) * BITS_PER_BYTE) {
818 dev_warn_once(&host->pdev->dev,
819 "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n");
823 bitmap_zero(host->taps, host->tap_num * 2);
825 /* Issue CMD19 twice for each tap */
826 for (i = 0; i < 2 * host->tap_num; i++) {
827 if (host->prepare_tuning)
828 host->prepare_tuning(host, i % host->tap_num);
830 ret = mmc_send_tuning(mmc, opcode, NULL);
831 if (ret && ret != -EILSEQ)
834 set_bit(i, host->taps);
839 ret = host->select_tuning(host);
843 dev_warn(&host->pdev->dev, "Tuning procedure failed\n");
844 tmio_mmc_hw_reset(mmc);
850 /* Process requests from the MMC layer */
851 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
853 struct tmio_mmc_host *host = mmc_priv(mmc);
857 spin_lock_irqsave(&host->lock, flags);
860 pr_debug("request not null\n");
861 if (IS_ERR(host->mrq)) {
862 spin_unlock_irqrestore(&host->lock, flags);
863 mrq->cmd->error = -EAGAIN;
864 mmc_request_done(mmc, mrq);
869 host->last_req_ts = jiffies;
873 spin_unlock_irqrestore(&host->lock, flags);
876 ret = tmio_mmc_start_data(host, mrq->data);
881 ret = tmio_mmc_start_command(host, mrq->cmd);
883 schedule_delayed_work(&host->delayed_reset_work,
884 msecs_to_jiffies(CMDREQ_TIMEOUT));
889 host->force_pio = false;
891 mrq->cmd->error = ret;
892 mmc_request_done(mmc, mrq);
895 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
897 if (!host->clk_enable)
900 return host->clk_enable(host);
903 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
905 struct mmc_host *mmc = host->mmc;
908 /* .set_ios() is returning void, so, no chance to report an error */
911 host->set_pwr(host->pdev, 1);
913 if (!IS_ERR(mmc->supply.vmmc)) {
914 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
916 * Attention: empiric value. With a b43 WiFi SDIO card this
917 * delay proved necessary for reliable card-insertion probing.
918 * 100us were not enough. Is this the same 140us delay, as in
919 * tmio_mmc_set_ios()?
924 * It seems, VccQ should be switched on after Vcc, this is also what the
925 * omap_hsmmc.c driver does.
927 if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
928 ret = regulator_enable(mmc->supply.vqmmc);
933 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
937 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
939 struct mmc_host *mmc = host->mmc;
941 if (!IS_ERR(mmc->supply.vqmmc))
942 regulator_disable(mmc->supply.vqmmc);
944 if (!IS_ERR(mmc->supply.vmmc))
945 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
948 host->set_pwr(host->pdev, 0);
951 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
952 unsigned char bus_width)
954 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
955 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
957 /* reg now applies to MMC_BUS_WIDTH_4 */
958 if (bus_width == MMC_BUS_WIDTH_1)
959 reg |= CARD_OPT_WIDTH;
960 else if (bus_width == MMC_BUS_WIDTH_8)
961 reg |= CARD_OPT_WIDTH8;
963 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
966 /* Set MMC clock / power.
967 * Note: This controller uses a simple divider scheme therefore it cannot
968 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
969 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
972 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
974 struct tmio_mmc_host *host = mmc_priv(mmc);
975 struct device *dev = &host->pdev->dev;
978 mutex_lock(&host->ios_lock);
980 spin_lock_irqsave(&host->lock, flags);
982 if (IS_ERR(host->mrq)) {
984 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
985 current->comm, task_pid_nr(current),
986 ios->clock, ios->power_mode);
987 host->mrq = ERR_PTR(-EINTR);
990 "%s.%d: CMD%u active since %lu, now %lu!\n",
991 current->comm, task_pid_nr(current),
992 host->mrq->cmd->opcode, host->last_req_ts, jiffies);
994 spin_unlock_irqrestore(&host->lock, flags);
996 mutex_unlock(&host->ios_lock);
1000 host->mrq = ERR_PTR(-EBUSY);
1002 spin_unlock_irqrestore(&host->lock, flags);
1004 switch (ios->power_mode) {
1006 tmio_mmc_power_off(host);
1007 tmio_mmc_clk_stop(host);
1010 tmio_mmc_power_on(host, ios->vdd);
1011 tmio_mmc_set_clock(host, ios->clock);
1012 tmio_mmc_set_bus_width(host, ios->bus_width);
1015 tmio_mmc_set_clock(host, ios->clock);
1016 tmio_mmc_set_bus_width(host, ios->bus_width);
1020 /* Let things settle. delay taken from winCE driver */
1022 if (PTR_ERR(host->mrq) == -EINTR)
1023 dev_dbg(&host->pdev->dev,
1024 "%s.%d: IOS interrupted: clk %u, mode %u",
1025 current->comm, task_pid_nr(current),
1026 ios->clock, ios->power_mode);
1029 host->clk_cache = ios->clock;
1031 mutex_unlock(&host->ios_lock);
1034 static int tmio_mmc_get_ro(struct mmc_host *mmc)
1036 struct tmio_mmc_host *host = mmc_priv(mmc);
1037 struct tmio_mmc_data *pdata = host->pdata;
1038 int ret = mmc_gpio_get_ro(mmc);
1042 ret = !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
1043 (sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
1048 static int tmio_multi_io_quirk(struct mmc_card *card,
1049 unsigned int direction, int blk_size)
1051 struct tmio_mmc_host *host = mmc_priv(card->host);
1053 if (host->multi_io_quirk)
1054 return host->multi_io_quirk(card, direction, blk_size);
1059 static struct mmc_host_ops tmio_mmc_ops = {
1060 .request = tmio_mmc_request,
1061 .set_ios = tmio_mmc_set_ios,
1062 .get_ro = tmio_mmc_get_ro,
1063 .get_cd = mmc_gpio_get_cd,
1064 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1065 .multi_io_quirk = tmio_multi_io_quirk,
1066 .hw_reset = tmio_mmc_hw_reset,
1067 .execute_tuning = tmio_mmc_execute_tuning,
1070 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1072 struct tmio_mmc_data *pdata = host->pdata;
1073 struct mmc_host *mmc = host->mmc;
1075 mmc_regulator_get_supply(mmc);
1077 /* use ocr_mask if no regulator */
1078 if (!mmc->ocr_avail)
1079 mmc->ocr_avail = pdata->ocr_mask;
1083 * There is possibility that regulator has not been probed
1085 if (!mmc->ocr_avail)
1086 return -EPROBE_DEFER;
1091 static void tmio_mmc_of_parse(struct platform_device *pdev,
1092 struct tmio_mmc_data *pdata)
1094 const struct device_node *np = pdev->dev.of_node;
1098 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1099 pdata->flags |= TMIO_MMC_WRPROTECT_DISABLE;
1102 struct tmio_mmc_host*
1103 tmio_mmc_host_alloc(struct platform_device *pdev)
1105 struct tmio_mmc_host *host;
1106 struct mmc_host *mmc;
1108 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1112 host = mmc_priv(mmc);
1118 EXPORT_SYMBOL(tmio_mmc_host_alloc);
1120 void tmio_mmc_host_free(struct tmio_mmc_host *host)
1122 mmc_free_host(host->mmc);
1124 EXPORT_SYMBOL(tmio_mmc_host_free);
1126 int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
1127 struct tmio_mmc_data *pdata)
1129 struct platform_device *pdev = _host->pdev;
1130 struct mmc_host *mmc = _host->mmc;
1131 struct resource *res_ctl;
1133 u32 irq_mask = TMIO_MASK_CMD;
1135 tmio_mmc_of_parse(pdev, pdata);
1137 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1138 _host->write16_hook = NULL;
1140 res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1144 ret = mmc_of_parse(mmc);
1148 _host->pdata = pdata;
1149 platform_set_drvdata(pdev, mmc);
1151 _host->set_pwr = pdata->set_pwr;
1152 _host->set_clk_div = pdata->set_clk_div;
1154 ret = tmio_mmc_init_ocr(_host);
1158 _host->ctl = devm_ioremap(&pdev->dev,
1159 res_ctl->start, resource_size(res_ctl));
1165 tmio_mmc_ops.card_busy = _host->card_busy;
1166 tmio_mmc_ops.start_signal_voltage_switch = _host->start_signal_voltage_switch;
1167 mmc->ops = &tmio_mmc_ops;
1169 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1170 mmc->caps2 |= pdata->capabilities2;
1172 mmc->max_blk_size = 512;
1173 mmc->max_blk_count = (PAGE_SIZE / mmc->max_blk_size) *
1175 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1176 mmc->max_seg_size = mmc->max_req_size;
1178 _host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD ||
1179 mmc->caps & MMC_CAP_NEEDS_POLL ||
1180 !mmc_card_is_removable(mmc) ||
1181 mmc->slot.cd_irq >= 0);
1184 * On Gen2+, eMMC with NONREMOVABLE currently fails because native
1185 * hotplug gets disabled. It seems RuntimePM related yet we need further
1186 * research. Since we are planning a PM overhaul anyway, let's enforce
1187 * for now the device being active by enabling native hotplug always.
1189 if (pdata->flags & TMIO_MMC_MIN_RCAR2)
1190 _host->native_hotplug = true;
1192 if (tmio_mmc_clk_enable(_host) < 0) {
1193 mmc->f_max = pdata->hclk;
1194 mmc->f_min = mmc->f_max / 512;
1198 * Check the sanity of mmc->f_min to prevent tmio_mmc_set_clock() from
1199 * looping forever...
1201 if (mmc->f_min == 0) {
1207 * While using internal tmio hardware logic for card detection, we need
1208 * to ensure it stays powered for it to work.
1210 if (_host->native_hotplug)
1211 pm_runtime_get_noresume(&pdev->dev);
1213 tmio_mmc_clk_stop(_host);
1214 tmio_mmc_reset(_host);
1216 _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
1217 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1219 /* Unmask the IRQs we want to know about */
1220 if (!_host->chan_rx)
1221 irq_mask |= TMIO_MASK_READOP;
1222 if (!_host->chan_tx)
1223 irq_mask |= TMIO_MASK_WRITEOP;
1224 if (!_host->native_hotplug)
1225 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1227 _host->sdcard_irq_mask &= ~irq_mask;
1229 _host->sdio_irq_enabled = false;
1230 if (pdata->flags & TMIO_MMC_SDIO_IRQ) {
1231 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1232 sd_ctrl_write16(_host, CTL_SDIO_IRQ_MASK, _host->sdio_irq_mask);
1233 sd_ctrl_write16(_host, CTL_TRANSACTION_CTL, 0x0001);
1236 spin_lock_init(&_host->lock);
1237 mutex_init(&_host->ios_lock);
1239 /* Init delayed work for request timeouts */
1240 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1241 INIT_WORK(&_host->done, tmio_mmc_done_work);
1243 /* See if we also get DMA */
1244 tmio_mmc_request_dma(_host, pdata);
1246 pm_runtime_set_active(&pdev->dev);
1247 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1248 pm_runtime_use_autosuspend(&pdev->dev);
1249 pm_runtime_enable(&pdev->dev);
1251 ret = mmc_add_host(mmc);
1253 tmio_mmc_host_remove(_host);
1257 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1259 if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
1260 ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0);
1262 tmio_mmc_host_remove(_host);
1265 mmc_gpiod_request_cd_irq(mmc);
1274 EXPORT_SYMBOL(tmio_mmc_host_probe);
1276 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1278 struct platform_device *pdev = host->pdev;
1279 struct mmc_host *mmc = host->mmc;
1281 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1282 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1284 if (!host->native_hotplug)
1285 pm_runtime_get_sync(&pdev->dev);
1287 dev_pm_qos_hide_latency_limit(&pdev->dev);
1289 mmc_remove_host(mmc);
1290 cancel_work_sync(&host->done);
1291 cancel_delayed_work_sync(&host->delayed_reset_work);
1292 tmio_mmc_release_dma(host);
1294 pm_runtime_put_sync(&pdev->dev);
1295 pm_runtime_disable(&pdev->dev);
1297 EXPORT_SYMBOL(tmio_mmc_host_remove);
1300 int tmio_mmc_host_runtime_suspend(struct device *dev)
1302 struct mmc_host *mmc = dev_get_drvdata(dev);
1303 struct tmio_mmc_host *host = mmc_priv(mmc);
1305 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1307 if (host->clk_cache)
1308 tmio_mmc_clk_stop(host);
1310 if (host->clk_disable)
1311 host->clk_disable(host);
1315 EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend);
1317 static bool tmio_mmc_can_retune(struct tmio_mmc_host *host)
1319 return host->tap_num && mmc_can_retune(host->mmc);
1322 int tmio_mmc_host_runtime_resume(struct device *dev)
1324 struct mmc_host *mmc = dev_get_drvdata(dev);
1325 struct tmio_mmc_host *host = mmc_priv(mmc);
1327 tmio_mmc_reset(host);
1328 tmio_mmc_clk_enable(host);
1330 if (host->clk_cache)
1331 tmio_mmc_set_clock(host, host->clk_cache);
1333 tmio_mmc_enable_dma(host, true);
1335 if (tmio_mmc_can_retune(host) && host->select_tuning(host))
1336 dev_warn(&host->pdev->dev, "Tuning selection failed\n");
1340 EXPORT_SYMBOL(tmio_mmc_host_runtime_resume);
1343 MODULE_LICENSE("GPL v2");