2 * linux/drivers/mmc/host/tmio_mmc_pio.c
4 * Copyright (C) 2016 Sang Engineering, Wolfram Sang
5 * Copyright (C) 2015-16 Renesas Electronics Corporation
6 * Copyright (C) 2011 Guennadi Liakhovetski
7 * Copyright (C) 2007 Ian Molton
8 * Copyright (C) 2004 Ian Molton
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * Driver for the MMC / SD / SDIO IP found in:
16 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
18 * This driver draws mainly on scattered spec sheets, Reverse engineering
19 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
20 * support). (Further 4 bit support from a later datasheet).
23 * Investigate using a workqueue for PIO transfers
26 * Better Power management
27 * Handle MMC errors better
28 * double buffer support
32 #include <linux/delay.h>
33 #include <linux/device.h>
34 #include <linux/highmem.h>
35 #include <linux/interrupt.h>
37 #include <linux/irq.h>
38 #include <linux/mfd/tmio.h>
39 #include <linux/mmc/card.h>
40 #include <linux/mmc/host.h>
41 #include <linux/mmc/mmc.h>
42 #include <linux/mmc/slot-gpio.h>
43 #include <linux/module.h>
44 #include <linux/pagemap.h>
45 #include <linux/platform_device.h>
46 #include <linux/pm_qos.h>
47 #include <linux/pm_runtime.h>
48 #include <linux/regulator/consumer.h>
49 #include <linux/mmc/sdio.h>
50 #include <linux/scatterlist.h>
51 #include <linux/spinlock.h>
52 #include <linux/workqueue.h>
56 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
58 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
59 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
62 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
64 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
65 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
68 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
70 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
73 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
75 host->sg_len = data->sg_len;
76 host->sg_ptr = data->sg;
77 host->sg_orig = data->sg;
81 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
83 host->sg_ptr = sg_next(host->sg_ptr);
85 return --host->sg_len;
88 #define CMDREQ_TIMEOUT 5000
90 #ifdef CONFIG_MMC_DEBUG
92 #define STATUS_TO_TEXT(a, status, i) \
94 if (status & TMIO_STAT_##a) { \
101 static void pr_debug_status(u32 status)
104 pr_debug("status: %08x = ", status);
105 STATUS_TO_TEXT(CARD_REMOVE, status, i);
106 STATUS_TO_TEXT(CARD_INSERT, status, i);
107 STATUS_TO_TEXT(SIGSTATE, status, i);
108 STATUS_TO_TEXT(WRPROTECT, status, i);
109 STATUS_TO_TEXT(CARD_REMOVE_A, status, i);
110 STATUS_TO_TEXT(CARD_INSERT_A, status, i);
111 STATUS_TO_TEXT(SIGSTATE_A, status, i);
112 STATUS_TO_TEXT(CMD_IDX_ERR, status, i);
113 STATUS_TO_TEXT(STOPBIT_ERR, status, i);
114 STATUS_TO_TEXT(ILL_FUNC, status, i);
115 STATUS_TO_TEXT(CMD_BUSY, status, i);
116 STATUS_TO_TEXT(CMDRESPEND, status, i);
117 STATUS_TO_TEXT(DATAEND, status, i);
118 STATUS_TO_TEXT(CRCFAIL, status, i);
119 STATUS_TO_TEXT(DATATIMEOUT, status, i);
120 STATUS_TO_TEXT(CMDTIMEOUT, status, i);
121 STATUS_TO_TEXT(RXOVERFLOW, status, i);
122 STATUS_TO_TEXT(TXUNDERRUN, status, i);
123 STATUS_TO_TEXT(RXRDY, status, i);
124 STATUS_TO_TEXT(TXRQ, status, i);
125 STATUS_TO_TEXT(ILL_ACCESS, status, i);
130 #define pr_debug_status(s) do { } while (0)
133 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
135 struct tmio_mmc_host *host = mmc_priv(mmc);
137 if (enable && !host->sdio_irq_enabled) {
138 /* Keep device active while SDIO irq is enabled */
139 pm_runtime_get_sync(mmc_dev(mmc));
140 host->sdio_irq_enabled = true;
142 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL &
143 ~TMIO_SDIO_STAT_IOIRQ;
144 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
145 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
146 } else if (!enable && host->sdio_irq_enabled) {
147 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
148 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
149 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
151 host->sdio_irq_enabled = false;
152 pm_runtime_mark_last_busy(mmc_dev(mmc));
153 pm_runtime_put_autosuspend(mmc_dev(mmc));
157 static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
159 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN |
160 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
161 msleep(host->pdata->flags & TMIO_MMC_MIN_RCAR2 ? 1 : 10);
163 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
164 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
169 static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
171 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
172 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
176 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
177 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
178 msleep(host->pdata->flags & TMIO_MMC_MIN_RCAR2 ? 5 : 10);
181 static void tmio_mmc_set_clock(struct tmio_mmc_host *host,
182 unsigned int new_clock)
186 if (new_clock == 0) {
187 tmio_mmc_clk_stop(host);
191 if (host->clk_update)
192 clock = host->clk_update(host, new_clock) / 512;
194 clock = host->mmc->f_min;
196 for (clk = 0x80000080; new_clock >= (clock << 1); clk >>= 1)
199 /* 1/1 clock is option */
200 if ((host->pdata->flags & TMIO_MMC_CLK_ACTUAL) && ((clk >> 22) & 0x1))
203 if (host->set_clk_div)
204 host->set_clk_div(host->pdev, (clk >> 22) & 1);
206 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
207 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
208 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & CLK_CTL_DIV_MASK);
209 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
212 tmio_mmc_clk_start(host);
215 static void tmio_mmc_reset(struct tmio_mmc_host *host)
217 /* FIXME - should we set stop clock reg here */
218 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
219 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
220 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
222 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
223 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
224 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
228 static void tmio_mmc_reset_work(struct work_struct *work)
230 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
231 delayed_reset_work.work);
232 struct mmc_request *mrq;
235 spin_lock_irqsave(&host->lock, flags);
239 * is request already finished? Since we use a non-blocking
240 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
241 * us, so, have to check for IS_ERR(host->mrq)
243 if (IS_ERR_OR_NULL(mrq)
244 || time_is_after_jiffies(host->last_req_ts +
245 msecs_to_jiffies(CMDREQ_TIMEOUT))) {
246 spin_unlock_irqrestore(&host->lock, flags);
250 dev_warn(&host->pdev->dev,
251 "timeout waiting for hardware interrupt (CMD%u)\n",
255 host->data->error = -ETIMEDOUT;
257 host->cmd->error = -ETIMEDOUT;
259 mrq->cmd->error = -ETIMEDOUT;
263 host->force_pio = false;
265 spin_unlock_irqrestore(&host->lock, flags);
267 tmio_mmc_reset(host);
269 /* Ready for new calls */
272 tmio_mmc_abort_dma(host);
273 mmc_request_done(host->mmc, mrq);
276 /* called with host->lock held, interrupts disabled */
277 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
279 struct mmc_request *mrq;
282 spin_lock_irqsave(&host->lock, flags);
285 if (IS_ERR_OR_NULL(mrq)) {
286 spin_unlock_irqrestore(&host->lock, flags);
292 host->force_pio = false;
294 cancel_delayed_work(&host->delayed_reset_work);
297 spin_unlock_irqrestore(&host->lock, flags);
299 if (mrq->cmd->error || (mrq->data && mrq->data->error))
300 tmio_mmc_abort_dma(host);
302 if (host->check_scc_error)
303 host->check_scc_error(host);
305 mmc_request_done(host->mmc, mrq);
308 static void tmio_mmc_done_work(struct work_struct *work)
310 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
312 tmio_mmc_finish_request(host);
315 /* These are the bitmasks the tmio chip requires to implement the MMC response
316 * types. Note that R1 and R6 are the same in this scheme. */
317 #define APP_CMD 0x0040
318 #define RESP_NONE 0x0300
319 #define RESP_R1 0x0400
320 #define RESP_R1B 0x0500
321 #define RESP_R2 0x0600
322 #define RESP_R3 0x0700
323 #define DATA_PRESENT 0x0800
324 #define TRANSFER_READ 0x1000
325 #define TRANSFER_MULTI 0x2000
326 #define SECURITY_CMD 0x4000
327 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
329 static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
331 struct mmc_data *data = host->data;
333 u32 irq_mask = TMIO_MASK_CMD;
335 /* CMD12 is handled by hardware */
336 if (cmd->opcode == MMC_STOP_TRANSMISSION && !cmd->arg) {
337 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
341 switch (mmc_resp_type(cmd)) {
342 case MMC_RSP_NONE: c |= RESP_NONE; break;
344 case MMC_RSP_R1_NO_CRC:
346 case MMC_RSP_R1B: c |= RESP_R1B; break;
347 case MMC_RSP_R2: c |= RESP_R2; break;
348 case MMC_RSP_R3: c |= RESP_R3; break;
350 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
356 /* FIXME - this seems to be ok commented out but the spec suggest this bit
357 * should be set when issuing app commands.
358 * if(cmd->flags & MMC_FLAG_ACMD)
363 if (data->blocks > 1) {
364 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
368 * Disable auto CMD12 at IO_RW_EXTENDED when
369 * multiple block transfer
371 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
372 (cmd->opcode == SD_IO_RW_EXTENDED))
375 if (data->flags & MMC_DATA_READ)
379 if (!host->native_hotplug)
380 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
381 tmio_mmc_enable_mmc_irqs(host, irq_mask);
383 /* Fire off the command */
384 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
385 sd_ctrl_write16(host, CTL_SD_CMD, c);
390 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
394 int is_read = host->data->flags & MMC_DATA_READ;
400 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
404 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, (u32 *)buf,
407 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, (u32 *)buf,
410 /* if count was multiple of 4 */
414 buf8 = (u8 *)(buf + (count >> 2));
418 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT,
420 memcpy(buf8, data, count);
422 memcpy(data, buf8, count);
423 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT,
431 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
433 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
435 /* if count was even number */
439 /* if count was odd number */
440 buf8 = (u8 *)(buf + (count >> 1));
445 * driver and this function are assuming that
446 * it is used as little endian
449 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
451 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
455 * This chip always returns (at least?) as much data as you ask for.
456 * I'm unsure what happens if you ask for less than a block. This should be
457 * looked into to ensure that a funny length read doesn't hose the controller.
459 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
461 struct mmc_data *data = host->data;
467 if ((host->chan_tx || host->chan_rx) && !host->force_pio) {
468 pr_err("PIO IRQ in DMA mode!\n");
471 pr_debug("Spurious PIO IRQ\n");
475 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
476 buf = (unsigned short *)(sg_virt + host->sg_off);
478 count = host->sg_ptr->length - host->sg_off;
479 if (count > data->blksz)
482 pr_debug("count: %08x offset: %08x flags %08x\n",
483 count, host->sg_off, data->flags);
485 /* Transfer the data */
486 tmio_mmc_transfer_data(host, buf, count);
488 host->sg_off += count;
490 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
492 if (host->sg_off == host->sg_ptr->length)
493 tmio_mmc_next_sg(host);
498 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
500 if (host->sg_ptr == &host->bounce_sg) {
502 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
503 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
504 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
508 /* needs to be called with host->lock held */
509 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
511 struct mmc_data *data = host->data;
512 struct mmc_command *stop;
517 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
522 /* FIXME - return correct transfer count on errors */
524 data->bytes_xfered = data->blocks * data->blksz;
526 data->bytes_xfered = 0;
528 pr_debug("Completed data request\n");
531 * FIXME: other drivers allow an optional stop command of any given type
532 * which we dont do, as the chip can auto generate them.
533 * Perhaps we can be smarter about when to use auto CMD12 and
534 * only issue the auto request when we know this is the desired
535 * stop command, allowing fallback to the stop command the
536 * upper layers expect. For now, we do what works.
539 if (data->flags & MMC_DATA_READ) {
540 if (host->chan_rx && !host->force_pio)
541 tmio_mmc_check_bounce_buffer(host);
542 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
545 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
550 if (stop->opcode == MMC_STOP_TRANSMISSION && !stop->arg)
551 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
556 schedule_work(&host->done);
559 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
561 struct mmc_data *data;
562 spin_lock(&host->lock);
568 if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
569 stat & TMIO_STAT_TXUNDERRUN)
570 data->error = -EILSEQ;
571 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
572 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
576 * Has all data been written out yet? Testing on SuperH showed,
577 * that in most cases the first interrupt comes already with the
578 * BUSY status bit clear, but on some operations, like mount or
579 * in the beginning of a write / sync / umount, there is one
580 * DATAEND interrupt with the BUSY bit set, in this cases
581 * waiting for one more interrupt fixes the problem.
583 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
584 if (status & TMIO_STAT_SCLKDIVEN)
587 if (!(status & TMIO_STAT_CMD_BUSY))
592 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
593 tasklet_schedule(&host->dma_complete);
595 } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
596 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
597 tasklet_schedule(&host->dma_complete);
599 tmio_mmc_do_data_irq(host);
600 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
603 spin_unlock(&host->lock);
606 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
609 struct mmc_command *cmd = host->cmd;
612 spin_lock(&host->lock);
615 pr_debug("Spurious CMD irq\n");
619 /* This controller is sicker than the PXA one. Not only do we need to
620 * drop the top 8 bits of the first response word, we also need to
621 * modify the order of the response for short response command types.
624 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
625 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
627 if (cmd->flags & MMC_RSP_136) {
628 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
629 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
630 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
632 } else if (cmd->flags & MMC_RSP_R3) {
633 cmd->resp[0] = cmd->resp[3];
636 if (stat & TMIO_STAT_CMDTIMEOUT)
637 cmd->error = -ETIMEDOUT;
638 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
639 stat & TMIO_STAT_STOPBIT_ERR ||
640 stat & TMIO_STAT_CMD_IDX_ERR)
641 cmd->error = -EILSEQ;
643 /* If there is data to handle we enable data IRQs here, and
644 * we will ultimatley finish the request in the data_end handler.
645 * If theres no data or we encountered an error, finish now.
647 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
648 if (host->data->flags & MMC_DATA_READ) {
649 if (host->force_pio || !host->chan_rx)
650 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
652 tasklet_schedule(&host->dma_issue);
654 if (host->force_pio || !host->chan_tx)
655 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
657 tasklet_schedule(&host->dma_issue);
660 schedule_work(&host->done);
664 spin_unlock(&host->lock);
667 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
668 int ireg, int status)
670 struct mmc_host *mmc = host->mmc;
672 /* Card insert / remove attempts */
673 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
674 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
675 TMIO_STAT_CARD_REMOVE);
676 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
677 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
678 !work_pending(&mmc->detect.work))
679 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
686 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host,
687 int ireg, int status)
689 /* Command completion */
690 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
691 tmio_mmc_ack_mmc_irqs(host,
692 TMIO_STAT_CMDRESPEND |
693 TMIO_STAT_CMDTIMEOUT);
694 tmio_mmc_cmd_irq(host, status);
699 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
700 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
701 tmio_mmc_pio_irq(host);
705 /* Data transfer completion */
706 if (ireg & TMIO_STAT_DATAEND) {
707 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
708 tmio_mmc_data_irq(host, status);
715 static void tmio_mmc_sdio_irq(int irq, void *devid)
717 struct tmio_mmc_host *host = devid;
718 struct mmc_host *mmc = host->mmc;
719 struct tmio_mmc_data *pdata = host->pdata;
720 unsigned int ireg, status;
721 unsigned int sdio_status;
723 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
726 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
727 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
729 sdio_status = status & ~TMIO_SDIO_MASK_ALL;
730 if (pdata->flags & TMIO_MMC_SDIO_STATUS_QUIRK)
733 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
735 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
736 mmc_signal_sdio_irq(mmc);
739 irqreturn_t tmio_mmc_irq(int irq, void *devid)
741 struct tmio_mmc_host *host = devid;
742 unsigned int ireg, status;
744 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
745 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
747 pr_debug_status(status);
748 pr_debug_status(ireg);
750 /* Clear the status except the interrupt status */
751 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
753 if (__tmio_mmc_card_detect_irq(host, ireg, status))
755 if (__tmio_mmc_sdcard_irq(host, ireg, status))
758 tmio_mmc_sdio_irq(irq, devid);
762 EXPORT_SYMBOL(tmio_mmc_irq);
764 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
765 struct mmc_data *data)
767 struct tmio_mmc_data *pdata = host->pdata;
769 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
770 data->blksz, data->blocks);
772 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
773 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
774 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
775 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
777 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
778 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
779 mmc_hostname(host->mmc), data->blksz);
784 tmio_mmc_init_sg(host, data);
787 /* Set transfer length / blocksize */
788 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
789 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
791 tmio_mmc_start_dma(host, data);
796 static void tmio_mmc_hw_reset(struct mmc_host *mmc)
798 struct tmio_mmc_host *host = mmc_priv(mmc);
801 host->hw_reset(host);
804 static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
806 struct tmio_mmc_host *host = mmc_priv(mmc);
809 if (!host->tap_num) {
810 if (!host->init_tuning || !host->select_tuning)
811 /* Tuning is not supported */
814 host->tap_num = host->init_tuning(host);
816 /* Tuning is not supported */
820 if (host->tap_num * 2 >= sizeof(host->taps) * BITS_PER_BYTE) {
821 dev_warn_once(&host->pdev->dev,
822 "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n");
826 bitmap_zero(host->taps, host->tap_num * 2);
828 /* Issue CMD19 twice for each tap */
829 for (i = 0; i < 2 * host->tap_num; i++) {
830 if (host->prepare_tuning)
831 host->prepare_tuning(host, i % host->tap_num);
833 ret = mmc_send_tuning(mmc, opcode, NULL);
834 if (ret && ret != -EILSEQ)
837 set_bit(i, host->taps);
842 ret = host->select_tuning(host);
846 dev_warn(&host->pdev->dev, "Tuning procedure failed\n");
847 tmio_mmc_hw_reset(mmc);
853 /* Process requests from the MMC layer */
854 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
856 struct tmio_mmc_host *host = mmc_priv(mmc);
860 spin_lock_irqsave(&host->lock, flags);
863 pr_debug("request not null\n");
864 if (IS_ERR(host->mrq)) {
865 spin_unlock_irqrestore(&host->lock, flags);
866 mrq->cmd->error = -EAGAIN;
867 mmc_request_done(mmc, mrq);
872 host->last_req_ts = jiffies;
876 spin_unlock_irqrestore(&host->lock, flags);
879 ret = tmio_mmc_start_data(host, mrq->data);
884 ret = tmio_mmc_start_command(host, mrq->cmd);
886 schedule_delayed_work(&host->delayed_reset_work,
887 msecs_to_jiffies(CMDREQ_TIMEOUT));
892 host->force_pio = false;
894 mrq->cmd->error = ret;
895 mmc_request_done(mmc, mrq);
898 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
900 if (!host->clk_enable)
903 return host->clk_enable(host);
906 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
908 struct mmc_host *mmc = host->mmc;
911 /* .set_ios() is returning void, so, no chance to report an error */
914 host->set_pwr(host->pdev, 1);
916 if (!IS_ERR(mmc->supply.vmmc)) {
917 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
919 * Attention: empiric value. With a b43 WiFi SDIO card this
920 * delay proved necessary for reliable card-insertion probing.
921 * 100us were not enough. Is this the same 140us delay, as in
922 * tmio_mmc_set_ios()?
927 * It seems, VccQ should be switched on after Vcc, this is also what the
928 * omap_hsmmc.c driver does.
930 if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
931 ret = regulator_enable(mmc->supply.vqmmc);
936 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
940 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
942 struct mmc_host *mmc = host->mmc;
944 if (!IS_ERR(mmc->supply.vqmmc))
945 regulator_disable(mmc->supply.vqmmc);
947 if (!IS_ERR(mmc->supply.vmmc))
948 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
951 host->set_pwr(host->pdev, 0);
954 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
955 unsigned char bus_width)
957 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
958 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
960 /* reg now applies to MMC_BUS_WIDTH_4 */
961 if (bus_width == MMC_BUS_WIDTH_1)
962 reg |= CARD_OPT_WIDTH;
963 else if (bus_width == MMC_BUS_WIDTH_8)
964 reg |= CARD_OPT_WIDTH8;
966 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
969 /* Set MMC clock / power.
970 * Note: This controller uses a simple divider scheme therefore it cannot
971 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
972 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
975 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
977 struct tmio_mmc_host *host = mmc_priv(mmc);
978 struct device *dev = &host->pdev->dev;
981 mutex_lock(&host->ios_lock);
983 spin_lock_irqsave(&host->lock, flags);
985 if (IS_ERR(host->mrq)) {
987 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
988 current->comm, task_pid_nr(current),
989 ios->clock, ios->power_mode);
990 host->mrq = ERR_PTR(-EINTR);
993 "%s.%d: CMD%u active since %lu, now %lu!\n",
994 current->comm, task_pid_nr(current),
995 host->mrq->cmd->opcode, host->last_req_ts, jiffies);
997 spin_unlock_irqrestore(&host->lock, flags);
999 mutex_unlock(&host->ios_lock);
1003 host->mrq = ERR_PTR(-EBUSY);
1005 spin_unlock_irqrestore(&host->lock, flags);
1007 switch (ios->power_mode) {
1009 tmio_mmc_power_off(host);
1010 tmio_mmc_clk_stop(host);
1013 tmio_mmc_power_on(host, ios->vdd);
1014 tmio_mmc_set_clock(host, ios->clock);
1015 tmio_mmc_set_bus_width(host, ios->bus_width);
1018 tmio_mmc_set_clock(host, ios->clock);
1019 tmio_mmc_set_bus_width(host, ios->bus_width);
1023 /* Let things settle. delay taken from winCE driver */
1025 if (PTR_ERR(host->mrq) == -EINTR)
1026 dev_dbg(&host->pdev->dev,
1027 "%s.%d: IOS interrupted: clk %u, mode %u",
1028 current->comm, task_pid_nr(current),
1029 ios->clock, ios->power_mode);
1032 host->clk_cache = ios->clock;
1034 mutex_unlock(&host->ios_lock);
1037 static int tmio_mmc_get_ro(struct mmc_host *mmc)
1039 struct tmio_mmc_host *host = mmc_priv(mmc);
1040 struct tmio_mmc_data *pdata = host->pdata;
1041 int ret = mmc_gpio_get_ro(mmc);
1045 ret = !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
1046 (sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
1051 static int tmio_multi_io_quirk(struct mmc_card *card,
1052 unsigned int direction, int blk_size)
1054 struct tmio_mmc_host *host = mmc_priv(card->host);
1056 if (host->multi_io_quirk)
1057 return host->multi_io_quirk(card, direction, blk_size);
1062 static struct mmc_host_ops tmio_mmc_ops = {
1063 .request = tmio_mmc_request,
1064 .set_ios = tmio_mmc_set_ios,
1065 .get_ro = tmio_mmc_get_ro,
1066 .get_cd = mmc_gpio_get_cd,
1067 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1068 .multi_io_quirk = tmio_multi_io_quirk,
1069 .hw_reset = tmio_mmc_hw_reset,
1070 .execute_tuning = tmio_mmc_execute_tuning,
1073 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1075 struct tmio_mmc_data *pdata = host->pdata;
1076 struct mmc_host *mmc = host->mmc;
1078 mmc_regulator_get_supply(mmc);
1080 /* use ocr_mask if no regulator */
1081 if (!mmc->ocr_avail)
1082 mmc->ocr_avail = pdata->ocr_mask;
1086 * There is possibility that regulator has not been probed
1088 if (!mmc->ocr_avail)
1089 return -EPROBE_DEFER;
1094 static void tmio_mmc_of_parse(struct platform_device *pdev,
1095 struct tmio_mmc_data *pdata)
1097 const struct device_node *np = pdev->dev.of_node;
1101 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1102 pdata->flags |= TMIO_MMC_WRPROTECT_DISABLE;
1105 struct tmio_mmc_host*
1106 tmio_mmc_host_alloc(struct platform_device *pdev)
1108 struct tmio_mmc_host *host;
1109 struct mmc_host *mmc;
1111 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1115 host = mmc_priv(mmc);
1121 EXPORT_SYMBOL(tmio_mmc_host_alloc);
1123 void tmio_mmc_host_free(struct tmio_mmc_host *host)
1125 mmc_free_host(host->mmc);
1127 EXPORT_SYMBOL(tmio_mmc_host_free);
1129 int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
1130 struct tmio_mmc_data *pdata)
1132 struct platform_device *pdev = _host->pdev;
1133 struct mmc_host *mmc = _host->mmc;
1134 struct resource *res_ctl;
1136 u32 irq_mask = TMIO_MASK_CMD;
1138 tmio_mmc_of_parse(pdev, pdata);
1140 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1141 _host->write16_hook = NULL;
1143 res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1147 ret = mmc_of_parse(mmc);
1151 _host->pdata = pdata;
1152 platform_set_drvdata(pdev, mmc);
1154 _host->set_pwr = pdata->set_pwr;
1155 _host->set_clk_div = pdata->set_clk_div;
1157 ret = tmio_mmc_init_ocr(_host);
1161 _host->ctl = devm_ioremap(&pdev->dev,
1162 res_ctl->start, resource_size(res_ctl));
1168 tmio_mmc_ops.card_busy = _host->card_busy;
1169 tmio_mmc_ops.start_signal_voltage_switch = _host->start_signal_voltage_switch;
1170 mmc->ops = &tmio_mmc_ops;
1172 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1173 mmc->caps2 |= pdata->capabilities2;
1175 mmc->max_blk_size = 512;
1176 mmc->max_blk_count = (PAGE_SIZE / mmc->max_blk_size) *
1178 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1179 mmc->max_seg_size = mmc->max_req_size;
1181 _host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD ||
1182 mmc->caps & MMC_CAP_NEEDS_POLL ||
1183 !mmc_card_is_removable(mmc) ||
1184 mmc->slot.cd_irq >= 0);
1187 * On Gen2+, eMMC with NONREMOVABLE currently fails because native
1188 * hotplug gets disabled. It seems RuntimePM related yet we need further
1189 * research. Since we are planning a PM overhaul anyway, let's enforce
1190 * for now the device being active by enabling native hotplug always.
1192 if (pdata->flags & TMIO_MMC_MIN_RCAR2)
1193 _host->native_hotplug = true;
1195 if (tmio_mmc_clk_enable(_host) < 0) {
1196 mmc->f_max = pdata->hclk;
1197 mmc->f_min = mmc->f_max / 512;
1201 * Check the sanity of mmc->f_min to prevent tmio_mmc_set_clock() from
1202 * looping forever...
1204 if (mmc->f_min == 0) {
1210 * While using internal tmio hardware logic for card detection, we need
1211 * to ensure it stays powered for it to work.
1213 if (_host->native_hotplug)
1214 pm_runtime_get_noresume(&pdev->dev);
1216 tmio_mmc_clk_stop(_host);
1217 tmio_mmc_reset(_host);
1219 _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
1220 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1222 /* Unmask the IRQs we want to know about */
1223 if (!_host->chan_rx)
1224 irq_mask |= TMIO_MASK_READOP;
1225 if (!_host->chan_tx)
1226 irq_mask |= TMIO_MASK_WRITEOP;
1227 if (!_host->native_hotplug)
1228 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1230 _host->sdcard_irq_mask &= ~irq_mask;
1232 _host->sdio_irq_enabled = false;
1233 if (pdata->flags & TMIO_MMC_SDIO_IRQ) {
1234 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1235 sd_ctrl_write16(_host, CTL_SDIO_IRQ_MASK, _host->sdio_irq_mask);
1236 sd_ctrl_write16(_host, CTL_TRANSACTION_CTL, 0x0000);
1239 spin_lock_init(&_host->lock);
1240 mutex_init(&_host->ios_lock);
1242 /* Init delayed work for request timeouts */
1243 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1244 INIT_WORK(&_host->done, tmio_mmc_done_work);
1246 /* See if we also get DMA */
1247 tmio_mmc_request_dma(_host, pdata);
1249 pm_runtime_set_active(&pdev->dev);
1250 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1251 pm_runtime_use_autosuspend(&pdev->dev);
1252 pm_runtime_enable(&pdev->dev);
1254 ret = mmc_add_host(mmc);
1256 tmio_mmc_host_remove(_host);
1260 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1262 if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
1263 ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0);
1265 tmio_mmc_host_remove(_host);
1268 mmc_gpiod_request_cd_irq(mmc);
1277 EXPORT_SYMBOL(tmio_mmc_host_probe);
1279 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1281 struct platform_device *pdev = host->pdev;
1282 struct mmc_host *mmc = host->mmc;
1284 if (!host->native_hotplug)
1285 pm_runtime_get_sync(&pdev->dev);
1287 dev_pm_qos_hide_latency_limit(&pdev->dev);
1289 mmc_remove_host(mmc);
1290 cancel_work_sync(&host->done);
1291 cancel_delayed_work_sync(&host->delayed_reset_work);
1292 tmio_mmc_release_dma(host);
1294 pm_runtime_put_sync(&pdev->dev);
1295 pm_runtime_disable(&pdev->dev);
1297 EXPORT_SYMBOL(tmio_mmc_host_remove);
1300 int tmio_mmc_host_runtime_suspend(struct device *dev)
1302 struct mmc_host *mmc = dev_get_drvdata(dev);
1303 struct tmio_mmc_host *host = mmc_priv(mmc);
1305 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1307 if (host->clk_cache)
1308 tmio_mmc_clk_stop(host);
1310 if (host->clk_disable)
1311 host->clk_disable(host);
1315 EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend);
1317 static bool tmio_mmc_can_retune(struct tmio_mmc_host *host)
1319 return host->tap_num && mmc_can_retune(host->mmc);
1322 int tmio_mmc_host_runtime_resume(struct device *dev)
1324 struct mmc_host *mmc = dev_get_drvdata(dev);
1325 struct tmio_mmc_host *host = mmc_priv(mmc);
1327 tmio_mmc_reset(host);
1328 tmio_mmc_clk_enable(host);
1330 if (host->clk_cache)
1331 tmio_mmc_set_clock(host, host->clk_cache);
1333 tmio_mmc_enable_dma(host, true);
1335 if (tmio_mmc_can_retune(host) && host->select_tuning(host))
1336 dev_warn(&host->pdev->dev, "Tuning selection failed\n");
1340 EXPORT_SYMBOL(tmio_mmc_host_runtime_resume);
1343 MODULE_LICENSE("GPL v2");