2 * linux/drivers/mmc/host/tmio_mmc_pio.c
4 * Copyright (C) 2016 Sang Engineering, Wolfram Sang
5 * Copyright (C) 2015-16 Renesas Electronics Corporation
6 * Copyright (C) 2011 Guennadi Liakhovetski
7 * Copyright (C) 2007 Ian Molton
8 * Copyright (C) 2004 Ian Molton
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * Driver for the MMC / SD / SDIO IP found in:
16 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
18 * This driver draws mainly on scattered spec sheets, Reverse engineering
19 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
20 * support). (Further 4 bit support from a later datasheet).
23 * Investigate using a workqueue for PIO transfers
25 * Better Power management
26 * Handle MMC errors better
27 * double buffer support
31 #include <linux/delay.h>
32 #include <linux/device.h>
33 #include <linux/highmem.h>
34 #include <linux/interrupt.h>
36 #include <linux/irq.h>
37 #include <linux/mfd/tmio.h>
38 #include <linux/mmc/card.h>
39 #include <linux/mmc/host.h>
40 #include <linux/mmc/mmc.h>
41 #include <linux/mmc/slot-gpio.h>
42 #include <linux/module.h>
43 #include <linux/pagemap.h>
44 #include <linux/platform_device.h>
45 #include <linux/pm_qos.h>
46 #include <linux/pm_runtime.h>
47 #include <linux/regulator/consumer.h>
48 #include <linux/mmc/sdio.h>
49 #include <linux/scatterlist.h>
50 #include <linux/spinlock.h>
51 #include <linux/workqueue.h>
55 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
57 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
58 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
61 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
63 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
64 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
67 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
69 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
72 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
74 host->sg_len = data->sg_len;
75 host->sg_ptr = data->sg;
76 host->sg_orig = data->sg;
80 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
82 host->sg_ptr = sg_next(host->sg_ptr);
84 return --host->sg_len;
87 #define CMDREQ_TIMEOUT 5000
89 #ifdef CONFIG_MMC_DEBUG
91 #define STATUS_TO_TEXT(a, status, i) \
93 if (status & TMIO_STAT_##a) { \
100 static void pr_debug_status(u32 status)
103 pr_debug("status: %08x = ", status);
104 STATUS_TO_TEXT(CARD_REMOVE, status, i);
105 STATUS_TO_TEXT(CARD_INSERT, status, i);
106 STATUS_TO_TEXT(SIGSTATE, status, i);
107 STATUS_TO_TEXT(WRPROTECT, status, i);
108 STATUS_TO_TEXT(CARD_REMOVE_A, status, i);
109 STATUS_TO_TEXT(CARD_INSERT_A, status, i);
110 STATUS_TO_TEXT(SIGSTATE_A, status, i);
111 STATUS_TO_TEXT(CMD_IDX_ERR, status, i);
112 STATUS_TO_TEXT(STOPBIT_ERR, status, i);
113 STATUS_TO_TEXT(ILL_FUNC, status, i);
114 STATUS_TO_TEXT(CMD_BUSY, status, i);
115 STATUS_TO_TEXT(CMDRESPEND, status, i);
116 STATUS_TO_TEXT(DATAEND, status, i);
117 STATUS_TO_TEXT(CRCFAIL, status, i);
118 STATUS_TO_TEXT(DATATIMEOUT, status, i);
119 STATUS_TO_TEXT(CMDTIMEOUT, status, i);
120 STATUS_TO_TEXT(RXOVERFLOW, status, i);
121 STATUS_TO_TEXT(TXUNDERRUN, status, i);
122 STATUS_TO_TEXT(RXRDY, status, i);
123 STATUS_TO_TEXT(TXRQ, status, i);
124 STATUS_TO_TEXT(ILL_ACCESS, status, i);
129 #define pr_debug_status(s) do { } while (0)
132 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
134 struct tmio_mmc_host *host = mmc_priv(mmc);
136 if (enable && !host->sdio_irq_enabled) {
139 /* Keep device active while SDIO irq is enabled */
140 pm_runtime_get_sync(mmc_dev(mmc));
142 host->sdio_irq_enabled = true;
143 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL &
144 ~TMIO_SDIO_STAT_IOIRQ;
146 /* Clear obsolete interrupts before enabling */
147 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
148 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
149 sdio_status |= TMIO_SDIO_SETBITS_MASK;
150 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
152 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
153 } else if (!enable && host->sdio_irq_enabled) {
154 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
155 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
157 host->sdio_irq_enabled = false;
158 pm_runtime_mark_last_busy(mmc_dev(mmc));
159 pm_runtime_put_autosuspend(mmc_dev(mmc));
163 static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
165 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN |
166 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
167 msleep(host->pdata->flags & TMIO_MMC_MIN_RCAR2 ? 1 : 10);
169 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
170 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
175 static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
177 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
178 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
182 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
183 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
184 msleep(host->pdata->flags & TMIO_MMC_MIN_RCAR2 ? 5 : 10);
187 static void tmio_mmc_set_clock(struct tmio_mmc_host *host,
188 unsigned int new_clock)
192 if (new_clock == 0) {
193 tmio_mmc_clk_stop(host);
197 if (host->clk_update)
198 clock = host->clk_update(host, new_clock) / 512;
200 clock = host->mmc->f_min;
202 for (clk = 0x80000080; new_clock >= (clock << 1); clk >>= 1)
205 /* 1/1 clock is option */
206 if ((host->pdata->flags & TMIO_MMC_CLK_ACTUAL) && ((clk >> 22) & 0x1))
209 if (host->set_clk_div)
210 host->set_clk_div(host->pdev, (clk >> 22) & 1);
212 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
213 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
214 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & CLK_CTL_DIV_MASK);
215 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
218 tmio_mmc_clk_start(host);
221 static void tmio_mmc_reset(struct tmio_mmc_host *host)
223 /* FIXME - should we set stop clock reg here */
224 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
225 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
226 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
228 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
229 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
230 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
234 static void tmio_mmc_reset_work(struct work_struct *work)
236 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
237 delayed_reset_work.work);
238 struct mmc_request *mrq;
241 spin_lock_irqsave(&host->lock, flags);
245 * is request already finished? Since we use a non-blocking
246 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
247 * us, so, have to check for IS_ERR(host->mrq)
249 if (IS_ERR_OR_NULL(mrq)
250 || time_is_after_jiffies(host->last_req_ts +
251 msecs_to_jiffies(CMDREQ_TIMEOUT))) {
252 spin_unlock_irqrestore(&host->lock, flags);
256 dev_warn(&host->pdev->dev,
257 "timeout waiting for hardware interrupt (CMD%u)\n",
261 host->data->error = -ETIMEDOUT;
263 host->cmd->error = -ETIMEDOUT;
265 mrq->cmd->error = -ETIMEDOUT;
269 host->force_pio = false;
271 spin_unlock_irqrestore(&host->lock, flags);
273 tmio_mmc_reset(host);
275 /* Ready for new calls */
278 tmio_mmc_abort_dma(host);
279 mmc_request_done(host->mmc, mrq);
282 /* called with host->lock held, interrupts disabled */
283 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
285 struct mmc_request *mrq;
288 spin_lock_irqsave(&host->lock, flags);
291 if (IS_ERR_OR_NULL(mrq)) {
292 spin_unlock_irqrestore(&host->lock, flags);
298 host->force_pio = false;
300 cancel_delayed_work(&host->delayed_reset_work);
303 spin_unlock_irqrestore(&host->lock, flags);
305 if (mrq->cmd->error || (mrq->data && mrq->data->error))
306 tmio_mmc_abort_dma(host);
308 if (host->check_scc_error)
309 host->check_scc_error(host);
311 mmc_request_done(host->mmc, mrq);
314 static void tmio_mmc_done_work(struct work_struct *work)
316 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
318 tmio_mmc_finish_request(host);
321 /* These are the bitmasks the tmio chip requires to implement the MMC response
322 * types. Note that R1 and R6 are the same in this scheme. */
323 #define APP_CMD 0x0040
324 #define RESP_NONE 0x0300
325 #define RESP_R1 0x0400
326 #define RESP_R1B 0x0500
327 #define RESP_R2 0x0600
328 #define RESP_R3 0x0700
329 #define DATA_PRESENT 0x0800
330 #define TRANSFER_READ 0x1000
331 #define TRANSFER_MULTI 0x2000
332 #define SECURITY_CMD 0x4000
333 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
335 static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
337 struct mmc_data *data = host->data;
339 u32 irq_mask = TMIO_MASK_CMD;
341 /* CMD12 is handled by hardware */
342 if (cmd->opcode == MMC_STOP_TRANSMISSION && !cmd->arg) {
343 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_STP);
347 switch (mmc_resp_type(cmd)) {
348 case MMC_RSP_NONE: c |= RESP_NONE; break;
350 case MMC_RSP_R1_NO_CRC:
352 case MMC_RSP_R1B: c |= RESP_R1B; break;
353 case MMC_RSP_R2: c |= RESP_R2; break;
354 case MMC_RSP_R3: c |= RESP_R3; break;
356 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
362 /* FIXME - this seems to be ok commented out but the spec suggest this bit
363 * should be set when issuing app commands.
364 * if(cmd->flags & MMC_FLAG_ACMD)
369 if (data->blocks > 1) {
370 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
374 * Disable auto CMD12 at IO_RW_EXTENDED when
375 * multiple block transfer
377 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
378 (cmd->opcode == SD_IO_RW_EXTENDED))
381 if (data->flags & MMC_DATA_READ)
385 if (!host->native_hotplug)
386 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
387 tmio_mmc_enable_mmc_irqs(host, irq_mask);
389 /* Fire off the command */
390 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
391 sd_ctrl_write16(host, CTL_SD_CMD, c);
396 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
400 int is_read = host->data->flags & MMC_DATA_READ;
406 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
410 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, (u32 *)buf,
413 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, (u32 *)buf,
416 /* if count was multiple of 4 */
420 buf8 = (u8 *)(buf + (count >> 2));
424 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT,
426 memcpy(buf8, data, count);
428 memcpy(data, buf8, count);
429 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT,
437 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
439 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
441 /* if count was even number */
445 /* if count was odd number */
446 buf8 = (u8 *)(buf + (count >> 1));
451 * driver and this function are assuming that
452 * it is used as little endian
455 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
457 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
461 * This chip always returns (at least?) as much data as you ask for.
462 * I'm unsure what happens if you ask for less than a block. This should be
463 * looked into to ensure that a funny length read doesn't hose the controller.
465 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
467 struct mmc_data *data = host->data;
473 if ((host->chan_tx || host->chan_rx) && !host->force_pio) {
474 pr_err("PIO IRQ in DMA mode!\n");
477 pr_debug("Spurious PIO IRQ\n");
481 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
482 buf = (unsigned short *)(sg_virt + host->sg_off);
484 count = host->sg_ptr->length - host->sg_off;
485 if (count > data->blksz)
488 pr_debug("count: %08x offset: %08x flags %08x\n",
489 count, host->sg_off, data->flags);
491 /* Transfer the data */
492 tmio_mmc_transfer_data(host, buf, count);
494 host->sg_off += count;
496 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
498 if (host->sg_off == host->sg_ptr->length)
499 tmio_mmc_next_sg(host);
504 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
506 if (host->sg_ptr == &host->bounce_sg) {
508 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
509 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
510 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
514 /* needs to be called with host->lock held */
515 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
517 struct mmc_data *data = host->data;
518 struct mmc_command *stop;
523 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
528 /* FIXME - return correct transfer count on errors */
530 data->bytes_xfered = data->blocks * data->blksz;
532 data->bytes_xfered = 0;
534 pr_debug("Completed data request\n");
537 * FIXME: other drivers allow an optional stop command of any given type
538 * which we dont do, as the chip can auto generate them.
539 * Perhaps we can be smarter about when to use auto CMD12 and
540 * only issue the auto request when we know this is the desired
541 * stop command, allowing fallback to the stop command the
542 * upper layers expect. For now, we do what works.
545 if (data->flags & MMC_DATA_READ) {
546 if (host->chan_rx && !host->force_pio)
547 tmio_mmc_check_bounce_buffer(host);
548 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
551 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
556 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
557 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
558 stop->opcode, stop->arg);
560 /* fill in response from auto CMD12 */
561 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
563 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
566 schedule_work(&host->done);
569 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
571 struct mmc_data *data;
572 spin_lock(&host->lock);
578 if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
579 stat & TMIO_STAT_TXUNDERRUN)
580 data->error = -EILSEQ;
581 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
582 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
586 * Has all data been written out yet? Testing on SuperH showed,
587 * that in most cases the first interrupt comes already with the
588 * BUSY status bit clear, but on some operations, like mount or
589 * in the beginning of a write / sync / umount, there is one
590 * DATAEND interrupt with the BUSY bit set, in this cases
591 * waiting for one more interrupt fixes the problem.
593 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
594 if (status & TMIO_STAT_SCLKDIVEN)
597 if (!(status & TMIO_STAT_CMD_BUSY))
602 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
603 complete(&host->dma_dataend);
605 } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
606 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
607 complete(&host->dma_dataend);
609 tmio_mmc_do_data_irq(host);
610 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
613 spin_unlock(&host->lock);
616 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
619 struct mmc_command *cmd = host->cmd;
622 spin_lock(&host->lock);
625 pr_debug("Spurious CMD irq\n");
629 /* This controller is sicker than the PXA one. Not only do we need to
630 * drop the top 8 bits of the first response word, we also need to
631 * modify the order of the response for short response command types.
634 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
635 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
637 if (cmd->flags & MMC_RSP_136) {
638 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
639 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
640 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
642 } else if (cmd->flags & MMC_RSP_R3) {
643 cmd->resp[0] = cmd->resp[3];
646 if (stat & TMIO_STAT_CMDTIMEOUT)
647 cmd->error = -ETIMEDOUT;
648 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
649 stat & TMIO_STAT_STOPBIT_ERR ||
650 stat & TMIO_STAT_CMD_IDX_ERR)
651 cmd->error = -EILSEQ;
653 /* If there is data to handle we enable data IRQs here, and
654 * we will ultimatley finish the request in the data_end handler.
655 * If theres no data or we encountered an error, finish now.
657 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
658 if (host->data->flags & MMC_DATA_READ) {
659 if (host->force_pio || !host->chan_rx)
660 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
662 tasklet_schedule(&host->dma_issue);
664 if (host->force_pio || !host->chan_tx)
665 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
667 tasklet_schedule(&host->dma_issue);
670 schedule_work(&host->done);
674 spin_unlock(&host->lock);
677 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
678 int ireg, int status)
680 struct mmc_host *mmc = host->mmc;
682 /* Card insert / remove attempts */
683 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
684 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
685 TMIO_STAT_CARD_REMOVE);
686 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
687 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
688 !work_pending(&mmc->detect.work))
689 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
696 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host,
697 int ireg, int status)
699 /* Command completion */
700 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
701 tmio_mmc_ack_mmc_irqs(host,
702 TMIO_STAT_CMDRESPEND |
703 TMIO_STAT_CMDTIMEOUT);
704 tmio_mmc_cmd_irq(host, status);
709 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
710 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
711 tmio_mmc_pio_irq(host);
715 /* Data transfer completion */
716 if (ireg & TMIO_STAT_DATAEND) {
717 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
718 tmio_mmc_data_irq(host, status);
725 static void __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
727 struct mmc_host *mmc = host->mmc;
728 struct tmio_mmc_data *pdata = host->pdata;
729 unsigned int ireg, status;
730 unsigned int sdio_status;
732 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
735 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
736 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
738 sdio_status = status & ~TMIO_SDIO_MASK_ALL;
739 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
740 sdio_status |= TMIO_SDIO_SETBITS_MASK;
742 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
744 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
745 mmc_signal_sdio_irq(mmc);
748 irqreturn_t tmio_mmc_irq(int irq, void *devid)
750 struct tmio_mmc_host *host = devid;
751 unsigned int ireg, status;
753 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
754 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
756 pr_debug_status(status);
757 pr_debug_status(ireg);
759 /* Clear the status except the interrupt status */
760 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
762 if (__tmio_mmc_card_detect_irq(host, ireg, status))
764 if (__tmio_mmc_sdcard_irq(host, ireg, status))
767 __tmio_mmc_sdio_irq(host);
771 EXPORT_SYMBOL(tmio_mmc_irq);
773 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
774 struct mmc_data *data)
776 struct tmio_mmc_data *pdata = host->pdata;
778 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
779 data->blksz, data->blocks);
781 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
782 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
783 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
784 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
786 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
787 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
788 mmc_hostname(host->mmc), data->blksz);
793 tmio_mmc_init_sg(host, data);
796 /* Set transfer length / blocksize */
797 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
798 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
800 tmio_mmc_start_dma(host, data);
805 static void tmio_mmc_hw_reset(struct mmc_host *mmc)
807 struct tmio_mmc_host *host = mmc_priv(mmc);
810 host->hw_reset(host);
813 static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
815 struct tmio_mmc_host *host = mmc_priv(mmc);
818 if (!host->init_tuning || !host->select_tuning)
819 /* Tuning is not supported */
822 host->tap_num = host->init_tuning(host);
824 /* Tuning is not supported */
827 if (host->tap_num * 2 >= sizeof(host->taps) * BITS_PER_BYTE) {
828 dev_warn_once(&host->pdev->dev,
829 "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n");
833 bitmap_zero(host->taps, host->tap_num * 2);
835 /* Issue CMD19 twice for each tap */
836 for (i = 0; i < 2 * host->tap_num; i++) {
837 if (host->prepare_tuning)
838 host->prepare_tuning(host, i % host->tap_num);
840 ret = mmc_send_tuning(mmc, opcode, NULL);
841 if (ret && ret != -EILSEQ)
844 set_bit(i, host->taps);
849 ret = host->select_tuning(host);
853 dev_warn(&host->pdev->dev, "Tuning procedure failed\n");
854 tmio_mmc_hw_reset(mmc);
860 /* Process requests from the MMC layer */
861 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
863 struct tmio_mmc_host *host = mmc_priv(mmc);
867 spin_lock_irqsave(&host->lock, flags);
870 pr_debug("request not null\n");
871 if (IS_ERR(host->mrq)) {
872 spin_unlock_irqrestore(&host->lock, flags);
873 mrq->cmd->error = -EAGAIN;
874 mmc_request_done(mmc, mrq);
879 host->last_req_ts = jiffies;
883 spin_unlock_irqrestore(&host->lock, flags);
886 ret = tmio_mmc_start_data(host, mrq->data);
891 ret = tmio_mmc_start_command(host, mrq->cmd);
893 schedule_delayed_work(&host->delayed_reset_work,
894 msecs_to_jiffies(CMDREQ_TIMEOUT));
899 host->force_pio = false;
901 mrq->cmd->error = ret;
902 mmc_request_done(mmc, mrq);
905 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
907 if (!host->clk_enable)
910 return host->clk_enable(host);
913 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
915 if (host->clk_disable)
916 host->clk_disable(host);
919 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
921 struct mmc_host *mmc = host->mmc;
924 /* .set_ios() is returning void, so, no chance to report an error */
927 host->set_pwr(host->pdev, 1);
929 if (!IS_ERR(mmc->supply.vmmc)) {
930 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
932 * Attention: empiric value. With a b43 WiFi SDIO card this
933 * delay proved necessary for reliable card-insertion probing.
934 * 100us were not enough. Is this the same 140us delay, as in
935 * tmio_mmc_set_ios()?
940 * It seems, VccQ should be switched on after Vcc, this is also what the
941 * omap_hsmmc.c driver does.
943 if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
944 ret = regulator_enable(mmc->supply.vqmmc);
949 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
953 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
955 struct mmc_host *mmc = host->mmc;
957 if (!IS_ERR(mmc->supply.vqmmc))
958 regulator_disable(mmc->supply.vqmmc);
960 if (!IS_ERR(mmc->supply.vmmc))
961 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
964 host->set_pwr(host->pdev, 0);
967 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
968 unsigned char bus_width)
970 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
971 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
973 /* reg now applies to MMC_BUS_WIDTH_4 */
974 if (bus_width == MMC_BUS_WIDTH_1)
975 reg |= CARD_OPT_WIDTH;
976 else if (bus_width == MMC_BUS_WIDTH_8)
977 reg |= CARD_OPT_WIDTH8;
979 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
982 /* Set MMC clock / power.
983 * Note: This controller uses a simple divider scheme therefore it cannot
984 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
985 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
988 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
990 struct tmio_mmc_host *host = mmc_priv(mmc);
991 struct device *dev = &host->pdev->dev;
994 mutex_lock(&host->ios_lock);
996 spin_lock_irqsave(&host->lock, flags);
998 if (IS_ERR(host->mrq)) {
1000 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
1001 current->comm, task_pid_nr(current),
1002 ios->clock, ios->power_mode);
1003 host->mrq = ERR_PTR(-EINTR);
1006 "%s.%d: CMD%u active since %lu, now %lu!\n",
1007 current->comm, task_pid_nr(current),
1008 host->mrq->cmd->opcode, host->last_req_ts, jiffies);
1010 spin_unlock_irqrestore(&host->lock, flags);
1012 mutex_unlock(&host->ios_lock);
1016 host->mrq = ERR_PTR(-EBUSY);
1018 spin_unlock_irqrestore(&host->lock, flags);
1020 switch (ios->power_mode) {
1022 tmio_mmc_power_off(host);
1023 tmio_mmc_clk_stop(host);
1026 tmio_mmc_power_on(host, ios->vdd);
1027 tmio_mmc_set_clock(host, ios->clock);
1028 tmio_mmc_set_bus_width(host, ios->bus_width);
1031 tmio_mmc_set_clock(host, ios->clock);
1032 tmio_mmc_set_bus_width(host, ios->bus_width);
1036 /* Let things settle. delay taken from winCE driver */
1038 if (PTR_ERR(host->mrq) == -EINTR)
1039 dev_dbg(&host->pdev->dev,
1040 "%s.%d: IOS interrupted: clk %u, mode %u",
1041 current->comm, task_pid_nr(current),
1042 ios->clock, ios->power_mode);
1045 host->clk_cache = ios->clock;
1047 mutex_unlock(&host->ios_lock);
1050 static int tmio_mmc_get_ro(struct mmc_host *mmc)
1052 struct tmio_mmc_host *host = mmc_priv(mmc);
1053 struct tmio_mmc_data *pdata = host->pdata;
1054 int ret = mmc_gpio_get_ro(mmc);
1058 ret = !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
1059 (sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
1064 static int tmio_multi_io_quirk(struct mmc_card *card,
1065 unsigned int direction, int blk_size)
1067 struct tmio_mmc_host *host = mmc_priv(card->host);
1069 if (host->multi_io_quirk)
1070 return host->multi_io_quirk(card, direction, blk_size);
1075 static struct mmc_host_ops tmio_mmc_ops = {
1076 .request = tmio_mmc_request,
1077 .set_ios = tmio_mmc_set_ios,
1078 .get_ro = tmio_mmc_get_ro,
1079 .get_cd = mmc_gpio_get_cd,
1080 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1081 .multi_io_quirk = tmio_multi_io_quirk,
1082 .hw_reset = tmio_mmc_hw_reset,
1083 .execute_tuning = tmio_mmc_execute_tuning,
1086 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1088 struct tmio_mmc_data *pdata = host->pdata;
1089 struct mmc_host *mmc = host->mmc;
1091 mmc_regulator_get_supply(mmc);
1093 /* use ocr_mask if no regulator */
1094 if (!mmc->ocr_avail)
1095 mmc->ocr_avail = pdata->ocr_mask;
1099 * There is possibility that regulator has not been probed
1101 if (!mmc->ocr_avail)
1102 return -EPROBE_DEFER;
1107 static void tmio_mmc_of_parse(struct platform_device *pdev,
1108 struct tmio_mmc_data *pdata)
1110 const struct device_node *np = pdev->dev.of_node;
1114 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1115 pdata->flags |= TMIO_MMC_WRPROTECT_DISABLE;
1118 struct tmio_mmc_host*
1119 tmio_mmc_host_alloc(struct platform_device *pdev)
1121 struct tmio_mmc_host *host;
1122 struct mmc_host *mmc;
1124 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1128 host = mmc_priv(mmc);
1134 EXPORT_SYMBOL(tmio_mmc_host_alloc);
1136 void tmio_mmc_host_free(struct tmio_mmc_host *host)
1138 mmc_free_host(host->mmc);
1140 EXPORT_SYMBOL(tmio_mmc_host_free);
1142 int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
1143 struct tmio_mmc_data *pdata)
1145 struct platform_device *pdev = _host->pdev;
1146 struct mmc_host *mmc = _host->mmc;
1147 struct resource *res_ctl;
1149 u32 irq_mask = TMIO_MASK_CMD;
1151 tmio_mmc_of_parse(pdev, pdata);
1153 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1154 _host->write16_hook = NULL;
1156 res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1160 ret = mmc_of_parse(mmc);
1164 _host->pdata = pdata;
1165 platform_set_drvdata(pdev, mmc);
1167 _host->set_pwr = pdata->set_pwr;
1168 _host->set_clk_div = pdata->set_clk_div;
1170 ret = tmio_mmc_init_ocr(_host);
1174 _host->ctl = devm_ioremap(&pdev->dev,
1175 res_ctl->start, resource_size(res_ctl));
1179 tmio_mmc_ops.card_busy = _host->card_busy;
1180 tmio_mmc_ops.start_signal_voltage_switch = _host->start_signal_voltage_switch;
1181 mmc->ops = &tmio_mmc_ops;
1183 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1184 mmc->caps2 |= pdata->capabilities2;
1186 mmc->max_blk_size = 512;
1187 mmc->max_blk_count = (PAGE_SIZE / mmc->max_blk_size) *
1189 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1190 mmc->max_seg_size = mmc->max_req_size;
1192 _host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD ||
1193 mmc->caps & MMC_CAP_NEEDS_POLL ||
1194 !mmc_card_is_removable(mmc));
1197 * On Gen2+, eMMC with NONREMOVABLE currently fails because native
1198 * hotplug gets disabled. It seems RuntimePM related yet we need further
1199 * research. Since we are planning a PM overhaul anyway, let's enforce
1200 * for now the device being active by enabling native hotplug always.
1202 if (pdata->flags & TMIO_MMC_MIN_RCAR2)
1203 _host->native_hotplug = true;
1205 if (tmio_mmc_clk_enable(_host) < 0) {
1206 mmc->f_max = pdata->hclk;
1207 mmc->f_min = mmc->f_max / 512;
1211 * Check the sanity of mmc->f_min to prevent tmio_mmc_set_clock() from
1212 * looping forever...
1214 if (mmc->f_min == 0)
1218 * While using internal tmio hardware logic for card detection, we need
1219 * to ensure it stays powered for it to work.
1221 if (_host->native_hotplug)
1222 pm_runtime_get_noresume(&pdev->dev);
1224 tmio_mmc_clk_stop(_host);
1225 tmio_mmc_reset(_host);
1227 _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
1228 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1230 /* Unmask the IRQs we want to know about */
1231 if (!_host->chan_rx)
1232 irq_mask |= TMIO_MASK_READOP;
1233 if (!_host->chan_tx)
1234 irq_mask |= TMIO_MASK_WRITEOP;
1235 if (!_host->native_hotplug)
1236 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1238 _host->sdcard_irq_mask &= ~irq_mask;
1240 _host->sdio_irq_enabled = false;
1241 if (pdata->flags & TMIO_MMC_SDIO_IRQ) {
1242 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1243 sd_ctrl_write16(_host, CTL_SDIO_IRQ_MASK, _host->sdio_irq_mask);
1244 sd_ctrl_write16(_host, CTL_TRANSACTION_CTL, 0x0001);
1247 spin_lock_init(&_host->lock);
1248 mutex_init(&_host->ios_lock);
1250 /* Init delayed work for request timeouts */
1251 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1252 INIT_WORK(&_host->done, tmio_mmc_done_work);
1254 /* See if we also get DMA */
1255 tmio_mmc_request_dma(_host, pdata);
1257 pm_runtime_set_active(&pdev->dev);
1258 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1259 pm_runtime_use_autosuspend(&pdev->dev);
1260 pm_runtime_enable(&pdev->dev);
1262 ret = mmc_add_host(mmc);
1264 tmio_mmc_host_remove(_host);
1268 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1270 if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
1271 ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0);
1273 tmio_mmc_host_remove(_host);
1276 mmc_gpiod_request_cd_irq(mmc);
1281 EXPORT_SYMBOL(tmio_mmc_host_probe);
1283 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1285 struct platform_device *pdev = host->pdev;
1286 struct mmc_host *mmc = host->mmc;
1288 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1289 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1291 if (!host->native_hotplug)
1292 pm_runtime_get_sync(&pdev->dev);
1294 dev_pm_qos_hide_latency_limit(&pdev->dev);
1296 mmc_remove_host(mmc);
1297 cancel_work_sync(&host->done);
1298 cancel_delayed_work_sync(&host->delayed_reset_work);
1299 tmio_mmc_release_dma(host);
1301 pm_runtime_put_sync(&pdev->dev);
1302 pm_runtime_disable(&pdev->dev);
1304 tmio_mmc_clk_disable(host);
1306 EXPORT_SYMBOL(tmio_mmc_host_remove);
1309 int tmio_mmc_host_runtime_suspend(struct device *dev)
1311 struct mmc_host *mmc = dev_get_drvdata(dev);
1312 struct tmio_mmc_host *host = mmc_priv(mmc);
1314 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1316 if (host->clk_cache)
1317 tmio_mmc_clk_stop(host);
1319 tmio_mmc_clk_disable(host);
1323 EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend);
1325 static bool tmio_mmc_can_retune(struct tmio_mmc_host *host)
1327 return host->tap_num && mmc_can_retune(host->mmc);
1330 int tmio_mmc_host_runtime_resume(struct device *dev)
1332 struct mmc_host *mmc = dev_get_drvdata(dev);
1333 struct tmio_mmc_host *host = mmc_priv(mmc);
1335 tmio_mmc_reset(host);
1336 tmio_mmc_clk_enable(host);
1338 if (host->clk_cache)
1339 tmio_mmc_set_clock(host, host->clk_cache);
1341 tmio_mmc_enable_dma(host, true);
1343 if (tmio_mmc_can_retune(host) && host->select_tuning(host))
1344 dev_warn(&host->pdev->dev, "Tuning selection failed\n");
1348 EXPORT_SYMBOL(tmio_mmc_host_runtime_resume);
1351 MODULE_LICENSE("GPL v2");