drivers/mmc/mmc.c

   1 /*
   2  * Copyright 2008, Freescale Semiconductor, Inc
   3  * Andy Fleming
   4  *
   5  * Based vaguely on the Linux code
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include <config.h>
  11 #include <common.h>
  12 #include <command.h>
  13 #include <dm.h>
  14 #include <dm/device-internal.h>
  15 #include <errno.h>
  16 #include <mmc.h>
  17 #include <part.h>
  18 #include <malloc.h>
  19 #include <memalign.h>
  20 #include <linux/list.h>
  21 #include <div64.h>
  22 #include "mmc_private.h"
  23
  24 __weak int board_mmc_getwp(struct mmc *mmc)
  25 {
  26         return -1;
  27 }
  28
  29 int mmc_getwp(struct mmc *mmc)
  30 {
  31         int wp;
  32
  33         wp = board_mmc_getwp(mmc);
  34
  35         if (wp < 0) {
  36                 if (mmc->cfg->ops->getwp)
  37                         wp = mmc->cfg->ops->getwp(mmc);
  38                 else
  39                         wp = 0;
  40         }
  41
  42         return wp;
  43 }
  44
  45 __weak int board_mmc_getcd(struct mmc *mmc)
  46 {
  47         return -1;
  48 }
  49
  50 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
  51 {
  52         int ret;
  53
  54 #ifdef CONFIG_MMC_TRACE
  55         int i;
  56         u8 *ptr;
  57
  58         printf("CMD_SEND:%d\n", cmd->cmdidx);
  59         printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
  60         ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
  61         if (ret) {
  62                 printf("\t\tRET\t\t\t %d\n", ret);
  63         } else {
  64                 switch (cmd->resp_type) {
  65                 case MMC_RSP_NONE:
  66                         printf("\t\tMMC_RSP_NONE\n");
  67                         break;
  68                 case MMC_RSP_R1:
  69                         printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
  70                                 cmd->response[0]);
  71                         break;
  72                 case MMC_RSP_R1b:
  73                         printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
  74                                 cmd->response[0]);
  75                         break;
  76                 case MMC_RSP_R2:
  77                         printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
  78                                 cmd->response[0]);
  79                         printf("\t\t          \t\t 0x%08X \n",
  80                                 cmd->response[1]);
  81                         printf("\t\t          \t\t 0x%08X \n",
  82                                 cmd->response[2]);
  83                         printf("\t\t          \t\t 0x%08X \n",
  84                                 cmd->response[3]);
  85                         printf("\n");
  86                         printf("\t\t\t\t\tDUMPING DATA\n");
  87                         for (i = 0; i < 4; i++) {
  88                                 int j;
  89                                 printf("\t\t\t\t\t%03d - ", i*4);
  90                                 ptr = (u8 *)&cmd->response[i];
  91                                 ptr += 3;
  92                                 for (j = 0; j < 4; j++)
  93                                         printf("%02X ", *ptr--);
  94                                 printf("\n");
  95                         }
  96                         break;
  97                 case MMC_RSP_R3:
  98                         printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
  99                                 cmd->response[0]);
 100                         break;
 101                 default:
 102                         printf("\t\tERROR MMC rsp not supported\n");
 103                         break;
 104                 }
 105         }
 106 #else
 107         ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
 108 #endif
 109         return ret;
 110 }
 111
 112 int mmc_send_status(struct mmc *mmc, int timeout)
 113 {
 114         struct mmc_cmd cmd;
 115         int err, retries = 5;
 116 #ifdef CONFIG_MMC_TRACE
 117         int status;
 118 #endif
 119
 120         cmd.cmdidx = MMC_CMD_SEND_STATUS;
 121         cmd.resp_type = MMC_RSP_R1;
 122         if (!mmc_host_is_spi(mmc))
 123                 cmd.cmdarg = mmc->rca << 16;
 124
 125         while (1) {
 126                 err = mmc_send_cmd(mmc, &cmd, NULL);
 127                 if (!err) {
 128                         if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
 129                             (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
 130                              MMC_STATE_PRG)
 131                                 break;
 132                         else if (cmd.response[0] & MMC_STATUS_MASK) {
 133 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 134                                 printf("Status Error: 0x%08X\n",
 135                                         cmd.response[0]);
 136 #endif
 137                                 return COMM_ERR;
 138                         }
 139                 } else if (--retries < 0)
 140                         return err;
 141
 142                 if (timeout-- <= 0)
 143                         break;
 144
 145                 udelay(1000);
 146         }
 147
 148 #ifdef CONFIG_MMC_TRACE
 149         status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
 150         printf("CURR STATE:%d\n", status);
 151 #endif
 152         if (timeout <= 0) {
 153 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 154                 printf("Timeout waiting card ready\n");
 155 #endif
 156                 return TIMEOUT;
 157         }
 158         if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
 159                 return SWITCH_ERR;
 160
 161         return 0;
 162 }
 163
 164 int mmc_set_blocklen(struct mmc *mmc, int len)
 165 {
 166         struct mmc_cmd cmd;
 167
 168         if (mmc->ddr_mode)
 169                 return 0;
 170
 171         cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
 172         cmd.resp_type = MMC_RSP_R1;
 173         cmd.cmdarg = len;
 174
 175         return mmc_send_cmd(mmc, &cmd, NULL);
 176 }
 177
 178 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
 179                            lbaint_t blkcnt)
 180 {
 181         struct mmc_cmd cmd;
 182         struct mmc_data data;
 183
 184         if (blkcnt > 1)
 185                 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
 186         else
 187                 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
 188
 189         if (mmc->high_capacity)
 190                 cmd.cmdarg = start;
 191         else
 192                 cmd.cmdarg = start * mmc->read_bl_len;
 193
 194         cmd.resp_type = MMC_RSP_R1;
 195
 196         data.dest = dst;
 197         data.blocks = blkcnt;
 198         data.blocksize = mmc->read_bl_len;
 199         data.flags = MMC_DATA_READ;
 200
 201         if (mmc_send_cmd(mmc, &cmd, &data))
 202                 return 0;
 203
 204         if (blkcnt > 1) {
 205                 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
 206                 cmd.cmdarg = 0;
 207                 cmd.resp_type = MMC_RSP_R1b;
 208                 if (mmc_send_cmd(mmc, &cmd, NULL)) {
 209 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 210                         printf("mmc fail to send stop cmd\n");
 211 #endif
 212                         return 0;
 213                 }
 214         }
 215
 216         return blkcnt;
 217 }
 218
 219 static ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start,
 220                        lbaint_t blkcnt, void *dst)
 221 {
 222         int dev_num = block_dev->devnum;
 223         int err;
 224         lbaint_t cur, blocks_todo = blkcnt;
 225
 226         if (blkcnt == 0)
 227                 return 0;
 228
 229         struct mmc *mmc = find_mmc_device(dev_num);
 230         if (!mmc)
 231                 return 0;
 232
 233         err = blk_dselect_hwpart(block_dev, block_dev->hwpart);
 234         if (err < 0)
 235                 return 0;
 236
 237         if ((start + blkcnt) > block_dev->lba) {
 238 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 239                 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
 240                         start + blkcnt, block_dev->lba);
 241 #endif
 242                 return 0;
 243         }
 244
 245         if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
 246                 debug("%s: Failed to set blocklen\n", __func__);
 247                 return 0;
 248         }
 249
 250         do {
 251                 cur = (blocks_todo > mmc->cfg->b_max) ?
 252                         mmc->cfg->b_max : blocks_todo;
 253                 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
 254                         debug("%s: Failed to read blocks\n", __func__);
 255                         return 0;
 256                 }
 257                 blocks_todo -= cur;
 258                 start += cur;
 259                 dst += cur * mmc->read_bl_len;
 260         } while (blocks_todo > 0);
 261
 262         return blkcnt;
 263 }
 264
 265 static int mmc_go_idle(struct mmc *mmc)
 266 {
 267         struct mmc_cmd cmd;
 268         int err;
 269
 270         udelay(1000);
 271
 272         cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
 273         cmd.cmdarg = 0;
 274         cmd.resp_type = MMC_RSP_NONE;
 275
 276         err = mmc_send_cmd(mmc, &cmd, NULL);
 277
 278         if (err)
 279                 return err;
 280
 281         udelay(2000);
 282
 283         return 0;
 284 }
 285
 286 static int sd_send_op_cond(struct mmc *mmc)
 287 {
 288         int timeout = 1000;
 289         int err;
 290         struct mmc_cmd cmd;
 291
 292         while (1) {
 293                 cmd.cmdidx = MMC_CMD_APP_CMD;
 294                 cmd.resp_type = MMC_RSP_R1;
 295                 cmd.cmdarg = 0;
 296
 297                 err = mmc_send_cmd(mmc, &cmd, NULL);
 298
 299                 if (err)
 300                         return err;
 301
 302                 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
 303                 cmd.resp_type = MMC_RSP_R3;
 304
 305                 /*
 306                  * Most cards do not answer if some reserved bits
 307                  * in the ocr are set. However, Some controller
 308                  * can set bit 7 (reserved for low voltages), but
 309                  * how to manage low voltages SD card is not yet
 310                  * specified.
 311                  */
 312                 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
 313                         (mmc->cfg->voltages & 0xff8000);
 314
 315                 if (mmc->version == SD_VERSION_2)
 316                         cmd.cmdarg |= OCR_HCS;
 317
 318                 err = mmc_send_cmd(mmc, &cmd, NULL);
 319
 320                 if (err)
 321                         return err;
 322
 323                 if (cmd.response[0] & OCR_BUSY)
 324                         break;
 325
 326                 if (timeout-- <= 0)
 327                         return UNUSABLE_ERR;
 328
 329                 udelay(1000);
 330         }
 331
 332         if (mmc->version != SD_VERSION_2)
 333                 mmc->version = SD_VERSION_1_0;
 334
 335         if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
 336                 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
 337                 cmd.resp_type = MMC_RSP_R3;
 338                 cmd.cmdarg = 0;
 339
 340                 err = mmc_send_cmd(mmc, &cmd, NULL);
 341
 342                 if (err)
 343                         return err;
 344         }
 345
 346         mmc->ocr = cmd.response[0];
 347
 348         mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
 349         mmc->rca = 0;
 350
 351         return 0;
 352 }
 353
 354 static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
 355 {
 356         struct mmc_cmd cmd;
 357         int err;
 358
 359         cmd.cmdidx = MMC_CMD_SEND_OP_COND;
 360         cmd.resp_type = MMC_RSP_R3;
 361         cmd.cmdarg = 0;
 362         if (use_arg && !mmc_host_is_spi(mmc))
 363                 cmd.cmdarg = OCR_HCS |
 364                         (mmc->cfg->voltages &
 365                         (mmc->ocr & OCR_VOLTAGE_MASK)) |
 366                         (mmc->ocr & OCR_ACCESS_MODE);
 367
 368         err = mmc_send_cmd(mmc, &cmd, NULL);
 369         if (err)
 370                 return err;
 371         mmc->ocr = cmd.response[0];
 372         return 0;
 373 }
 374
 375 static int mmc_send_op_cond(struct mmc *mmc)
 376 {
 377         int err, i;
 378
 379         /* Some cards seem to need this */
 380         mmc_go_idle(mmc);
 381
 382         /* Asking to the card its capabilities */
 383         for (i = 0; i < 2; i++) {
 384                 err = mmc_send_op_cond_iter(mmc, i != 0);
 385                 if (err)
 386                         return err;
 387
 388                 /* exit if not busy (flag seems to be inverted) */
 389                 if (mmc->ocr & OCR_BUSY)
 390                         break;
 391         }
 392         mmc->op_cond_pending = 1;
 393         return 0;
 394 }
 395
 396 static int mmc_complete_op_cond(struct mmc *mmc)
 397 {
 398         struct mmc_cmd cmd;
 399         int timeout = 1000;
 400         uint start;
 401         int err;
 402
 403         mmc->op_cond_pending = 0;
 404         if (!(mmc->ocr & OCR_BUSY)) {
 405                 start = get_timer(0);
 406                 while (1) {
 407                         err = mmc_send_op_cond_iter(mmc, 1);
 408                         if (err)
 409                                 return err;
 410                         if (mmc->ocr & OCR_BUSY)
 411                                 break;
 412                         if (get_timer(start) > timeout)
 413                                 return UNUSABLE_ERR;
 414                         udelay(100);
 415                 }
 416         }
 417
 418         if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
 419                 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
 420                 cmd.resp_type = MMC_RSP_R3;
 421                 cmd.cmdarg = 0;
 422
 423                 err = mmc_send_cmd(mmc, &cmd, NULL);
 424
 425                 if (err)
 426                         return err;
 427
 428                 mmc->ocr = cmd.response[0];
 429         }
 430
 431         mmc->version = MMC_VERSION_UNKNOWN;
 432
 433         mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
 434         mmc->rca = 1;
 435
 436         return 0;
 437 }
 438
 439
 440 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
 441 {
 442         struct mmc_cmd cmd;
 443         struct mmc_data data;
 444         int err;
 445
 446         /* Get the Card Status Register */
 447         cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
 448         cmd.resp_type = MMC_RSP_R1;
 449         cmd.cmdarg = 0;
 450
 451         data.dest = (char *)ext_csd;
 452         data.blocks = 1;
 453         data.blocksize = MMC_MAX_BLOCK_LEN;
 454         data.flags = MMC_DATA_READ;
 455
 456         err = mmc_send_cmd(mmc, &cmd, &data);
 457
 458         return err;
 459 }
 460
 461
 462 static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
 463 {
 464         struct mmc_cmd cmd;
 465         int timeout = 1000;
 466         int ret;
 467
 468         cmd.cmdidx = MMC_CMD_SWITCH;
 469         cmd.resp_type = MMC_RSP_R1b;
 470         cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
 471                                  (index << 16) |
 472                                  (value << 8);
 473
 474         ret = mmc_send_cmd(mmc, &cmd, NULL);
 475
 476         /* Waiting for the ready status */
 477         if (!ret)
 478                 ret = mmc_send_status(mmc, timeout);
 479
 480         return ret;
 481
 482 }
 483
 484 static int mmc_change_freq(struct mmc *mmc)
 485 {
 486         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
 487         char cardtype;
 488         int err;
 489
 490         mmc->card_caps = 0;
 491
 492         if (mmc_host_is_spi(mmc))
 493                 return 0;
 494
 495         /* Only version 4 supports high-speed */
 496         if (mmc->version < MMC_VERSION_4)
 497                 return 0;
 498
 499         mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
 500
 501         err = mmc_send_ext_csd(mmc, ext_csd);
 502
 503         if (err)
 504                 return err;
 505
 506         cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
 507
 508         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
 509
 510         if (err)
 511                 return err == SWITCH_ERR ? 0 : err;
 512
 513         /* Now check to see that it worked */
 514         err = mmc_send_ext_csd(mmc, ext_csd);
 515
 516         if (err)
 517                 return err;
 518
 519         /* No high-speed support */
 520         if (!ext_csd[EXT_CSD_HS_TIMING])
 521                 return 0;
 522
 523         /* High Speed is set, there are two types: 52MHz and 26MHz */
 524         if (cardtype & EXT_CSD_CARD_TYPE_52) {
 525                 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
 526                         mmc->card_caps |= MMC_MODE_DDR_52MHz;
 527                 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
 528         } else {
 529                 mmc->card_caps |= MMC_MODE_HS;
 530         }
 531
 532         return 0;
 533 }
 534
 535 static int mmc_set_capacity(struct mmc *mmc, int part_num)
 536 {
 537         switch (part_num) {
 538         case 0:
 539                 mmc->capacity = mmc->capacity_user;
 540                 break;
 541         case 1:
 542         case 2:
 543                 mmc->capacity = mmc->capacity_boot;
 544                 break;
 545         case 3:
 546                 mmc->capacity = mmc->capacity_rpmb;
 547                 break;
 548         case 4:
 549         case 5:
 550         case 6:
 551         case 7:
 552                 mmc->capacity = mmc->capacity_gp[part_num - 4];
 553                 break;
 554         default:
 555                 return -1;
 556         }
 557
 558         mmc_get_blk_desc(mmc)->lba = lldiv(mmc->capacity, mmc->read_bl_len);
 559
 560         return 0;
 561 }
 562
 563 int mmc_switch_part(int dev_num, unsigned int part_num)
 564 {
 565         struct mmc *mmc = find_mmc_device(dev_num);
 566         int ret;
 567
 568         if (!mmc)
 569                 return -1;
 570
 571         ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
 572                          (mmc->part_config & ~PART_ACCESS_MASK)
 573                          | (part_num & PART_ACCESS_MASK));
 574
 575         /*
 576          * Set the capacity if the switch succeeded or was intended
 577          * to return to representing the raw device.
 578          */
 579         if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
 580                 ret = mmc_set_capacity(mmc, part_num);
 581                 mmc->block_dev.hwpart = part_num;
 582         }
 583
 584         return ret;
 585 }
 586
 587 static int mmc_select_hwpartp(struct blk_desc *desc, int hwpart)
 588 {
 589         struct mmc *mmc = find_mmc_device(desc->devnum);
 590         int ret;
 591
 592         if (!mmc)
 593                 return -ENODEV;
 594
 595         if (mmc->block_dev.hwpart == hwpart)
 596                 return 0;
 597
 598         if (mmc->part_config == MMCPART_NOAVAILABLE)
 599                 return -EMEDIUMTYPE;
 600
 601         ret = mmc_switch_part(desc->devnum, hwpart);
 602         if (ret)
 603                 return ret;
 604
 605         return 0;
 606 }
 607
 608 int mmc_select_hwpart(int dev_num, int hwpart)
 609 {
 610         struct mmc *mmc = find_mmc_device(dev_num);
 611         int ret;
 612
 613         if (!mmc)
 614                 return -ENODEV;
 615
 616         if (mmc->block_dev.hwpart == hwpart)
 617                 return 0;
 618
 619         if (mmc->part_config == MMCPART_NOAVAILABLE)
 620                 return -EMEDIUMTYPE;
 621
 622         ret = mmc_switch_part(dev_num, hwpart);
 623         if (ret)
 624                 return ret;
 625
 626         return 0;
 627 }
 628
 629 int mmc_hwpart_config(struct mmc *mmc,
 630                       const struct mmc_hwpart_conf *conf,
 631                       enum mmc_hwpart_conf_mode mode)
 632 {
 633         u8 part_attrs = 0;
 634         u32 enh_size_mult;
 635         u32 enh_start_addr;
 636         u32 gp_size_mult[4];
 637         u32 max_enh_size_mult;
 638         u32 tot_enh_size_mult = 0;
 639         u8 wr_rel_set;
 640         int i, pidx, err;
 641         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
 642
 643         if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
 644                 return -EINVAL;
 645
 646         if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
 647                 printf("eMMC >= 4.4 required for enhanced user data area\n");
 648                 return -EMEDIUMTYPE;
 649         }
 650
 651         if (!(mmc->part_support & PART_SUPPORT)) {
 652                 printf("Card does not support partitioning\n");
 653                 return -EMEDIUMTYPE;
 654         }
 655
 656         if (!mmc->hc_wp_grp_size) {
 657                 printf("Card does not define HC WP group size\n");
 658                 return -EMEDIUMTYPE;
 659         }
 660
 661         /* check partition alignment and total enhanced size */
 662         if (conf->user.enh_size) {
 663                 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
 664                     conf->user.enh_start % mmc->hc_wp_grp_size) {
 665                         printf("User data enhanced area not HC WP group "
 666                                "size aligned\n");
 667                         return -EINVAL;
 668                 }
 669                 part_attrs |= EXT_CSD_ENH_USR;
 670                 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
 671                 if (mmc->high_capacity) {
 672                         enh_start_addr = conf->user.enh_start;
 673                 } else {
 674                         enh_start_addr = (conf->user.enh_start << 9);
 675                 }
 676         } else {
 677                 enh_size_mult = 0;
 678                 enh_start_addr = 0;
 679         }
 680         tot_enh_size_mult += enh_size_mult;
 681
 682         for (pidx = 0; pidx < 4; pidx++) {
 683                 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
 684                         printf("GP%i partition not HC WP group size "
 685                                "aligned\n", pidx+1);
 686                         return -EINVAL;
 687                 }
 688                 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
 689                 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
 690                         part_attrs |= EXT_CSD_ENH_GP(pidx);
 691                         tot_enh_size_mult += gp_size_mult[pidx];
 692                 }
 693         }
 694
 695         if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
 696                 printf("Card does not support enhanced attribute\n");
 697                 return -EMEDIUMTYPE;
 698         }
 699
 700         err = mmc_send_ext_csd(mmc, ext_csd);
 701         if (err)
 702                 return err;
 703
 704         max_enh_size_mult =
 705                 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
 706                 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
 707                 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
 708         if (tot_enh_size_mult > max_enh_size_mult) {
 709                 printf("Total enhanced size exceeds maximum (%u > %u)\n",
 710                        tot_enh_size_mult, max_enh_size_mult);
 711                 return -EMEDIUMTYPE;
 712         }
 713
 714         /* The default value of EXT_CSD_WR_REL_SET is device
 715          * dependent, the values can only be changed if the
 716          * EXT_CSD_HS_CTRL_REL bit is set. The values can be
 717          * changed only once and before partitioning is completed. */
 718         wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
 719         if (conf->user.wr_rel_change) {
 720                 if (conf->user.wr_rel_set)
 721                         wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
 722                 else
 723                         wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
 724         }
 725         for (pidx = 0; pidx < 4; pidx++) {
 726                 if (conf->gp_part[pidx].wr_rel_change) {
 727                         if (conf->gp_part[pidx].wr_rel_set)
 728                                 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
 729                         else
 730                                 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
 731                 }
 732         }
 733
 734         if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
 735             !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
 736                 puts("Card does not support host controlled partition write "
 737                      "reliability settings\n");
 738                 return -EMEDIUMTYPE;
 739         }
 740
 741         if (ext_csd[EXT_CSD_PARTITION_SETTING] &
 742             EXT_CSD_PARTITION_SETTING_COMPLETED) {
 743                 printf("Card already partitioned\n");
 744                 return -EPERM;
 745         }
 746
 747         if (mode == MMC_HWPART_CONF_CHECK)
 748                 return 0;
 749
 750         /* Partitioning requires high-capacity size definitions */
 751         if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
 752                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 753                                  EXT_CSD_ERASE_GROUP_DEF, 1);
 754
 755                 if (err)
 756                         return err;
 757
 758                 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
 759
 760                 /* update erase group size to be high-capacity */
 761                 mmc->erase_grp_size =
 762                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
 763
 764         }
 765
 766         /* all OK, write the configuration */
 767         for (i = 0; i < 4; i++) {
 768                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 769                                  EXT_CSD_ENH_START_ADDR+i,
 770                                  (enh_start_addr >> (i*8)) & 0xFF);
 771                 if (err)
 772                         return err;
 773         }
 774         for (i = 0; i < 3; i++) {
 775                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 776                                  EXT_CSD_ENH_SIZE_MULT+i,
 777                                  (enh_size_mult >> (i*8)) & 0xFF);
 778                 if (err)
 779                         return err;
 780         }
 781         for (pidx = 0; pidx < 4; pidx++) {
 782                 for (i = 0; i < 3; i++) {
 783                         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 784                                          EXT_CSD_GP_SIZE_MULT+pidx*3+i,
 785                                          (gp_size_mult[pidx] >> (i*8)) & 0xFF);
 786                         if (err)
 787                                 return err;
 788                 }
 789         }
 790         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 791                          EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
 792         if (err)
 793                 return err;
 794
 795         if (mode == MMC_HWPART_CONF_SET)
 796                 return 0;
 797
 798         /* The WR_REL_SET is a write-once register but shall be
 799          * written before setting PART_SETTING_COMPLETED. As it is
 800          * write-once we can only write it when completing the
 801          * partitioning. */
 802         if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
 803                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 804                                  EXT_CSD_WR_REL_SET, wr_rel_set);
 805                 if (err)
 806                         return err;
 807         }
 808
 809         /* Setting PART_SETTING_COMPLETED confirms the partition
 810          * configuration but it only becomes effective after power
 811          * cycle, so we do not adjust the partition related settings
 812          * in the mmc struct. */
 813
 814         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 815                          EXT_CSD_PARTITION_SETTING,
 816                          EXT_CSD_PARTITION_SETTING_COMPLETED);
 817         if (err)
 818                 return err;
 819
 820         return 0;
 821 }
 822
 823 int mmc_getcd(struct mmc *mmc)
 824 {
 825         int cd;
 826
 827         cd = board_mmc_getcd(mmc);
 828
 829         if (cd < 0) {
 830                 if (mmc->cfg->ops->getcd)
 831                         cd = mmc->cfg->ops->getcd(mmc);
 832                 else
 833                         cd = 1;
 834         }
 835
 836         return cd;
 837 }
 838
 839 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
 840 {
 841         struct mmc_cmd cmd;
 842         struct mmc_data data;
 843
 844         /* Switch the frequency */
 845         cmd.cmdidx = SD_CMD_SWITCH_FUNC;
 846         cmd.resp_type = MMC_RSP_R1;
 847         cmd.cmdarg = (mode << 31) | 0xffffff;
 848         cmd.cmdarg &= ~(0xf << (group * 4));
 849         cmd.cmdarg |= value << (group * 4);
 850
 851         data.dest = (char *)resp;
 852         data.blocksize = 64;
 853         data.blocks = 1;
 854         data.flags = MMC_DATA_READ;
 855
 856         return mmc_send_cmd(mmc, &cmd, &data);
 857 }
 858
 859
 860 static int sd_change_freq(struct mmc *mmc)
 861 {
 862         int err;
 863         struct mmc_cmd cmd;
 864         ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
 865         ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
 866         struct mmc_data data;
 867         int timeout;
 868
 869         mmc->card_caps = 0;
 870
 871         if (mmc_host_is_spi(mmc))
 872                 return 0;
 873
 874         /* Read the SCR to find out if this card supports higher speeds */
 875         cmd.cmdidx = MMC_CMD_APP_CMD;
 876         cmd.resp_type = MMC_RSP_R1;
 877         cmd.cmdarg = mmc->rca << 16;
 878
 879         err = mmc_send_cmd(mmc, &cmd, NULL);
 880
 881         if (err)
 882                 return err;
 883
 884         cmd.cmdidx = SD_CMD_APP_SEND_SCR;
 885         cmd.resp_type = MMC_RSP_R1;
 886         cmd.cmdarg = 0;
 887
 888         timeout = 3;
 889
 890 retry_scr:
 891         data.dest = (char *)scr;
 892         data.blocksize = 8;
 893         data.blocks = 1;
 894         data.flags = MMC_DATA_READ;
 895
 896         err = mmc_send_cmd(mmc, &cmd, &data);
 897
 898         if (err) {
 899                 if (timeout--)
 900                         goto retry_scr;
 901
 902                 return err;
 903         }
 904
 905         mmc->scr[0] = __be32_to_cpu(scr[0]);
 906         mmc->scr[1] = __be32_to_cpu(scr[1]);
 907
 908         switch ((mmc->scr[0] >> 24) & 0xf) {
 909         case 0:
 910                 mmc->version = SD_VERSION_1_0;
 911                 break;
 912         case 1:
 913                 mmc->version = SD_VERSION_1_10;
 914                 break;
 915         case 2:
 916                 mmc->version = SD_VERSION_2;
 917                 if ((mmc->scr[0] >> 15) & 0x1)
 918                         mmc->version = SD_VERSION_3;
 919                 break;
 920         default:
 921                 mmc->version = SD_VERSION_1_0;
 922                 break;
 923         }
 924
 925         if (mmc->scr[0] & SD_DATA_4BIT)
 926                 mmc->card_caps |= MMC_MODE_4BIT;
 927
 928         /* Version 1.0 doesn't support switching */
 929         if (mmc->version == SD_VERSION_1_0)
 930                 return 0;
 931
 932         timeout = 4;
 933         while (timeout--) {
 934                 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
 935                                 (u8 *)switch_status);
 936
 937                 if (err)
 938                         return err;
 939
 940                 /* The high-speed function is busy.  Try again */
 941                 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
 942                         break;
 943         }
 944
 945         /* If high-speed isn't supported, we return */
 946         if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
 947                 return 0;
 948
 949         /*
 950          * If the host doesn't support SD_HIGHSPEED, do not switch card to
 951          * HIGHSPEED mode even if the card support SD_HIGHSPPED.
 952          * This can avoid furthur problem when the card runs in different
 953          * mode between the host.
 954          */
 955         if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
 956                 (mmc->cfg->host_caps & MMC_MODE_HS)))
 957                 return 0;
 958
 959         err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
 960
 961         if (err)
 962                 return err;
 963
 964         if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
 965                 mmc->card_caps |= MMC_MODE_HS;
 966
 967         return 0;
 968 }
 969
 970 /* frequency bases */
 971 /* divided by 10 to be nice to platforms without floating point */
 972 static const int fbase[] = {
 973         10000,
 974         100000,
 975         1000000,
 976         10000000,
 977 };
 978
 979 /* Multiplier values for TRAN_SPEED.  Multiplied by 10 to be nice
 980  * to platforms without floating point.
 981  */
 982 static const int multipliers[] = {
 983         0,      /* reserved */
 984         10,
 985         12,
 986         13,
 987         15,
 988         20,
 989         25,
 990         30,
 991         35,
 992         40,
 993         45,
 994         50,
 995         55,
 996         60,
 997         70,
 998         80,
 999 };
1000
1001 static void mmc_set_ios(struct mmc *mmc)
1002 {
1003         if (mmc->cfg->ops->set_ios)
1004                 mmc->cfg->ops->set_ios(mmc);
1005 }
1006
1007 void mmc_set_clock(struct mmc *mmc, uint clock)
1008 {
1009         if (clock > mmc->cfg->f_max)
1010                 clock = mmc->cfg->f_max;
1011
1012         if (clock < mmc->cfg->f_min)
1013                 clock = mmc->cfg->f_min;
1014
1015         mmc->clock = clock;
1016
1017         mmc_set_ios(mmc);
1018 }
1019
1020 static void mmc_set_bus_width(struct mmc *mmc, uint width)
1021 {
1022         mmc->bus_width = width;
1023
1024         mmc_set_ios(mmc);
1025 }
1026
1027 static int mmc_startup(struct mmc *mmc)
1028 {
1029         int err, i;
1030         uint mult, freq;
1031         u64 cmult, csize, capacity;
1032         struct mmc_cmd cmd;
1033         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1034         ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
1035         int timeout = 1000;
1036         bool has_parts = false;
1037         bool part_completed;
1038         struct blk_desc *bdesc;
1039
1040 #ifdef CONFIG_MMC_SPI_CRC_ON
1041         if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
1042                 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
1043                 cmd.resp_type = MMC_RSP_R1;
1044                 cmd.cmdarg = 1;
1045                 err = mmc_send_cmd(mmc, &cmd, NULL);
1046
1047                 if (err)
1048                         return err;
1049         }
1050 #endif
1051
1052         /* Put the Card in Identify Mode */
1053         cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
1054                 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
1055         cmd.resp_type = MMC_RSP_R2;
1056         cmd.cmdarg = 0;
1057
1058         err = mmc_send_cmd(mmc, &cmd, NULL);
1059
1060         if (err)
1061                 return err;
1062
1063         memcpy(mmc->cid, cmd.response, 16);
1064
1065         /*
1066          * For MMC cards, set the Relative Address.
1067          * For SD cards, get the Relatvie Address.
1068          * This also puts the cards into Standby State
1069          */
1070         if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1071                 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
1072                 cmd.cmdarg = mmc->rca << 16;
1073                 cmd.resp_type = MMC_RSP_R6;
1074
1075                 err = mmc_send_cmd(mmc, &cmd, NULL);
1076
1077                 if (err)
1078                         return err;
1079
1080                 if (IS_SD(mmc))
1081                         mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1082         }
1083
1084         /* Get the Card-Specific Data */
1085         cmd.cmdidx = MMC_CMD_SEND_CSD;
1086         cmd.resp_type = MMC_RSP_R2;
1087         cmd.cmdarg = mmc->rca << 16;
1088
1089         err = mmc_send_cmd(mmc, &cmd, NULL);
1090
1091         /* Waiting for the ready status */
1092         mmc_send_status(mmc, timeout);
1093
1094         if (err)
1095                 return err;
1096
1097         mmc->csd[0] = cmd.response[0];
1098         mmc->csd[1] = cmd.response[1];
1099         mmc->csd[2] = cmd.response[2];
1100         mmc->csd[3] = cmd.response[3];
1101
1102         if (mmc->version == MMC_VERSION_UNKNOWN) {
1103                 int version = (cmd.response[0] >> 26) & 0xf;
1104
1105                 switch (version) {
1106                 case 0:
1107                         mmc->version = MMC_VERSION_1_2;
1108                         break;
1109                 case 1:
1110                         mmc->version = MMC_VERSION_1_4;
1111                         break;
1112                 case 2:
1113                         mmc->version = MMC_VERSION_2_2;
1114                         break;
1115                 case 3:
1116                         mmc->version = MMC_VERSION_3;
1117                         break;
1118                 case 4:
1119                         mmc->version = MMC_VERSION_4;
1120                         break;
1121                 default:
1122                         mmc->version = MMC_VERSION_1_2;
1123                         break;
1124                 }
1125         }
1126
1127         /* divide frequency by 10, since the mults are 10x bigger */
1128         freq = fbase[(cmd.response[0] & 0x7)];
1129         mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
1130
1131         mmc->tran_speed = freq * mult;
1132
1133         mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
1134         mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
1135
1136         if (IS_SD(mmc))
1137                 mmc->write_bl_len = mmc->read_bl_len;
1138         else
1139                 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
1140
1141         if (mmc->high_capacity) {
1142                 csize = (mmc->csd[1] & 0x3f) << 16
1143                         | (mmc->csd[2] & 0xffff0000) >> 16;
1144                 cmult = 8;
1145         } else {
1146                 csize = (mmc->csd[1] & 0x3ff) << 2
1147                         | (mmc->csd[2] & 0xc0000000) >> 30;
1148                 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1149         }
1150
1151         mmc->capacity_user = (csize + 1) << (cmult + 2);
1152         mmc->capacity_user *= mmc->read_bl_len;
1153         mmc->capacity_boot = 0;
1154         mmc->capacity_rpmb = 0;
1155         for (i = 0; i < 4; i++)
1156                 mmc->capacity_gp[i] = 0;
1157
1158         if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1159                 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1160
1161         if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1162                 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1163
1164         if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
1165                 cmd.cmdidx = MMC_CMD_SET_DSR;
1166                 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
1167                 cmd.resp_type = MMC_RSP_NONE;
1168                 if (mmc_send_cmd(mmc, &cmd, NULL))
1169                         printf("MMC: SET_DSR failed\n");
1170         }
1171
1172         /* Select the card, and put it into Transfer Mode */
1173         if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1174                 cmd.cmdidx = MMC_CMD_SELECT_CARD;
1175                 cmd.resp_type = MMC_RSP_R1;
1176                 cmd.cmdarg = mmc->rca << 16;
1177                 err = mmc_send_cmd(mmc, &cmd, NULL);
1178
1179                 if (err)
1180                         return err;
1181         }
1182
1183         /*
1184          * For SD, its erase group is always one sector
1185          */
1186         mmc->erase_grp_size = 1;
1187         mmc->part_config = MMCPART_NOAVAILABLE;
1188         if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1189                 /* check  ext_csd version and capacity */
1190                 err = mmc_send_ext_csd(mmc, ext_csd);
1191                 if (err)
1192                         return err;
1193                 if (ext_csd[EXT_CSD_REV] >= 2) {
1194                         /*
1195                          * According to the JEDEC Standard, the value of
1196                          * ext_csd's capacity is valid if the value is more
1197                          * than 2GB
1198                          */
1199                         capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1200                                         | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1201                                         | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1202                                         | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
1203                         capacity *= MMC_MAX_BLOCK_LEN;
1204                         if ((capacity >> 20) > 2 * 1024)
1205                                 mmc->capacity_user = capacity;
1206                 }
1207
1208                 switch (ext_csd[EXT_CSD_REV]) {
1209                 case 1:
1210                         mmc->version = MMC_VERSION_4_1;
1211                         break;
1212                 case 2:
1213                         mmc->version = MMC_VERSION_4_2;
1214                         break;
1215                 case 3:
1216                         mmc->version = MMC_VERSION_4_3;
1217                         break;
1218                 case 5:
1219                         mmc->version = MMC_VERSION_4_41;
1220                         break;
1221                 case 6:
1222                         mmc->version = MMC_VERSION_4_5;
1223                         break;
1224                 case 7:
1225                         mmc->version = MMC_VERSION_5_0;
1226                         break;
1227                 }
1228
1229                 /* The partition data may be non-zero but it is only
1230                  * effective if PARTITION_SETTING_COMPLETED is set in
1231                  * EXT_CSD, so ignore any data if this bit is not set,
1232                  * except for enabling the high-capacity group size
1233                  * definition (see below). */
1234                 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1235                                     EXT_CSD_PARTITION_SETTING_COMPLETED);
1236
1237                 /* store the partition info of emmc */
1238                 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1239                 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1240                     ext_csd[EXT_CSD_BOOT_MULT])
1241                         mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
1242                 if (part_completed &&
1243                     (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
1244                         mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1245
1246                 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1247
1248                 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1249
1250                 for (i = 0; i < 4; i++) {
1251                         int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1252                         uint mult = (ext_csd[idx + 2] << 16) +
1253                                 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1254                         if (mult)
1255                                 has_parts = true;
1256                         if (!part_completed)
1257                                 continue;
1258                         mmc->capacity_gp[i] = mult;
1259                         mmc->capacity_gp[i] *=
1260                                 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1261                         mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1262                         mmc->capacity_gp[i] <<= 19;
1263                 }
1264
1265                 if (part_completed) {
1266                         mmc->enh_user_size =
1267                                 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
1268                                 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
1269                                 ext_csd[EXT_CSD_ENH_SIZE_MULT];
1270                         mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1271                         mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1272                         mmc->enh_user_size <<= 19;
1273                         mmc->enh_user_start =
1274                                 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
1275                                 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
1276                                 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
1277                                 ext_csd[EXT_CSD_ENH_START_ADDR];
1278                         if (mmc->high_capacity)
1279                                 mmc->enh_user_start <<= 9;
1280                 }
1281
1282                 /*
1283                  * Host needs to enable ERASE_GRP_DEF bit if device is
1284                  * partitioned. This bit will be lost every time after a reset
1285                  * or power off. This will affect erase size.
1286                  */
1287                 if (part_completed)
1288                         has_parts = true;
1289                 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
1290                     (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1291                         has_parts = true;
1292                 if (has_parts) {
1293                         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1294                                 EXT_CSD_ERASE_GROUP_DEF, 1);
1295
1296                         if (err)
1297                                 return err;
1298                         else
1299                                 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1300                 }
1301
1302                 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
1303                         /* Read out group size from ext_csd */
1304                         mmc->erase_grp_size =
1305                                 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1306                         /*
1307                          * if high capacity and partition setting completed
1308                          * SEC_COUNT is valid even if it is smaller than 2 GiB
1309                          * JEDEC Standard JESD84-B45, 6.2.4
1310                          */
1311                         if (mmc->high_capacity && part_completed) {
1312                                 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1313                                         (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1314                                         (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1315                                         (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1316                                 capacity *= MMC_MAX_BLOCK_LEN;
1317                                 mmc->capacity_user = capacity;
1318                         }
1319                 } else {
1320                         /* Calculate the group size from the csd value. */
1321                         int erase_gsz, erase_gmul;
1322                         erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1323                         erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1324                         mmc->erase_grp_size = (erase_gsz + 1)
1325                                 * (erase_gmul + 1);
1326                 }
1327
1328                 mmc->hc_wp_grp_size = 1024
1329                         * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1330                         * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1331
1332                 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1333         }
1334
1335         err = mmc_set_capacity(mmc, mmc_get_blk_desc(mmc)->hwpart);
1336         if (err)
1337                 return err;
1338
1339         if (IS_SD(mmc))
1340                 err = sd_change_freq(mmc);
1341         else
1342                 err = mmc_change_freq(mmc);
1343
1344         if (err)
1345                 return err;
1346
1347         /* Restrict card's capabilities by what the host can do */
1348         mmc->card_caps &= mmc->cfg->host_caps;
1349
1350         if (IS_SD(mmc)) {
1351                 if (mmc->card_caps & MMC_MODE_4BIT) {
1352                         cmd.cmdidx = MMC_CMD_APP_CMD;
1353                         cmd.resp_type = MMC_RSP_R1;
1354                         cmd.cmdarg = mmc->rca << 16;
1355
1356                         err = mmc_send_cmd(mmc, &cmd, NULL);
1357                         if (err)
1358                                 return err;
1359
1360                         cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1361                         cmd.resp_type = MMC_RSP_R1;
1362                         cmd.cmdarg = 2;
1363                         err = mmc_send_cmd(mmc, &cmd, NULL);
1364                         if (err)
1365                                 return err;
1366
1367                         mmc_set_bus_width(mmc, 4);
1368                 }
1369
1370                 if (mmc->card_caps & MMC_MODE_HS)
1371                         mmc->tran_speed = 50000000;
1372                 else
1373                         mmc->tran_speed = 25000000;
1374         } else if (mmc->version >= MMC_VERSION_4) {
1375                 /* Only version 4 of MMC supports wider bus widths */
1376                 int idx;
1377
1378                 /* An array of possible bus widths in order of preference */
1379                 static unsigned ext_csd_bits[] = {
1380                         EXT_CSD_DDR_BUS_WIDTH_8,
1381                         EXT_CSD_DDR_BUS_WIDTH_4,
1382                         EXT_CSD_BUS_WIDTH_8,
1383                         EXT_CSD_BUS_WIDTH_4,
1384                         EXT_CSD_BUS_WIDTH_1,
1385                 };
1386
1387                 /* An array to map CSD bus widths to host cap bits */
1388                 static unsigned ext_to_hostcaps[] = {
1389                         [EXT_CSD_DDR_BUS_WIDTH_4] =
1390                                 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1391                         [EXT_CSD_DDR_BUS_WIDTH_8] =
1392                                 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
1393                         [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1394                         [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1395                 };
1396
1397                 /* An array to map chosen bus width to an integer */
1398                 static unsigned widths[] = {
1399                         8, 4, 8, 4, 1,
1400                 };
1401
1402                 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1403                         unsigned int extw = ext_csd_bits[idx];
1404                         unsigned int caps = ext_to_hostcaps[extw];
1405
1406                         /*
1407                          * If the bus width is still not changed,
1408                          * don't try to set the default again.
1409                          * Otherwise, recover from switch attempts
1410                          * by switching to 1-bit bus width.
1411                          */
1412                         if (extw == EXT_CSD_BUS_WIDTH_1 &&
1413                                         mmc->bus_width == 1) {
1414                                 err = 0;
1415                                 break;
1416                         }
1417
1418                         /*
1419                          * Check to make sure the card and controller support
1420                          * these capabilities
1421                          */
1422                         if ((mmc->card_caps & caps) != caps)
1423                                 continue;
1424
1425                         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1426                                         EXT_CSD_BUS_WIDTH, extw);
1427
1428                         if (err)
1429                                 continue;
1430
1431                         mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
1432                         mmc_set_bus_width(mmc, widths[idx]);
1433
1434                         err = mmc_send_ext_csd(mmc, test_csd);
1435
1436                         if (err)
1437                                 continue;
1438
1439                         /* Only compare read only fields */
1440                         if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1441                                 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1442                             ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1443                                 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1444                             ext_csd[EXT_CSD_REV]
1445                                 == test_csd[EXT_CSD_REV] &&
1446                             ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1447                                 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1448                             memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1449                                    &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1450                                 break;
1451                         else
1452                                 err = SWITCH_ERR;
1453                 }
1454
1455                 if (err)
1456                         return err;
1457
1458                 if (mmc->card_caps & MMC_MODE_HS) {
1459                         if (mmc->card_caps & MMC_MODE_HS_52MHz)
1460                                 mmc->tran_speed = 52000000;
1461                         else
1462                                 mmc->tran_speed = 26000000;
1463                 }
1464         }
1465
1466         mmc_set_clock(mmc, mmc->tran_speed);
1467
1468         /* Fix the block length for DDR mode */
1469         if (mmc->ddr_mode) {
1470                 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1471                 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1472         }
1473
1474         /* fill in device description */
1475         bdesc = mmc_get_blk_desc(mmc);
1476         bdesc->lun = 0;
1477         bdesc->hwpart = 0;
1478         bdesc->type = 0;
1479         bdesc->blksz = mmc->read_bl_len;
1480         bdesc->log2blksz = LOG2(bdesc->blksz);
1481         bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len);
1482 #if !defined(CONFIG_SPL_BUILD) || \
1483                 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
1484                 !defined(CONFIG_USE_TINY_PRINTF))
1485         sprintf(bdesc->vendor, "Man %06x Snr %04x%04x",
1486                 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1487                 (mmc->cid[3] >> 16) & 0xffff);
1488         sprintf(bdesc->product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1489                 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1490                 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1491                 (mmc->cid[2] >> 24) & 0xff);
1492         sprintf(bdesc->revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1493                 (mmc->cid[2] >> 16) & 0xf);
1494 #else
1495         bdesc->vendor[0] = 0;
1496         bdesc->product[0] = 0;
1497         bdesc->revision[0] = 0;
1498 #endif
1499 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
1500         part_init(bdesc);
1501 #endif
1502
1503         return 0;
1504 }
1505
1506 static int mmc_send_if_cond(struct mmc *mmc)
1507 {
1508         struct mmc_cmd cmd;
1509         int err;
1510
1511         cmd.cmdidx = SD_CMD_SEND_IF_COND;
1512         /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1513         cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
1514         cmd.resp_type = MMC_RSP_R7;
1515
1516         err = mmc_send_cmd(mmc, &cmd, NULL);
1517
1518         if (err)
1519                 return err;
1520
1521         if ((cmd.response[0] & 0xff) != 0xaa)
1522                 return UNUSABLE_ERR;
1523         else
1524                 mmc->version = SD_VERSION_2;
1525
1526         return 0;
1527 }
1528
1529 /* not used any more */
1530 int __deprecated mmc_register(struct mmc *mmc)
1531 {
1532 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1533         printf("%s is deprecated! use mmc_create() instead.\n", __func__);
1534 #endif
1535         return -1;
1536 }
1537
1538 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
1539 {
1540         struct blk_desc *bdesc;
1541         struct mmc *mmc;
1542
1543         /* quick validation */
1544         if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
1545                         cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
1546                 return NULL;
1547
1548         mmc = calloc(1, sizeof(*mmc));
1549         if (mmc == NULL)
1550                 return NULL;
1551
1552         mmc->cfg = cfg;
1553         mmc->priv = priv;
1554
1555         /* the following chunk was mmc_register() */
1556
1557         /* Setup dsr related values */
1558         mmc->dsr_imp = 0;
1559         mmc->dsr = 0xffffffff;
1560         /* Setup the universal parts of the block interface just once */
1561         bdesc = mmc_get_blk_desc(mmc);
1562         bdesc->if_type = IF_TYPE_MMC;
1563         bdesc->removable = 1;
1564         bdesc->devnum = mmc_get_next_devnum();
1565         bdesc->block_read = mmc_bread;
1566         bdesc->block_write = mmc_bwrite;
1567         bdesc->block_erase = mmc_berase;
1568
1569         /* setup initial part type */
1570         bdesc->part_type = mmc->cfg->part_type;
1571         mmc_list_add(mmc);
1572
1573         return mmc;
1574 }
1575
1576 void mmc_destroy(struct mmc *mmc)
1577 {
1578         /* only freeing memory for now */
1579         free(mmc);
1580 }
1581
1582 static int mmc_get_dev(int dev, struct blk_desc **descp)
1583 {
1584         struct mmc *mmc = find_mmc_device(dev);
1585         int ret;
1586
1587         if (!mmc)
1588                 return -ENODEV;
1589         ret = mmc_init(mmc);
1590         if (ret)
1591                 return ret;
1592
1593         *descp = &mmc->block_dev;
1594
1595         return 0;
1596 }
1597
1598 /* board-specific MMC power initializations. */
1599 __weak void board_mmc_power_init(void)
1600 {
1601 }
1602
1603 int mmc_start_init(struct mmc *mmc)
1604 {
1605         int err;
1606
1607         /* we pretend there's no card when init is NULL */
1608         if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
1609                 mmc->has_init = 0;
1610 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1611                 printf("MMC: no card present\n");
1612 #endif
1613                 return NO_CARD_ERR;
1614         }
1615
1616         if (mmc->has_init)
1617                 return 0;
1618
1619 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1620         mmc_adapter_card_type_ident();
1621 #endif
1622         board_mmc_power_init();
1623
1624         /* made sure it's not NULL earlier */
1625         err = mmc->cfg->ops->init(mmc);
1626
1627         if (err)
1628                 return err;
1629
1630         mmc->ddr_mode = 0;
1631         mmc_set_bus_width(mmc, 1);
1632         mmc_set_clock(mmc, 1);
1633
1634         /* Reset the Card */
1635         err = mmc_go_idle(mmc);
1636
1637         if (err)
1638                 return err;
1639
1640         /* The internal partition reset to user partition(0) at every CMD0*/
1641         mmc_get_blk_desc(mmc)->hwpart = 0;
1642
1643         /* Test for SD version 2 */
1644         err = mmc_send_if_cond(mmc);
1645
1646         /* Now try to get the SD card's operating condition */
1647         err = sd_send_op_cond(mmc);
1648
1649         /* If the command timed out, we check for an MMC card */
1650         if (err == TIMEOUT) {
1651                 err = mmc_send_op_cond(mmc);
1652
1653                 if (err) {
1654 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1655                         printf("Card did not respond to voltage select!\n");
1656 #endif
1657                         return UNUSABLE_ERR;
1658                 }
1659         }
1660
1661         if (!err)
1662                 mmc->init_in_progress = 1;
1663
1664         return err;
1665 }
1666
1667 static int mmc_complete_init(struct mmc *mmc)
1668 {
1669         int err = 0;
1670
1671         mmc->init_in_progress = 0;
1672         if (mmc->op_cond_pending)
1673                 err = mmc_complete_op_cond(mmc);
1674
1675         if (!err)
1676                 err = mmc_startup(mmc);
1677         if (err)
1678                 mmc->has_init = 0;
1679         else
1680                 mmc->has_init = 1;
1681         return err;
1682 }
1683
1684 int mmc_init(struct mmc *mmc)
1685 {
1686         int err = 0;
1687         unsigned start;
1688
1689         if (mmc->has_init)
1690                 return 0;
1691
1692         start = get_timer(0);
1693
1694         if (!mmc->init_in_progress)
1695                 err = mmc_start_init(mmc);
1696
1697         if (!err)
1698                 err = mmc_complete_init(mmc);
1699         debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
1700         return err;
1701 }
1702
1703 int mmc_set_dsr(struct mmc *mmc, u16 val)
1704 {
1705         mmc->dsr = val;
1706         return 0;
1707 }
1708
1709 /* CPU-specific MMC initializations */
1710 __weak int cpu_mmc_init(bd_t *bis)
1711 {
1712         return -1;
1713 }
1714
1715 /* board-specific MMC initializations. */
1716 __weak int board_mmc_init(bd_t *bis)
1717 {
1718         return -1;
1719 }
1720
1721 void mmc_set_preinit(struct mmc *mmc, int preinit)
1722 {
1723         mmc->preinit = preinit;
1724 }
1725
1726 #if defined(CONFIG_DM_MMC) && defined(CONFIG_SPL_BUILD)
1727 static int mmc_probe(bd_t *bis)
1728 {
1729         return 0;
1730 }
1731 #elif defined(CONFIG_DM_MMC)
1732 static int mmc_probe(bd_t *bis)
1733 {
1734         int ret, i;
1735         struct uclass *uc;
1736         struct udevice *dev;
1737
1738         ret = uclass_get(UCLASS_MMC, &uc);
1739         if (ret)
1740                 return ret;
1741
1742         /*
1743          * Try to add them in sequence order. Really with driver model we
1744          * should allow holes, but the current MMC list does not allow that.
1745          * So if we request 0, 1, 3 we will get 0, 1, 2.
1746          */
1747         for (i = 0; ; i++) {
1748                 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
1749                 if (ret == -ENODEV)
1750                         break;
1751         }
1752         uclass_foreach_dev(dev, uc) {
1753                 ret = device_probe(dev);
1754                 if (ret)
1755                         printf("%s - probe failed: %d\n", dev->name, ret);
1756         }
1757
1758         return 0;
1759 }
1760 #else
1761 static int mmc_probe(bd_t *bis)
1762 {
1763         if (board_mmc_init(bis) < 0)
1764                 cpu_mmc_init(bis);
1765
1766         return 0;
1767 }
1768 #endif
1769
1770 int mmc_initialize(bd_t *bis)
1771 {
1772         static int initialized = 0;
1773         int ret;
1774         if (initialized)        /* Avoid initializing mmc multiple times */
1775                 return 0;
1776         initialized = 1;
1777
1778 #ifndef CONFIG_BLK
1779         mmc_list_init();
1780 #endif
1781         ret = mmc_probe(bis);
1782         if (ret)
1783                 return ret;
1784
1785 #ifndef CONFIG_SPL_BUILD
1786         print_mmc_devices(',');
1787 #endif
1788
1789         mmc_do_preinit();
1790         return 0;
1791 }
1792
1793 #ifdef CONFIG_SUPPORT_EMMC_BOOT
1794 /*
1795  * This function changes the size of boot partition and the size of rpmb
1796  * partition present on EMMC devices.
1797  *
1798  * Input Parameters:
1799  * struct *mmc: pointer for the mmc device strcuture
1800  * bootsize: size of boot partition
1801  * rpmbsize: size of rpmb partition
1802  *
1803  * Returns 0 on success.
1804  */
1805
1806 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1807                                 unsigned long rpmbsize)
1808 {
1809         int err;
1810         struct mmc_cmd cmd;
1811
1812         /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1813         cmd.cmdidx = MMC_CMD_RES_MAN;
1814         cmd.resp_type = MMC_RSP_R1b;
1815         cmd.cmdarg = MMC_CMD62_ARG1;
1816
1817         err = mmc_send_cmd(mmc, &cmd, NULL);
1818         if (err) {
1819                 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1820                 return err;
1821         }
1822
1823         /* Boot partition changing mode */
1824         cmd.cmdidx = MMC_CMD_RES_MAN;
1825         cmd.resp_type = MMC_RSP_R1b;
1826         cmd.cmdarg = MMC_CMD62_ARG2;
1827
1828         err = mmc_send_cmd(mmc, &cmd, NULL);
1829         if (err) {
1830                 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1831                 return err;
1832         }
1833         /* boot partition size is multiple of 128KB */
1834         bootsize = (bootsize * 1024) / 128;
1835
1836         /* Arg: boot partition size */
1837         cmd.cmdidx = MMC_CMD_RES_MAN;
1838         cmd.resp_type = MMC_RSP_R1b;
1839         cmd.cmdarg = bootsize;
1840
1841         err = mmc_send_cmd(mmc, &cmd, NULL);
1842         if (err) {
1843                 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1844                 return err;
1845         }
1846         /* RPMB partition size is multiple of 128KB */
1847         rpmbsize = (rpmbsize * 1024) / 128;
1848         /* Arg: RPMB partition size */
1849         cmd.cmdidx = MMC_CMD_RES_MAN;
1850         cmd.resp_type = MMC_RSP_R1b;
1851         cmd.cmdarg = rpmbsize;
1852
1853         err = mmc_send_cmd(mmc, &cmd, NULL);
1854         if (err) {
1855                 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1856                 return err;
1857         }
1858         return 0;
1859 }
1860
1861 /*
1862  * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
1863  * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
1864  * and BOOT_MODE.
1865  *
1866  * Returns 0 on success.
1867  */
1868 int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
1869 {
1870         int err;
1871
1872         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
1873                          EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
1874                          EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
1875                          EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
1876
1877         if (err)
1878                 return err;
1879         return 0;
1880 }
1881
1882 /*
1883  * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
1884  * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
1885  * PARTITION_ACCESS.
1886  *
1887  * Returns 0 on success.
1888  */
1889 int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1890 {
1891         int err;
1892
1893         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
1894                          EXT_CSD_BOOT_ACK(ack) |
1895                          EXT_CSD_BOOT_PART_NUM(part_num) |
1896                          EXT_CSD_PARTITION_ACCESS(access));
1897
1898         if (err)
1899                 return err;
1900         return 0;
1901 }
1902
1903 /*
1904  * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
1905  * for enable.  Note that this is a write-once field for non-zero values.
1906  *
1907  * Returns 0 on success.
1908  */
1909 int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
1910 {
1911         return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,
1912                           enable);
1913 }
1914 #endif
1915
1916 U_BOOT_LEGACY_BLK(mmc) = {
1917         .if_typename    = "mmc",
1918         .if_type        = IF_TYPE_MMC,
1919         .max_devs       = -1,
1920         .get_dev        = mmc_get_dev,
1921         .select_hwpart  = mmc_select_hwpartp,
1922 };