2 * Copyright 2008, Freescale Semiconductor, Inc
5 * Based vaguely on the Linux code
7 * SPDX-License-Identifier: GPL-2.0+
17 #include <linux/list.h>
19 #include "mmc_private.h"
21 static struct list_head mmc_devices;
22 static int cur_dev_num = -1;
24 __weak int board_mmc_getwp(struct mmc *mmc)
29 int mmc_getwp(struct mmc *mmc)
33 wp = board_mmc_getwp(mmc);
36 if (mmc->cfg->ops->getwp)
37 wp = mmc->cfg->ops->getwp(mmc);
45 __weak int board_mmc_getcd(struct mmc *mmc)
50 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
54 #ifdef CONFIG_MMC_TRACE
58 printf("CMD_SEND:%d\n", cmd->cmdidx);
59 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
60 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
61 switch (cmd->resp_type) {
63 printf("\t\tMMC_RSP_NONE\n");
66 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
70 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
74 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
76 printf("\t\t \t\t 0x%08X \n",
78 printf("\t\t \t\t 0x%08X \n",
80 printf("\t\t \t\t 0x%08X \n",
83 printf("\t\t\t\t\tDUMPING DATA\n");
84 for (i = 0; i < 4; i++) {
86 printf("\t\t\t\t\t%03d - ", i*4);
87 ptr = (u8 *)&cmd->response[i];
89 for (j = 0; j < 4; j++)
90 printf("%02X ", *ptr--);
95 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
99 printf("\t\tERROR MMC rsp not supported\n");
103 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
108 int mmc_send_status(struct mmc *mmc, int timeout)
111 int err, retries = 5;
112 #ifdef CONFIG_MMC_TRACE
116 cmd.cmdidx = MMC_CMD_SEND_STATUS;
117 cmd.resp_type = MMC_RSP_R1;
118 if (!mmc_host_is_spi(mmc))
119 cmd.cmdarg = mmc->rca << 16;
122 err = mmc_send_cmd(mmc, &cmd, NULL);
124 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
125 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
128 else if (cmd.response[0] & MMC_STATUS_MASK) {
129 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
130 printf("Status Error: 0x%08X\n",
135 } else if (--retries < 0)
142 #ifdef CONFIG_MMC_TRACE
143 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
144 printf("CURR STATE:%d\n", status);
147 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
148 printf("Timeout waiting card ready\n");
152 if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
158 int mmc_set_blocklen(struct mmc *mmc, int len)
165 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
166 cmd.resp_type = MMC_RSP_R1;
169 return mmc_send_cmd(mmc, &cmd, NULL);
172 struct mmc *find_mmc_device(int dev_num)
175 struct list_head *entry;
177 list_for_each(entry, &mmc_devices) {
178 m = list_entry(entry, struct mmc, link);
180 if (m->block_dev.dev == dev_num)
184 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
185 printf("MMC Device %d not found\n", dev_num);
191 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
195 struct mmc_data data;
198 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
200 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
202 if (mmc->high_capacity)
205 cmd.cmdarg = start * mmc->read_bl_len;
207 cmd.resp_type = MMC_RSP_R1;
210 data.blocks = blkcnt;
211 data.blocksize = mmc->read_bl_len;
212 data.flags = MMC_DATA_READ;
214 if (mmc_send_cmd(mmc, &cmd, &data))
218 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
220 cmd.resp_type = MMC_RSP_R1b;
221 if (mmc_send_cmd(mmc, &cmd, NULL)) {
222 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
223 printf("mmc fail to send stop cmd\n");
232 static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst)
234 lbaint_t cur, blocks_todo = blkcnt;
239 struct mmc *mmc = find_mmc_device(dev_num);
243 if ((start + blkcnt) > mmc->block_dev.lba) {
244 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
245 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
246 start + blkcnt, mmc->block_dev.lba);
251 if (mmc_set_blocklen(mmc, mmc->read_bl_len))
255 cur = (blocks_todo > mmc->cfg->b_max) ?
256 mmc->cfg->b_max : blocks_todo;
257 if(mmc_read_blocks(mmc, dst, start, cur) != cur)
261 dst += cur * mmc->read_bl_len;
262 } while (blocks_todo > 0);
267 static int mmc_go_idle(struct mmc *mmc)
274 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
276 cmd.resp_type = MMC_RSP_NONE;
278 err = mmc_send_cmd(mmc, &cmd, NULL);
288 static int sd_send_op_cond(struct mmc *mmc)
295 cmd.cmdidx = MMC_CMD_APP_CMD;
296 cmd.resp_type = MMC_RSP_R1;
299 err = mmc_send_cmd(mmc, &cmd, NULL);
304 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
305 cmd.resp_type = MMC_RSP_R3;
308 * Most cards do not answer if some reserved bits
309 * in the ocr are set. However, Some controller
310 * can set bit 7 (reserved for low voltages), but
311 * how to manage low voltages SD card is not yet
314 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
315 (mmc->cfg->voltages & 0xff8000);
317 if (mmc->version == SD_VERSION_2)
318 cmd.cmdarg |= OCR_HCS;
320 err = mmc_send_cmd(mmc, &cmd, NULL);
326 } while ((!(cmd.response[0] & OCR_BUSY)) && timeout--);
331 if (mmc->version != SD_VERSION_2)
332 mmc->version = SD_VERSION_1_0;
334 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
335 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
336 cmd.resp_type = MMC_RSP_R3;
339 err = mmc_send_cmd(mmc, &cmd, NULL);
345 mmc->ocr = cmd.response[0];
347 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
353 /* We pass in the cmd since otherwise the init seems to fail */
354 static int mmc_send_op_cond_iter(struct mmc *mmc, struct mmc_cmd *cmd,
359 cmd->cmdidx = MMC_CMD_SEND_OP_COND;
360 cmd->resp_type = MMC_RSP_R3;
362 if (use_arg && !mmc_host_is_spi(mmc)) {
364 (mmc->cfg->voltages &
365 (mmc->op_cond_response & OCR_VOLTAGE_MASK)) |
366 (mmc->op_cond_response & OCR_ACCESS_MODE);
368 if (mmc->cfg->host_caps & MMC_MODE_HC)
369 cmd->cmdarg |= OCR_HCS;
371 err = mmc_send_cmd(mmc, cmd, NULL);
374 mmc->op_cond_response = cmd->response[0];
378 static int mmc_send_op_cond(struct mmc *mmc)
383 /* Some cards seem to need this */
386 /* Asking to the card its capabilities */
387 mmc->op_cond_pending = 1;
388 for (i = 0; i < 2; i++) {
389 err = mmc_send_op_cond_iter(mmc, &cmd, i != 0);
393 /* exit if not busy (flag seems to be inverted) */
394 if (mmc->op_cond_response & OCR_BUSY)
400 static int mmc_complete_op_cond(struct mmc *mmc)
407 mmc->op_cond_pending = 0;
408 start = get_timer(0);
410 err = mmc_send_op_cond_iter(mmc, &cmd, 1);
413 if (get_timer(start) > timeout)
416 } while (!(mmc->op_cond_response & OCR_BUSY));
418 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
419 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
420 cmd.resp_type = MMC_RSP_R3;
423 err = mmc_send_cmd(mmc, &cmd, NULL);
429 mmc->version = MMC_VERSION_UNKNOWN;
430 mmc->ocr = cmd.response[0];
432 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
439 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
442 struct mmc_data data;
445 /* Get the Card Status Register */
446 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
447 cmd.resp_type = MMC_RSP_R1;
450 data.dest = (char *)ext_csd;
452 data.blocksize = MMC_MAX_BLOCK_LEN;
453 data.flags = MMC_DATA_READ;
455 err = mmc_send_cmd(mmc, &cmd, &data);
461 static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
467 cmd.cmdidx = MMC_CMD_SWITCH;
468 cmd.resp_type = MMC_RSP_R1b;
469 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
473 ret = mmc_send_cmd(mmc, &cmd, NULL);
475 /* Waiting for the ready status */
477 ret = mmc_send_status(mmc, timeout);
483 static int mmc_change_freq(struct mmc *mmc)
485 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
491 if (mmc_host_is_spi(mmc))
494 /* Only version 4 supports high-speed */
495 if (mmc->version < MMC_VERSION_4)
498 mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
500 err = mmc_send_ext_csd(mmc, ext_csd);
505 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
507 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
510 return err == SWITCH_ERR ? 0 : err;
512 /* Now check to see that it worked */
513 err = mmc_send_ext_csd(mmc, ext_csd);
518 /* No high-speed support */
519 if (!ext_csd[EXT_CSD_HS_TIMING])
522 /* High Speed is set, there are two types: 52MHz and 26MHz */
523 if (cardtype & EXT_CSD_CARD_TYPE_52) {
524 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
525 mmc->card_caps |= MMC_MODE_DDR_52MHz;
526 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
528 mmc->card_caps |= MMC_MODE_HS;
534 static int mmc_set_capacity(struct mmc *mmc, int part_num)
538 mmc->capacity = mmc->capacity_user;
542 mmc->capacity = mmc->capacity_boot;
545 mmc->capacity = mmc->capacity_rpmb;
551 mmc->capacity = mmc->capacity_gp[part_num - 4];
557 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
562 int mmc_select_hwpart(int dev_num, int hwpart)
564 struct mmc *mmc = find_mmc_device(dev_num);
570 if (mmc->part_num == hwpart)
573 if (mmc->part_config == MMCPART_NOAVAILABLE) {
574 printf("Card doesn't support part_switch\n");
578 ret = mmc_switch_part(dev_num, hwpart);
582 mmc->part_num = hwpart;
588 int mmc_switch_part(int dev_num, unsigned int part_num)
590 struct mmc *mmc = find_mmc_device(dev_num);
596 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
597 (mmc->part_config & ~PART_ACCESS_MASK)
598 | (part_num & PART_ACCESS_MASK));
601 * Set the capacity if the switch succeeded or was intended
602 * to return to representing the raw device.
604 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0)))
605 ret = mmc_set_capacity(mmc, part_num);
610 int mmc_hwpart_config(struct mmc *mmc,
611 const struct mmc_hwpart_conf *conf,
612 enum mmc_hwpart_conf_mode mode)
618 u32 max_enh_size_mult;
619 u32 tot_enh_size_mult = 0;
622 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
624 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
627 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
628 printf("eMMC >= 4.4 required for enhanced user data area\n");
632 if (!(mmc->part_support & PART_SUPPORT)) {
633 printf("Card does not support partitioning\n");
637 if (!mmc->hc_wp_grp_size) {
638 printf("Card does not define HC WP group size\n");
642 /* check partition alignment and total enhanced size */
643 if (conf->user.enh_size) {
644 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
645 conf->user.enh_start % mmc->hc_wp_grp_size) {
646 printf("User data enhanced area not HC WP group "
650 part_attrs |= EXT_CSD_ENH_USR;
651 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
652 if (mmc->high_capacity) {
653 enh_start_addr = conf->user.enh_start;
655 enh_start_addr = (conf->user.enh_start << 9);
661 tot_enh_size_mult += enh_size_mult;
663 for (pidx = 0; pidx < 4; pidx++) {
664 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
665 printf("GP%i partition not HC WP group size "
666 "aligned\n", pidx+1);
669 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
670 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
671 part_attrs |= EXT_CSD_ENH_GP(pidx);
672 tot_enh_size_mult += gp_size_mult[pidx];
676 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
677 printf("Card does not support enhanced attribute\n");
681 err = mmc_send_ext_csd(mmc, ext_csd);
686 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
687 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
688 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
689 if (tot_enh_size_mult > max_enh_size_mult) {
690 printf("Total enhanced size exceeds maximum (%u > %u)\n",
691 tot_enh_size_mult, max_enh_size_mult);
695 /* The default value of EXT_CSD_WR_REL_SET is device
696 * dependent, the values can only be changed if the
697 * EXT_CSD_HS_CTRL_REL bit is set. The values can be
698 * changed only once and before partitioning is completed. */
699 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
700 if (conf->user.wr_rel_change) {
701 if (conf->user.wr_rel_set)
702 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
704 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
706 for (pidx = 0; pidx < 4; pidx++) {
707 if (conf->gp_part[pidx].wr_rel_change) {
708 if (conf->gp_part[pidx].wr_rel_set)
709 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
711 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
715 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
716 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
717 puts("Card does not support host controlled partition write "
718 "reliability settings\n");
722 if (ext_csd[EXT_CSD_PARTITION_SETTING] &
723 EXT_CSD_PARTITION_SETTING_COMPLETED) {
724 printf("Card already partitioned\n");
728 if (mode == MMC_HWPART_CONF_CHECK)
731 /* Partitioning requires high-capacity size definitions */
732 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
733 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
734 EXT_CSD_ERASE_GROUP_DEF, 1);
739 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
741 /* update erase group size to be high-capacity */
742 mmc->erase_grp_size =
743 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
747 /* all OK, write the configuration */
748 for (i = 0; i < 4; i++) {
749 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
750 EXT_CSD_ENH_START_ADDR+i,
751 (enh_start_addr >> (i*8)) & 0xFF);
755 for (i = 0; i < 3; i++) {
756 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
757 EXT_CSD_ENH_SIZE_MULT+i,
758 (enh_size_mult >> (i*8)) & 0xFF);
762 for (pidx = 0; pidx < 4; pidx++) {
763 for (i = 0; i < 3; i++) {
764 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
765 EXT_CSD_GP_SIZE_MULT+pidx*3+i,
766 (gp_size_mult[pidx] >> (i*8)) & 0xFF);
771 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
772 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
776 if (mode == MMC_HWPART_CONF_SET)
779 /* The WR_REL_SET is a write-once register but shall be
780 * written before setting PART_SETTING_COMPLETED. As it is
781 * write-once we can only write it when completing the
783 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
784 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
785 EXT_CSD_WR_REL_SET, wr_rel_set);
790 /* Setting PART_SETTING_COMPLETED confirms the partition
791 * configuration but it only becomes effective after power
792 * cycle, so we do not adjust the partition related settings
793 * in the mmc struct. */
795 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
796 EXT_CSD_PARTITION_SETTING,
797 EXT_CSD_PARTITION_SETTING_COMPLETED);
804 int mmc_getcd(struct mmc *mmc)
808 cd = board_mmc_getcd(mmc);
811 if (mmc->cfg->ops->getcd)
812 cd = mmc->cfg->ops->getcd(mmc);
820 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
823 struct mmc_data data;
825 /* Switch the frequency */
826 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
827 cmd.resp_type = MMC_RSP_R1;
828 cmd.cmdarg = (mode << 31) | 0xffffff;
829 cmd.cmdarg &= ~(0xf << (group * 4));
830 cmd.cmdarg |= value << (group * 4);
832 data.dest = (char *)resp;
835 data.flags = MMC_DATA_READ;
837 return mmc_send_cmd(mmc, &cmd, &data);
841 static int sd_change_freq(struct mmc *mmc)
845 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
846 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
847 struct mmc_data data;
852 if (mmc_host_is_spi(mmc))
855 /* Read the SCR to find out if this card supports higher speeds */
856 cmd.cmdidx = MMC_CMD_APP_CMD;
857 cmd.resp_type = MMC_RSP_R1;
858 cmd.cmdarg = mmc->rca << 16;
860 err = mmc_send_cmd(mmc, &cmd, NULL);
865 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
866 cmd.resp_type = MMC_RSP_R1;
872 data.dest = (char *)scr;
875 data.flags = MMC_DATA_READ;
877 err = mmc_send_cmd(mmc, &cmd, &data);
886 mmc->scr[0] = __be32_to_cpu(scr[0]);
887 mmc->scr[1] = __be32_to_cpu(scr[1]);
889 switch ((mmc->scr[0] >> 24) & 0xf) {
891 mmc->version = SD_VERSION_1_0;
894 mmc->version = SD_VERSION_1_10;
897 mmc->version = SD_VERSION_2;
898 if ((mmc->scr[0] >> 15) & 0x1)
899 mmc->version = SD_VERSION_3;
902 mmc->version = SD_VERSION_1_0;
906 if (mmc->scr[0] & SD_DATA_4BIT)
907 mmc->card_caps |= MMC_MODE_4BIT;
909 /* Version 1.0 doesn't support switching */
910 if (mmc->version == SD_VERSION_1_0)
915 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
916 (u8 *)switch_status);
921 /* The high-speed function is busy. Try again */
922 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
926 /* If high-speed isn't supported, we return */
927 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
931 * If the host doesn't support SD_HIGHSPEED, do not switch card to
932 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
933 * This can avoid furthur problem when the card runs in different
934 * mode between the host.
936 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
937 (mmc->cfg->host_caps & MMC_MODE_HS)))
940 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
945 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
946 mmc->card_caps |= MMC_MODE_HS;
951 /* frequency bases */
952 /* divided by 10 to be nice to platforms without floating point */
953 static const int fbase[] = {
960 /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
961 * to platforms without floating point.
963 static const int multipliers[] = {
982 static void mmc_set_ios(struct mmc *mmc)
984 if (mmc->cfg->ops->set_ios)
985 mmc->cfg->ops->set_ios(mmc);
988 void mmc_set_clock(struct mmc *mmc, uint clock)
990 if (clock > mmc->cfg->f_max)
991 clock = mmc->cfg->f_max;
993 if (clock < mmc->cfg->f_min)
994 clock = mmc->cfg->f_min;
1001 static void mmc_set_bus_width(struct mmc *mmc, uint width)
1003 mmc->bus_width = width;
1008 static int mmc_startup(struct mmc *mmc)
1012 u64 cmult, csize, capacity;
1014 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1015 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
1017 bool has_parts = false;
1018 bool part_completed;
1020 #ifdef CONFIG_MMC_SPI_CRC_ON
1021 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
1022 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
1023 cmd.resp_type = MMC_RSP_R1;
1025 err = mmc_send_cmd(mmc, &cmd, NULL);
1032 /* Put the Card in Identify Mode */
1033 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
1034 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
1035 cmd.resp_type = MMC_RSP_R2;
1038 err = mmc_send_cmd(mmc, &cmd, NULL);
1043 memcpy(mmc->cid, cmd.response, 16);
1046 * For MMC cards, set the Relative Address.
1047 * For SD cards, get the Relatvie Address.
1048 * This also puts the cards into Standby State
1050 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1051 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
1052 cmd.cmdarg = mmc->rca << 16;
1053 cmd.resp_type = MMC_RSP_R6;
1055 err = mmc_send_cmd(mmc, &cmd, NULL);
1061 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1064 /* Get the Card-Specific Data */
1065 cmd.cmdidx = MMC_CMD_SEND_CSD;
1066 cmd.resp_type = MMC_RSP_R2;
1067 cmd.cmdarg = mmc->rca << 16;
1069 err = mmc_send_cmd(mmc, &cmd, NULL);
1071 /* Waiting for the ready status */
1072 mmc_send_status(mmc, timeout);
1077 mmc->csd[0] = cmd.response[0];
1078 mmc->csd[1] = cmd.response[1];
1079 mmc->csd[2] = cmd.response[2];
1080 mmc->csd[3] = cmd.response[3];
1082 if (mmc->version == MMC_VERSION_UNKNOWN) {
1083 int version = (cmd.response[0] >> 26) & 0xf;
1087 mmc->version = MMC_VERSION_1_2;
1090 mmc->version = MMC_VERSION_1_4;
1093 mmc->version = MMC_VERSION_2_2;
1096 mmc->version = MMC_VERSION_3;
1099 mmc->version = MMC_VERSION_4;
1102 mmc->version = MMC_VERSION_1_2;
1107 /* divide frequency by 10, since the mults are 10x bigger */
1108 freq = fbase[(cmd.response[0] & 0x7)];
1109 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
1111 mmc->tran_speed = freq * mult;
1113 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
1114 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
1117 mmc->write_bl_len = mmc->read_bl_len;
1119 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
1121 if (mmc->high_capacity) {
1122 csize = (mmc->csd[1] & 0x3f) << 16
1123 | (mmc->csd[2] & 0xffff0000) >> 16;
1126 csize = (mmc->csd[1] & 0x3ff) << 2
1127 | (mmc->csd[2] & 0xc0000000) >> 30;
1128 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1131 mmc->capacity_user = (csize + 1) << (cmult + 2);
1132 mmc->capacity_user *= mmc->read_bl_len;
1133 mmc->capacity_boot = 0;
1134 mmc->capacity_rpmb = 0;
1135 for (i = 0; i < 4; i++)
1136 mmc->capacity_gp[i] = 0;
1138 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1139 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1141 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1142 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1144 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
1145 cmd.cmdidx = MMC_CMD_SET_DSR;
1146 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
1147 cmd.resp_type = MMC_RSP_NONE;
1148 if (mmc_send_cmd(mmc, &cmd, NULL))
1149 printf("MMC: SET_DSR failed\n");
1152 /* Select the card, and put it into Transfer Mode */
1153 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1154 cmd.cmdidx = MMC_CMD_SELECT_CARD;
1155 cmd.resp_type = MMC_RSP_R1;
1156 cmd.cmdarg = mmc->rca << 16;
1157 err = mmc_send_cmd(mmc, &cmd, NULL);
1164 * For SD, its erase group is always one sector
1166 mmc->erase_grp_size = 1;
1167 mmc->part_config = MMCPART_NOAVAILABLE;
1168 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1169 /* check ext_csd version and capacity */
1170 err = mmc_send_ext_csd(mmc, ext_csd);
1173 if (ext_csd[EXT_CSD_REV] >= 2) {
1175 * According to the JEDEC Standard, the value of
1176 * ext_csd's capacity is valid if the value is more
1179 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1180 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1181 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1182 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
1183 capacity *= MMC_MAX_BLOCK_LEN;
1184 if ((capacity >> 20) > 2 * 1024)
1185 mmc->capacity_user = capacity;
1188 switch (ext_csd[EXT_CSD_REV]) {
1190 mmc->version = MMC_VERSION_4_1;
1193 mmc->version = MMC_VERSION_4_2;
1196 mmc->version = MMC_VERSION_4_3;
1199 mmc->version = MMC_VERSION_4_41;
1202 mmc->version = MMC_VERSION_4_5;
1205 mmc->version = MMC_VERSION_5_0;
1209 /* The partition data may be non-zero but it is only
1210 * effective if PARTITION_SETTING_COMPLETED is set in
1211 * EXT_CSD, so ignore any data if this bit is not set,
1212 * except for enabling the high-capacity group size
1213 * definition (see below). */
1214 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1215 EXT_CSD_PARTITION_SETTING_COMPLETED);
1217 /* store the partition info of emmc */
1218 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1219 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1220 ext_csd[EXT_CSD_BOOT_MULT])
1221 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
1222 if (part_completed &&
1223 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
1224 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1226 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1228 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1230 for (i = 0; i < 4; i++) {
1231 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1232 uint mult = (ext_csd[idx + 2] << 16) +
1233 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1236 if (!part_completed)
1238 mmc->capacity_gp[i] = mult;
1239 mmc->capacity_gp[i] *=
1240 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1241 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1242 mmc->capacity_gp[i] <<= 19;
1245 if (part_completed) {
1246 mmc->enh_user_size =
1247 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
1248 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
1249 ext_csd[EXT_CSD_ENH_SIZE_MULT];
1250 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1251 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1252 mmc->enh_user_size <<= 19;
1253 mmc->enh_user_start =
1254 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
1255 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
1256 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
1257 ext_csd[EXT_CSD_ENH_START_ADDR];
1258 if (mmc->high_capacity)
1259 mmc->enh_user_start <<= 9;
1263 * Host needs to enable ERASE_GRP_DEF bit if device is
1264 * partitioned. This bit will be lost every time after a reset
1265 * or power off. This will affect erase size.
1269 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
1270 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1273 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1274 EXT_CSD_ERASE_GROUP_DEF, 1);
1279 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1282 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
1283 /* Read out group size from ext_csd */
1284 mmc->erase_grp_size =
1285 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1287 * if high capacity and partition setting completed
1288 * SEC_COUNT is valid even if it is smaller than 2 GiB
1289 * JEDEC Standard JESD84-B45, 6.2.4
1291 if (mmc->high_capacity && part_completed) {
1292 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1293 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1294 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1295 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1296 capacity *= MMC_MAX_BLOCK_LEN;
1297 mmc->capacity_user = capacity;
1300 /* Calculate the group size from the csd value. */
1301 int erase_gsz, erase_gmul;
1302 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1303 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1304 mmc->erase_grp_size = (erase_gsz + 1)
1308 mmc->hc_wp_grp_size = 1024
1309 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1310 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1312 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1315 err = mmc_set_capacity(mmc, mmc->part_num);
1320 err = sd_change_freq(mmc);
1322 err = mmc_change_freq(mmc);
1327 /* Restrict card's capabilities by what the host can do */
1328 mmc->card_caps &= mmc->cfg->host_caps;
1331 if (mmc->card_caps & MMC_MODE_4BIT) {
1332 cmd.cmdidx = MMC_CMD_APP_CMD;
1333 cmd.resp_type = MMC_RSP_R1;
1334 cmd.cmdarg = mmc->rca << 16;
1336 err = mmc_send_cmd(mmc, &cmd, NULL);
1340 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1341 cmd.resp_type = MMC_RSP_R1;
1343 err = mmc_send_cmd(mmc, &cmd, NULL);
1347 mmc_set_bus_width(mmc, 4);
1350 if (mmc->card_caps & MMC_MODE_HS)
1351 mmc->tran_speed = 50000000;
1353 mmc->tran_speed = 25000000;
1354 } else if (mmc->version >= MMC_VERSION_4) {
1355 /* Only version 4 of MMC supports wider bus widths */
1358 /* An array of possible bus widths in order of preference */
1359 static unsigned ext_csd_bits[] = {
1360 EXT_CSD_DDR_BUS_WIDTH_8,
1361 EXT_CSD_DDR_BUS_WIDTH_4,
1362 EXT_CSD_BUS_WIDTH_8,
1363 EXT_CSD_BUS_WIDTH_4,
1364 EXT_CSD_BUS_WIDTH_1,
1367 /* An array to map CSD bus widths to host cap bits */
1368 static unsigned ext_to_hostcaps[] = {
1369 [EXT_CSD_DDR_BUS_WIDTH_4] =
1370 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1371 [EXT_CSD_DDR_BUS_WIDTH_8] =
1372 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
1373 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1374 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1377 /* An array to map chosen bus width to an integer */
1378 static unsigned widths[] = {
1382 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1383 unsigned int extw = ext_csd_bits[idx];
1384 unsigned int caps = ext_to_hostcaps[extw];
1387 * If the bus width is still not changed,
1388 * don't try to set the default again.
1389 * Otherwise, recover from switch attempts
1390 * by switching to 1-bit bus width.
1392 if (extw == EXT_CSD_BUS_WIDTH_1 &&
1393 mmc->bus_width == 1) {
1399 * Check to make sure the card and controller support
1400 * these capabilities
1402 if ((mmc->card_caps & caps) != caps)
1405 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1406 EXT_CSD_BUS_WIDTH, extw);
1411 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
1412 mmc_set_bus_width(mmc, widths[idx]);
1414 err = mmc_send_ext_csd(mmc, test_csd);
1419 /* Only compare read only fields */
1420 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1421 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1422 ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1423 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1424 ext_csd[EXT_CSD_REV]
1425 == test_csd[EXT_CSD_REV] &&
1426 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1427 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1428 memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1429 &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1438 if (mmc->card_caps & MMC_MODE_HS) {
1439 if (mmc->card_caps & MMC_MODE_HS_52MHz)
1440 mmc->tran_speed = 52000000;
1442 mmc->tran_speed = 26000000;
1446 mmc_set_clock(mmc, mmc->tran_speed);
1448 /* Fix the block length for DDR mode */
1449 if (mmc->ddr_mode) {
1450 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1451 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1454 /* fill in device description */
1455 mmc->block_dev.lun = 0;
1456 mmc->block_dev.type = 0;
1457 mmc->block_dev.blksz = mmc->read_bl_len;
1458 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
1459 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
1460 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1461 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1462 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1463 (mmc->cid[3] >> 16) & 0xffff);
1464 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1465 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1466 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1467 (mmc->cid[2] >> 24) & 0xff);
1468 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1469 (mmc->cid[2] >> 16) & 0xf);
1471 mmc->block_dev.vendor[0] = 0;
1472 mmc->block_dev.product[0] = 0;
1473 mmc->block_dev.revision[0] = 0;
1475 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
1476 init_part(&mmc->block_dev);
1482 static int mmc_send_if_cond(struct mmc *mmc)
1487 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1488 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1489 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
1490 cmd.resp_type = MMC_RSP_R7;
1492 err = mmc_send_cmd(mmc, &cmd, NULL);
1497 if ((cmd.response[0] & 0xff) != 0xaa)
1498 return UNUSABLE_ERR;
1500 mmc->version = SD_VERSION_2;
1505 /* not used any more */
1506 int __deprecated mmc_register(struct mmc *mmc)
1508 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1509 printf("%s is deprecated! use mmc_create() instead.\n", __func__);
1514 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
1518 /* quick validation */
1519 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
1520 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
1523 mmc = calloc(1, sizeof(*mmc));
1530 /* the following chunk was mmc_register() */
1532 /* Setup dsr related values */
1534 mmc->dsr = 0xffffffff;
1535 /* Setup the universal parts of the block interface just once */
1536 mmc->block_dev.if_type = IF_TYPE_MMC;
1537 mmc->block_dev.dev = cur_dev_num++;
1538 mmc->block_dev.removable = 1;
1539 mmc->block_dev.block_read = mmc_bread;
1540 mmc->block_dev.block_write = mmc_bwrite;
1541 mmc->block_dev.block_erase = mmc_berase;
1543 /* setup initial part type */
1544 mmc->block_dev.part_type = mmc->cfg->part_type;
1546 INIT_LIST_HEAD(&mmc->link);
1548 list_add_tail(&mmc->link, &mmc_devices);
1553 void mmc_destroy(struct mmc *mmc)
1555 /* only freeing memory for now */
1559 #ifdef CONFIG_PARTITIONS
1560 block_dev_desc_t *mmc_get_dev(int dev)
1562 struct mmc *mmc = find_mmc_device(dev);
1563 if (!mmc || mmc_init(mmc))
1566 return &mmc->block_dev;
1570 /* board-specific MMC power initializations. */
1571 __weak void board_mmc_power_init(void)
1575 int mmc_start_init(struct mmc *mmc)
1579 /* we pretend there's no card when init is NULL */
1580 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
1582 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1583 printf("MMC: no card present\n");
1591 board_mmc_power_init();
1593 /* made sure it's not NULL earlier */
1594 err = mmc->cfg->ops->init(mmc);
1600 mmc_set_bus_width(mmc, 1);
1601 mmc_set_clock(mmc, 1);
1603 /* Reset the Card */
1604 err = mmc_go_idle(mmc);
1609 /* The internal partition reset to user partition(0) at every CMD0*/
1612 /* Test for SD version 2 */
1613 err = mmc_send_if_cond(mmc);
1615 /* Now try to get the SD card's operating condition */
1616 err = sd_send_op_cond(mmc);
1618 /* If the command timed out, we check for an MMC card */
1619 if (err == TIMEOUT) {
1620 err = mmc_send_op_cond(mmc);
1622 if (err && err != IN_PROGRESS) {
1623 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1624 printf("Card did not respond to voltage select!\n");
1626 return UNUSABLE_ERR;
1630 if (err == IN_PROGRESS)
1631 mmc->init_in_progress = 1;
1636 static int mmc_complete_init(struct mmc *mmc)
1640 if (mmc->op_cond_pending)
1641 err = mmc_complete_op_cond(mmc);
1644 err = mmc_startup(mmc);
1649 mmc->init_in_progress = 0;
1653 int mmc_init(struct mmc *mmc)
1655 int err = IN_PROGRESS;
1661 start = get_timer(0);
1663 if (!mmc->init_in_progress)
1664 err = mmc_start_init(mmc);
1666 if (!err || err == IN_PROGRESS)
1667 err = mmc_complete_init(mmc);
1668 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
1672 int mmc_set_dsr(struct mmc *mmc, u16 val)
1678 /* CPU-specific MMC initializations */
1679 __weak int cpu_mmc_init(bd_t *bis)
1684 /* board-specific MMC initializations. */
1685 __weak int board_mmc_init(bd_t *bis)
1690 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1692 void print_mmc_devices(char separator)
1695 struct list_head *entry;
1698 list_for_each(entry, &mmc_devices) {
1699 m = list_entry(entry, struct mmc, link);
1702 mmc_type = IS_SD(m) ? "SD" : "eMMC";
1706 printf("%s: %d", m->cfg->name, m->block_dev.dev);
1708 printf(" (%s)", mmc_type);
1710 if (entry->next != &mmc_devices) {
1711 printf("%c", separator);
1712 if (separator != '\n')
1721 void print_mmc_devices(char separator) { }
1724 int get_mmc_num(void)
1729 void mmc_set_preinit(struct mmc *mmc, int preinit)
1731 mmc->preinit = preinit;
1734 static void do_preinit(void)
1737 struct list_head *entry;
1739 list_for_each(entry, &mmc_devices) {
1740 m = list_entry(entry, struct mmc, link);
1748 int mmc_initialize(bd_t *bis)
1750 INIT_LIST_HEAD (&mmc_devices);
1753 if (board_mmc_init(bis) < 0)
1756 #ifndef CONFIG_SPL_BUILD
1757 print_mmc_devices(',');
1764 #ifdef CONFIG_SUPPORT_EMMC_BOOT
1766 * This function changes the size of boot partition and the size of rpmb
1767 * partition present on EMMC devices.
1770 * struct *mmc: pointer for the mmc device strcuture
1771 * bootsize: size of boot partition
1772 * rpmbsize: size of rpmb partition
1774 * Returns 0 on success.
1777 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1778 unsigned long rpmbsize)
1783 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1784 cmd.cmdidx = MMC_CMD_RES_MAN;
1785 cmd.resp_type = MMC_RSP_R1b;
1786 cmd.cmdarg = MMC_CMD62_ARG1;
1788 err = mmc_send_cmd(mmc, &cmd, NULL);
1790 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1794 /* Boot partition changing mode */
1795 cmd.cmdidx = MMC_CMD_RES_MAN;
1796 cmd.resp_type = MMC_RSP_R1b;
1797 cmd.cmdarg = MMC_CMD62_ARG2;
1799 err = mmc_send_cmd(mmc, &cmd, NULL);
1801 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1804 /* boot partition size is multiple of 128KB */
1805 bootsize = (bootsize * 1024) / 128;
1807 /* Arg: boot partition size */
1808 cmd.cmdidx = MMC_CMD_RES_MAN;
1809 cmd.resp_type = MMC_RSP_R1b;
1810 cmd.cmdarg = bootsize;
1812 err = mmc_send_cmd(mmc, &cmd, NULL);
1814 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1817 /* RPMB partition size is multiple of 128KB */
1818 rpmbsize = (rpmbsize * 1024) / 128;
1819 /* Arg: RPMB partition size */
1820 cmd.cmdidx = MMC_CMD_RES_MAN;
1821 cmd.resp_type = MMC_RSP_R1b;
1822 cmd.cmdarg = rpmbsize;
1824 err = mmc_send_cmd(mmc, &cmd, NULL);
1826 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1833 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
1834 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
1837 * Returns 0 on success.
1839 int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
1843 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
1844 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
1845 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
1846 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
1854 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
1855 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
1858 * Returns 0 on success.
1860 int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1864 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
1865 EXT_CSD_BOOT_ACK(ack) |
1866 EXT_CSD_BOOT_PART_NUM(part_num) |
1867 EXT_CSD_PARTITION_ACCESS(access));
1875 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
1876 * for enable. Note that this is a write-once field for non-zero values.
1878 * Returns 0 on success.
1880 int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
1882 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,