2 * Copyright 2008, Freescale Semiconductor, Inc
5 * Based vaguely on the Linux code
7 * SPDX-License-Identifier: GPL-2.0+
17 #include <linux/list.h>
19 #include "mmc_private.h"
21 static struct list_head mmc_devices;
22 static int cur_dev_num = -1;
23 static int mmc_dev_count;
25 __weak int board_mmc_getwp(struct mmc *mmc)
30 int mmc_getwp(struct mmc *mmc)
34 wp = board_mmc_getwp(mmc);
37 if (mmc->cfg->ops->getwp)
38 wp = mmc->cfg->ops->getwp(mmc);
46 __weak int board_mmc_getcd(struct mmc *mmc)
51 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
55 #ifdef CONFIG_MMC_TRACE
59 printf("CMD_SEND:%d\n", cmd->cmdidx);
60 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
61 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
62 switch (cmd->resp_type) {
64 printf("\t\tMMC_RSP_NONE\n");
67 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
71 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
75 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
77 printf("\t\t \t\t 0x%08X \n",
79 printf("\t\t \t\t 0x%08X \n",
81 printf("\t\t \t\t 0x%08X \n",
84 printf("\t\t\t\t\tDUMPING DATA\n");
85 for (i = 0; i < 4; i++) {
87 printf("\t\t\t\t\t%03d - ", i*4);
88 ptr = (u8 *)&cmd->response[i];
90 for (j = 0; j < 4; j++)
91 printf("%02X ", *ptr--);
96 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
100 printf("\t\tERROR MMC rsp not supported\n");
104 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
109 int mmc_send_status(struct mmc *mmc, int timeout)
112 int err, retries = 5;
113 #ifdef CONFIG_MMC_TRACE
117 cmd.cmdidx = MMC_CMD_SEND_STATUS;
118 cmd.resp_type = MMC_RSP_R1;
119 if (!mmc_host_is_spi(mmc))
120 cmd.cmdarg = mmc->rca << 16;
123 err = mmc_send_cmd(mmc, &cmd, NULL);
125 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
126 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
129 else if (cmd.response[0] & MMC_STATUS_MASK) {
130 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
131 printf("Status Error: 0x%08X\n",
136 } else if (--retries < 0)
145 #ifdef CONFIG_MMC_TRACE
146 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
147 printf("CURR STATE:%d\n", status);
150 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
151 printf("Timeout waiting card ready\n");
155 if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
161 int mmc_set_blocklen(struct mmc *mmc, int len)
168 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
169 cmd.resp_type = MMC_RSP_R1;
172 return mmc_send_cmd(mmc, &cmd, NULL);
175 struct mmc *find_mmc_device(int dev_num)
178 struct list_head *entry;
180 list_for_each(entry, &mmc_devices) {
181 m = list_entry(entry, struct mmc, link);
183 if (m->block_dev.dev == dev_num)
187 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
188 printf("MMC Device %d not found\n", dev_num);
194 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
198 struct mmc_data data;
201 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
203 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
205 if (mmc->high_capacity)
208 cmd.cmdarg = start * mmc->read_bl_len;
210 cmd.resp_type = MMC_RSP_R1;
213 data.blocks = blkcnt;
214 data.blocksize = mmc->read_bl_len;
215 data.flags = MMC_DATA_READ;
217 if (mmc_send_cmd(mmc, &cmd, &data))
221 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
223 cmd.resp_type = MMC_RSP_R1b;
224 if (mmc_send_cmd(mmc, &cmd, NULL)) {
225 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
226 printf("mmc fail to send stop cmd\n");
235 static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst)
237 lbaint_t cur, blocks_todo = blkcnt;
242 struct mmc *mmc = find_mmc_device(dev_num);
246 if ((start + blkcnt) > mmc->block_dev.lba) {
247 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
248 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
249 start + blkcnt, mmc->block_dev.lba);
254 if (mmc_set_blocklen(mmc, mmc->read_bl_len))
258 cur = (blocks_todo > mmc->cfg->b_max) ?
259 mmc->cfg->b_max : blocks_todo;
260 if(mmc_read_blocks(mmc, dst, start, cur) != cur)
264 dst += cur * mmc->read_bl_len;
265 } while (blocks_todo > 0);
270 static int mmc_go_idle(struct mmc *mmc)
277 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
279 cmd.resp_type = MMC_RSP_NONE;
281 err = mmc_send_cmd(mmc, &cmd, NULL);
291 static int sd_send_op_cond(struct mmc *mmc)
298 cmd.cmdidx = MMC_CMD_APP_CMD;
299 cmd.resp_type = MMC_RSP_R1;
302 err = mmc_send_cmd(mmc, &cmd, NULL);
307 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
308 cmd.resp_type = MMC_RSP_R3;
311 * Most cards do not answer if some reserved bits
312 * in the ocr are set. However, Some controller
313 * can set bit 7 (reserved for low voltages), but
314 * how to manage low voltages SD card is not yet
317 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
318 (mmc->cfg->voltages & 0xff8000);
320 if (mmc->version == SD_VERSION_2)
321 cmd.cmdarg |= OCR_HCS;
323 err = mmc_send_cmd(mmc, &cmd, NULL);
328 if (cmd.response[0] & OCR_BUSY)
337 if (mmc->version != SD_VERSION_2)
338 mmc->version = SD_VERSION_1_0;
340 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
341 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
342 cmd.resp_type = MMC_RSP_R3;
345 err = mmc_send_cmd(mmc, &cmd, NULL);
351 mmc->ocr = cmd.response[0];
353 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
359 static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
364 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
365 cmd.resp_type = MMC_RSP_R3;
367 if (use_arg && !mmc_host_is_spi(mmc))
368 cmd.cmdarg = OCR_HCS |
369 (mmc->cfg->voltages &
370 (mmc->ocr & OCR_VOLTAGE_MASK)) |
371 (mmc->ocr & OCR_ACCESS_MODE);
373 err = mmc_send_cmd(mmc, &cmd, NULL);
376 mmc->ocr = cmd.response[0];
380 static int mmc_send_op_cond(struct mmc *mmc)
384 /* Some cards seem to need this */
387 /* Asking to the card its capabilities */
388 for (i = 0; i < 2; i++) {
389 err = mmc_send_op_cond_iter(mmc, i != 0);
393 /* exit if not busy (flag seems to be inverted) */
394 if (mmc->ocr & OCR_BUSY)
397 mmc->op_cond_pending = 1;
401 static int mmc_complete_op_cond(struct mmc *mmc)
408 mmc->op_cond_pending = 0;
409 if (!(mmc->ocr & OCR_BUSY)) {
410 start = get_timer_masked();
412 err = mmc_send_op_cond_iter(mmc, 1);
415 if (mmc->ocr & OCR_BUSY)
417 if (get_timer(start) > timeout)
423 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
424 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
425 cmd.resp_type = MMC_RSP_R3;
428 err = mmc_send_cmd(mmc, &cmd, NULL);
433 mmc->ocr = cmd.response[0];
436 mmc->version = MMC_VERSION_UNKNOWN;
438 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
445 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
448 struct mmc_data data;
451 /* Get the Card Status Register */
452 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
453 cmd.resp_type = MMC_RSP_R1;
456 data.dest = (char *)ext_csd;
458 data.blocksize = MMC_MAX_BLOCK_LEN;
459 data.flags = MMC_DATA_READ;
461 err = mmc_send_cmd(mmc, &cmd, &data);
467 static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
473 cmd.cmdidx = MMC_CMD_SWITCH;
474 cmd.resp_type = MMC_RSP_R1b;
475 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
479 ret = mmc_send_cmd(mmc, &cmd, NULL);
481 /* Waiting for the ready status */
483 ret = mmc_send_status(mmc, timeout);
489 static int mmc_change_freq(struct mmc *mmc)
491 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
497 if (mmc_host_is_spi(mmc))
500 /* Only version 4 supports high-speed */
501 if (mmc->version < MMC_VERSION_4)
504 mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
506 err = mmc_send_ext_csd(mmc, ext_csd);
511 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
513 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
516 return err == SWITCH_ERR ? 0 : err;
518 /* Now check to see that it worked */
519 err = mmc_send_ext_csd(mmc, ext_csd);
524 /* No high-speed support */
525 if (!ext_csd[EXT_CSD_HS_TIMING])
528 /* High Speed is set, there are two types: 52MHz and 26MHz */
529 if (cardtype & EXT_CSD_CARD_TYPE_52) {
530 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
531 mmc->card_caps |= MMC_MODE_DDR_52MHz;
532 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
534 mmc->card_caps |= MMC_MODE_HS;
540 static int mmc_set_capacity(struct mmc *mmc, int part_num)
544 mmc->capacity = mmc->capacity_user;
548 mmc->capacity = mmc->capacity_boot;
551 mmc->capacity = mmc->capacity_rpmb;
557 mmc->capacity = mmc->capacity_gp[part_num - 4];
563 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
568 int mmc_select_hwpart(int dev_num, int hwpart)
570 struct mmc *mmc = find_mmc_device(dev_num);
576 if (mmc->part_num == hwpart)
579 if (mmc->part_config == MMCPART_NOAVAILABLE) {
580 printf("Card doesn't support part_switch\n");
584 ret = mmc_switch_part(dev_num, hwpart);
588 mmc->part_num = hwpart;
594 int mmc_switch_part(int dev_num, unsigned int part_num)
596 struct mmc *mmc = find_mmc_device(dev_num);
602 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
603 (mmc->part_config & ~PART_ACCESS_MASK)
604 | (part_num & PART_ACCESS_MASK));
607 * Set the capacity if the switch succeeded or was intended
608 * to return to representing the raw device.
610 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0)))
611 ret = mmc_set_capacity(mmc, part_num);
616 int mmc_hwpart_config(struct mmc *mmc,
617 const struct mmc_hwpart_conf *conf,
618 enum mmc_hwpart_conf_mode mode)
624 u32 max_enh_size_mult;
625 u32 tot_enh_size_mult = 0;
628 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
630 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
633 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
634 printf("eMMC >= 4.4 required for enhanced user data area\n");
638 if (!(mmc->part_support & PART_SUPPORT)) {
639 printf("Card does not support partitioning\n");
643 if (!mmc->hc_wp_grp_size) {
644 printf("Card does not define HC WP group size\n");
648 /* check partition alignment and total enhanced size */
649 if (conf->user.enh_size) {
650 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
651 conf->user.enh_start % mmc->hc_wp_grp_size) {
652 printf("User data enhanced area not HC WP group "
656 part_attrs |= EXT_CSD_ENH_USR;
657 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
658 if (mmc->high_capacity) {
659 enh_start_addr = conf->user.enh_start;
661 enh_start_addr = (conf->user.enh_start << 9);
667 tot_enh_size_mult += enh_size_mult;
669 for (pidx = 0; pidx < 4; pidx++) {
670 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
671 printf("GP%i partition not HC WP group size "
672 "aligned\n", pidx+1);
675 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
676 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
677 part_attrs |= EXT_CSD_ENH_GP(pidx);
678 tot_enh_size_mult += gp_size_mult[pidx];
682 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
683 printf("Card does not support enhanced attribute\n");
687 err = mmc_send_ext_csd(mmc, ext_csd);
692 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
693 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
694 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
695 if (tot_enh_size_mult > max_enh_size_mult) {
696 printf("Total enhanced size exceeds maximum (%u > %u)\n",
697 tot_enh_size_mult, max_enh_size_mult);
701 /* The default value of EXT_CSD_WR_REL_SET is device
702 * dependent, the values can only be changed if the
703 * EXT_CSD_HS_CTRL_REL bit is set. The values can be
704 * changed only once and before partitioning is completed. */
705 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
706 if (conf->user.wr_rel_change) {
707 if (conf->user.wr_rel_set)
708 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
710 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
712 for (pidx = 0; pidx < 4; pidx++) {
713 if (conf->gp_part[pidx].wr_rel_change) {
714 if (conf->gp_part[pidx].wr_rel_set)
715 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
717 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
721 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
722 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
723 puts("Card does not support host controlled partition write "
724 "reliability settings\n");
728 if (ext_csd[EXT_CSD_PARTITION_SETTING] &
729 EXT_CSD_PARTITION_SETTING_COMPLETED) {
730 printf("Card already partitioned\n");
734 if (mode == MMC_HWPART_CONF_CHECK)
737 /* Partitioning requires high-capacity size definitions */
738 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
739 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
740 EXT_CSD_ERASE_GROUP_DEF, 1);
745 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
747 /* update erase group size to be high-capacity */
748 mmc->erase_grp_size =
749 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
753 /* all OK, write the configuration */
754 for (i = 0; i < 4; i++) {
755 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
756 EXT_CSD_ENH_START_ADDR+i,
757 (enh_start_addr >> (i*8)) & 0xFF);
761 for (i = 0; i < 3; i++) {
762 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
763 EXT_CSD_ENH_SIZE_MULT+i,
764 (enh_size_mult >> (i*8)) & 0xFF);
768 for (pidx = 0; pidx < 4; pidx++) {
769 for (i = 0; i < 3; i++) {
770 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
771 EXT_CSD_GP_SIZE_MULT+pidx*3+i,
772 (gp_size_mult[pidx] >> (i*8)) & 0xFF);
777 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
778 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
782 if (mode == MMC_HWPART_CONF_SET)
785 /* The WR_REL_SET is a write-once register but shall be
786 * written before setting PART_SETTING_COMPLETED. As it is
787 * write-once we can only write it when completing the
789 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
790 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
791 EXT_CSD_WR_REL_SET, wr_rel_set);
796 /* Setting PART_SETTING_COMPLETED confirms the partition
797 * configuration but it only becomes effective after power
798 * cycle, so we do not adjust the partition related settings
799 * in the mmc struct. */
801 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
802 EXT_CSD_PARTITION_SETTING,
803 EXT_CSD_PARTITION_SETTING_COMPLETED);
810 int mmc_getcd(struct mmc *mmc)
814 cd = board_mmc_getcd(mmc);
817 if (mmc->cfg->ops->getcd)
818 cd = mmc->cfg->ops->getcd(mmc);
826 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
829 struct mmc_data data;
831 /* Switch the frequency */
832 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
833 cmd.resp_type = MMC_RSP_R1;
834 cmd.cmdarg = (mode << 31) | 0xffffff;
835 cmd.cmdarg &= ~(0xf << (group * 4));
836 cmd.cmdarg |= value << (group * 4);
838 data.dest = (char *)resp;
841 data.flags = MMC_DATA_READ;
843 return mmc_send_cmd(mmc, &cmd, &data);
847 static int sd_change_freq(struct mmc *mmc)
851 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
852 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
853 struct mmc_data data;
858 if (mmc_host_is_spi(mmc))
861 /* Read the SCR to find out if this card supports higher speeds */
862 cmd.cmdidx = MMC_CMD_APP_CMD;
863 cmd.resp_type = MMC_RSP_R1;
864 cmd.cmdarg = mmc->rca << 16;
866 err = mmc_send_cmd(mmc, &cmd, NULL);
871 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
872 cmd.resp_type = MMC_RSP_R1;
878 data.dest = (char *)scr;
881 data.flags = MMC_DATA_READ;
883 err = mmc_send_cmd(mmc, &cmd, &data);
892 mmc->scr[0] = __be32_to_cpu(scr[0]);
893 mmc->scr[1] = __be32_to_cpu(scr[1]);
895 switch ((mmc->scr[0] >> 24) & 0xf) {
897 mmc->version = SD_VERSION_1_0;
900 mmc->version = SD_VERSION_1_10;
903 mmc->version = SD_VERSION_2;
904 if ((mmc->scr[0] >> 15) & 0x1)
905 mmc->version = SD_VERSION_3;
908 mmc->version = SD_VERSION_1_0;
912 if (mmc->scr[0] & SD_DATA_4BIT)
913 mmc->card_caps |= MMC_MODE_4BIT;
915 /* Version 1.0 doesn't support switching */
916 if (mmc->version == SD_VERSION_1_0)
921 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
922 (u8 *)switch_status);
927 /* The high-speed function is busy. Try again */
928 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
932 /* If high-speed isn't supported, we return */
933 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
937 * If the host doesn't support SD_HIGHSPEED, do not switch card to
938 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
939 * This can avoid furthur problem when the card runs in different
940 * mode between the host.
942 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
943 (mmc->cfg->host_caps & MMC_MODE_HS)))
946 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
951 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
952 mmc->card_caps |= MMC_MODE_HS;
957 /* frequency bases */
958 /* divided by 10 to be nice to platforms without floating point */
959 static const int fbase[] = {
966 /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
967 * to platforms without floating point.
969 static const int multipliers[] = {
988 static void mmc_set_ios(struct mmc *mmc)
990 if (mmc->cfg->ops->set_ios)
991 mmc->cfg->ops->set_ios(mmc);
994 void mmc_set_clock(struct mmc *mmc, uint clock)
996 if (clock > mmc->cfg->f_max)
997 clock = mmc->cfg->f_max;
999 if (clock < mmc->cfg->f_min)
1000 clock = mmc->cfg->f_min;
1007 static void mmc_set_bus_width(struct mmc *mmc, uint width)
1009 mmc->bus_width = width;
1014 static int mmc_startup(struct mmc *mmc)
1018 u64 cmult, csize, capacity;
1020 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1021 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
1023 bool has_parts = false;
1024 bool part_completed;
1026 #ifdef CONFIG_MMC_SPI_CRC_ON
1027 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
1028 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
1029 cmd.resp_type = MMC_RSP_R1;
1031 err = mmc_send_cmd(mmc, &cmd, NULL);
1038 /* Put the Card in Identify Mode */
1039 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
1040 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
1041 cmd.resp_type = MMC_RSP_R2;
1044 err = mmc_send_cmd(mmc, &cmd, NULL);
1049 memcpy(mmc->cid, cmd.response, 16);
1052 * For MMC cards, set the Relative Address.
1053 * For SD cards, get the Relatvie Address.
1054 * This also puts the cards into Standby State
1056 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1057 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
1058 cmd.cmdarg = mmc->rca << 16;
1059 cmd.resp_type = MMC_RSP_R6;
1061 err = mmc_send_cmd(mmc, &cmd, NULL);
1067 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1070 /* Get the Card-Specific Data */
1071 cmd.cmdidx = MMC_CMD_SEND_CSD;
1072 cmd.resp_type = MMC_RSP_R2;
1073 cmd.cmdarg = mmc->rca << 16;
1075 err = mmc_send_cmd(mmc, &cmd, NULL);
1077 /* Waiting for the ready status */
1078 mmc_send_status(mmc, timeout);
1083 mmc->csd[0] = cmd.response[0];
1084 mmc->csd[1] = cmd.response[1];
1085 mmc->csd[2] = cmd.response[2];
1086 mmc->csd[3] = cmd.response[3];
1088 if (mmc->version == MMC_VERSION_UNKNOWN) {
1089 int version = (cmd.response[0] >> 26) & 0xf;
1093 mmc->version = MMC_VERSION_1_2;
1096 mmc->version = MMC_VERSION_1_4;
1099 mmc->version = MMC_VERSION_2_2;
1102 mmc->version = MMC_VERSION_3;
1105 mmc->version = MMC_VERSION_4;
1108 mmc->version = MMC_VERSION_1_2;
1113 /* divide frequency by 10, since the mults are 10x bigger */
1114 freq = fbase[(cmd.response[0] & 0x7)];
1115 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
1117 mmc->tran_speed = freq * mult;
1119 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
1120 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
1123 mmc->write_bl_len = mmc->read_bl_len;
1125 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
1127 if (mmc->high_capacity) {
1128 csize = (mmc->csd[1] & 0x3f) << 16
1129 | (mmc->csd[2] & 0xffff0000) >> 16;
1132 csize = (mmc->csd[1] & 0x3ff) << 2
1133 | (mmc->csd[2] & 0xc0000000) >> 30;
1134 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1137 mmc->capacity_user = (csize + 1) << (cmult + 2);
1138 mmc->capacity_user *= mmc->read_bl_len;
1139 mmc->capacity_boot = 0;
1140 mmc->capacity_rpmb = 0;
1141 for (i = 0; i < 4; i++)
1142 mmc->capacity_gp[i] = 0;
1144 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1145 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1147 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1148 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1150 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
1151 cmd.cmdidx = MMC_CMD_SET_DSR;
1152 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
1153 cmd.resp_type = MMC_RSP_NONE;
1154 if (mmc_send_cmd(mmc, &cmd, NULL))
1155 printf("MMC: SET_DSR failed\n");
1158 /* Select the card, and put it into Transfer Mode */
1159 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1160 cmd.cmdidx = MMC_CMD_SELECT_CARD;
1161 cmd.resp_type = MMC_RSP_R1;
1162 cmd.cmdarg = mmc->rca << 16;
1163 err = mmc_send_cmd(mmc, &cmd, NULL);
1170 * For SD, its erase group is always one sector
1172 mmc->erase_grp_size = 1;
1173 mmc->part_config = MMCPART_NOAVAILABLE;
1174 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1175 /* check ext_csd version and capacity */
1176 err = mmc_send_ext_csd(mmc, ext_csd);
1179 if (ext_csd[EXT_CSD_REV] >= 2) {
1181 * According to the JEDEC Standard, the value of
1182 * ext_csd's capacity is valid if the value is more
1185 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1186 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1187 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1188 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
1189 capacity *= MMC_MAX_BLOCK_LEN;
1190 if ((capacity >> 20) > 2 * 1024)
1191 mmc->capacity_user = capacity;
1194 switch (ext_csd[EXT_CSD_REV]) {
1196 mmc->version = MMC_VERSION_4_1;
1199 mmc->version = MMC_VERSION_4_2;
1202 mmc->version = MMC_VERSION_4_3;
1205 mmc->version = MMC_VERSION_4_41;
1208 mmc->version = MMC_VERSION_4_5;
1211 mmc->version = MMC_VERSION_5_0;
1215 /* The partition data may be non-zero but it is only
1216 * effective if PARTITION_SETTING_COMPLETED is set in
1217 * EXT_CSD, so ignore any data if this bit is not set,
1218 * except for enabling the high-capacity group size
1219 * definition (see below). */
1220 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1221 EXT_CSD_PARTITION_SETTING_COMPLETED);
1223 /* store the partition info of emmc */
1224 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1225 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1226 ext_csd[EXT_CSD_BOOT_MULT])
1227 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
1228 if (part_completed &&
1229 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
1230 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1232 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1234 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1236 for (i = 0; i < 4; i++) {
1237 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1238 uint mult = (ext_csd[idx + 2] << 16) +
1239 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1242 if (!part_completed)
1244 mmc->capacity_gp[i] = mult;
1245 mmc->capacity_gp[i] *=
1246 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1247 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1248 mmc->capacity_gp[i] <<= 19;
1251 if (part_completed) {
1252 mmc->enh_user_size =
1253 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
1254 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
1255 ext_csd[EXT_CSD_ENH_SIZE_MULT];
1256 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1257 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1258 mmc->enh_user_size <<= 19;
1259 mmc->enh_user_start =
1260 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
1261 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
1262 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
1263 ext_csd[EXT_CSD_ENH_START_ADDR];
1264 if (mmc->high_capacity)
1265 mmc->enh_user_start <<= 9;
1269 * Host needs to enable ERASE_GRP_DEF bit if device is
1270 * partitioned. This bit will be lost every time after a reset
1271 * or power off. This will affect erase size.
1275 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
1276 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1279 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1280 EXT_CSD_ERASE_GROUP_DEF, 1);
1285 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1288 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
1289 /* Read out group size from ext_csd */
1290 mmc->erase_grp_size =
1291 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1293 * if high capacity and partition setting completed
1294 * SEC_COUNT is valid even if it is smaller than 2 GiB
1295 * JEDEC Standard JESD84-B45, 6.2.4
1297 if (mmc->high_capacity && part_completed) {
1298 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1299 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1300 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1301 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1302 capacity *= MMC_MAX_BLOCK_LEN;
1303 mmc->capacity_user = capacity;
1306 /* Calculate the group size from the csd value. */
1307 int erase_gsz, erase_gmul;
1308 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1309 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1310 mmc->erase_grp_size = (erase_gsz + 1)
1314 mmc->hc_wp_grp_size = 1024
1315 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1316 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1318 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1321 err = mmc_set_capacity(mmc, mmc->part_num);
1326 err = sd_change_freq(mmc);
1328 err = mmc_change_freq(mmc);
1333 /* Restrict card's capabilities by what the host can do */
1334 mmc->card_caps &= mmc->cfg->host_caps;
1337 if (mmc->card_caps & MMC_MODE_4BIT) {
1338 cmd.cmdidx = MMC_CMD_APP_CMD;
1339 cmd.resp_type = MMC_RSP_R1;
1340 cmd.cmdarg = mmc->rca << 16;
1342 err = mmc_send_cmd(mmc, &cmd, NULL);
1346 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1347 cmd.resp_type = MMC_RSP_R1;
1349 err = mmc_send_cmd(mmc, &cmd, NULL);
1353 mmc_set_bus_width(mmc, 4);
1356 if (mmc->card_caps & MMC_MODE_HS)
1357 mmc->tran_speed = 50000000;
1359 mmc->tran_speed = 25000000;
1360 } else if (mmc->version >= MMC_VERSION_4) {
1361 /* Only version 4 of MMC supports wider bus widths */
1364 /* An array of possible bus widths in order of preference */
1365 static unsigned ext_csd_bits[] = {
1366 EXT_CSD_DDR_BUS_WIDTH_8,
1367 EXT_CSD_DDR_BUS_WIDTH_4,
1368 EXT_CSD_BUS_WIDTH_8,
1369 EXT_CSD_BUS_WIDTH_4,
1370 EXT_CSD_BUS_WIDTH_1,
1373 /* An array to map CSD bus widths to host cap bits */
1374 static unsigned ext_to_hostcaps[] = {
1375 [EXT_CSD_DDR_BUS_WIDTH_4] =
1376 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1377 [EXT_CSD_DDR_BUS_WIDTH_8] =
1378 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
1379 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1380 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1383 /* An array to map chosen bus width to an integer */
1384 static unsigned widths[] = {
1388 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1389 unsigned int extw = ext_csd_bits[idx];
1390 unsigned int caps = ext_to_hostcaps[extw];
1393 * If the bus width is still not changed,
1394 * don't try to set the default again.
1395 * Otherwise, recover from switch attempts
1396 * by switching to 1-bit bus width.
1398 if (extw == EXT_CSD_BUS_WIDTH_1 &&
1399 mmc->bus_width == 1) {
1405 * Check to make sure the card and controller support
1406 * these capabilities
1408 if ((mmc->card_caps & caps) != caps)
1411 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1412 EXT_CSD_BUS_WIDTH, extw);
1417 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
1418 mmc_set_bus_width(mmc, widths[idx]);
1420 err = mmc_send_ext_csd(mmc, test_csd);
1425 /* Only compare read only fields */
1426 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1427 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1428 ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1429 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1430 ext_csd[EXT_CSD_REV]
1431 == test_csd[EXT_CSD_REV] &&
1432 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1433 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1434 memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1435 &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1444 if (mmc->card_caps & MMC_MODE_HS) {
1445 if (mmc->card_caps & MMC_MODE_HS_52MHz)
1446 mmc->tran_speed = 52000000;
1448 mmc->tran_speed = 26000000;
1452 mmc_set_clock(mmc, mmc->tran_speed);
1454 /* Fix the block length for DDR mode */
1455 if (mmc->ddr_mode) {
1456 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1457 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1460 /* fill in device description */
1461 mmc->block_dev.lun = 0;
1462 mmc->block_dev.type = 0;
1463 mmc->block_dev.blksz = mmc->read_bl_len;
1464 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
1465 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
1466 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1467 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1468 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1469 (mmc->cid[3] >> 16) & 0xffff);
1470 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1471 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1472 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1473 (mmc->cid[2] >> 24) & 0xff);
1474 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1475 (mmc->cid[2] >> 16) & 0xf);
1477 mmc->block_dev.vendor[0] = 0;
1478 mmc->block_dev.product[0] = 0;
1479 mmc->block_dev.revision[0] = 0;
1481 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
1482 init_part(&mmc->block_dev);
1488 static int mmc_send_if_cond(struct mmc *mmc)
1493 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1494 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1495 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
1496 cmd.resp_type = MMC_RSP_R7;
1498 err = mmc_send_cmd(mmc, &cmd, NULL);
1503 if ((cmd.response[0] & 0xff) != 0xaa)
1504 return UNUSABLE_ERR;
1506 mmc->version = SD_VERSION_2;
1511 /* not used any more */
1512 int __deprecated mmc_register(struct mmc *mmc)
1514 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1515 printf("%s is deprecated! use mmc_create() instead.\n", __func__);
1520 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
1524 /* quick validation */
1525 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
1526 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
1529 mmc = calloc(1, sizeof(*mmc));
1536 /* the following chunk was mmc_register() */
1538 /* Setup dsr related values */
1540 mmc->dsr = 0xffffffff;
1541 /* Setup the universal parts of the block interface just once */
1542 mmc->block_dev.if_type = IF_TYPE_MMC;
1543 mmc->block_dev.dev = cur_dev_num++;
1544 mmc->block_dev.removable = 1;
1545 mmc->block_dev.block_read = mmc_bread;
1546 mmc->block_dev.block_write = mmc_bwrite;
1547 mmc->block_dev.block_erase = mmc_berase;
1549 /* setup initial part type */
1550 mmc->block_dev.part_type = mmc->cfg->part_type;
1552 INIT_LIST_HEAD(&mmc->link);
1554 list_add_tail(&mmc->link, &mmc_devices);
1560 void mmc_destroy(struct mmc *mmc)
1562 /* only freeing memory for now */
1566 #ifdef CONFIG_PARTITIONS
1567 block_dev_desc_t *mmc_get_dev(int dev)
1569 struct mmc *mmc = find_mmc_device(dev);
1570 if (!mmc || mmc_init(mmc))
1573 return &mmc->block_dev;
1577 /* board-specific MMC power initializations. */
1578 __weak void board_mmc_power_init(void)
1582 int mmc_start_init(struct mmc *mmc)
1586 /* we pretend there's no card when init is NULL */
1587 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
1589 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1590 printf("MMC: no card present\n");
1598 board_mmc_power_init();
1600 /* made sure it's not NULL earlier */
1601 err = mmc->cfg->ops->init(mmc);
1607 mmc_set_bus_width(mmc, 1);
1608 mmc_set_clock(mmc, 1);
1610 /* Reset the Card */
1611 err = mmc_go_idle(mmc);
1616 /* The internal partition reset to user partition(0) at every CMD0*/
1619 /* Test for SD version 2 */
1620 err = mmc_send_if_cond(mmc);
1622 /* Now try to get the SD card's operating condition */
1623 err = sd_send_op_cond(mmc);
1625 /* If the command timed out, we check for an MMC card */
1626 if (err == TIMEOUT) {
1627 err = mmc_send_op_cond(mmc);
1630 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1631 printf("Card did not respond to voltage select!\n");
1633 return UNUSABLE_ERR;
1638 mmc->init_in_progress = 1;
1643 static int mmc_complete_init(struct mmc *mmc)
1647 mmc->init_in_progress = 0;
1648 if (mmc->op_cond_pending)
1649 err = mmc_complete_op_cond(mmc);
1652 err = mmc_startup(mmc);
1660 int mmc_init(struct mmc *mmc)
1663 unsigned long start;
1668 start = get_timer(0);
1670 if (!mmc->init_in_progress)
1671 err = mmc_start_init(mmc);
1674 err = mmc_complete_init(mmc);
1675 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
1679 int mmc_set_dsr(struct mmc *mmc, u16 val)
1685 /* CPU-specific MMC initializations */
1686 __weak int cpu_mmc_init(bd_t *bis)
1691 /* board-specific MMC initializations. */
1692 __weak int board_mmc_init(bd_t *bis)
1697 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1699 void print_mmc_devices(char separator)
1702 struct list_head *entry;
1705 list_for_each(entry, &mmc_devices) {
1706 m = list_entry(entry, struct mmc, link);
1709 mmc_type = IS_SD(m) ? "SD" : "eMMC";
1713 printf("%s: %d", m->cfg->name, m->block_dev.dev);
1715 printf(" (%s)", mmc_type);
1717 if (entry->next != &mmc_devices) {
1718 printf("%c", separator);
1719 if (separator != '\n')
1728 void print_mmc_devices(char separator) { }
1731 int get_mmc_num(void)
1736 int get_mmc_dev_count(void)
1738 return mmc_dev_count;
1741 void mmc_set_preinit(struct mmc *mmc, int preinit)
1743 mmc->preinit = preinit;
1746 static void do_preinit(void)
1749 struct list_head *entry;
1751 list_for_each(entry, &mmc_devices) {
1752 m = list_entry(entry, struct mmc, link);
1754 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
1755 mmc_set_preinit(m, 1);
1763 int mmc_initialize(bd_t *bis)
1765 INIT_LIST_HEAD (&mmc_devices);
1768 if (board_mmc_init(bis) < 0)
1771 #ifndef CONFIG_SPL_BUILD
1772 print_mmc_devices(',');
1779 #ifdef CONFIG_SUPPORT_EMMC_BOOT
1781 * This function changes the size of boot partition and the size of rpmb
1782 * partition present on EMMC devices.
1785 * struct *mmc: pointer for the mmc device strcuture
1786 * bootsize: size of boot partition
1787 * rpmbsize: size of rpmb partition
1789 * Returns 0 on success.
1792 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1793 unsigned long rpmbsize)
1798 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1799 cmd.cmdidx = MMC_CMD_RES_MAN;
1800 cmd.resp_type = MMC_RSP_R1b;
1801 cmd.cmdarg = MMC_CMD62_ARG1;
1803 err = mmc_send_cmd(mmc, &cmd, NULL);
1805 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1809 /* Boot partition changing mode */
1810 cmd.cmdidx = MMC_CMD_RES_MAN;
1811 cmd.resp_type = MMC_RSP_R1b;
1812 cmd.cmdarg = MMC_CMD62_ARG2;
1814 err = mmc_send_cmd(mmc, &cmd, NULL);
1816 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1819 /* boot partition size is multiple of 128KB */
1820 bootsize = (bootsize * 1024) / 128;
1822 /* Arg: boot partition size */
1823 cmd.cmdidx = MMC_CMD_RES_MAN;
1824 cmd.resp_type = MMC_RSP_R1b;
1825 cmd.cmdarg = bootsize;
1827 err = mmc_send_cmd(mmc, &cmd, NULL);
1829 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1832 /* RPMB partition size is multiple of 128KB */
1833 rpmbsize = (rpmbsize * 1024) / 128;
1834 /* Arg: RPMB partition size */
1835 cmd.cmdidx = MMC_CMD_RES_MAN;
1836 cmd.resp_type = MMC_RSP_R1b;
1837 cmd.cmdarg = rpmbsize;
1839 err = mmc_send_cmd(mmc, &cmd, NULL);
1841 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1848 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
1849 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
1852 * Returns 0 on success.
1854 int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
1858 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
1859 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
1860 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
1861 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
1869 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
1870 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
1873 * Returns 0 on success.
1875 int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1879 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
1880 EXT_CSD_BOOT_ACK(ack) |
1881 EXT_CSD_BOOT_PART_NUM(part_num) |
1882 EXT_CSD_PARTITION_ACCESS(access));
1890 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
1891 * for enable. Note that this is a write-once field for non-zero values.
1893 * Returns 0 on success.
1895 int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
1898 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1900 ret = mmc_send_ext_csd(mmc, ext_csd);
1904 if (ext_csd[EXT_CSD_RST_N_FUNCTION] != 0 &&
1905 ext_csd[EXT_CSD_RST_N_FUNCTION] != enable) {
1906 printf("RST_N_FUNCTION is already set to %u; cannot change to %u\n",
1907 ext_csd[EXT_CSD_RST_N_FUNCTION], enable);
1910 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,