drivers/mmc/rockchip_dw_mmc.c

   1 /*
   2  * Copyright (c) 2013 Google, Inc
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <clk.h>
   9 #include <dm.h>
  10 #include <dwmmc.h>
  11 #include <errno.h>
  12 #include <pwrseq.h>
  13 #include <syscon.h>
  14 #include <asm/gpio.h>
  15 #include <asm/arch/clock.h>
  16 #include <asm/arch/periph.h>
  17 #include <linux/err.h>
  18
  19 DECLARE_GLOBAL_DATA_PTR;
  20
  21 struct rockchip_mmc_plat {
  22         struct mmc_config cfg;
  23         struct mmc mmc;
  24 };
  25
  26 struct rockchip_dwmmc_priv {
  27         struct clk clk;
  28         struct dwmci_host host;
  29 };
  30
  31 static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq)
  32 {
  33         struct udevice *dev = host->priv;
  34         struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
  35         int ret;
  36
  37         ret = clk_set_rate(&priv->clk, freq);
  38         if (ret < 0) {
  39                 debug("%s: err=%d\n", __func__, ret);
  40                 return ret;
  41         }
  42
  43         return freq;
  44 }
  45
  46 static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev)
  47 {
  48         struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
  49         struct dwmci_host *host = &priv->host;
  50
  51         host->name = dev->name;
  52         host->ioaddr = (void *)dev_get_addr(dev);
  53         host->buswidth = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
  54                                         "bus-width", 4);
  55         host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
  56         host->priv = dev;
  57
  58         /* use non-removeable as sdcard and emmc as judgement */
  59         if (fdtdec_get_bool(gd->fdt_blob, dev->of_offset, "non-removable"))
  60                 host->dev_index = 0;
  61         else
  62                 host->dev_index = 1;
  63
  64         return 0;
  65 }
  66
  67 static int rockchip_dwmmc_probe(struct udevice *dev)
  68 {
  69         struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
  70         struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
  71         struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
  72         struct dwmci_host *host = &priv->host;
  73         struct udevice *pwr_dev __maybe_unused;
  74         u32 minmax[2];
  75         int ret;
  76         int fifo_depth;
  77
  78         ret = clk_get_by_index(dev, 0, &priv->clk);
  79         if (ret < 0)
  80                 return ret;
  81
  82         if (fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
  83                                  "clock-freq-min-max", minmax, 2))
  84                 return -EINVAL;
  85
  86         fifo_depth = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
  87                                     "fifo-depth", 0);
  88         if (fifo_depth < 0)
  89                 return -EINVAL;
  90
  91         host->fifoth_val = MSIZE(0x2) |
  92                 RX_WMARK(fifo_depth / 2 - 1) | TX_WMARK(fifo_depth / 2);
  93
  94         if (fdtdec_get_bool(gd->fdt_blob, dev->of_offset, "fifo-mode"))
  95                 host->fifo_mode = true;
  96
  97 #ifdef CONFIG_PWRSEQ
  98         /* Enable power if needed */
  99         ret = uclass_get_device_by_phandle(UCLASS_PWRSEQ, dev, "mmc-pwrseq",
 100                                            &pwr_dev);
 101         if (!ret) {
 102                 ret = pwrseq_set_power(pwr_dev, true);
 103                 if (ret)
 104                         return ret;
 105         }
 106 #endif
 107         dwmci_setup_cfg(&plat->cfg, dev->name, host->buswidth, host->caps,
 108                         minmax[1], minmax[0]);
 109         host->mmc = &plat->mmc;
 110         host->mmc->priv = &priv->host;
 111         host->mmc->dev = dev;
 112         upriv->mmc = host->mmc;
 113
 114         return 0;
 115 }
 116
 117 static int rockchip_dwmmc_bind(struct udevice *dev)
 118 {
 119         struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
 120         int ret;
 121
 122         ret = dwmci_bind(dev, &plat->mmc, &plat->cfg);
 123         if (ret)
 124                 return ret;
 125
 126         return 0;
 127 }
 128
 129 static const struct udevice_id rockchip_dwmmc_ids[] = {
 130         { .compatible = "rockchip,rk3288-dw-mshc" },
 131         { }
 132 };
 133
 134 U_BOOT_DRIVER(rockchip_dwmmc_drv) = {
 135         .name           = "rockchip_dwmmc",
 136         .id             = UCLASS_MMC,
 137         .of_match       = rockchip_dwmmc_ids,
 138         .ofdata_to_platdata = rockchip_dwmmc_ofdata_to_platdata,
 139         .bind           = rockchip_dwmmc_bind,
 140         .probe          = rockchip_dwmmc_probe,
 141         .priv_auto_alloc_size = sizeof(struct rockchip_dwmmc_priv),
 142         .platdata_auto_alloc_size = sizeof(struct rockchip_mmc_plat),
 143 };
 144
 145 #ifdef CONFIG_PWRSEQ
 146 static int rockchip_dwmmc_pwrseq_set_power(struct udevice *dev, bool enable)
 147 {
 148         struct gpio_desc reset;
 149         int ret;
 150
 151         ret = gpio_request_by_name(dev, "reset-gpios", 0, &reset, GPIOD_IS_OUT);
 152         if (ret)
 153                 return ret;
 154         dm_gpio_set_value(&reset, 1);
 155         udelay(1);
 156         dm_gpio_set_value(&reset, 0);
 157         udelay(200);
 158
 159         return 0;
 160 }
 161
 162 static const struct pwrseq_ops rockchip_dwmmc_pwrseq_ops = {
 163         .set_power      = rockchip_dwmmc_pwrseq_set_power,
 164 };
 165
 166 static const struct udevice_id rockchip_dwmmc_pwrseq_ids[] = {
 167         { .compatible = "mmc-pwrseq-emmc" },
 168         { }
 169 };
 170
 171 U_BOOT_DRIVER(rockchip_dwmmc_pwrseq_drv) = {
 172         .name           = "mmc_pwrseq_emmc",
 173         .id             = UCLASS_PWRSEQ,
 174         .of_match       = rockchip_dwmmc_pwrseq_ids,
 175         .ops            = &rockchip_dwmmc_pwrseq_ops,
 176 };
 177 #endif