2 * linux/drivers/mmc/sdhci.c - Secure Digital Host Controller Interface driver
4 * Copyright (C) 2005-2006 Pierre Ossman, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/delay.h>
12 #include <linux/highmem.h>
13 #include <linux/pci.h>
14 #include <linux/dma-mapping.h>
16 #include <linux/mmc/host.h>
17 #include <linux/mmc/protocol.h>
19 #include <asm/scatterlist.h>
23 #define DRIVER_NAME "sdhci"
24 #define DRIVER_VERSION "0.12"
26 #define BUGMAIL "<sdhci-devel@list.drzeus.cx>"
28 #define DBG(f, x...) \
29 pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
31 static unsigned int debug_nodma = 0;
32 static unsigned int debug_forcedma = 0;
33 static unsigned int debug_quirks = 0;
35 #define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1<<0)
36 #define SDHCI_QUIRK_FORCE_DMA (1<<1)
38 static const struct pci_device_id pci_ids[] __devinitdata = {
40 .vendor = PCI_VENDOR_ID_RICOH,
41 .device = PCI_DEVICE_ID_RICOH_R5C822,
42 .subvendor = PCI_VENDOR_ID_IBM,
43 .subdevice = PCI_ANY_ID,
44 .driver_data = SDHCI_QUIRK_CLOCK_BEFORE_RESET |
45 SDHCI_QUIRK_FORCE_DMA,
49 .vendor = PCI_VENDOR_ID_RICOH,
50 .device = PCI_DEVICE_ID_RICOH_R5C822,
51 .subvendor = PCI_ANY_ID,
52 .subdevice = PCI_ANY_ID,
53 .driver_data = SDHCI_QUIRK_FORCE_DMA,
57 .vendor = PCI_VENDOR_ID_TI,
58 .device = PCI_DEVICE_ID_TI_XX21_XX11_SD,
59 .subvendor = PCI_ANY_ID,
60 .subdevice = PCI_ANY_ID,
61 .driver_data = SDHCI_QUIRK_FORCE_DMA,
64 { /* Generic SD host controller */
65 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
68 { /* end: all zeroes */ },
71 MODULE_DEVICE_TABLE(pci, pci_ids);
73 static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
74 static void sdhci_finish_data(struct sdhci_host *);
76 static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
77 static void sdhci_finish_command(struct sdhci_host *);
79 static void sdhci_dumpregs(struct sdhci_host *host)
81 printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
83 printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n",
84 readl(host->ioaddr + SDHCI_DMA_ADDRESS),
85 readw(host->ioaddr + SDHCI_HOST_VERSION));
86 printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
87 readw(host->ioaddr + SDHCI_BLOCK_SIZE),
88 readw(host->ioaddr + SDHCI_BLOCK_COUNT));
89 printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
90 readl(host->ioaddr + SDHCI_ARGUMENT),
91 readw(host->ioaddr + SDHCI_TRANSFER_MODE));
92 printk(KERN_DEBUG DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n",
93 readl(host->ioaddr + SDHCI_PRESENT_STATE),
94 readb(host->ioaddr + SDHCI_HOST_CONTROL));
95 printk(KERN_DEBUG DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n",
96 readb(host->ioaddr + SDHCI_POWER_CONTROL),
97 readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL));
98 printk(KERN_DEBUG DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n",
99 readb(host->ioaddr + SDHCI_WALK_UP_CONTROL),
100 readw(host->ioaddr + SDHCI_CLOCK_CONTROL));
101 printk(KERN_DEBUG DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n",
102 readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL),
103 readl(host->ioaddr + SDHCI_INT_STATUS));
104 printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
105 readl(host->ioaddr + SDHCI_INT_ENABLE),
106 readl(host->ioaddr + SDHCI_SIGNAL_ENABLE));
107 printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
108 readw(host->ioaddr + SDHCI_ACMD12_ERR),
109 readw(host->ioaddr + SDHCI_SLOT_INT_STATUS));
110 printk(KERN_DEBUG DRIVER_NAME ": Caps: 0x%08x | Max curr: 0x%08x\n",
111 readl(host->ioaddr + SDHCI_CAPABILITIES),
112 readl(host->ioaddr + SDHCI_MAX_CURRENT));
114 printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
117 /*****************************************************************************\
119 * Low level functions *
121 \*****************************************************************************/
123 static void sdhci_reset(struct sdhci_host *host, u8 mask)
125 unsigned long timeout;
127 writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET);
129 if (mask & SDHCI_RESET_ALL)
132 /* Wait max 100 ms */
135 /* hw clears the bit when it's done */
136 while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) {
138 printk(KERN_ERR "%s: Reset 0x%x never completed. "
139 "Please report this to " BUGMAIL ".\n",
140 mmc_hostname(host->mmc), (int)mask);
141 sdhci_dumpregs(host);
149 static void sdhci_init(struct sdhci_host *host)
153 sdhci_reset(host, SDHCI_RESET_ALL);
155 intmask = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
156 SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
157 SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
158 SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT |
159 SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL |
160 SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE;
162 writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
163 writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
166 static void sdhci_activate_led(struct sdhci_host *host)
170 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
171 ctrl |= SDHCI_CTRL_LED;
172 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
175 static void sdhci_deactivate_led(struct sdhci_host *host)
179 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
180 ctrl &= ~SDHCI_CTRL_LED;
181 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
184 /*****************************************************************************\
188 \*****************************************************************************/
190 static inline char* sdhci_kmap_sg(struct sdhci_host* host)
192 host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ);
193 return host->mapped_sg + host->cur_sg->offset;
196 static inline void sdhci_kunmap_sg(struct sdhci_host* host)
198 kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ);
201 static inline int sdhci_next_sg(struct sdhci_host* host)
204 * Skip to next SG entry.
212 if (host->num_sg > 0) {
214 host->remain = host->cur_sg->length;
220 static void sdhci_read_block_pio(struct sdhci_host *host)
222 int blksize, chunk_remain;
227 DBG("PIO reading\n");
229 blksize = host->data->blksz;
233 buffer = sdhci_kmap_sg(host) + host->offset;
236 if (chunk_remain == 0) {
237 data = readl(host->ioaddr + SDHCI_BUFFER);
238 chunk_remain = min(blksize, 4);
241 size = min(host->size, host->remain);
242 size = min(size, chunk_remain);
244 chunk_remain -= size;
246 host->offset += size;
247 host->remain -= size;
250 *buffer = data & 0xFF;
256 if (host->remain == 0) {
257 sdhci_kunmap_sg(host);
258 if (sdhci_next_sg(host) == 0) {
259 BUG_ON(blksize != 0);
262 buffer = sdhci_kmap_sg(host);
266 sdhci_kunmap_sg(host);
269 static void sdhci_write_block_pio(struct sdhci_host *host)
271 int blksize, chunk_remain;
276 DBG("PIO writing\n");
278 blksize = host->data->blksz;
283 buffer = sdhci_kmap_sg(host) + host->offset;
286 size = min(host->size, host->remain);
287 size = min(size, chunk_remain);
289 chunk_remain -= size;
291 host->offset += size;
292 host->remain -= size;
296 data |= (u32)*buffer << 24;
301 if (chunk_remain == 0) {
302 writel(data, host->ioaddr + SDHCI_BUFFER);
303 chunk_remain = min(blksize, 4);
306 if (host->remain == 0) {
307 sdhci_kunmap_sg(host);
308 if (sdhci_next_sg(host) == 0) {
309 BUG_ON(blksize != 0);
312 buffer = sdhci_kmap_sg(host);
316 sdhci_kunmap_sg(host);
319 static void sdhci_transfer_pio(struct sdhci_host *host)
328 if (host->data->flags & MMC_DATA_READ)
329 mask = SDHCI_DATA_AVAILABLE;
331 mask = SDHCI_SPACE_AVAILABLE;
333 while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
334 if (host->data->flags & MMC_DATA_READ)
335 sdhci_read_block_pio(host);
337 sdhci_write_block_pio(host);
342 BUG_ON(host->num_sg == 0);
345 DBG("PIO transfer complete.\n");
348 static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
351 unsigned target_timeout, current_timeout;
358 DBG("blksz %04x blks %04x flags %08x\n",
359 data->blksz, data->blocks, data->flags);
360 DBG("tsac %d ms nsac %d clk\n",
361 data->timeout_ns / 1000000, data->timeout_clks);
364 BUG_ON(data->blksz * data->blocks > 524288);
365 BUG_ON(data->blksz > host->max_block);
366 BUG_ON(data->blocks > 65535);
369 target_timeout = data->timeout_ns / 1000 +
370 data->timeout_clks / host->clock;
373 * Figure out needed cycles.
374 * We do this in steps in order to fit inside a 32 bit int.
375 * The first step is the minimum timeout, which will have a
376 * minimum resolution of 6 bits:
377 * (1) 2^13*1000 > 2^22,
378 * (2) host->timeout_clk < 2^16
383 current_timeout = (1 << 13) * 1000 / host->timeout_clk;
384 while (current_timeout < target_timeout) {
386 current_timeout <<= 1;
392 printk(KERN_WARNING "%s: Too large timeout requested!\n",
393 mmc_hostname(host->mmc));
397 writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
399 if (host->flags & SDHCI_USE_DMA) {
402 count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len,
403 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
406 writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS);
408 host->size = data->blksz * data->blocks;
410 host->cur_sg = data->sg;
411 host->num_sg = data->sg_len;
414 host->remain = host->cur_sg->length;
417 /* We do not handle DMA boundaries, so set it to max (512 KiB) */
418 writew(SDHCI_MAKE_BLKSZ(7, data->blksz),
419 host->ioaddr + SDHCI_BLOCK_SIZE);
420 writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT);
423 static void sdhci_set_transfer_mode(struct sdhci_host *host,
424 struct mmc_data *data)
433 mode = SDHCI_TRNS_BLK_CNT_EN;
434 if (data->blocks > 1)
435 mode |= SDHCI_TRNS_MULTI;
436 if (data->flags & MMC_DATA_READ)
437 mode |= SDHCI_TRNS_READ;
438 if (host->flags & SDHCI_USE_DMA)
439 mode |= SDHCI_TRNS_DMA;
441 writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
444 static void sdhci_finish_data(struct sdhci_host *host)
446 struct mmc_data *data;
454 if (host->flags & SDHCI_USE_DMA) {
455 pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len,
456 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
460 * Controller doesn't count down when in single block mode.
462 if ((data->blocks == 1) && (data->error == MMC_ERR_NONE))
465 blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT);
466 data->bytes_xfered = data->blksz * (data->blocks - blocks);
468 if ((data->error == MMC_ERR_NONE) && blocks) {
469 printk(KERN_ERR "%s: Controller signalled completion even "
470 "though there were blocks left. Please report this "
471 "to " BUGMAIL ".\n", mmc_hostname(host->mmc));
472 data->error = MMC_ERR_FAILED;
475 if (host->size != 0) {
476 printk(KERN_ERR "%s: %d bytes were left untransferred. "
477 "Please report this to " BUGMAIL ".\n",
478 mmc_hostname(host->mmc), host->size);
479 data->error = MMC_ERR_FAILED;
482 DBG("Ending data transfer (%d bytes)\n", data->bytes_xfered);
486 * The controller needs a reset of internal state machines
487 * upon error conditions.
489 if (data->error != MMC_ERR_NONE) {
490 sdhci_reset(host, SDHCI_RESET_CMD);
491 sdhci_reset(host, SDHCI_RESET_DATA);
494 sdhci_send_command(host, data->stop);
496 tasklet_schedule(&host->finish_tasklet);
499 static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
503 unsigned long timeout;
507 DBG("Sending cmd (%x)\n", cmd->opcode);
512 mask = SDHCI_CMD_INHIBIT;
513 if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
514 mask |= SDHCI_DATA_INHIBIT;
516 /* We shouldn't wait for data inihibit for stop commands, even
517 though they might use busy signaling */
518 if (host->mrq->data && (cmd == host->mrq->data->stop))
519 mask &= ~SDHCI_DATA_INHIBIT;
521 while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
523 printk(KERN_ERR "%s: Controller never released "
524 "inhibit bit(s). Please report this to "
525 BUGMAIL ".\n", mmc_hostname(host->mmc));
526 sdhci_dumpregs(host);
527 cmd->error = MMC_ERR_FAILED;
528 tasklet_schedule(&host->finish_tasklet);
535 mod_timer(&host->timer, jiffies + 10 * HZ);
539 sdhci_prepare_data(host, cmd->data);
541 writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT);
543 sdhci_set_transfer_mode(host, cmd->data);
545 if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
546 printk(KERN_ERR "%s: Unsupported response type! "
547 "Please report this to " BUGMAIL ".\n",
548 mmc_hostname(host->mmc));
549 cmd->error = MMC_ERR_INVALID;
550 tasklet_schedule(&host->finish_tasklet);
554 if (!(cmd->flags & MMC_RSP_PRESENT))
555 flags = SDHCI_CMD_RESP_NONE;
556 else if (cmd->flags & MMC_RSP_136)
557 flags = SDHCI_CMD_RESP_LONG;
558 else if (cmd->flags & MMC_RSP_BUSY)
559 flags = SDHCI_CMD_RESP_SHORT_BUSY;
561 flags = SDHCI_CMD_RESP_SHORT;
563 if (cmd->flags & MMC_RSP_CRC)
564 flags |= SDHCI_CMD_CRC;
565 if (cmd->flags & MMC_RSP_OPCODE)
566 flags |= SDHCI_CMD_INDEX;
568 flags |= SDHCI_CMD_DATA;
570 writel(SDHCI_MAKE_CMD(cmd->opcode, flags),
571 host->ioaddr + SDHCI_COMMAND);
574 static void sdhci_finish_command(struct sdhci_host *host)
578 BUG_ON(host->cmd == NULL);
580 if (host->cmd->flags & MMC_RSP_PRESENT) {
581 if (host->cmd->flags & MMC_RSP_136) {
582 /* CRC is stripped so we need to do some shifting. */
583 for (i = 0;i < 4;i++) {
584 host->cmd->resp[i] = readl(host->ioaddr +
585 SDHCI_RESPONSE + (3-i)*4) << 8;
587 host->cmd->resp[i] |=
589 SDHCI_RESPONSE + (3-i)*4-1);
592 host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE);
596 host->cmd->error = MMC_ERR_NONE;
598 DBG("Ending cmd (%x)\n", host->cmd->opcode);
601 host->data = host->cmd->data;
603 tasklet_schedule(&host->finish_tasklet);
608 static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
612 unsigned long timeout;
614 if (clock == host->clock)
617 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
622 for (div = 1;div < 256;div *= 2) {
623 if ((host->max_clk / div) <= clock)
628 clk = div << SDHCI_DIVIDER_SHIFT;
629 clk |= SDHCI_CLOCK_INT_EN;
630 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
634 while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL))
635 & SDHCI_CLOCK_INT_STABLE)) {
637 printk(KERN_ERR "%s: Internal clock never stabilised. "
638 "Please report this to " BUGMAIL ".\n",
639 mmc_hostname(host->mmc));
640 sdhci_dumpregs(host);
647 clk |= SDHCI_CLOCK_CARD_EN;
648 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
654 static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
658 if (host->power == power)
661 writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
663 if (power == (unsigned short)-1)
666 pwr = SDHCI_POWER_ON;
672 pwr |= SDHCI_POWER_180;
677 pwr |= SDHCI_POWER_300;
682 pwr |= SDHCI_POWER_330;
688 writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL);
694 /*****************************************************************************\
698 \*****************************************************************************/
700 static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
702 struct sdhci_host *host;
705 host = mmc_priv(mmc);
707 spin_lock_irqsave(&host->lock, flags);
709 WARN_ON(host->mrq != NULL);
711 sdhci_activate_led(host);
715 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
716 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
717 tasklet_schedule(&host->finish_tasklet);
719 sdhci_send_command(host, mrq->cmd);
721 spin_unlock_irqrestore(&host->lock, flags);
724 static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
726 struct sdhci_host *host;
730 host = mmc_priv(mmc);
732 spin_lock_irqsave(&host->lock, flags);
735 * Reset the chip on each power off.
736 * Should clear out any weird states.
738 if (ios->power_mode == MMC_POWER_OFF) {
739 writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE);
743 sdhci_set_clock(host, ios->clock);
745 if (ios->power_mode == MMC_POWER_OFF)
746 sdhci_set_power(host, -1);
748 sdhci_set_power(host, ios->vdd);
750 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
751 if (ios->bus_width == MMC_BUS_WIDTH_4)
752 ctrl |= SDHCI_CTRL_4BITBUS;
754 ctrl &= ~SDHCI_CTRL_4BITBUS;
755 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
757 spin_unlock_irqrestore(&host->lock, flags);
760 static int sdhci_get_ro(struct mmc_host *mmc)
762 struct sdhci_host *host;
766 host = mmc_priv(mmc);
768 spin_lock_irqsave(&host->lock, flags);
770 present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
772 spin_unlock_irqrestore(&host->lock, flags);
774 return !(present & SDHCI_WRITE_PROTECT);
777 static struct mmc_host_ops sdhci_ops = {
778 .request = sdhci_request,
779 .set_ios = sdhci_set_ios,
780 .get_ro = sdhci_get_ro,
783 /*****************************************************************************\
787 \*****************************************************************************/
789 static void sdhci_tasklet_card(unsigned long param)
791 struct sdhci_host *host;
794 host = (struct sdhci_host*)param;
796 spin_lock_irqsave(&host->lock, flags);
798 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
800 printk(KERN_ERR "%s: Card removed during transfer!\n",
801 mmc_hostname(host->mmc));
802 printk(KERN_ERR "%s: Resetting controller.\n",
803 mmc_hostname(host->mmc));
805 sdhci_reset(host, SDHCI_RESET_CMD);
806 sdhci_reset(host, SDHCI_RESET_DATA);
808 host->mrq->cmd->error = MMC_ERR_FAILED;
809 tasklet_schedule(&host->finish_tasklet);
813 spin_unlock_irqrestore(&host->lock, flags);
815 mmc_detect_change(host->mmc, msecs_to_jiffies(500));
818 static void sdhci_tasklet_finish(unsigned long param)
820 struct sdhci_host *host;
822 struct mmc_request *mrq;
824 host = (struct sdhci_host*)param;
826 spin_lock_irqsave(&host->lock, flags);
828 del_timer(&host->timer);
832 DBG("Ending request, cmd (%x)\n", mrq->cmd->opcode);
835 * The controller needs a reset of internal state machines
836 * upon error conditions.
838 if ((mrq->cmd->error != MMC_ERR_NONE) ||
839 (mrq->data && ((mrq->data->error != MMC_ERR_NONE) ||
840 (mrq->data->stop && (mrq->data->stop->error != MMC_ERR_NONE))))) {
842 /* Some controllers need this kick or reset won't work here */
843 if (host->chip->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
846 /* This is to force an update */
849 sdhci_set_clock(host, clock);
852 /* Spec says we should do both at the same time, but Ricoh
853 controllers do not like that. */
854 sdhci_reset(host, SDHCI_RESET_CMD);
855 sdhci_reset(host, SDHCI_RESET_DATA);
862 sdhci_deactivate_led(host);
864 spin_unlock_irqrestore(&host->lock, flags);
866 mmc_request_done(host->mmc, mrq);
869 static void sdhci_timeout_timer(unsigned long data)
871 struct sdhci_host *host;
874 host = (struct sdhci_host*)data;
876 spin_lock_irqsave(&host->lock, flags);
879 printk(KERN_ERR "%s: Timeout waiting for hardware interrupt. "
880 "Please report this to " BUGMAIL ".\n",
881 mmc_hostname(host->mmc));
882 sdhci_dumpregs(host);
885 host->data->error = MMC_ERR_TIMEOUT;
886 sdhci_finish_data(host);
889 host->cmd->error = MMC_ERR_TIMEOUT;
891 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
893 tasklet_schedule(&host->finish_tasklet);
897 spin_unlock_irqrestore(&host->lock, flags);
900 /*****************************************************************************\
902 * Interrupt handling *
904 \*****************************************************************************/
906 static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
908 BUG_ON(intmask == 0);
911 printk(KERN_ERR "%s: Got command interrupt even though no "
912 "command operation was in progress.\n",
913 mmc_hostname(host->mmc));
914 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
915 mmc_hostname(host->mmc));
916 sdhci_dumpregs(host);
920 if (intmask & SDHCI_INT_RESPONSE)
921 sdhci_finish_command(host);
923 if (intmask & SDHCI_INT_TIMEOUT)
924 host->cmd->error = MMC_ERR_TIMEOUT;
925 else if (intmask & SDHCI_INT_CRC)
926 host->cmd->error = MMC_ERR_BADCRC;
927 else if (intmask & (SDHCI_INT_END_BIT | SDHCI_INT_INDEX))
928 host->cmd->error = MMC_ERR_FAILED;
930 host->cmd->error = MMC_ERR_INVALID;
932 tasklet_schedule(&host->finish_tasklet);
936 static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
938 BUG_ON(intmask == 0);
942 * A data end interrupt is sent together with the response
943 * for the stop command.
945 if (intmask & SDHCI_INT_DATA_END)
948 printk(KERN_ERR "%s: Got data interrupt even though no "
949 "data operation was in progress.\n",
950 mmc_hostname(host->mmc));
951 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
952 mmc_hostname(host->mmc));
953 sdhci_dumpregs(host);
958 if (intmask & SDHCI_INT_DATA_TIMEOUT)
959 host->data->error = MMC_ERR_TIMEOUT;
960 else if (intmask & SDHCI_INT_DATA_CRC)
961 host->data->error = MMC_ERR_BADCRC;
962 else if (intmask & SDHCI_INT_DATA_END_BIT)
963 host->data->error = MMC_ERR_FAILED;
965 if (host->data->error != MMC_ERR_NONE)
966 sdhci_finish_data(host);
968 if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
969 sdhci_transfer_pio(host);
971 if (intmask & SDHCI_INT_DATA_END)
972 sdhci_finish_data(host);
976 static irqreturn_t sdhci_irq(int irq, void *dev_id, struct pt_regs *regs)
979 struct sdhci_host* host = dev_id;
982 spin_lock(&host->lock);
984 intmask = readl(host->ioaddr + SDHCI_INT_STATUS);
991 DBG("*** %s got interrupt: 0x%08x\n", host->slot_descr, intmask);
993 if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
994 writel(intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE),
995 host->ioaddr + SDHCI_INT_STATUS);
996 tasklet_schedule(&host->card_tasklet);
999 intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
1001 if (intmask & SDHCI_INT_CMD_MASK) {
1002 writel(intmask & SDHCI_INT_CMD_MASK,
1003 host->ioaddr + SDHCI_INT_STATUS);
1004 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
1007 if (intmask & SDHCI_INT_DATA_MASK) {
1008 writel(intmask & SDHCI_INT_DATA_MASK,
1009 host->ioaddr + SDHCI_INT_STATUS);
1010 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
1013 intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
1015 if (intmask & SDHCI_INT_BUS_POWER) {
1016 printk(KERN_ERR "%s: Card is consuming too much power!\n",
1017 mmc_hostname(host->mmc));
1018 writel(SDHCI_INT_BUS_POWER, host->ioaddr + SDHCI_INT_STATUS);
1021 intmask &= SDHCI_INT_BUS_POWER;
1024 printk(KERN_ERR "%s: Unexpected interrupt 0x%08x. Please "
1025 "report this to " BUGMAIL ".\n",
1026 mmc_hostname(host->mmc), intmask);
1027 sdhci_dumpregs(host);
1029 writel(intmask, host->ioaddr + SDHCI_INT_STATUS);
1032 result = IRQ_HANDLED;
1035 spin_unlock(&host->lock);
1040 /*****************************************************************************\
1044 \*****************************************************************************/
1048 static int sdhci_suspend (struct pci_dev *pdev, pm_message_t state)
1050 struct sdhci_chip *chip;
1053 chip = pci_get_drvdata(pdev);
1057 DBG("Suspending...\n");
1059 for (i = 0;i < chip->num_slots;i++) {
1060 if (!chip->hosts[i])
1062 ret = mmc_suspend_host(chip->hosts[i]->mmc, state);
1064 for (i--;i >= 0;i--)
1065 mmc_resume_host(chip->hosts[i]->mmc);
1070 pci_save_state(pdev);
1071 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
1072 pci_disable_device(pdev);
1073 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1078 static int sdhci_resume (struct pci_dev *pdev)
1080 struct sdhci_chip *chip;
1083 chip = pci_get_drvdata(pdev);
1087 DBG("Resuming...\n");
1089 pci_set_power_state(pdev, PCI_D0);
1090 pci_restore_state(pdev);
1091 pci_enable_device(pdev);
1093 for (i = 0;i < chip->num_slots;i++) {
1094 if (!chip->hosts[i])
1096 if (chip->hosts[i]->flags & SDHCI_USE_DMA)
1097 pci_set_master(pdev);
1098 sdhci_init(chip->hosts[i]);
1099 ret = mmc_resume_host(chip->hosts[i]->mmc);
1107 #else /* CONFIG_PM */
1109 #define sdhci_suspend NULL
1110 #define sdhci_resume NULL
1112 #endif /* CONFIG_PM */
1114 /*****************************************************************************\
1116 * Device probing/removal *
1118 \*****************************************************************************/
1120 static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
1123 unsigned int version;
1124 struct sdhci_chip *chip;
1125 struct mmc_host *mmc;
1126 struct sdhci_host *host;
1131 chip = pci_get_drvdata(pdev);
1134 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1138 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1140 if (first_bar > 5) {
1141 printk(KERN_ERR DRIVER_NAME ": Invalid first BAR. Aborting.\n");
1145 if (!(pci_resource_flags(pdev, first_bar + slot) & IORESOURCE_MEM)) {
1146 printk(KERN_ERR DRIVER_NAME ": BAR is not iomem. Aborting.\n");
1150 if (pci_resource_len(pdev, first_bar + slot) != 0x100) {
1151 printk(KERN_ERR DRIVER_NAME ": Invalid iomem size. Aborting.\n");
1155 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1156 printk(KERN_ERR DRIVER_NAME ": Vendor specific interface. Aborting.\n");
1160 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1161 printk(KERN_ERR DRIVER_NAME ": Unknown interface. Aborting.\n");
1165 mmc = mmc_alloc_host(sizeof(struct sdhci_host), &pdev->dev);
1169 host = mmc_priv(mmc);
1172 host->bar = first_bar + slot;
1174 host->addr = pci_resource_start(pdev, host->bar);
1175 host->irq = pdev->irq;
1177 DBG("slot %d at 0x%08lx, irq %d\n", slot, host->addr, host->irq);
1179 snprintf(host->slot_descr, 20, "sdhci:slot%d", slot);
1181 ret = pci_request_region(pdev, host->bar, host->slot_descr);
1185 host->ioaddr = ioremap_nocache(host->addr,
1186 pci_resource_len(pdev, host->bar));
1187 if (!host->ioaddr) {
1192 sdhci_reset(host, SDHCI_RESET_ALL);
1194 version = readw(host->ioaddr + SDHCI_HOST_VERSION);
1195 version = (version & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT;
1197 printk(KERN_ERR "%s: Unknown controller version (%d). "
1198 "Cowardly refusing to continue.\n", host->slot_descr,
1204 caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
1207 DBG("DMA forced off\n");
1208 else if (debug_forcedma) {
1209 DBG("DMA forced on\n");
1210 host->flags |= SDHCI_USE_DMA;
1211 } else if (chip->quirks & SDHCI_QUIRK_FORCE_DMA)
1212 host->flags |= SDHCI_USE_DMA;
1213 else if ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA)
1214 DBG("Controller doesn't have DMA interface\n");
1215 else if (!(caps & SDHCI_CAN_DO_DMA))
1216 DBG("Controller doesn't have DMA capability\n");
1218 host->flags |= SDHCI_USE_DMA;
1220 if (host->flags & SDHCI_USE_DMA) {
1221 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1222 printk(KERN_WARNING "%s: No suitable DMA available. "
1223 "Falling back to PIO.\n", host->slot_descr);
1224 host->flags &= ~SDHCI_USE_DMA;
1228 if (host->flags & SDHCI_USE_DMA)
1229 pci_set_master(pdev);
1230 else /* XXX: Hack to get MMC layer to avoid highmem */
1234 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1235 if (host->max_clk == 0) {
1236 printk(KERN_ERR "%s: Hardware doesn't specify base clock "
1237 "frequency.\n", host->slot_descr);
1241 host->max_clk *= 1000000;
1244 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1245 if (host->timeout_clk == 0) {
1246 printk(KERN_ERR "%s: Hardware doesn't specify timeout clock "
1247 "frequency.\n", host->slot_descr);
1251 if (caps & SDHCI_TIMEOUT_CLK_UNIT)
1252 host->timeout_clk *= 1000;
1254 host->max_block = (caps & SDHCI_MAX_BLOCK_MASK) >> SDHCI_MAX_BLOCK_SHIFT;
1255 if (host->max_block >= 3) {
1256 printk(KERN_ERR "%s: Invalid maximum block size.\n",
1261 host->max_block = 512 << host->max_block;
1264 * Set host parameters.
1266 mmc->ops = &sdhci_ops;
1267 mmc->f_min = host->max_clk / 256;
1268 mmc->f_max = host->max_clk;
1269 mmc->caps = MMC_CAP_4_BIT_DATA;
1272 if (caps & SDHCI_CAN_VDD_330)
1273 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1274 else if (caps & SDHCI_CAN_VDD_300)
1275 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1276 else if (caps & SDHCI_CAN_VDD_180)
1277 mmc->ocr_avail |= MMC_VDD_17_18|MMC_VDD_18_19;
1279 if (mmc->ocr_avail == 0) {
1280 printk(KERN_ERR "%s: Hardware doesn't report any "
1281 "support voltages.\n", host->slot_descr);
1286 spin_lock_init(&host->lock);
1289 * Maximum number of segments. Hardware cannot do scatter lists.
1291 if (host->flags & SDHCI_USE_DMA)
1292 mmc->max_hw_segs = 1;
1294 mmc->max_hw_segs = 16;
1295 mmc->max_phys_segs = 16;
1298 * Maximum number of sectors in one transfer. Limited by DMA boundary
1299 * size (512KiB), which means (512 KiB/512=) 1024 entries.
1301 mmc->max_sectors = 1024;
1304 * Maximum segment size. Could be one segment with the maximum number
1307 mmc->max_seg_size = mmc->max_sectors * 512;
1312 tasklet_init(&host->card_tasklet,
1313 sdhci_tasklet_card, (unsigned long)host);
1314 tasklet_init(&host->finish_tasklet,
1315 sdhci_tasklet_finish, (unsigned long)host);
1317 setup_timer(&host->timer, sdhci_timeout_timer, (long)host);
1319 ret = request_irq(host->irq, sdhci_irq, SA_SHIRQ,
1320 host->slot_descr, host);
1326 #ifdef CONFIG_MMC_DEBUG
1327 sdhci_dumpregs(host);
1331 chip->hosts[slot] = host;
1335 printk(KERN_INFO "%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc),
1336 host->addr, host->irq,
1337 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1342 tasklet_kill(&host->card_tasklet);
1343 tasklet_kill(&host->finish_tasklet);
1345 iounmap(host->ioaddr);
1347 pci_release_region(pdev, host->bar);
1354 static void sdhci_remove_slot(struct pci_dev *pdev, int slot)
1356 struct sdhci_chip *chip;
1357 struct mmc_host *mmc;
1358 struct sdhci_host *host;
1360 chip = pci_get_drvdata(pdev);
1361 host = chip->hosts[slot];
1364 chip->hosts[slot] = NULL;
1366 mmc_remove_host(mmc);
1368 sdhci_reset(host, SDHCI_RESET_ALL);
1370 free_irq(host->irq, host);
1372 del_timer_sync(&host->timer);
1374 tasklet_kill(&host->card_tasklet);
1375 tasklet_kill(&host->finish_tasklet);
1377 iounmap(host->ioaddr);
1379 pci_release_region(pdev, host->bar);
1384 static int __devinit sdhci_probe(struct pci_dev *pdev,
1385 const struct pci_device_id *ent)
1389 struct sdhci_chip *chip;
1391 BUG_ON(pdev == NULL);
1392 BUG_ON(ent == NULL);
1394 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
1396 printk(KERN_INFO DRIVER_NAME
1397 ": SDHCI controller found at %s [%04x:%04x] (rev %x)\n",
1398 pci_name(pdev), (int)pdev->vendor, (int)pdev->device,
1401 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1405 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1406 DBG("found %d slot(s)\n", slots);
1410 ret = pci_enable_device(pdev);
1414 chip = kzalloc(sizeof(struct sdhci_chip) +
1415 sizeof(struct sdhci_host*) * slots, GFP_KERNEL);
1422 chip->quirks = ent->driver_data;
1425 chip->quirks = debug_quirks;
1427 chip->num_slots = slots;
1428 pci_set_drvdata(pdev, chip);
1430 for (i = 0;i < slots;i++) {
1431 ret = sdhci_probe_slot(pdev, i);
1433 for (i--;i >= 0;i--)
1434 sdhci_remove_slot(pdev, i);
1442 pci_set_drvdata(pdev, NULL);
1446 pci_disable_device(pdev);
1450 static void __devexit sdhci_remove(struct pci_dev *pdev)
1453 struct sdhci_chip *chip;
1455 chip = pci_get_drvdata(pdev);
1458 for (i = 0;i < chip->num_slots;i++)
1459 sdhci_remove_slot(pdev, i);
1461 pci_set_drvdata(pdev, NULL);
1466 pci_disable_device(pdev);
1469 static struct pci_driver sdhci_driver = {
1470 .name = DRIVER_NAME,
1471 .id_table = pci_ids,
1472 .probe = sdhci_probe,
1473 .remove = __devexit_p(sdhci_remove),
1474 .suspend = sdhci_suspend,
1475 .resume = sdhci_resume,
1478 /*****************************************************************************\
1480 * Driver init/exit *
1482 \*****************************************************************************/
1484 static int __init sdhci_drv_init(void)
1486 printk(KERN_INFO DRIVER_NAME
1487 ": Secure Digital Host Controller Interface driver, "
1488 DRIVER_VERSION "\n");
1489 printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1491 return pci_register_driver(&sdhci_driver);
1494 static void __exit sdhci_drv_exit(void)
1498 pci_unregister_driver(&sdhci_driver);
1501 module_init(sdhci_drv_init);
1502 module_exit(sdhci_drv_exit);
1504 module_param(debug_nodma, uint, 0444);
1505 module_param(debug_forcedma, uint, 0444);
1506 module_param(debug_quirks, uint, 0444);
1508 MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1509 MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver");
1510 MODULE_VERSION(DRIVER_VERSION);
1511 MODULE_LICENSE("GPL");
1513 MODULE_PARM_DESC(debug_nodma, "Forcefully disable DMA transfers. (default 0)");
1514 MODULE_PARM_DESC(debug_forcedma, "Forcefully enable DMA transfers. (default 0)");
1515 MODULE_PARM_DESC(debug_quirks, "Force certain quirks.");