2 * linux/drivers/mmc/sdhci.c - Secure Digital Host Controller Interface driver
4 * Copyright (C) 2005-2006 Pierre Ossman, All Rights Reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
12 #include <linux/delay.h>
13 #include <linux/highmem.h>
14 #include <linux/pci.h>
15 #include <linux/dma-mapping.h>
17 #include <linux/mmc/host.h>
18 #include <linux/mmc/protocol.h>
20 #include <asm/scatterlist.h>
24 #define DRIVER_NAME "sdhci"
25 #define DRIVER_VERSION "0.12"
27 #define BUGMAIL "<sdhci-devel@list.drzeus.cx>"
29 #define DBG(f, x...) \
30 pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
32 static unsigned int debug_nodma = 0;
33 static unsigned int debug_forcedma = 0;
34 static unsigned int debug_quirks = 0;
36 #define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1<<0)
37 #define SDHCI_QUIRK_FORCE_DMA (1<<1)
39 static const struct pci_device_id pci_ids[] __devinitdata = {
41 .vendor = PCI_VENDOR_ID_RICOH,
42 .device = PCI_DEVICE_ID_RICOH_R5C822,
43 .subvendor = PCI_VENDOR_ID_IBM,
44 .subdevice = PCI_ANY_ID,
45 .driver_data = SDHCI_QUIRK_CLOCK_BEFORE_RESET |
46 SDHCI_QUIRK_FORCE_DMA,
50 .vendor = PCI_VENDOR_ID_RICOH,
51 .device = PCI_DEVICE_ID_RICOH_R5C822,
52 .subvendor = PCI_ANY_ID,
53 .subdevice = PCI_ANY_ID,
54 .driver_data = SDHCI_QUIRK_FORCE_DMA,
58 .vendor = PCI_VENDOR_ID_TI,
59 .device = PCI_DEVICE_ID_TI_XX21_XX11_SD,
60 .subvendor = PCI_ANY_ID,
61 .subdevice = PCI_ANY_ID,
62 .driver_data = SDHCI_QUIRK_FORCE_DMA,
65 { /* Generic SD host controller */
66 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
69 { /* end: all zeroes */ },
72 MODULE_DEVICE_TABLE(pci, pci_ids);
74 static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
75 static void sdhci_finish_data(struct sdhci_host *);
77 static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
78 static void sdhci_finish_command(struct sdhci_host *);
80 static void sdhci_dumpregs(struct sdhci_host *host)
82 printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
84 printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version: 0x%08x\n",
85 readl(host->ioaddr + SDHCI_DMA_ADDRESS),
86 readw(host->ioaddr + SDHCI_HOST_VERSION));
87 printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt: 0x%08x\n",
88 readw(host->ioaddr + SDHCI_BLOCK_SIZE),
89 readw(host->ioaddr + SDHCI_BLOCK_COUNT));
90 printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
91 readl(host->ioaddr + SDHCI_ARGUMENT),
92 readw(host->ioaddr + SDHCI_TRANSFER_MODE));
93 printk(KERN_DEBUG DRIVER_NAME ": Present: 0x%08x | Host ctl: 0x%08x\n",
94 readl(host->ioaddr + SDHCI_PRESENT_STATE),
95 readb(host->ioaddr + SDHCI_HOST_CONTROL));
96 printk(KERN_DEBUG DRIVER_NAME ": Power: 0x%08x | Blk gap: 0x%08x\n",
97 readb(host->ioaddr + SDHCI_POWER_CONTROL),
98 readb(host->ioaddr + SDHCI_BLOCK_GAP_CONTROL));
99 printk(KERN_DEBUG DRIVER_NAME ": Wake-up: 0x%08x | Clock: 0x%08x\n",
100 readb(host->ioaddr + SDHCI_WALK_UP_CONTROL),
101 readw(host->ioaddr + SDHCI_CLOCK_CONTROL));
102 printk(KERN_DEBUG DRIVER_NAME ": Timeout: 0x%08x | Int stat: 0x%08x\n",
103 readb(host->ioaddr + SDHCI_TIMEOUT_CONTROL),
104 readl(host->ioaddr + SDHCI_INT_STATUS));
105 printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
106 readl(host->ioaddr + SDHCI_INT_ENABLE),
107 readl(host->ioaddr + SDHCI_SIGNAL_ENABLE));
108 printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
109 readw(host->ioaddr + SDHCI_ACMD12_ERR),
110 readw(host->ioaddr + SDHCI_SLOT_INT_STATUS));
111 printk(KERN_DEBUG DRIVER_NAME ": Caps: 0x%08x | Max curr: 0x%08x\n",
112 readl(host->ioaddr + SDHCI_CAPABILITIES),
113 readl(host->ioaddr + SDHCI_MAX_CURRENT));
115 printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
118 /*****************************************************************************\
120 * Low level functions *
122 \*****************************************************************************/
124 static void sdhci_reset(struct sdhci_host *host, u8 mask)
126 unsigned long timeout;
128 writeb(mask, host->ioaddr + SDHCI_SOFTWARE_RESET);
130 if (mask & SDHCI_RESET_ALL)
133 /* Wait max 100 ms */
136 /* hw clears the bit when it's done */
137 while (readb(host->ioaddr + SDHCI_SOFTWARE_RESET) & mask) {
139 printk(KERN_ERR "%s: Reset 0x%x never completed. "
140 "Please report this to " BUGMAIL ".\n",
141 mmc_hostname(host->mmc), (int)mask);
142 sdhci_dumpregs(host);
150 static void sdhci_init(struct sdhci_host *host)
154 sdhci_reset(host, SDHCI_RESET_ALL);
156 intmask = SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
157 SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
158 SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
159 SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT |
160 SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL |
161 SDHCI_INT_DMA_END | SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE;
163 writel(intmask, host->ioaddr + SDHCI_INT_ENABLE);
164 writel(intmask, host->ioaddr + SDHCI_SIGNAL_ENABLE);
167 static void sdhci_activate_led(struct sdhci_host *host)
171 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
172 ctrl |= SDHCI_CTRL_LED;
173 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
176 static void sdhci_deactivate_led(struct sdhci_host *host)
180 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
181 ctrl &= ~SDHCI_CTRL_LED;
182 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
185 /*****************************************************************************\
189 \*****************************************************************************/
191 static inline char* sdhci_kmap_sg(struct sdhci_host* host)
193 host->mapped_sg = kmap_atomic(host->cur_sg->page, KM_BIO_SRC_IRQ);
194 return host->mapped_sg + host->cur_sg->offset;
197 static inline void sdhci_kunmap_sg(struct sdhci_host* host)
199 kunmap_atomic(host->mapped_sg, KM_BIO_SRC_IRQ);
202 static inline int sdhci_next_sg(struct sdhci_host* host)
205 * Skip to next SG entry.
213 if (host->num_sg > 0) {
215 host->remain = host->cur_sg->length;
221 static void sdhci_read_block_pio(struct sdhci_host *host)
223 int blksize, chunk_remain;
228 DBG("PIO reading\n");
230 blksize = host->data->blksz;
234 buffer = sdhci_kmap_sg(host) + host->offset;
237 if (chunk_remain == 0) {
238 data = readl(host->ioaddr + SDHCI_BUFFER);
239 chunk_remain = min(blksize, 4);
242 size = min(host->size, host->remain);
243 size = min(size, chunk_remain);
245 chunk_remain -= size;
247 host->offset += size;
248 host->remain -= size;
251 *buffer = data & 0xFF;
257 if (host->remain == 0) {
258 sdhci_kunmap_sg(host);
259 if (sdhci_next_sg(host) == 0) {
260 BUG_ON(blksize != 0);
263 buffer = sdhci_kmap_sg(host);
267 sdhci_kunmap_sg(host);
270 static void sdhci_write_block_pio(struct sdhci_host *host)
272 int blksize, chunk_remain;
277 DBG("PIO writing\n");
279 blksize = host->data->blksz;
284 buffer = sdhci_kmap_sg(host) + host->offset;
287 size = min(host->size, host->remain);
288 size = min(size, chunk_remain);
290 chunk_remain -= size;
292 host->offset += size;
293 host->remain -= size;
297 data |= (u32)*buffer << 24;
302 if (chunk_remain == 0) {
303 writel(data, host->ioaddr + SDHCI_BUFFER);
304 chunk_remain = min(blksize, 4);
307 if (host->remain == 0) {
308 sdhci_kunmap_sg(host);
309 if (sdhci_next_sg(host) == 0) {
310 BUG_ON(blksize != 0);
313 buffer = sdhci_kmap_sg(host);
317 sdhci_kunmap_sg(host);
320 static void sdhci_transfer_pio(struct sdhci_host *host)
329 if (host->data->flags & MMC_DATA_READ)
330 mask = SDHCI_DATA_AVAILABLE;
332 mask = SDHCI_SPACE_AVAILABLE;
334 while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
335 if (host->data->flags & MMC_DATA_READ)
336 sdhci_read_block_pio(host);
338 sdhci_write_block_pio(host);
343 BUG_ON(host->num_sg == 0);
346 DBG("PIO transfer complete.\n");
349 static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
352 unsigned target_timeout, current_timeout;
359 DBG("blksz %04x blks %04x flags %08x\n",
360 data->blksz, data->blocks, data->flags);
361 DBG("tsac %d ms nsac %d clk\n",
362 data->timeout_ns / 1000000, data->timeout_clks);
365 BUG_ON(data->blksz * data->blocks > 524288);
366 BUG_ON(data->blksz > host->max_block);
367 BUG_ON(data->blocks > 65535);
370 target_timeout = data->timeout_ns / 1000 +
371 data->timeout_clks / host->clock;
374 * Figure out needed cycles.
375 * We do this in steps in order to fit inside a 32 bit int.
376 * The first step is the minimum timeout, which will have a
377 * minimum resolution of 6 bits:
378 * (1) 2^13*1000 > 2^22,
379 * (2) host->timeout_clk < 2^16
384 current_timeout = (1 << 13) * 1000 / host->timeout_clk;
385 while (current_timeout < target_timeout) {
387 current_timeout <<= 1;
393 printk(KERN_WARNING "%s: Too large timeout requested!\n",
394 mmc_hostname(host->mmc));
398 writeb(count, host->ioaddr + SDHCI_TIMEOUT_CONTROL);
400 if (host->flags & SDHCI_USE_DMA) {
403 count = pci_map_sg(host->chip->pdev, data->sg, data->sg_len,
404 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
407 writel(sg_dma_address(data->sg), host->ioaddr + SDHCI_DMA_ADDRESS);
409 host->size = data->blksz * data->blocks;
411 host->cur_sg = data->sg;
412 host->num_sg = data->sg_len;
415 host->remain = host->cur_sg->length;
418 /* We do not handle DMA boundaries, so set it to max (512 KiB) */
419 writew(SDHCI_MAKE_BLKSZ(7, data->blksz),
420 host->ioaddr + SDHCI_BLOCK_SIZE);
421 writew(data->blocks, host->ioaddr + SDHCI_BLOCK_COUNT);
424 static void sdhci_set_transfer_mode(struct sdhci_host *host,
425 struct mmc_data *data)
434 mode = SDHCI_TRNS_BLK_CNT_EN;
435 if (data->blocks > 1)
436 mode |= SDHCI_TRNS_MULTI;
437 if (data->flags & MMC_DATA_READ)
438 mode |= SDHCI_TRNS_READ;
439 if (host->flags & SDHCI_USE_DMA)
440 mode |= SDHCI_TRNS_DMA;
442 writew(mode, host->ioaddr + SDHCI_TRANSFER_MODE);
445 static void sdhci_finish_data(struct sdhci_host *host)
447 struct mmc_data *data;
455 if (host->flags & SDHCI_USE_DMA) {
456 pci_unmap_sg(host->chip->pdev, data->sg, data->sg_len,
457 (data->flags & MMC_DATA_READ)?PCI_DMA_FROMDEVICE:PCI_DMA_TODEVICE);
461 * Controller doesn't count down when in single block mode.
463 if ((data->blocks == 1) && (data->error == MMC_ERR_NONE))
466 blocks = readw(host->ioaddr + SDHCI_BLOCK_COUNT);
467 data->bytes_xfered = data->blksz * (data->blocks - blocks);
469 if ((data->error == MMC_ERR_NONE) && blocks) {
470 printk(KERN_ERR "%s: Controller signalled completion even "
471 "though there were blocks left. Please report this "
472 "to " BUGMAIL ".\n", mmc_hostname(host->mmc));
473 data->error = MMC_ERR_FAILED;
474 } else if (host->size != 0) {
475 printk(KERN_ERR "%s: %d bytes were left untransferred. "
476 "Please report this to " BUGMAIL ".\n",
477 mmc_hostname(host->mmc), host->size);
478 data->error = MMC_ERR_FAILED;
481 DBG("Ending data transfer (%d bytes)\n", data->bytes_xfered);
485 * The controller needs a reset of internal state machines
486 * upon error conditions.
488 if (data->error != MMC_ERR_NONE) {
489 sdhci_reset(host, SDHCI_RESET_CMD);
490 sdhci_reset(host, SDHCI_RESET_DATA);
493 sdhci_send_command(host, data->stop);
495 tasklet_schedule(&host->finish_tasklet);
498 static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
502 unsigned long timeout;
506 DBG("Sending cmd (%x)\n", cmd->opcode);
511 mask = SDHCI_CMD_INHIBIT;
512 if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
513 mask |= SDHCI_DATA_INHIBIT;
515 /* We shouldn't wait for data inihibit for stop commands, even
516 though they might use busy signaling */
517 if (host->mrq->data && (cmd == host->mrq->data->stop))
518 mask &= ~SDHCI_DATA_INHIBIT;
520 while (readl(host->ioaddr + SDHCI_PRESENT_STATE) & mask) {
522 printk(KERN_ERR "%s: Controller never released "
523 "inhibit bit(s). Please report this to "
524 BUGMAIL ".\n", mmc_hostname(host->mmc));
525 sdhci_dumpregs(host);
526 cmd->error = MMC_ERR_FAILED;
527 tasklet_schedule(&host->finish_tasklet);
534 mod_timer(&host->timer, jiffies + 10 * HZ);
538 sdhci_prepare_data(host, cmd->data);
540 writel(cmd->arg, host->ioaddr + SDHCI_ARGUMENT);
542 sdhci_set_transfer_mode(host, cmd->data);
544 if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
545 printk(KERN_ERR "%s: Unsupported response type! "
546 "Please report this to " BUGMAIL ".\n",
547 mmc_hostname(host->mmc));
548 cmd->error = MMC_ERR_INVALID;
549 tasklet_schedule(&host->finish_tasklet);
553 if (!(cmd->flags & MMC_RSP_PRESENT))
554 flags = SDHCI_CMD_RESP_NONE;
555 else if (cmd->flags & MMC_RSP_136)
556 flags = SDHCI_CMD_RESP_LONG;
557 else if (cmd->flags & MMC_RSP_BUSY)
558 flags = SDHCI_CMD_RESP_SHORT_BUSY;
560 flags = SDHCI_CMD_RESP_SHORT;
562 if (cmd->flags & MMC_RSP_CRC)
563 flags |= SDHCI_CMD_CRC;
564 if (cmd->flags & MMC_RSP_OPCODE)
565 flags |= SDHCI_CMD_INDEX;
567 flags |= SDHCI_CMD_DATA;
569 writew(SDHCI_MAKE_CMD(cmd->opcode, flags),
570 host->ioaddr + SDHCI_COMMAND);
573 static void sdhci_finish_command(struct sdhci_host *host)
577 BUG_ON(host->cmd == NULL);
579 if (host->cmd->flags & MMC_RSP_PRESENT) {
580 if (host->cmd->flags & MMC_RSP_136) {
581 /* CRC is stripped so we need to do some shifting. */
582 for (i = 0;i < 4;i++) {
583 host->cmd->resp[i] = readl(host->ioaddr +
584 SDHCI_RESPONSE + (3-i)*4) << 8;
586 host->cmd->resp[i] |=
588 SDHCI_RESPONSE + (3-i)*4-1);
591 host->cmd->resp[0] = readl(host->ioaddr + SDHCI_RESPONSE);
595 host->cmd->error = MMC_ERR_NONE;
597 DBG("Ending cmd (%x)\n", host->cmd->opcode);
600 host->data = host->cmd->data;
602 tasklet_schedule(&host->finish_tasklet);
607 static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
611 unsigned long timeout;
613 if (clock == host->clock)
616 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
621 for (div = 1;div < 256;div *= 2) {
622 if ((host->max_clk / div) <= clock)
627 clk = div << SDHCI_DIVIDER_SHIFT;
628 clk |= SDHCI_CLOCK_INT_EN;
629 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
633 while (!((clk = readw(host->ioaddr + SDHCI_CLOCK_CONTROL))
634 & SDHCI_CLOCK_INT_STABLE)) {
636 printk(KERN_ERR "%s: Internal clock never stabilised. "
637 "Please report this to " BUGMAIL ".\n",
638 mmc_hostname(host->mmc));
639 sdhci_dumpregs(host);
646 clk |= SDHCI_CLOCK_CARD_EN;
647 writew(clk, host->ioaddr + SDHCI_CLOCK_CONTROL);
653 static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
657 if (host->power == power)
660 writeb(0, host->ioaddr + SDHCI_POWER_CONTROL);
662 if (power == (unsigned short)-1)
665 pwr = SDHCI_POWER_ON;
671 pwr |= SDHCI_POWER_180;
676 pwr |= SDHCI_POWER_300;
681 pwr |= SDHCI_POWER_330;
687 writeb(pwr, host->ioaddr + SDHCI_POWER_CONTROL);
693 /*****************************************************************************\
697 \*****************************************************************************/
699 static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
701 struct sdhci_host *host;
704 host = mmc_priv(mmc);
706 spin_lock_irqsave(&host->lock, flags);
708 WARN_ON(host->mrq != NULL);
710 sdhci_activate_led(host);
714 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
715 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
716 tasklet_schedule(&host->finish_tasklet);
718 sdhci_send_command(host, mrq->cmd);
721 spin_unlock_irqrestore(&host->lock, flags);
724 static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
726 struct sdhci_host *host;
730 host = mmc_priv(mmc);
732 spin_lock_irqsave(&host->lock, flags);
735 * Reset the chip on each power off.
736 * Should clear out any weird states.
738 if (ios->power_mode == MMC_POWER_OFF) {
739 writel(0, host->ioaddr + SDHCI_SIGNAL_ENABLE);
743 sdhci_set_clock(host, ios->clock);
745 if (ios->power_mode == MMC_POWER_OFF)
746 sdhci_set_power(host, -1);
748 sdhci_set_power(host, ios->vdd);
750 ctrl = readb(host->ioaddr + SDHCI_HOST_CONTROL);
751 if (ios->bus_width == MMC_BUS_WIDTH_4)
752 ctrl |= SDHCI_CTRL_4BITBUS;
754 ctrl &= ~SDHCI_CTRL_4BITBUS;
755 writeb(ctrl, host->ioaddr + SDHCI_HOST_CONTROL);
758 spin_unlock_irqrestore(&host->lock, flags);
761 static int sdhci_get_ro(struct mmc_host *mmc)
763 struct sdhci_host *host;
767 host = mmc_priv(mmc);
769 spin_lock_irqsave(&host->lock, flags);
771 present = readl(host->ioaddr + SDHCI_PRESENT_STATE);
773 spin_unlock_irqrestore(&host->lock, flags);
775 return !(present & SDHCI_WRITE_PROTECT);
778 static struct mmc_host_ops sdhci_ops = {
779 .request = sdhci_request,
780 .set_ios = sdhci_set_ios,
781 .get_ro = sdhci_get_ro,
784 /*****************************************************************************\
788 \*****************************************************************************/
790 static void sdhci_tasklet_card(unsigned long param)
792 struct sdhci_host *host;
795 host = (struct sdhci_host*)param;
797 spin_lock_irqsave(&host->lock, flags);
799 if (!(readl(host->ioaddr + SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
801 printk(KERN_ERR "%s: Card removed during transfer!\n",
802 mmc_hostname(host->mmc));
803 printk(KERN_ERR "%s: Resetting controller.\n",
804 mmc_hostname(host->mmc));
806 sdhci_reset(host, SDHCI_RESET_CMD);
807 sdhci_reset(host, SDHCI_RESET_DATA);
809 host->mrq->cmd->error = MMC_ERR_FAILED;
810 tasklet_schedule(&host->finish_tasklet);
814 spin_unlock_irqrestore(&host->lock, flags);
816 mmc_detect_change(host->mmc, msecs_to_jiffies(500));
819 static void sdhci_tasklet_finish(unsigned long param)
821 struct sdhci_host *host;
823 struct mmc_request *mrq;
825 host = (struct sdhci_host*)param;
827 spin_lock_irqsave(&host->lock, flags);
829 del_timer(&host->timer);
833 DBG("Ending request, cmd (%x)\n", mrq->cmd->opcode);
836 * The controller needs a reset of internal state machines
837 * upon error conditions.
839 if ((mrq->cmd->error != MMC_ERR_NONE) ||
840 (mrq->data && ((mrq->data->error != MMC_ERR_NONE) ||
841 (mrq->data->stop && (mrq->data->stop->error != MMC_ERR_NONE))))) {
843 /* Some controllers need this kick or reset won't work here */
844 if (host->chip->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
847 /* This is to force an update */
850 sdhci_set_clock(host, clock);
853 /* Spec says we should do both at the same time, but Ricoh
854 controllers do not like that. */
855 sdhci_reset(host, SDHCI_RESET_CMD);
856 sdhci_reset(host, SDHCI_RESET_DATA);
863 sdhci_deactivate_led(host);
866 spin_unlock_irqrestore(&host->lock, flags);
868 mmc_request_done(host->mmc, mrq);
871 static void sdhci_timeout_timer(unsigned long data)
873 struct sdhci_host *host;
876 host = (struct sdhci_host*)data;
878 spin_lock_irqsave(&host->lock, flags);
881 printk(KERN_ERR "%s: Timeout waiting for hardware interrupt. "
882 "Please report this to " BUGMAIL ".\n",
883 mmc_hostname(host->mmc));
884 sdhci_dumpregs(host);
887 host->data->error = MMC_ERR_TIMEOUT;
888 sdhci_finish_data(host);
891 host->cmd->error = MMC_ERR_TIMEOUT;
893 host->mrq->cmd->error = MMC_ERR_TIMEOUT;
895 tasklet_schedule(&host->finish_tasklet);
900 spin_unlock_irqrestore(&host->lock, flags);
903 /*****************************************************************************\
905 * Interrupt handling *
907 \*****************************************************************************/
909 static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
911 BUG_ON(intmask == 0);
914 printk(KERN_ERR "%s: Got command interrupt even though no "
915 "command operation was in progress.\n",
916 mmc_hostname(host->mmc));
917 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
918 mmc_hostname(host->mmc));
919 sdhci_dumpregs(host);
923 if (intmask & SDHCI_INT_RESPONSE)
924 sdhci_finish_command(host);
926 if (intmask & SDHCI_INT_TIMEOUT)
927 host->cmd->error = MMC_ERR_TIMEOUT;
928 else if (intmask & SDHCI_INT_CRC)
929 host->cmd->error = MMC_ERR_BADCRC;
930 else if (intmask & (SDHCI_INT_END_BIT | SDHCI_INT_INDEX))
931 host->cmd->error = MMC_ERR_FAILED;
933 host->cmd->error = MMC_ERR_INVALID;
935 tasklet_schedule(&host->finish_tasklet);
939 static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
941 BUG_ON(intmask == 0);
945 * A data end interrupt is sent together with the response
946 * for the stop command.
948 if (intmask & SDHCI_INT_DATA_END)
951 printk(KERN_ERR "%s: Got data interrupt even though no "
952 "data operation was in progress.\n",
953 mmc_hostname(host->mmc));
954 printk(KERN_ERR "%s: Please report this to " BUGMAIL ".\n",
955 mmc_hostname(host->mmc));
956 sdhci_dumpregs(host);
961 if (intmask & SDHCI_INT_DATA_TIMEOUT)
962 host->data->error = MMC_ERR_TIMEOUT;
963 else if (intmask & SDHCI_INT_DATA_CRC)
964 host->data->error = MMC_ERR_BADCRC;
965 else if (intmask & SDHCI_INT_DATA_END_BIT)
966 host->data->error = MMC_ERR_FAILED;
968 if (host->data->error != MMC_ERR_NONE)
969 sdhci_finish_data(host);
971 if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
972 sdhci_transfer_pio(host);
974 if (intmask & SDHCI_INT_DATA_END)
975 sdhci_finish_data(host);
979 static irqreturn_t sdhci_irq(int irq, void *dev_id, struct pt_regs *regs)
982 struct sdhci_host* host = dev_id;
985 spin_lock(&host->lock);
987 intmask = readl(host->ioaddr + SDHCI_INT_STATUS);
994 DBG("*** %s got interrupt: 0x%08x\n", host->slot_descr, intmask);
996 if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
997 writel(intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE),
998 host->ioaddr + SDHCI_INT_STATUS);
999 tasklet_schedule(&host->card_tasklet);
1002 intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
1004 if (intmask & SDHCI_INT_CMD_MASK) {
1005 writel(intmask & SDHCI_INT_CMD_MASK,
1006 host->ioaddr + SDHCI_INT_STATUS);
1007 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
1010 if (intmask & SDHCI_INT_DATA_MASK) {
1011 writel(intmask & SDHCI_INT_DATA_MASK,
1012 host->ioaddr + SDHCI_INT_STATUS);
1013 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
1016 intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
1018 if (intmask & SDHCI_INT_BUS_POWER) {
1019 printk(KERN_ERR "%s: Card is consuming too much power!\n",
1020 mmc_hostname(host->mmc));
1021 writel(SDHCI_INT_BUS_POWER, host->ioaddr + SDHCI_INT_STATUS);
1024 intmask &= SDHCI_INT_BUS_POWER;
1027 printk(KERN_ERR "%s: Unexpected interrupt 0x%08x. Please "
1028 "report this to " BUGMAIL ".\n",
1029 mmc_hostname(host->mmc), intmask);
1030 sdhci_dumpregs(host);
1032 writel(intmask, host->ioaddr + SDHCI_INT_STATUS);
1035 result = IRQ_HANDLED;
1039 spin_unlock(&host->lock);
1044 /*****************************************************************************\
1048 \*****************************************************************************/
1052 static int sdhci_suspend (struct pci_dev *pdev, pm_message_t state)
1054 struct sdhci_chip *chip;
1057 chip = pci_get_drvdata(pdev);
1061 DBG("Suspending...\n");
1063 for (i = 0;i < chip->num_slots;i++) {
1064 if (!chip->hosts[i])
1066 ret = mmc_suspend_host(chip->hosts[i]->mmc, state);
1068 for (i--;i >= 0;i--)
1069 mmc_resume_host(chip->hosts[i]->mmc);
1074 pci_save_state(pdev);
1075 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
1076 pci_disable_device(pdev);
1077 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1082 static int sdhci_resume (struct pci_dev *pdev)
1084 struct sdhci_chip *chip;
1087 chip = pci_get_drvdata(pdev);
1091 DBG("Resuming...\n");
1093 pci_set_power_state(pdev, PCI_D0);
1094 pci_restore_state(pdev);
1095 pci_enable_device(pdev);
1097 for (i = 0;i < chip->num_slots;i++) {
1098 if (!chip->hosts[i])
1100 if (chip->hosts[i]->flags & SDHCI_USE_DMA)
1101 pci_set_master(pdev);
1102 sdhci_init(chip->hosts[i]);
1104 ret = mmc_resume_host(chip->hosts[i]->mmc);
1112 #else /* CONFIG_PM */
1114 #define sdhci_suspend NULL
1115 #define sdhci_resume NULL
1117 #endif /* CONFIG_PM */
1119 /*****************************************************************************\
1121 * Device probing/removal *
1123 \*****************************************************************************/
1125 static int __devinit sdhci_probe_slot(struct pci_dev *pdev, int slot)
1128 unsigned int version;
1129 struct sdhci_chip *chip;
1130 struct mmc_host *mmc;
1131 struct sdhci_host *host;
1136 chip = pci_get_drvdata(pdev);
1139 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1143 first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1145 if (first_bar > 5) {
1146 printk(KERN_ERR DRIVER_NAME ": Invalid first BAR. Aborting.\n");
1150 if (!(pci_resource_flags(pdev, first_bar + slot) & IORESOURCE_MEM)) {
1151 printk(KERN_ERR DRIVER_NAME ": BAR is not iomem. Aborting.\n");
1155 if (pci_resource_len(pdev, first_bar + slot) != 0x100) {
1156 printk(KERN_ERR DRIVER_NAME ": Invalid iomem size. Aborting.\n");
1160 if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1161 printk(KERN_ERR DRIVER_NAME ": Vendor specific interface. Aborting.\n");
1165 if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1166 printk(KERN_ERR DRIVER_NAME ": Unknown interface. Aborting.\n");
1170 mmc = mmc_alloc_host(sizeof(struct sdhci_host), &pdev->dev);
1174 host = mmc_priv(mmc);
1177 host->bar = first_bar + slot;
1179 host->addr = pci_resource_start(pdev, host->bar);
1180 host->irq = pdev->irq;
1182 DBG("slot %d at 0x%08lx, irq %d\n", slot, host->addr, host->irq);
1184 snprintf(host->slot_descr, 20, "sdhci:slot%d", slot);
1186 ret = pci_request_region(pdev, host->bar, host->slot_descr);
1190 host->ioaddr = ioremap_nocache(host->addr,
1191 pci_resource_len(pdev, host->bar));
1192 if (!host->ioaddr) {
1197 sdhci_reset(host, SDHCI_RESET_ALL);
1199 version = readw(host->ioaddr + SDHCI_HOST_VERSION);
1200 version = (version & SDHCI_SPEC_VER_MASK) >> SDHCI_SPEC_VER_SHIFT;
1202 printk(KERN_ERR "%s: Unknown controller version (%d). "
1203 "You may experience problems.\n", host->slot_descr,
1207 caps = readl(host->ioaddr + SDHCI_CAPABILITIES);
1210 DBG("DMA forced off\n");
1211 else if (debug_forcedma) {
1212 DBG("DMA forced on\n");
1213 host->flags |= SDHCI_USE_DMA;
1214 } else if (chip->quirks & SDHCI_QUIRK_FORCE_DMA)
1215 host->flags |= SDHCI_USE_DMA;
1216 else if ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA)
1217 DBG("Controller doesn't have DMA interface\n");
1218 else if (!(caps & SDHCI_CAN_DO_DMA))
1219 DBG("Controller doesn't have DMA capability\n");
1221 host->flags |= SDHCI_USE_DMA;
1223 if (host->flags & SDHCI_USE_DMA) {
1224 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
1225 printk(KERN_WARNING "%s: No suitable DMA available. "
1226 "Falling back to PIO.\n", host->slot_descr);
1227 host->flags &= ~SDHCI_USE_DMA;
1231 if (host->flags & SDHCI_USE_DMA)
1232 pci_set_master(pdev);
1233 else /* XXX: Hack to get MMC layer to avoid highmem */
1237 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1238 if (host->max_clk == 0) {
1239 printk(KERN_ERR "%s: Hardware doesn't specify base clock "
1240 "frequency.\n", host->slot_descr);
1244 host->max_clk *= 1000000;
1247 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1248 if (host->timeout_clk == 0) {
1249 printk(KERN_ERR "%s: Hardware doesn't specify timeout clock "
1250 "frequency.\n", host->slot_descr);
1254 if (caps & SDHCI_TIMEOUT_CLK_UNIT)
1255 host->timeout_clk *= 1000;
1257 host->max_block = (caps & SDHCI_MAX_BLOCK_MASK) >> SDHCI_MAX_BLOCK_SHIFT;
1258 if (host->max_block >= 3) {
1259 printk(KERN_ERR "%s: Invalid maximum block size.\n",
1264 host->max_block = 512 << host->max_block;
1267 * Set host parameters.
1269 mmc->ops = &sdhci_ops;
1270 mmc->f_min = host->max_clk / 256;
1271 mmc->f_max = host->max_clk;
1272 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE | MMC_CAP_BYTEBLOCK;
1275 if (caps & SDHCI_CAN_VDD_330)
1276 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1277 else if (caps & SDHCI_CAN_VDD_300)
1278 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1279 else if (caps & SDHCI_CAN_VDD_180)
1280 mmc->ocr_avail |= MMC_VDD_17_18|MMC_VDD_18_19;
1282 if (mmc->ocr_avail == 0) {
1283 printk(KERN_ERR "%s: Hardware doesn't report any "
1284 "support voltages.\n", host->slot_descr);
1289 spin_lock_init(&host->lock);
1292 * Maximum number of segments. Hardware cannot do scatter lists.
1294 if (host->flags & SDHCI_USE_DMA)
1295 mmc->max_hw_segs = 1;
1297 mmc->max_hw_segs = 16;
1298 mmc->max_phys_segs = 16;
1301 * Maximum number of sectors in one transfer. Limited by DMA boundary
1302 * size (512KiB), which means (512 KiB/512=) 1024 entries.
1304 mmc->max_sectors = 1024;
1307 * Maximum segment size. Could be one segment with the maximum number
1310 mmc->max_seg_size = mmc->max_sectors * 512;
1315 tasklet_init(&host->card_tasklet,
1316 sdhci_tasklet_card, (unsigned long)host);
1317 tasklet_init(&host->finish_tasklet,
1318 sdhci_tasklet_finish, (unsigned long)host);
1320 setup_timer(&host->timer, sdhci_timeout_timer, (long)host);
1322 ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1323 host->slot_descr, host);
1329 #ifdef CONFIG_MMC_DEBUG
1330 sdhci_dumpregs(host);
1334 chip->hosts[slot] = host;
1340 printk(KERN_INFO "%s: SDHCI at 0x%08lx irq %d %s\n", mmc_hostname(mmc),
1341 host->addr, host->irq,
1342 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1347 tasklet_kill(&host->card_tasklet);
1348 tasklet_kill(&host->finish_tasklet);
1350 iounmap(host->ioaddr);
1352 pci_release_region(pdev, host->bar);
1359 static void sdhci_remove_slot(struct pci_dev *pdev, int slot)
1361 struct sdhci_chip *chip;
1362 struct mmc_host *mmc;
1363 struct sdhci_host *host;
1365 chip = pci_get_drvdata(pdev);
1366 host = chip->hosts[slot];
1369 chip->hosts[slot] = NULL;
1371 mmc_remove_host(mmc);
1373 sdhci_reset(host, SDHCI_RESET_ALL);
1375 free_irq(host->irq, host);
1377 del_timer_sync(&host->timer);
1379 tasklet_kill(&host->card_tasklet);
1380 tasklet_kill(&host->finish_tasklet);
1382 iounmap(host->ioaddr);
1384 pci_release_region(pdev, host->bar);
1389 static int __devinit sdhci_probe(struct pci_dev *pdev,
1390 const struct pci_device_id *ent)
1394 struct sdhci_chip *chip;
1396 BUG_ON(pdev == NULL);
1397 BUG_ON(ent == NULL);
1399 pci_read_config_byte(pdev, PCI_CLASS_REVISION, &rev);
1401 printk(KERN_INFO DRIVER_NAME
1402 ": SDHCI controller found at %s [%04x:%04x] (rev %x)\n",
1403 pci_name(pdev), (int)pdev->vendor, (int)pdev->device,
1406 ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1410 slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1411 DBG("found %d slot(s)\n", slots);
1415 ret = pci_enable_device(pdev);
1419 chip = kzalloc(sizeof(struct sdhci_chip) +
1420 sizeof(struct sdhci_host*) * slots, GFP_KERNEL);
1427 chip->quirks = ent->driver_data;
1430 chip->quirks = debug_quirks;
1432 chip->num_slots = slots;
1433 pci_set_drvdata(pdev, chip);
1435 for (i = 0;i < slots;i++) {
1436 ret = sdhci_probe_slot(pdev, i);
1438 for (i--;i >= 0;i--)
1439 sdhci_remove_slot(pdev, i);
1447 pci_set_drvdata(pdev, NULL);
1451 pci_disable_device(pdev);
1455 static void __devexit sdhci_remove(struct pci_dev *pdev)
1458 struct sdhci_chip *chip;
1460 chip = pci_get_drvdata(pdev);
1463 for (i = 0;i < chip->num_slots;i++)
1464 sdhci_remove_slot(pdev, i);
1466 pci_set_drvdata(pdev, NULL);
1471 pci_disable_device(pdev);
1474 static struct pci_driver sdhci_driver = {
1475 .name = DRIVER_NAME,
1476 .id_table = pci_ids,
1477 .probe = sdhci_probe,
1478 .remove = __devexit_p(sdhci_remove),
1479 .suspend = sdhci_suspend,
1480 .resume = sdhci_resume,
1483 /*****************************************************************************\
1485 * Driver init/exit *
1487 \*****************************************************************************/
1489 static int __init sdhci_drv_init(void)
1491 printk(KERN_INFO DRIVER_NAME
1492 ": Secure Digital Host Controller Interface driver, "
1493 DRIVER_VERSION "\n");
1494 printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1496 return pci_register_driver(&sdhci_driver);
1499 static void __exit sdhci_drv_exit(void)
1503 pci_unregister_driver(&sdhci_driver);
1506 module_init(sdhci_drv_init);
1507 module_exit(sdhci_drv_exit);
1509 module_param(debug_nodma, uint, 0444);
1510 module_param(debug_forcedma, uint, 0444);
1511 module_param(debug_quirks, uint, 0444);
1513 MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1514 MODULE_DESCRIPTION("Secure Digital Host Controller Interface driver");
1515 MODULE_VERSION(DRIVER_VERSION);
1516 MODULE_LICENSE("GPL");
1518 MODULE_PARM_DESC(debug_nodma, "Forcefully disable DMA transfers. (default 0)");
1519 MODULE_PARM_DESC(debug_forcedma, "Forcefully enable DMA transfers. (default 0)");
1520 MODULE_PARM_DESC(debug_quirks, "Force certain quirks.");