2 * PMC551 PCI Mezzanine Ram Device
5 * Mark Ferrell <mferrell@mvista.com>
6 * Copyright 1999,2000 Nortel Networks
9 * As part of this driver was derived from the slram.c driver it
10 * falls under the same license, which is GNU General Public
14 * This driver is intended to support the PMC551 PCI Ram device
15 * from Ramix Inc. The PMC551 is a PMC Mezzanine module for
16 * cPCI embedded systems. The device contains a single SROM
17 * that initially programs the V370PDC chipset onboard the
18 * device, and various banks of DRAM/SDRAM onboard. This driver
19 * implements this PCI Ram device as an MTD (Memory Technology
20 * Device) so that it can be used to hold a file system, or for
21 * added swap space in embedded systems. Since the memory on
22 * this board isn't as fast as main memory we do not try to hook
23 * it into main memory as that would simply reduce performance
24 * on the system. Using it as a block device allows us to use
25 * it as high speed swap or for a high speed disk device of some
26 * sort. Which becomes very useful on diskless systems in the
27 * embedded market I might add.
30 * Due to what I assume is more buggy SROM, the 64M PMC551 I
31 * have available claims that all 4 of its DRAM banks have 64MiB
32 * of ram configured (making a grand total of 256MiB onboard).
33 * This is slightly annoying since the BAR0 size reflects the
34 * aperture size, not the dram size, and the V370PDC supplies no
35 * other method for memory size discovery. This problem is
36 * mostly only relevant when compiled as a module, as the
37 * unloading of the module with an aperture size smaller than
38 * the ram will cause the driver to detect the onboard memory
39 * size to be equal to the aperture size when the module is
40 * reloaded. Soooo, to help, the module supports an msize
41 * option to allow the specification of the onboard memory, and
42 * an asize option, to allow the specification of the aperture
43 * size. The aperture must be equal to or less then the memory
44 * size, the driver will correct this if you screw it up. This
45 * problem is not relevant for compiled in drivers as compiled
46 * in drivers only init once.
49 * Saeed Karamooz <saeed@ramix.com> of Ramix INC. for the
50 * initial example code of how to initialize this device and for
51 * help with questions I had concerning operation of the device.
53 * Most of the MTD code for this driver was originally written
54 * for the slram.o module in the MTD drivers package which
55 * allows the mapping of system memory into an MTD device.
56 * Since the PMC551 memory module is accessed in the same
57 * fashion as system memory, the slram.c code became a very nice
58 * fit to the needs of this driver. All we added was PCI
59 * detection/initialization to the driver and automatically figure
60 * out the size via the PCI detection.o, later changes by Corey
61 * Minyard set up the card to utilize a 1M sliding apature.
63 * Corey Minyard <minyard@nortelnetworks.com>
64 * * Modified driver to utilize a sliding aperture instead of
65 * mapping all memory into kernel space which turned out to
67 * * Located a bug in the SROM's initialization sequence that
68 * made the memory unusable, added a fix to code to touch up
72 * * MUST fix the init function to not spin on a register
73 * waiting for it to set .. this does not safely handle busted
74 * devices that never reset the register correctly which will
75 * cause the system to hang w/ a reboot being the only chance at
76 * recover. [sort of fixed, could be better]
77 * * Add I2C handling of the SROM so we can read the SROM's information
78 * about the aperture size. This should always accurately reflect the
79 * onboard memory size.
80 * * Comb the init routine. It's still a bit cludgy on a few things.
83 #include <linux/kernel.h>
84 #include <linux/module.h>
85 #include <asm/uaccess.h>
86 #include <linux/types.h>
87 #include <linux/init.h>
88 #include <linux/ptrace.h>
89 #include <linux/slab.h>
90 #include <linux/string.h>
91 #include <linux/timer.h>
92 #include <linux/major.h>
94 #include <linux/ioctl.h>
96 #include <asm/system.h>
97 #include <linux/pci.h>
98 #include <linux/mtd/mtd.h>
100 #define PMC551_VERSION \
101 "Ramix PMC551 PCI Mezzanine Ram Driver. (C) 1999,2000 Nortel Networks.\n"
103 #define PCI_VENDOR_ID_V3_SEMI 0x11b0
104 #define PCI_DEVICE_ID_V3_SEMI_V370PDC 0x0200
106 #define PMC551_PCI_MEM_MAP0 0x50
107 #define PMC551_PCI_MEM_MAP1 0x54
108 #define PMC551_PCI_MEM_MAP_MAP_ADDR_MASK 0x3ff00000
109 #define PMC551_PCI_MEM_MAP_APERTURE_MASK 0x000000f0
110 #define PMC551_PCI_MEM_MAP_REG_EN 0x00000002
111 #define PMC551_PCI_MEM_MAP_ENABLE 0x00000001
113 #define PMC551_SDRAM_MA 0x60
114 #define PMC551_SDRAM_CMD 0x62
115 #define PMC551_DRAM_CFG 0x64
116 #define PMC551_SYS_CTRL_REG 0x78
118 #define PMC551_DRAM_BLK0 0x68
119 #define PMC551_DRAM_BLK1 0x6c
120 #define PMC551_DRAM_BLK2 0x70
121 #define PMC551_DRAM_BLK3 0x74
122 #define PMC551_DRAM_BLK_GET_SIZE(x) (524288 << ((x >> 4) & 0x0f))
123 #define PMC551_DRAM_BLK_SET_COL_MUX(x, v) (((x) & ~0x00007000) | (((v) & 0x7) << 12))
124 #define PMC551_DRAM_BLK_SET_ROW_MUX(x, v) (((x) & ~0x00000f00) | (((v) & 0xf) << 8))
132 struct mtd_info *nextpmc551;
135 static struct mtd_info *pmc551list;
137 static int pmc551_point(struct mtd_info *mtd, loff_t from, size_t len,
138 size_t *retlen, void **virt, resource_size_t *phys);
140 static int pmc551_erase(struct mtd_info *mtd, struct erase_info *instr)
142 struct mypriv *priv = mtd->priv;
143 u32 soff_hi, soff_lo; /* start address offset hi/lo */
144 u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
149 #ifdef CONFIG_MTD_PMC551_DEBUG
150 printk(KERN_DEBUG "pmc551_erase(pos:%ld, len:%ld)\n", (long)instr->addr,
154 end = instr->addr + instr->len - 1;
155 eoff_hi = end & ~(priv->asize - 1);
156 soff_hi = instr->addr & ~(priv->asize - 1);
157 eoff_lo = end & (priv->asize - 1);
158 soff_lo = instr->addr & (priv->asize - 1);
160 pmc551_point(mtd, instr->addr, instr->len, &retlen,
161 (void **)&ptr, NULL);
163 if (soff_hi == eoff_hi || mtd->size == priv->asize) {
164 /* The whole thing fits within one access, so just one shot
166 memset(ptr, 0xff, instr->len);
168 /* We have to do multiple writes to get all the data
170 while (soff_hi != eoff_hi) {
171 #ifdef CONFIG_MTD_PMC551_DEBUG
172 printk(KERN_DEBUG "pmc551_erase() soff_hi: %ld, "
173 "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
175 memset(ptr, 0xff, priv->asize);
176 if (soff_hi + priv->asize >= mtd->size) {
179 soff_hi += priv->asize;
180 pmc551_point(mtd, (priv->base_map0 | soff_hi),
181 priv->asize, &retlen,
182 (void **)&ptr, NULL);
184 memset(ptr, 0xff, eoff_lo);
188 instr->state = MTD_ERASE_DONE;
189 #ifdef CONFIG_MTD_PMC551_DEBUG
190 printk(KERN_DEBUG "pmc551_erase() done\n");
193 mtd_erase_callback(instr);
197 static int pmc551_point(struct mtd_info *mtd, loff_t from, size_t len,
198 size_t *retlen, void **virt, resource_size_t *phys)
200 struct mypriv *priv = mtd->priv;
204 #ifdef CONFIG_MTD_PMC551_DEBUG
205 printk(KERN_DEBUG "pmc551_point(%ld, %ld)\n", (long)from, (long)len);
208 soff_hi = from & ~(priv->asize - 1);
209 soff_lo = from & (priv->asize - 1);
211 /* Cheap hack optimization */
212 if (priv->curr_map0 != from) {
213 pci_write_config_dword(priv->dev, PMC551_PCI_MEM_MAP0,
214 (priv->base_map0 | soff_hi));
215 priv->curr_map0 = soff_hi;
218 *virt = priv->start + soff_lo;
223 static int pmc551_unpoint(struct mtd_info *mtd, loff_t from, size_t len)
225 #ifdef CONFIG_MTD_PMC551_DEBUG
226 printk(KERN_DEBUG "pmc551_unpoint()\n");
231 static int pmc551_read(struct mtd_info *mtd, loff_t from, size_t len,
232 size_t * retlen, u_char * buf)
234 struct mypriv *priv = mtd->priv;
235 u32 soff_hi, soff_lo; /* start address offset hi/lo */
236 u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
239 u_char *copyto = buf;
241 #ifdef CONFIG_MTD_PMC551_DEBUG
242 printk(KERN_DEBUG "pmc551_read(pos:%ld, len:%ld) asize: %ld\n",
243 (long)from, (long)len, (long)priv->asize);
246 end = from + len - 1;
247 soff_hi = from & ~(priv->asize - 1);
248 eoff_hi = end & ~(priv->asize - 1);
249 soff_lo = from & (priv->asize - 1);
250 eoff_lo = end & (priv->asize - 1);
252 pmc551_point(mtd, from, len, retlen, (void **)&ptr, NULL);
254 if (soff_hi == eoff_hi) {
255 /* The whole thing fits within one access, so just one shot
257 memcpy(copyto, ptr, len);
260 /* We have to do multiple writes to get all the data
262 while (soff_hi != eoff_hi) {
263 #ifdef CONFIG_MTD_PMC551_DEBUG
264 printk(KERN_DEBUG "pmc551_read() soff_hi: %ld, "
265 "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
267 memcpy(copyto, ptr, priv->asize);
268 copyto += priv->asize;
269 if (soff_hi + priv->asize >= mtd->size) {
272 soff_hi += priv->asize;
273 pmc551_point(mtd, soff_hi, priv->asize, retlen,
274 (void **)&ptr, NULL);
276 memcpy(copyto, ptr, eoff_lo);
281 #ifdef CONFIG_MTD_PMC551_DEBUG
282 printk(KERN_DEBUG "pmc551_read() done\n");
284 *retlen = copyto - buf;
288 static int pmc551_write(struct mtd_info *mtd, loff_t to, size_t len,
289 size_t * retlen, const u_char * buf)
291 struct mypriv *priv = mtd->priv;
292 u32 soff_hi, soff_lo; /* start address offset hi/lo */
293 u32 eoff_hi, eoff_lo; /* end address offset hi/lo */
296 const u_char *copyfrom = buf;
298 #ifdef CONFIG_MTD_PMC551_DEBUG
299 printk(KERN_DEBUG "pmc551_write(pos:%ld, len:%ld) asize:%ld\n",
300 (long)to, (long)len, (long)priv->asize);
304 soff_hi = to & ~(priv->asize - 1);
305 eoff_hi = end & ~(priv->asize - 1);
306 soff_lo = to & (priv->asize - 1);
307 eoff_lo = end & (priv->asize - 1);
309 pmc551_point(mtd, to, len, retlen, (void **)&ptr, NULL);
311 if (soff_hi == eoff_hi) {
312 /* The whole thing fits within one access, so just one shot
314 memcpy(ptr, copyfrom, len);
317 /* We have to do multiple writes to get all the data
319 while (soff_hi != eoff_hi) {
320 #ifdef CONFIG_MTD_PMC551_DEBUG
321 printk(KERN_DEBUG "pmc551_write() soff_hi: %ld, "
322 "eoff_hi: %ld\n", (long)soff_hi, (long)eoff_hi);
324 memcpy(ptr, copyfrom, priv->asize);
325 copyfrom += priv->asize;
326 if (soff_hi >= mtd->size) {
329 soff_hi += priv->asize;
330 pmc551_point(mtd, soff_hi, priv->asize, retlen,
331 (void **)&ptr, NULL);
333 memcpy(ptr, copyfrom, eoff_lo);
338 #ifdef CONFIG_MTD_PMC551_DEBUG
339 printk(KERN_DEBUG "pmc551_write() done\n");
341 *retlen = copyfrom - buf;
346 * Fixup routines for the V370PDC
347 * PCI device ID 0x020011b0
349 * This function basically kick starts the DRAM oboard the card and gets it
350 * ready to be used. Before this is done the device reads VERY erratic, so
351 * much that it can crash the Linux 2.2.x series kernels when a user cat's
352 * /proc/pci .. though that is mainly a kernel bug in handling the PCI DEVSEL
353 * register. FIXME: stop spinning on registers .. must implement a timeout
355 * returns the size of the memory region found.
357 static int fixup_pmc551(struct pci_dev *dev)
359 #ifdef CONFIG_MTD_PMC551_BUGFIX
362 u32 size, dcmd, cfg, dtmp;
372 * Attempt to reset the card
373 * FIXME: Stop Spinning registers
376 /* unlock registers */
377 pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, 0xA5);
378 /* read in old data */
379 pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd);
380 /* bang the reset line up and down for a few */
381 for (i = 0; i < 10; i++) {
384 while (counter++ < 100) {
385 pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
389 while (counter++ < 100) {
390 pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
393 bcmd |= (0x40 | 0x20);
394 pci_write_config_byte(dev, PMC551_SYS_CTRL_REG, bcmd);
397 * Take care and turn off the memory on the device while we
398 * tweak the configurations
400 pci_read_config_word(dev, PCI_COMMAND, &cmd);
401 tmp = cmd & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY);
402 pci_write_config_word(dev, PCI_COMMAND, tmp);
405 * Disable existing aperture before probing memory size
407 pci_read_config_dword(dev, PMC551_PCI_MEM_MAP0, &dcmd);
408 dtmp = (dcmd | PMC551_PCI_MEM_MAP_ENABLE | PMC551_PCI_MEM_MAP_REG_EN);
409 pci_write_config_dword(dev, PMC551_PCI_MEM_MAP0, dtmp);
411 * Grab old BAR0 config so that we can figure out memory size
412 * This is another bit of kludge going on. The reason for the
413 * redundancy is I am hoping to retain the original configuration
414 * previously assigned to the card by the BIOS or some previous
415 * fixup routine in the kernel. So we read the old config into cfg,
416 * then write all 1's to the memory space, read back the result into
417 * "size", and then write back all the old config.
419 pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &cfg);
420 #ifndef CONFIG_MTD_PMC551_BUGFIX
421 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, ~0);
422 pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &size);
423 size = (size & PCI_BASE_ADDRESS_MEM_MASK);
425 pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, cfg);
428 * Get the size of the memory by reading all the DRAM size values
429 * and adding them up.
431 * KLUDGE ALERT: the boards we are using have invalid column and
432 * row mux values. We fix them here, but this will break other
433 * memory configurations.
435 pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dram_data);
436 size = PMC551_DRAM_BLK_GET_SIZE(dram_data);
437 dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
438 dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
439 pci_write_config_dword(dev, PMC551_DRAM_BLK0, dram_data);
441 pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dram_data);
442 size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
443 dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
444 dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
445 pci_write_config_dword(dev, PMC551_DRAM_BLK1, dram_data);
447 pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dram_data);
448 size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
449 dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
450 dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
451 pci_write_config_dword(dev, PMC551_DRAM_BLK2, dram_data);
453 pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dram_data);
454 size += PMC551_DRAM_BLK_GET_SIZE(dram_data);
455 dram_data = PMC551_DRAM_BLK_SET_COL_MUX(dram_data, 0x5);
456 dram_data = PMC551_DRAM_BLK_SET_ROW_MUX(dram_data, 0x9);
457 pci_write_config_dword(dev, PMC551_DRAM_BLK3, dram_data);
460 * Oops .. something went wrong
462 if ((size &= PCI_BASE_ADDRESS_MEM_MASK) == 0) {
465 #endif /* CONFIG_MTD_PMC551_BUGFIX */
467 if ((cfg & PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_MEMORY) {
474 pci_write_config_word(dev, PMC551_SDRAM_MA, 0x0400);
475 pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x00bf);
478 * Wait until command has gone through
479 * FIXME: register spinning issue
482 pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
485 } while ((PCI_COMMAND_IO) & cmd);
488 * Turn on auto refresh
489 * The loop is taken directly from Ramix's example code. I assume that
490 * this must be held high for some duration of time, but I can find no
491 * documentation refrencing the reasons why.
493 for (i = 1; i <= 8; i++) {
494 pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x0df);
497 * Make certain command has gone through
498 * FIXME: register spinning issue
502 pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
505 } while ((PCI_COMMAND_IO) & cmd);
508 pci_write_config_word(dev, PMC551_SDRAM_MA, 0x0020);
509 pci_write_config_word(dev, PMC551_SDRAM_CMD, 0x0ff);
512 * Wait until command completes
513 * FIXME: register spinning issue
517 pci_read_config_word(dev, PMC551_SDRAM_CMD, &cmd);
520 } while ((PCI_COMMAND_IO) & cmd);
522 pci_read_config_dword(dev, PMC551_DRAM_CFG, &dcmd);
524 pci_write_config_dword(dev, PMC551_DRAM_CFG, dcmd);
527 * Check to make certain fast back-to-back, if not
530 pci_read_config_word(dev, PCI_STATUS, &cmd);
531 if ((cmd & PCI_COMMAND_FAST_BACK) == 0) {
532 cmd |= PCI_COMMAND_FAST_BACK;
533 pci_write_config_word(dev, PCI_STATUS, cmd);
537 * Check to make certain the DEVSEL is set correctly, this device
538 * has a tendency to assert DEVSEL and TRDY when a write is performed
539 * to the memory when memory is read-only
541 if ((cmd & PCI_STATUS_DEVSEL_MASK) != 0x0) {
542 cmd &= ~PCI_STATUS_DEVSEL_MASK;
543 pci_write_config_word(dev, PCI_STATUS, cmd);
546 * Set to be prefetchable and put everything back based on old cfg.
547 * it's possible that the reset of the V370PDC nuked the original
551 cfg |= PCI_BASE_ADDRESS_MEM_PREFETCH;
552 pci_write_config_dword( dev, PCI_BASE_ADDRESS_0, cfg );
556 * Turn PCI memory and I/O bus access back on
558 pci_write_config_word(dev, PCI_COMMAND,
559 PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
560 #ifdef CONFIG_MTD_PMC551_DEBUG
564 printk(KERN_DEBUG "pmc551: %d%sB (0x%x) of %sprefetchable memory at "
565 "0x%llx\n", (size < 1024) ? size : (size < 1048576) ?
566 size >> 10 : size >> 20,
567 (size < 1024) ? "" : (size < 1048576) ? "Ki" : "Mi", size,
568 ((dcmd & (0x1 << 3)) == 0) ? "non-" : "",
569 (unsigned long long)pci_resource_start(dev, 0));
572 * Check to see the state of the memory
574 pci_read_config_dword(dev, PMC551_DRAM_BLK0, &dcmd);
575 printk(KERN_DEBUG "pmc551: DRAM_BLK0 Flags: %s,%s\n"
576 "pmc551: DRAM_BLK0 Size: %d at %d\n"
577 "pmc551: DRAM_BLK0 Row MUX: %d, Col MUX: %d\n",
578 (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
579 (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
580 PMC551_DRAM_BLK_GET_SIZE(dcmd),
581 ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
582 ((dcmd >> 9) & 0xF));
584 pci_read_config_dword(dev, PMC551_DRAM_BLK1, &dcmd);
585 printk(KERN_DEBUG "pmc551: DRAM_BLK1 Flags: %s,%s\n"
586 "pmc551: DRAM_BLK1 Size: %d at %d\n"
587 "pmc551: DRAM_BLK1 Row MUX: %d, Col MUX: %d\n",
588 (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
589 (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
590 PMC551_DRAM_BLK_GET_SIZE(dcmd),
591 ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
592 ((dcmd >> 9) & 0xF));
594 pci_read_config_dword(dev, PMC551_DRAM_BLK2, &dcmd);
595 printk(KERN_DEBUG "pmc551: DRAM_BLK2 Flags: %s,%s\n"
596 "pmc551: DRAM_BLK2 Size: %d at %d\n"
597 "pmc551: DRAM_BLK2 Row MUX: %d, Col MUX: %d\n",
598 (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
599 (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
600 PMC551_DRAM_BLK_GET_SIZE(dcmd),
601 ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
602 ((dcmd >> 9) & 0xF));
604 pci_read_config_dword(dev, PMC551_DRAM_BLK3, &dcmd);
605 printk(KERN_DEBUG "pmc551: DRAM_BLK3 Flags: %s,%s\n"
606 "pmc551: DRAM_BLK3 Size: %d at %d\n"
607 "pmc551: DRAM_BLK3 Row MUX: %d, Col MUX: %d\n",
608 (((0x1 << 1) & dcmd) == 0) ? "RW" : "RO",
609 (((0x1 << 0) & dcmd) == 0) ? "Off" : "On",
610 PMC551_DRAM_BLK_GET_SIZE(dcmd),
611 ((dcmd >> 20) & 0x7FF), ((dcmd >> 13) & 0x7),
612 ((dcmd >> 9) & 0xF));
614 pci_read_config_word(dev, PCI_COMMAND, &cmd);
615 printk(KERN_DEBUG "pmc551: Memory Access %s\n",
616 (((0x1 << 1) & cmd) == 0) ? "off" : "on");
617 printk(KERN_DEBUG "pmc551: I/O Access %s\n",
618 (((0x1 << 0) & cmd) == 0) ? "off" : "on");
620 pci_read_config_word(dev, PCI_STATUS, &cmd);
621 printk(KERN_DEBUG "pmc551: Devsel %s\n",
622 ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x000) ? "Fast" :
623 ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x200) ? "Medium" :
624 ((PCI_STATUS_DEVSEL_MASK & cmd) == 0x400) ? "Slow" : "Invalid");
626 printk(KERN_DEBUG "pmc551: %sFast Back-to-Back\n",
627 ((PCI_COMMAND_FAST_BACK & cmd) == 0) ? "Not " : "");
629 pci_read_config_byte(dev, PMC551_SYS_CTRL_REG, &bcmd);
630 printk(KERN_DEBUG "pmc551: EEPROM is under %s control\n"
631 "pmc551: System Control Register is %slocked to PCI access\n"
632 "pmc551: System Control Register is %slocked to EEPROM access\n",
633 (bcmd & 0x1) ? "software" : "hardware",
634 (bcmd & 0x20) ? "" : "un", (bcmd & 0x40) ? "" : "un");
640 * Kernel version specific module stuffages
643 MODULE_LICENSE("GPL");
644 MODULE_AUTHOR("Mark Ferrell <mferrell@mvista.com>");
645 MODULE_DESCRIPTION(PMC551_VERSION);
648 * Stuff these outside the ifdef so as to not bust compiled in driver support
650 static int msize = 0;
651 static int asize = 0;
653 module_param(msize, int, 0);
654 MODULE_PARM_DESC(msize, "memory size in MiB [1 - 1024]");
655 module_param(asize, int, 0);
656 MODULE_PARM_DESC(asize, "aperture size, must be <= memsize [1-1024]");
659 * PMC551 Card Initialization
661 static int __init init_pmc551(void)
663 struct pci_dev *PCI_Device = NULL;
666 struct mtd_info *mtd;
670 msize = (1 << (ffs(msize) - 1)) << 20;
671 if (msize > (1 << 30)) {
672 printk(KERN_NOTICE "pmc551: Invalid memory size [%d]\n",
679 asize = (1 << (ffs(asize) - 1)) << 20;
680 if (asize > (1 << 30)) {
681 printk(KERN_NOTICE "pmc551: Invalid aperture size "
687 printk(KERN_INFO PMC551_VERSION);
690 * PCU-bus chipset probe.
694 if ((PCI_Device = pci_get_device(PCI_VENDOR_ID_V3_SEMI,
695 PCI_DEVICE_ID_V3_SEMI_V370PDC,
696 PCI_Device)) == NULL) {
700 printk(KERN_NOTICE "pmc551: Found PCI V370PDC at 0x%llx\n",
701 (unsigned long long)pci_resource_start(PCI_Device, 0));
704 * The PMC551 device acts VERY weird if you don't init it
705 * first. i.e. it will not correctly report devsel. If for
706 * some reason the sdram is in a wrote-protected state the
707 * device will DEVSEL when it is written to causing problems
708 * with the oldproc.c driver in
709 * some kernels (2.2.*)
711 if ((length = fixup_pmc551(PCI_Device)) <= 0) {
712 printk(KERN_NOTICE "pmc551: Cannot init SDRAM\n");
717 * This is needed until the driver is capable of reading the
718 * onboard I2C SROM to discover the "real" memory size.
722 printk(KERN_NOTICE "pmc551: Using specified memory "
723 "size 0x%x\n", length);
728 mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL);
730 printk(KERN_NOTICE "pmc551: Cannot allocate new MTD "
735 priv = kzalloc(sizeof(struct mypriv), GFP_KERNEL);
737 printk(KERN_NOTICE "pmc551: Cannot allocate new MTD "
743 priv->dev = PCI_Device;
745 if (asize > length) {
746 printk(KERN_NOTICE "pmc551: reducing aperture size to "
747 "fit %dM\n", length >> 20);
748 priv->asize = asize = length;
749 } else if (asize == 0 || asize == length) {
750 printk(KERN_NOTICE "pmc551: Using existing aperture "
751 "size %dM\n", length >> 20);
752 priv->asize = asize = length;
754 printk(KERN_NOTICE "pmc551: Using specified aperture "
755 "size %dM\n", asize >> 20);
758 priv->start = pci_iomap(PCI_Device, 0, priv->asize);
761 printk(KERN_NOTICE "pmc551: Unable to map IO space\n");
766 #ifdef CONFIG_MTD_PMC551_DEBUG
767 printk(KERN_DEBUG "pmc551: setting aperture to %d\n",
768 ffs(priv->asize >> 20) - 1);
771 priv->base_map0 = (PMC551_PCI_MEM_MAP_REG_EN
772 | PMC551_PCI_MEM_MAP_ENABLE
773 | (ffs(priv->asize >> 20) - 1) << 4);
774 priv->curr_map0 = priv->base_map0;
775 pci_write_config_dword(priv->dev, PMC551_PCI_MEM_MAP0,
778 #ifdef CONFIG_MTD_PMC551_DEBUG
779 printk(KERN_DEBUG "pmc551: aperture set to %d\n",
780 (priv->base_map0 & 0xF0) >> 4);
784 mtd->flags = MTD_CAP_RAM;
785 mtd->_erase = pmc551_erase;
786 mtd->_read = pmc551_read;
787 mtd->_write = pmc551_write;
788 mtd->_point = pmc551_point;
789 mtd->_unpoint = pmc551_unpoint;
791 mtd->name = "PMC551 RAM board";
792 mtd->erasesize = 0x10000;
794 mtd->owner = THIS_MODULE;
796 if (mtd_device_register(mtd, NULL, 0)) {
797 printk(KERN_NOTICE "pmc551: Failed to register new device\n");
798 pci_iounmap(PCI_Device, priv->start);
804 /* Keep a reference as the mtd_device_register worked */
805 pci_dev_get(PCI_Device);
807 printk(KERN_NOTICE "Registered pmc551 memory device.\n");
808 printk(KERN_NOTICE "Mapped %dMiB of memory from 0x%p to 0x%p\n",
810 priv->start, priv->start + priv->asize);
811 printk(KERN_NOTICE "Total memory is %d%sB\n",
812 (length < 1024) ? length :
813 (length < 1048576) ? length >> 10 : length >> 20,
814 (length < 1024) ? "" : (length < 1048576) ? "Ki" : "Mi");
815 priv->nextpmc551 = pmc551list;
820 /* Exited early, reference left over */
822 pci_dev_put(PCI_Device);
825 printk(KERN_NOTICE "pmc551: not detected\n");
828 printk(KERN_NOTICE "pmc551: %d pmc551 devices loaded\n", found);
834 * PMC551 Card Cleanup
836 static void __exit cleanup_pmc551(void)
839 struct mtd_info *mtd;
842 while ((mtd = pmc551list)) {
844 pmc551list = priv->nextpmc551;
847 printk(KERN_DEBUG "pmc551: unmapping %dMiB starting at "
848 "0x%p\n", priv->asize >> 20, priv->start);
849 pci_iounmap(priv->dev, priv->start);
851 pci_dev_put(priv->dev);
854 mtd_device_unregister(mtd);
859 printk(KERN_NOTICE "pmc551: %d pmc551 devices unloaded\n", found);
862 module_init(init_pmc551);
863 module_exit(cleanup_pmc551);