2 * Freescale GPMI NAND Flash Driver
4 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
5 * Copyright (C) 2008 Embedded Alley Solutions, Inc.
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License along
18 * with this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
21 #include <linux/clk.h>
22 #include <linux/slab.h>
23 #include <linux/interrupt.h>
24 #include <linux/module.h>
25 #include <linux/mtd/partitions.h>
27 #include <linux/of_device.h>
28 #include <linux/of_mtd.h>
29 #include "gpmi-nand.h"
32 /* Resource names for the GPMI NAND driver. */
33 #define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand"
34 #define GPMI_NAND_BCH_REGS_ADDR_RES_NAME "bch"
35 #define GPMI_NAND_BCH_INTERRUPT_RES_NAME "bch"
37 /* add our owner bbt descriptor */
38 static uint8_t scan_ff_pattern[] = { 0xff };
39 static struct nand_bbt_descr gpmi_bbt_descr = {
43 .pattern = scan_ff_pattern
47 * We may change the layout if we can get the ECC info from the datasheet,
48 * else we will use all the (page + OOB).
50 static struct nand_ecclayout gpmi_hw_ecclayout = {
53 .oobfree = { {.offset = 0, .length = 0} }
56 static const struct gpmi_devdata gpmi_devdata_imx23 = {
58 .bch_max_ecc_strength = 20,
59 .max_chain_delay = 16,
62 static const struct gpmi_devdata gpmi_devdata_imx28 = {
64 .bch_max_ecc_strength = 20,
65 .max_chain_delay = 16,
68 static const struct gpmi_devdata gpmi_devdata_imx6q = {
70 .bch_max_ecc_strength = 40,
71 .max_chain_delay = 12,
74 static const struct gpmi_devdata gpmi_devdata_imx6sx = {
76 .bch_max_ecc_strength = 62,
77 .max_chain_delay = 12,
80 static irqreturn_t bch_irq(int irq, void *cookie)
82 struct gpmi_nand_data *this = cookie;
85 complete(&this->bch_done);
90 * Calculate the ECC strength by hand:
91 * E : The ECC strength.
92 * G : the length of Galois Field.
93 * N : The chunk count of per page.
94 * O : the oobsize of the NAND chip.
95 * M : the metasize of per page.
99 * ------------ <= (O - M)
107 static inline int get_ecc_strength(struct gpmi_nand_data *this)
109 struct bch_geometry *geo = &this->bch_geometry;
110 struct mtd_info *mtd = &this->mtd;
113 ecc_strength = ((mtd->oobsize - geo->metadata_size) * 8)
114 / (geo->gf_len * geo->ecc_chunk_count);
116 /* We need the minor even number. */
117 return round_down(ecc_strength, 2);
120 static inline bool gpmi_check_ecc(struct gpmi_nand_data *this)
122 struct bch_geometry *geo = &this->bch_geometry;
124 /* Do the sanity check. */
125 if (GPMI_IS_MX23(this) || GPMI_IS_MX28(this)) {
126 /* The mx23/mx28 only support the GF13. */
127 if (geo->gf_len == 14)
130 return geo->ecc_strength <= this->devdata->bch_max_ecc_strength;
134 * If we can get the ECC information from the nand chip, we do not
135 * need to calculate them ourselves.
137 * We may have available oob space in this case.
139 static bool set_geometry_by_ecc_info(struct gpmi_nand_data *this)
141 struct bch_geometry *geo = &this->bch_geometry;
142 struct mtd_info *mtd = &this->mtd;
143 struct nand_chip *chip = mtd->priv;
144 struct nand_oobfree *of = gpmi_hw_ecclayout.oobfree;
145 unsigned int block_mark_bit_offset;
147 if (!(chip->ecc_strength_ds > 0 && chip->ecc_step_ds > 0))
150 switch (chip->ecc_step_ds) {
159 "unsupported nand chip. ecc bits : %d, ecc size : %d\n",
160 chip->ecc_strength_ds, chip->ecc_step_ds);
163 geo->ecc_chunk_size = chip->ecc_step_ds;
164 geo->ecc_strength = round_up(chip->ecc_strength_ds, 2);
165 if (!gpmi_check_ecc(this))
168 /* Keep the C >= O */
169 if (geo->ecc_chunk_size < mtd->oobsize) {
171 "unsupported nand chip. ecc size: %d, oob size : %d\n",
172 chip->ecc_step_ds, mtd->oobsize);
176 /* The default value, see comment in the legacy_set_geometry(). */
177 geo->metadata_size = 10;
179 geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
182 * Now, the NAND chip with 2K page(data chunk is 512byte) shows below:
185 * |<----------------------------------------------------->|
189 * |<-------------------------------------------->| D | | O' |
192 * +---+----------+-+----------+-+----------+-+----------+-+-----+
193 * | M | data |E| data |E| data |E| data |E| |
194 * +---+----------+-+----------+-+----------+-+----------+-+-----+
200 * P : the page size for BCH module.
201 * E : The ECC strength.
202 * G : the length of Galois Field.
203 * N : The chunk count of per page.
204 * M : the metasize of per page.
205 * C : the ecc chunk size, aka the "data" above.
206 * P': the nand chip's page size.
207 * O : the nand chip's oob size.
210 * The formula for P is :
213 * P = ------------ + P' + M
216 * The position of block mark moves forward in the ECC-based view
217 * of page, and the delta is:
220 * D = (---------------- + M)
223 * Please see the comment in legacy_set_geometry().
224 * With the condition C >= O , we still can get same result.
225 * So the bit position of the physical block mark within the ECC-based
226 * view of the page is :
229 geo->page_size = mtd->writesize + geo->metadata_size +
230 (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8;
232 /* The available oob size we have. */
233 if (geo->page_size < mtd->writesize + mtd->oobsize) {
234 of->offset = geo->page_size - mtd->writesize;
235 of->length = mtd->oobsize - of->offset;
238 geo->payload_size = mtd->writesize;
240 geo->auxiliary_status_offset = ALIGN(geo->metadata_size, 4);
241 geo->auxiliary_size = ALIGN(geo->metadata_size, 4)
242 + ALIGN(geo->ecc_chunk_count, 4);
244 if (!this->swap_block_mark)
248 block_mark_bit_offset = mtd->writesize * 8 -
249 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1)
250 + geo->metadata_size * 8);
252 geo->block_mark_byte_offset = block_mark_bit_offset / 8;
253 geo->block_mark_bit_offset = block_mark_bit_offset % 8;
257 static int legacy_set_geometry(struct gpmi_nand_data *this)
259 struct bch_geometry *geo = &this->bch_geometry;
260 struct mtd_info *mtd = &this->mtd;
261 unsigned int metadata_size;
262 unsigned int status_size;
263 unsigned int block_mark_bit_offset;
266 * The size of the metadata can be changed, though we set it to 10
267 * bytes now. But it can't be too large, because we have to save
268 * enough space for BCH.
270 geo->metadata_size = 10;
272 /* The default for the length of Galois Field. */
275 /* The default for chunk size. */
276 geo->ecc_chunk_size = 512;
277 while (geo->ecc_chunk_size < mtd->oobsize) {
278 geo->ecc_chunk_size *= 2; /* keep C >= O */
282 geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size;
284 /* We use the same ECC strength for all chunks. */
285 geo->ecc_strength = get_ecc_strength(this);
286 if (!gpmi_check_ecc(this)) {
288 "required ecc strength of the NAND chip: %d is not supported by the GPMI controller (%d)\n",
290 this->devdata->bch_max_ecc_strength);
294 geo->page_size = mtd->writesize + mtd->oobsize;
295 geo->payload_size = mtd->writesize;
298 * The auxiliary buffer contains the metadata and the ECC status. The
299 * metadata is padded to the nearest 32-bit boundary. The ECC status
300 * contains one byte for every ECC chunk, and is also padded to the
301 * nearest 32-bit boundary.
303 metadata_size = ALIGN(geo->metadata_size, 4);
304 status_size = ALIGN(geo->ecc_chunk_count, 4);
306 geo->auxiliary_size = metadata_size + status_size;
307 geo->auxiliary_status_offset = metadata_size;
309 if (!this->swap_block_mark)
313 * We need to compute the byte and bit offsets of
314 * the physical block mark within the ECC-based view of the page.
316 * NAND chip with 2K page shows below:
322 * +---+----------+-+----------+-+----------+-+----------+-+
323 * | M | data |E| data |E| data |E| data |E|
324 * +---+----------+-+----------+-+----------+-+----------+-+
326 * The position of block mark moves forward in the ECC-based view
327 * of page, and the delta is:
330 * D = (---------------- + M)
333 * With the formula to compute the ECC strength, and the condition
334 * : C >= O (C is the ecc chunk size)
336 * It's easy to deduce to the following result:
338 * E * G (O - M) C - M C - M
339 * ----------- <= ------- <= -------- < ---------
345 * D = (---------------- + M) < C
348 * The above inequality means the position of block mark
349 * within the ECC-based view of the page is still in the data chunk,
350 * and it's NOT in the ECC bits of the chunk.
352 * Use the following to compute the bit position of the
353 * physical block mark within the ECC-based view of the page:
354 * (page_size - D) * 8
358 block_mark_bit_offset = mtd->writesize * 8 -
359 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1)
360 + geo->metadata_size * 8);
362 geo->block_mark_byte_offset = block_mark_bit_offset / 8;
363 geo->block_mark_bit_offset = block_mark_bit_offset % 8;
367 int common_nfc_set_geometry(struct gpmi_nand_data *this)
369 if (of_property_read_bool(this->dev->of_node, "fsl,use-minimum-ecc")
370 && set_geometry_by_ecc_info(this))
372 return legacy_set_geometry(this);
375 struct dma_chan *get_dma_chan(struct gpmi_nand_data *this)
377 /* We use the DMA channel 0 to access all the nand chips. */
378 return this->dma_chans[0];
381 /* Can we use the upper's buffer directly for DMA? */
382 void prepare_data_dma(struct gpmi_nand_data *this, enum dma_data_direction dr)
384 struct scatterlist *sgl = &this->data_sgl;
387 /* first try to map the upper buffer directly */
388 if (virt_addr_valid(this->upper_buf) &&
389 !object_is_on_stack(this->upper_buf)) {
390 sg_init_one(sgl, this->upper_buf, this->upper_len);
391 ret = dma_map_sg(this->dev, sgl, 1, dr);
395 this->direct_dma_map_ok = true;
400 /* We have to use our own DMA buffer. */
401 sg_init_one(sgl, this->data_buffer_dma, this->upper_len);
403 if (dr == DMA_TO_DEVICE)
404 memcpy(this->data_buffer_dma, this->upper_buf, this->upper_len);
406 dma_map_sg(this->dev, sgl, 1, dr);
408 this->direct_dma_map_ok = false;
411 /* This will be called after the DMA operation is finished. */
412 static void dma_irq_callback(void *param)
414 struct gpmi_nand_data *this = param;
415 struct completion *dma_c = &this->dma_done;
417 switch (this->dma_type) {
418 case DMA_FOR_COMMAND:
419 dma_unmap_sg(this->dev, &this->cmd_sgl, 1, DMA_TO_DEVICE);
422 case DMA_FOR_READ_DATA:
423 dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_FROM_DEVICE);
424 if (this->direct_dma_map_ok == false)
425 memcpy(this->upper_buf, this->data_buffer_dma,
429 case DMA_FOR_WRITE_DATA:
430 dma_unmap_sg(this->dev, &this->data_sgl, 1, DMA_TO_DEVICE);
433 case DMA_FOR_READ_ECC_PAGE:
434 case DMA_FOR_WRITE_ECC_PAGE:
435 /* We have to wait the BCH interrupt to finish. */
439 dev_err(this->dev, "in wrong DMA operation.\n");
445 int start_dma_without_bch_irq(struct gpmi_nand_data *this,
446 struct dma_async_tx_descriptor *desc)
448 struct completion *dma_c = &this->dma_done;
451 init_completion(dma_c);
453 desc->callback = dma_irq_callback;
454 desc->callback_param = this;
455 dmaengine_submit(desc);
456 dma_async_issue_pending(get_dma_chan(this));
458 /* Wait for the interrupt from the DMA block. */
459 err = wait_for_completion_timeout(dma_c, msecs_to_jiffies(1000));
461 dev_err(this->dev, "DMA timeout, last DMA :%d\n",
462 this->last_dma_type);
463 gpmi_dump_info(this);
470 * This function is used in BCH reading or BCH writing pages.
471 * It will wait for the BCH interrupt as long as ONE second.
472 * Actually, we must wait for two interrupts :
473 * [1] firstly the DMA interrupt and
474 * [2] secondly the BCH interrupt.
476 int start_dma_with_bch_irq(struct gpmi_nand_data *this,
477 struct dma_async_tx_descriptor *desc)
479 struct completion *bch_c = &this->bch_done;
482 /* Prepare to receive an interrupt from the BCH block. */
483 init_completion(bch_c);
486 start_dma_without_bch_irq(this, desc);
488 /* Wait for the interrupt from the BCH block. */
489 err = wait_for_completion_timeout(bch_c, msecs_to_jiffies(1000));
491 dev_err(this->dev, "BCH timeout, last DMA :%d\n",
492 this->last_dma_type);
493 gpmi_dump_info(this);
499 static int acquire_register_block(struct gpmi_nand_data *this,
500 const char *res_name)
502 struct platform_device *pdev = this->pdev;
503 struct resources *res = &this->resources;
507 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name);
508 p = devm_ioremap_resource(&pdev->dev, r);
512 if (!strcmp(res_name, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME))
514 else if (!strcmp(res_name, GPMI_NAND_BCH_REGS_ADDR_RES_NAME))
517 dev_err(this->dev, "unknown resource name : %s\n", res_name);
522 static int acquire_bch_irq(struct gpmi_nand_data *this, irq_handler_t irq_h)
524 struct platform_device *pdev = this->pdev;
525 const char *res_name = GPMI_NAND_BCH_INTERRUPT_RES_NAME;
529 r = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name);
531 dev_err(this->dev, "Can't get resource for %s\n", res_name);
535 err = devm_request_irq(this->dev, r->start, irq_h, 0, res_name, this);
537 dev_err(this->dev, "error requesting BCH IRQ\n");
542 static void release_dma_channels(struct gpmi_nand_data *this)
545 for (i = 0; i < DMA_CHANS; i++)
546 if (this->dma_chans[i]) {
547 dma_release_channel(this->dma_chans[i]);
548 this->dma_chans[i] = NULL;
552 static int acquire_dma_channels(struct gpmi_nand_data *this)
554 struct platform_device *pdev = this->pdev;
555 struct dma_chan *dma_chan;
557 /* request dma channel */
558 dma_chan = dma_request_slave_channel(&pdev->dev, "rx-tx");
560 dev_err(this->dev, "Failed to request DMA channel.\n");
564 this->dma_chans[0] = dma_chan;
568 release_dma_channels(this);
572 static char *extra_clks_for_mx6q[GPMI_CLK_MAX] = {
573 "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch",
576 static int gpmi_get_clks(struct gpmi_nand_data *this)
578 struct resources *r = &this->resources;
579 char **extra_clks = NULL;
583 /* The main clock is stored in the first. */
584 r->clock[0] = devm_clk_get(this->dev, "gpmi_io");
585 if (IS_ERR(r->clock[0])) {
586 err = PTR_ERR(r->clock[0]);
590 /* Get extra clocks */
591 if (GPMI_IS_MX6(this))
592 extra_clks = extra_clks_for_mx6q;
596 for (i = 1; i < GPMI_CLK_MAX; i++) {
597 if (extra_clks[i - 1] == NULL)
600 clk = devm_clk_get(this->dev, extra_clks[i - 1]);
609 if (GPMI_IS_MX6(this))
611 * Set the default value for the gpmi clock.
613 * If you want to use the ONFI nand which is in the
614 * Synchronous Mode, you should change the clock as you need.
616 clk_set_rate(r->clock[0], 22000000);
621 dev_dbg(this->dev, "failed in finding the clocks.\n");
625 static int acquire_resources(struct gpmi_nand_data *this)
629 ret = acquire_register_block(this, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME);
633 ret = acquire_register_block(this, GPMI_NAND_BCH_REGS_ADDR_RES_NAME);
637 ret = acquire_bch_irq(this, bch_irq);
641 ret = acquire_dma_channels(this);
645 ret = gpmi_get_clks(this);
651 release_dma_channels(this);
656 static void release_resources(struct gpmi_nand_data *this)
658 release_dma_channels(this);
661 static int init_hardware(struct gpmi_nand_data *this)
666 * This structure contains the "safe" GPMI timing that should succeed
667 * with any NAND Flash device
668 * (although, with less-than-optimal performance).
670 struct nand_timing safe_timing = {
671 .data_setup_in_ns = 80,
672 .data_hold_in_ns = 60,
673 .address_setup_in_ns = 25,
674 .gpmi_sample_delay_in_ns = 6,
680 /* Initialize the hardwares. */
681 ret = gpmi_init(this);
685 this->timing = safe_timing;
689 static int read_page_prepare(struct gpmi_nand_data *this,
690 void *destination, unsigned length,
691 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
692 void **use_virt, dma_addr_t *use_phys)
694 struct device *dev = this->dev;
696 if (virt_addr_valid(destination)) {
697 dma_addr_t dest_phys;
699 dest_phys = dma_map_single(dev, destination,
700 length, DMA_FROM_DEVICE);
701 if (dma_mapping_error(dev, dest_phys)) {
702 if (alt_size < length) {
703 dev_err(dev, "Alternate buffer is too small\n");
708 *use_virt = destination;
709 *use_phys = dest_phys;
710 this->direct_dma_map_ok = true;
715 *use_virt = alt_virt;
716 *use_phys = alt_phys;
717 this->direct_dma_map_ok = false;
721 static inline void read_page_end(struct gpmi_nand_data *this,
722 void *destination, unsigned length,
723 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
724 void *used_virt, dma_addr_t used_phys)
726 if (this->direct_dma_map_ok)
727 dma_unmap_single(this->dev, used_phys, length, DMA_FROM_DEVICE);
730 static inline void read_page_swap_end(struct gpmi_nand_data *this,
731 void *destination, unsigned length,
732 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
733 void *used_virt, dma_addr_t used_phys)
735 if (!this->direct_dma_map_ok)
736 memcpy(destination, alt_virt, length);
739 static int send_page_prepare(struct gpmi_nand_data *this,
740 const void *source, unsigned length,
741 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
742 const void **use_virt, dma_addr_t *use_phys)
744 struct device *dev = this->dev;
746 if (virt_addr_valid(source)) {
747 dma_addr_t source_phys;
749 source_phys = dma_map_single(dev, (void *)source, length,
751 if (dma_mapping_error(dev, source_phys)) {
752 if (alt_size < length) {
753 dev_err(dev, "Alternate buffer is too small\n");
759 *use_phys = source_phys;
764 * Copy the content of the source buffer into the alternate
765 * buffer and set up the return values accordingly.
767 memcpy(alt_virt, source, length);
769 *use_virt = alt_virt;
770 *use_phys = alt_phys;
774 static void send_page_end(struct gpmi_nand_data *this,
775 const void *source, unsigned length,
776 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size,
777 const void *used_virt, dma_addr_t used_phys)
779 struct device *dev = this->dev;
780 if (used_virt == source)
781 dma_unmap_single(dev, used_phys, length, DMA_TO_DEVICE);
784 static void gpmi_free_dma_buffer(struct gpmi_nand_data *this)
786 struct device *dev = this->dev;
788 if (this->page_buffer_virt && virt_addr_valid(this->page_buffer_virt))
789 dma_free_coherent(dev, this->page_buffer_size,
790 this->page_buffer_virt,
791 this->page_buffer_phys);
792 kfree(this->cmd_buffer);
793 kfree(this->data_buffer_dma);
794 kfree(this->raw_buffer);
796 this->cmd_buffer = NULL;
797 this->data_buffer_dma = NULL;
798 this->page_buffer_virt = NULL;
799 this->page_buffer_size = 0;
802 /* Allocate the DMA buffers */
803 static int gpmi_alloc_dma_buffer(struct gpmi_nand_data *this)
805 struct bch_geometry *geo = &this->bch_geometry;
806 struct device *dev = this->dev;
807 struct mtd_info *mtd = &this->mtd;
809 /* [1] Allocate a command buffer. PAGE_SIZE is enough. */
810 this->cmd_buffer = kzalloc(PAGE_SIZE, GFP_DMA | GFP_KERNEL);
811 if (this->cmd_buffer == NULL)
815 * [2] Allocate a read/write data buffer.
816 * The gpmi_alloc_dma_buffer can be called twice.
817 * We allocate a PAGE_SIZE length buffer if gpmi_alloc_dma_buffer
818 * is called before the nand_scan_ident; and we allocate a buffer
819 * of the real NAND page size when the gpmi_alloc_dma_buffer is
820 * called after the nand_scan_ident.
822 this->data_buffer_dma = kzalloc(mtd->writesize ?: PAGE_SIZE,
823 GFP_DMA | GFP_KERNEL);
824 if (this->data_buffer_dma == NULL)
828 * [3] Allocate the page buffer.
830 * Both the payload buffer and the auxiliary buffer must appear on
831 * 32-bit boundaries. We presume the size of the payload buffer is a
832 * power of two and is much larger than four, which guarantees the
833 * auxiliary buffer will appear on a 32-bit boundary.
835 this->page_buffer_size = geo->payload_size + geo->auxiliary_size;
836 this->page_buffer_virt = dma_alloc_coherent(dev, this->page_buffer_size,
837 &this->page_buffer_phys, GFP_DMA);
838 if (!this->page_buffer_virt)
841 this->raw_buffer = kzalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL);
842 if (!this->raw_buffer)
845 /* Slice up the page buffer. */
846 this->payload_virt = this->page_buffer_virt;
847 this->payload_phys = this->page_buffer_phys;
848 this->auxiliary_virt = this->payload_virt + geo->payload_size;
849 this->auxiliary_phys = this->payload_phys + geo->payload_size;
853 gpmi_free_dma_buffer(this);
857 static void gpmi_cmd_ctrl(struct mtd_info *mtd, int data, unsigned int ctrl)
859 struct nand_chip *chip = mtd->priv;
860 struct gpmi_nand_data *this = chip->priv;
864 * Every operation begins with a command byte and a series of zero or
865 * more address bytes. These are distinguished by either the Address
866 * Latch Enable (ALE) or Command Latch Enable (CLE) signals being
867 * asserted. When MTD is ready to execute the command, it will deassert
868 * both latch enables.
870 * Rather than run a separate DMA operation for every single byte, we
871 * queue them up and run a single DMA operation for the entire series
872 * of command and data bytes. NAND_CMD_NONE means the END of the queue.
874 if ((ctrl & (NAND_ALE | NAND_CLE))) {
875 if (data != NAND_CMD_NONE)
876 this->cmd_buffer[this->command_length++] = data;
880 if (!this->command_length)
883 ret = gpmi_send_command(this);
885 dev_err(this->dev, "Chip: %u, Error %d\n",
886 this->current_chip, ret);
888 this->command_length = 0;
891 static int gpmi_dev_ready(struct mtd_info *mtd)
893 struct nand_chip *chip = mtd->priv;
894 struct gpmi_nand_data *this = chip->priv;
896 return gpmi_is_ready(this, this->current_chip);
899 static void gpmi_select_chip(struct mtd_info *mtd, int chipnr)
901 struct nand_chip *chip = mtd->priv;
902 struct gpmi_nand_data *this = chip->priv;
904 if ((this->current_chip < 0) && (chipnr >= 0))
906 else if ((this->current_chip >= 0) && (chipnr < 0))
909 this->current_chip = chipnr;
912 static void gpmi_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
914 struct nand_chip *chip = mtd->priv;
915 struct gpmi_nand_data *this = chip->priv;
917 dev_dbg(this->dev, "len is %d\n", len);
918 this->upper_buf = buf;
919 this->upper_len = len;
921 gpmi_read_data(this);
924 static void gpmi_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
926 struct nand_chip *chip = mtd->priv;
927 struct gpmi_nand_data *this = chip->priv;
929 dev_dbg(this->dev, "len is %d\n", len);
930 this->upper_buf = (uint8_t *)buf;
931 this->upper_len = len;
933 gpmi_send_data(this);
936 static uint8_t gpmi_read_byte(struct mtd_info *mtd)
938 struct nand_chip *chip = mtd->priv;
939 struct gpmi_nand_data *this = chip->priv;
940 uint8_t *buf = this->data_buffer_dma;
942 gpmi_read_buf(mtd, buf, 1);
947 * Handles block mark swapping.
948 * It can be called in swapping the block mark, or swapping it back,
949 * because the the operations are the same.
951 static void block_mark_swapping(struct gpmi_nand_data *this,
952 void *payload, void *auxiliary)
954 struct bch_geometry *nfc_geo = &this->bch_geometry;
959 unsigned char from_data;
960 unsigned char from_oob;
962 if (!this->swap_block_mark)
966 * If control arrives here, we're swapping. Make some convenience
969 bit = nfc_geo->block_mark_bit_offset;
970 p = payload + nfc_geo->block_mark_byte_offset;
974 * Get the byte from the data area that overlays the block mark. Since
975 * the ECC engine applies its own view to the bits in the page, the
976 * physical block mark won't (in general) appear on a byte boundary in
979 from_data = (p[0] >> bit) | (p[1] << (8 - bit));
981 /* Get the byte from the OOB. */
987 mask = (0x1 << bit) - 1;
988 p[0] = (p[0] & mask) | (from_oob << bit);
991 p[1] = (p[1] & mask) | (from_oob >> (8 - bit));
994 static int gpmi_ecc_read_page(struct mtd_info *mtd, struct nand_chip *chip,
995 uint8_t *buf, int oob_required, int page)
997 struct gpmi_nand_data *this = chip->priv;
998 struct bch_geometry *nfc_geo = &this->bch_geometry;
1000 dma_addr_t payload_phys;
1001 void *auxiliary_virt;
1002 dma_addr_t auxiliary_phys;
1004 unsigned char *status;
1005 unsigned int max_bitflips = 0;
1008 dev_dbg(this->dev, "page number is : %d\n", page);
1009 ret = read_page_prepare(this, buf, nfc_geo->payload_size,
1010 this->payload_virt, this->payload_phys,
1011 nfc_geo->payload_size,
1012 &payload_virt, &payload_phys);
1014 dev_err(this->dev, "Inadequate DMA buffer\n");
1018 auxiliary_virt = this->auxiliary_virt;
1019 auxiliary_phys = this->auxiliary_phys;
1022 ret = gpmi_read_page(this, payload_phys, auxiliary_phys);
1023 read_page_end(this, buf, nfc_geo->payload_size,
1024 this->payload_virt, this->payload_phys,
1025 nfc_geo->payload_size,
1026 payload_virt, payload_phys);
1028 dev_err(this->dev, "Error in ECC-based read: %d\n", ret);
1032 /* handle the block mark swapping */
1033 block_mark_swapping(this, payload_virt, auxiliary_virt);
1035 /* Loop over status bytes, accumulating ECC status. */
1036 status = auxiliary_virt + nfc_geo->auxiliary_status_offset;
1038 for (i = 0; i < nfc_geo->ecc_chunk_count; i++, status++) {
1039 if ((*status == STATUS_GOOD) || (*status == STATUS_ERASED))
1042 if (*status == STATUS_UNCORRECTABLE) {
1043 mtd->ecc_stats.failed++;
1046 mtd->ecc_stats.corrected += *status;
1047 max_bitflips = max_t(unsigned int, max_bitflips, *status);
1052 * It's time to deliver the OOB bytes. See gpmi_ecc_read_oob()
1053 * for details about our policy for delivering the OOB.
1055 * We fill the caller's buffer with set bits, and then copy the
1056 * block mark to th caller's buffer. Note that, if block mark
1057 * swapping was necessary, it has already been done, so we can
1058 * rely on the first byte of the auxiliary buffer to contain
1061 memset(chip->oob_poi, ~0, mtd->oobsize);
1062 chip->oob_poi[0] = ((uint8_t *) auxiliary_virt)[0];
1065 read_page_swap_end(this, buf, nfc_geo->payload_size,
1066 this->payload_virt, this->payload_phys,
1067 nfc_geo->payload_size,
1068 payload_virt, payload_phys);
1070 return max_bitflips;
1073 /* Fake a virtual small page for the subpage read */
1074 static int gpmi_ecc_read_subpage(struct mtd_info *mtd, struct nand_chip *chip,
1075 uint32_t offs, uint32_t len, uint8_t *buf, int page)
1077 struct gpmi_nand_data *this = chip->priv;
1078 void __iomem *bch_regs = this->resources.bch_regs;
1079 struct bch_geometry old_geo = this->bch_geometry;
1080 struct bch_geometry *geo = &this->bch_geometry;
1081 int size = chip->ecc.size; /* ECC chunk size */
1082 int meta, n, page_size;
1083 u32 r1_old, r2_old, r1_new, r2_new;
1084 unsigned int max_bitflips;
1085 int first, last, marker_pos;
1086 int ecc_parity_size;
1088 int old_swap_block_mark = this->swap_block_mark;
1090 /* The size of ECC parity */
1091 ecc_parity_size = geo->gf_len * geo->ecc_strength / 8;
1093 /* Align it with the chunk size */
1094 first = offs / size;
1095 last = (offs + len - 1) / size;
1097 if (this->swap_block_mark) {
1099 * Find the chunk which contains the Block Marker.
1100 * If this chunk is in the range of [first, last],
1101 * we have to read out the whole page.
1102 * Why? since we had swapped the data at the position of Block
1103 * Marker to the metadata which is bound with the chunk 0.
1105 marker_pos = geo->block_mark_byte_offset / size;
1106 if (last >= marker_pos && first <= marker_pos) {
1108 "page:%d, first:%d, last:%d, marker at:%d\n",
1109 page, first, last, marker_pos);
1110 return gpmi_ecc_read_page(mtd, chip, buf, 0, page);
1114 meta = geo->metadata_size;
1116 col = meta + (size + ecc_parity_size) * first;
1117 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, col, -1);
1120 buf = buf + first * size;
1123 /* Save the old environment */
1124 r1_old = r1_new = readl(bch_regs + HW_BCH_FLASH0LAYOUT0);
1125 r2_old = r2_new = readl(bch_regs + HW_BCH_FLASH0LAYOUT1);
1127 /* change the BCH registers and bch_geometry{} */
1128 n = last - first + 1;
1129 page_size = meta + (size + ecc_parity_size) * n;
1131 r1_new &= ~(BM_BCH_FLASH0LAYOUT0_NBLOCKS |
1132 BM_BCH_FLASH0LAYOUT0_META_SIZE);
1133 r1_new |= BF_BCH_FLASH0LAYOUT0_NBLOCKS(n - 1)
1134 | BF_BCH_FLASH0LAYOUT0_META_SIZE(meta);
1135 writel(r1_new, bch_regs + HW_BCH_FLASH0LAYOUT0);
1137 r2_new &= ~BM_BCH_FLASH0LAYOUT1_PAGE_SIZE;
1138 r2_new |= BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(page_size);
1139 writel(r2_new, bch_regs + HW_BCH_FLASH0LAYOUT1);
1141 geo->ecc_chunk_count = n;
1142 geo->payload_size = n * size;
1143 geo->page_size = page_size;
1144 geo->auxiliary_status_offset = ALIGN(meta, 4);
1146 dev_dbg(this->dev, "page:%d(%d:%d)%d, chunk:(%d:%d), BCH PG size:%d\n",
1147 page, offs, len, col, first, n, page_size);
1149 /* Read the subpage now */
1150 this->swap_block_mark = false;
1151 max_bitflips = gpmi_ecc_read_page(mtd, chip, buf, 0, page);
1154 writel(r1_old, bch_regs + HW_BCH_FLASH0LAYOUT0);
1155 writel(r2_old, bch_regs + HW_BCH_FLASH0LAYOUT1);
1156 this->bch_geometry = old_geo;
1157 this->swap_block_mark = old_swap_block_mark;
1159 return max_bitflips;
1162 static int gpmi_ecc_write_page(struct mtd_info *mtd, struct nand_chip *chip,
1163 const uint8_t *buf, int oob_required)
1165 struct gpmi_nand_data *this = chip->priv;
1166 struct bch_geometry *nfc_geo = &this->bch_geometry;
1167 const void *payload_virt;
1168 dma_addr_t payload_phys;
1169 const void *auxiliary_virt;
1170 dma_addr_t auxiliary_phys;
1173 dev_dbg(this->dev, "ecc write page.\n");
1174 if (this->swap_block_mark) {
1176 * If control arrives here, we're doing block mark swapping.
1177 * Since we can't modify the caller's buffers, we must copy them
1180 memcpy(this->payload_virt, buf, mtd->writesize);
1181 payload_virt = this->payload_virt;
1182 payload_phys = this->payload_phys;
1184 memcpy(this->auxiliary_virt, chip->oob_poi,
1185 nfc_geo->auxiliary_size);
1186 auxiliary_virt = this->auxiliary_virt;
1187 auxiliary_phys = this->auxiliary_phys;
1189 /* Handle block mark swapping. */
1190 block_mark_swapping(this,
1191 (void *)payload_virt, (void *)auxiliary_virt);
1194 * If control arrives here, we're not doing block mark swapping,
1195 * so we can to try and use the caller's buffers.
1197 ret = send_page_prepare(this,
1198 buf, mtd->writesize,
1199 this->payload_virt, this->payload_phys,
1200 nfc_geo->payload_size,
1201 &payload_virt, &payload_phys);
1203 dev_err(this->dev, "Inadequate payload DMA buffer\n");
1207 ret = send_page_prepare(this,
1208 chip->oob_poi, mtd->oobsize,
1209 this->auxiliary_virt, this->auxiliary_phys,
1210 nfc_geo->auxiliary_size,
1211 &auxiliary_virt, &auxiliary_phys);
1213 dev_err(this->dev, "Inadequate auxiliary DMA buffer\n");
1214 goto exit_auxiliary;
1219 ret = gpmi_send_page(this, payload_phys, auxiliary_phys);
1221 dev_err(this->dev, "Error in ECC-based write: %d\n", ret);
1223 if (!this->swap_block_mark) {
1224 send_page_end(this, chip->oob_poi, mtd->oobsize,
1225 this->auxiliary_virt, this->auxiliary_phys,
1226 nfc_geo->auxiliary_size,
1227 auxiliary_virt, auxiliary_phys);
1229 send_page_end(this, buf, mtd->writesize,
1230 this->payload_virt, this->payload_phys,
1231 nfc_geo->payload_size,
1232 payload_virt, payload_phys);
1239 * There are several places in this driver where we have to handle the OOB and
1240 * block marks. This is the function where things are the most complicated, so
1241 * this is where we try to explain it all. All the other places refer back to
1244 * These are the rules, in order of decreasing importance:
1246 * 1) Nothing the caller does can be allowed to imperil the block mark.
1248 * 2) In read operations, the first byte of the OOB we return must reflect the
1249 * true state of the block mark, no matter where that block mark appears in
1250 * the physical page.
1252 * 3) ECC-based read operations return an OOB full of set bits (since we never
1253 * allow ECC-based writes to the OOB, it doesn't matter what ECC-based reads
1256 * 4) "Raw" read operations return a direct view of the physical bytes in the
1257 * page, using the conventional definition of which bytes are data and which
1258 * are OOB. This gives the caller a way to see the actual, physical bytes
1259 * in the page, without the distortions applied by our ECC engine.
1262 * What we do for this specific read operation depends on two questions:
1264 * 1) Are we doing a "raw" read, or an ECC-based read?
1266 * 2) Are we using block mark swapping or transcription?
1268 * There are four cases, illustrated by the following Karnaugh map:
1270 * | Raw | ECC-based |
1271 * -------------+-------------------------+-------------------------+
1272 * | Read the conventional | |
1273 * | OOB at the end of the | |
1274 * Swapping | page and return it. It | |
1275 * | contains exactly what | |
1276 * | we want. | Read the block mark and |
1277 * -------------+-------------------------+ return it in a buffer |
1278 * | Read the conventional | full of set bits. |
1279 * | OOB at the end of the | |
1280 * | page and also the block | |
1281 * Transcribing | mark in the metadata. | |
1282 * | Copy the block mark | |
1283 * | into the first byte of | |
1285 * -------------+-------------------------+-------------------------+
1287 * Note that we break rule #4 in the Transcribing/Raw case because we're not
1288 * giving an accurate view of the actual, physical bytes in the page (we're
1289 * overwriting the block mark). That's OK because it's more important to follow
1292 * It turns out that knowing whether we want an "ECC-based" or "raw" read is not
1293 * easy. When reading a page, for example, the NAND Flash MTD code calls our
1294 * ecc.read_page or ecc.read_page_raw function. Thus, the fact that MTD wants an
1295 * ECC-based or raw view of the page is implicit in which function it calls
1296 * (there is a similar pair of ECC-based/raw functions for writing).
1298 static int gpmi_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *chip,
1301 struct gpmi_nand_data *this = chip->priv;
1303 dev_dbg(this->dev, "page number is %d\n", page);
1304 /* clear the OOB buffer */
1305 memset(chip->oob_poi, ~0, mtd->oobsize);
1307 /* Read out the conventional OOB. */
1308 chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
1309 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize);
1312 * Now, we want to make sure the block mark is correct. In the
1313 * non-transcribing case (!GPMI_IS_MX23()), we already have it.
1314 * Otherwise, we need to explicitly read it.
1316 if (GPMI_IS_MX23(this)) {
1317 /* Read the block mark into the first byte of the OOB buffer. */
1318 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
1319 chip->oob_poi[0] = chip->read_byte(mtd);
1326 gpmi_ecc_write_oob(struct mtd_info *mtd, struct nand_chip *chip, int page)
1328 struct nand_oobfree *of = mtd->ecclayout->oobfree;
1331 /* Do we have available oob area? */
1335 if (!nand_is_slc(chip))
1338 chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize + of->offset, page);
1339 chip->write_buf(mtd, chip->oob_poi + of->offset, of->length);
1340 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1342 status = chip->waitfunc(mtd, chip);
1343 return status & NAND_STATUS_FAIL ? -EIO : 0;
1347 * This function reads a NAND page without involving the ECC engine (no HW
1349 * The tricky part in the GPMI/BCH controller is that it stores ECC bits
1350 * inline (interleaved with payload DATA), and do not align data chunk on
1352 * We thus need to take care moving the payload data and ECC bits stored in the
1353 * page into the provided buffers, which is why we're using gpmi_copy_bits.
1355 * See set_geometry_by_ecc_info inline comments to have a full description
1356 * of the layout used by the GPMI controller.
1358 static int gpmi_ecc_read_page_raw(struct mtd_info *mtd,
1359 struct nand_chip *chip, uint8_t *buf,
1360 int oob_required, int page)
1362 struct gpmi_nand_data *this = chip->priv;
1363 struct bch_geometry *nfc_geo = &this->bch_geometry;
1364 int eccsize = nfc_geo->ecc_chunk_size;
1365 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len;
1366 u8 *tmp_buf = this->raw_buffer;
1369 size_t oob_byte_off;
1370 uint8_t *oob = chip->oob_poi;
1373 chip->read_buf(mtd, tmp_buf,
1374 mtd->writesize + mtd->oobsize);
1377 * If required, swap the bad block marker and the data stored in the
1378 * metadata section, so that we don't wrongly consider a block as bad.
1380 * See the layout description for a detailed explanation on why this
1383 if (this->swap_block_mark) {
1384 u8 swap = tmp_buf[0];
1386 tmp_buf[0] = tmp_buf[mtd->writesize];
1387 tmp_buf[mtd->writesize] = swap;
1391 * Copy the metadata section into the oob buffer (this section is
1392 * guaranteed to be aligned on a byte boundary).
1395 memcpy(oob, tmp_buf, nfc_geo->metadata_size);
1397 oob_bit_off = nfc_geo->metadata_size * 8;
1398 src_bit_off = oob_bit_off;
1400 /* Extract interleaved payload data and ECC bits */
1401 for (step = 0; step < nfc_geo->ecc_chunk_count; step++) {
1403 gpmi_copy_bits(buf, step * eccsize * 8,
1404 tmp_buf, src_bit_off,
1406 src_bit_off += eccsize * 8;
1408 /* Align last ECC block to align a byte boundary */
1409 if (step == nfc_geo->ecc_chunk_count - 1 &&
1410 (oob_bit_off + eccbits) % 8)
1411 eccbits += 8 - ((oob_bit_off + eccbits) % 8);
1414 gpmi_copy_bits(oob, oob_bit_off,
1415 tmp_buf, src_bit_off,
1418 src_bit_off += eccbits;
1419 oob_bit_off += eccbits;
1423 oob_byte_off = oob_bit_off / 8;
1425 if (oob_byte_off < mtd->oobsize)
1426 memcpy(oob + oob_byte_off,
1427 tmp_buf + mtd->writesize + oob_byte_off,
1428 mtd->oobsize - oob_byte_off);
1435 * This function writes a NAND page without involving the ECC engine (no HW
1437 * The tricky part in the GPMI/BCH controller is that it stores ECC bits
1438 * inline (interleaved with payload DATA), and do not align data chunk on
1440 * We thus need to take care moving the OOB area at the right place in the
1441 * final page, which is why we're using gpmi_copy_bits.
1443 * See set_geometry_by_ecc_info inline comments to have a full description
1444 * of the layout used by the GPMI controller.
1446 static int gpmi_ecc_write_page_raw(struct mtd_info *mtd,
1447 struct nand_chip *chip,
1451 struct gpmi_nand_data *this = chip->priv;
1452 struct bch_geometry *nfc_geo = &this->bch_geometry;
1453 int eccsize = nfc_geo->ecc_chunk_size;
1454 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len;
1455 u8 *tmp_buf = this->raw_buffer;
1456 uint8_t *oob = chip->oob_poi;
1459 size_t oob_byte_off;
1463 * Initialize all bits to 1 in case we don't have a buffer for the
1464 * payload or oob data in order to leave unspecified bits of data
1465 * to their initial state.
1467 if (!buf || !oob_required)
1468 memset(tmp_buf, 0xff, mtd->writesize + mtd->oobsize);
1471 * First copy the metadata section (stored in oob buffer) at the
1472 * beginning of the page, as imposed by the GPMI layout.
1474 memcpy(tmp_buf, oob, nfc_geo->metadata_size);
1475 oob_bit_off = nfc_geo->metadata_size * 8;
1476 dst_bit_off = oob_bit_off;
1478 /* Interleave payload data and ECC bits */
1479 for (step = 0; step < nfc_geo->ecc_chunk_count; step++) {
1481 gpmi_copy_bits(tmp_buf, dst_bit_off,
1482 buf, step * eccsize * 8, eccsize * 8);
1483 dst_bit_off += eccsize * 8;
1485 /* Align last ECC block to align a byte boundary */
1486 if (step == nfc_geo->ecc_chunk_count - 1 &&
1487 (oob_bit_off + eccbits) % 8)
1488 eccbits += 8 - ((oob_bit_off + eccbits) % 8);
1491 gpmi_copy_bits(tmp_buf, dst_bit_off,
1492 oob, oob_bit_off, eccbits);
1494 dst_bit_off += eccbits;
1495 oob_bit_off += eccbits;
1498 oob_byte_off = oob_bit_off / 8;
1500 if (oob_required && oob_byte_off < mtd->oobsize)
1501 memcpy(tmp_buf + mtd->writesize + oob_byte_off,
1502 oob + oob_byte_off, mtd->oobsize - oob_byte_off);
1505 * If required, swap the bad block marker and the first byte of the
1506 * metadata section, so that we don't modify the bad block marker.
1508 * See the layout description for a detailed explanation on why this
1511 if (this->swap_block_mark) {
1512 u8 swap = tmp_buf[0];
1514 tmp_buf[0] = tmp_buf[mtd->writesize];
1515 tmp_buf[mtd->writesize] = swap;
1518 chip->write_buf(mtd, tmp_buf, mtd->writesize + mtd->oobsize);
1523 static int gpmi_ecc_read_oob_raw(struct mtd_info *mtd, struct nand_chip *chip,
1526 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page);
1528 return gpmi_ecc_read_page_raw(mtd, chip, NULL, 1, page);
1531 static int gpmi_ecc_write_oob_raw(struct mtd_info *mtd, struct nand_chip *chip,
1534 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0, page);
1536 return gpmi_ecc_write_page_raw(mtd, chip, NULL, 1);
1539 static int gpmi_block_markbad(struct mtd_info *mtd, loff_t ofs)
1541 struct nand_chip *chip = mtd->priv;
1542 struct gpmi_nand_data *this = chip->priv;
1544 uint8_t *block_mark;
1545 int column, page, status, chipnr;
1547 chipnr = (int)(ofs >> chip->chip_shift);
1548 chip->select_chip(mtd, chipnr);
1550 column = !GPMI_IS_MX23(this) ? mtd->writesize : 0;
1552 /* Write the block mark. */
1553 block_mark = this->data_buffer_dma;
1554 block_mark[0] = 0; /* bad block marker */
1556 /* Shift to get page */
1557 page = (int)(ofs >> chip->page_shift);
1559 chip->cmdfunc(mtd, NAND_CMD_SEQIN, column, page);
1560 chip->write_buf(mtd, block_mark, 1);
1561 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1563 status = chip->waitfunc(mtd, chip);
1564 if (status & NAND_STATUS_FAIL)
1567 chip->select_chip(mtd, -1);
1572 static int nand_boot_set_geometry(struct gpmi_nand_data *this)
1574 struct boot_rom_geometry *geometry = &this->rom_geometry;
1577 * Set the boot block stride size.
1579 * In principle, we should be reading this from the OTP bits, since
1580 * that's where the ROM is going to get it. In fact, we don't have any
1581 * way to read the OTP bits, so we go with the default and hope for the
1584 geometry->stride_size_in_pages = 64;
1587 * Set the search area stride exponent.
1589 * In principle, we should be reading this from the OTP bits, since
1590 * that's where the ROM is going to get it. In fact, we don't have any
1591 * way to read the OTP bits, so we go with the default and hope for the
1594 geometry->search_area_stride_exponent = 2;
1598 static const char *fingerprint = "STMP";
1599 static int mx23_check_transcription_stamp(struct gpmi_nand_data *this)
1601 struct boot_rom_geometry *rom_geo = &this->rom_geometry;
1602 struct device *dev = this->dev;
1603 struct mtd_info *mtd = &this->mtd;
1604 struct nand_chip *chip = &this->nand;
1605 unsigned int search_area_size_in_strides;
1606 unsigned int stride;
1608 uint8_t *buffer = chip->buffers->databuf;
1609 int saved_chip_number;
1610 int found_an_ncb_fingerprint = false;
1612 /* Compute the number of strides in a search area. */
1613 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
1615 saved_chip_number = this->current_chip;
1616 chip->select_chip(mtd, 0);
1619 * Loop through the first search area, looking for the NCB fingerprint.
1621 dev_dbg(dev, "Scanning for an NCB fingerprint...\n");
1623 for (stride = 0; stride < search_area_size_in_strides; stride++) {
1624 /* Compute the page addresses. */
1625 page = stride * rom_geo->stride_size_in_pages;
1627 dev_dbg(dev, "Looking for a fingerprint in page 0x%x\n", page);
1630 * Read the NCB fingerprint. The fingerprint is four bytes long
1631 * and starts in the 12th byte of the page.
1633 chip->cmdfunc(mtd, NAND_CMD_READ0, 12, page);
1634 chip->read_buf(mtd, buffer, strlen(fingerprint));
1636 /* Look for the fingerprint. */
1637 if (!memcmp(buffer, fingerprint, strlen(fingerprint))) {
1638 found_an_ncb_fingerprint = true;
1644 chip->select_chip(mtd, saved_chip_number);
1646 if (found_an_ncb_fingerprint)
1647 dev_dbg(dev, "\tFound a fingerprint\n");
1649 dev_dbg(dev, "\tNo fingerprint found\n");
1650 return found_an_ncb_fingerprint;
1653 /* Writes a transcription stamp. */
1654 static int mx23_write_transcription_stamp(struct gpmi_nand_data *this)
1656 struct device *dev = this->dev;
1657 struct boot_rom_geometry *rom_geo = &this->rom_geometry;
1658 struct mtd_info *mtd = &this->mtd;
1659 struct nand_chip *chip = &this->nand;
1660 unsigned int block_size_in_pages;
1661 unsigned int search_area_size_in_strides;
1662 unsigned int search_area_size_in_pages;
1663 unsigned int search_area_size_in_blocks;
1665 unsigned int stride;
1667 uint8_t *buffer = chip->buffers->databuf;
1668 int saved_chip_number;
1671 /* Compute the search area geometry. */
1672 block_size_in_pages = mtd->erasesize / mtd->writesize;
1673 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent;
1674 search_area_size_in_pages = search_area_size_in_strides *
1675 rom_geo->stride_size_in_pages;
1676 search_area_size_in_blocks =
1677 (search_area_size_in_pages + (block_size_in_pages - 1)) /
1678 block_size_in_pages;
1680 dev_dbg(dev, "Search Area Geometry :\n");
1681 dev_dbg(dev, "\tin Blocks : %u\n", search_area_size_in_blocks);
1682 dev_dbg(dev, "\tin Strides: %u\n", search_area_size_in_strides);
1683 dev_dbg(dev, "\tin Pages : %u\n", search_area_size_in_pages);
1685 /* Select chip 0. */
1686 saved_chip_number = this->current_chip;
1687 chip->select_chip(mtd, 0);
1689 /* Loop over blocks in the first search area, erasing them. */
1690 dev_dbg(dev, "Erasing the search area...\n");
1692 for (block = 0; block < search_area_size_in_blocks; block++) {
1693 /* Compute the page address. */
1694 page = block * block_size_in_pages;
1696 /* Erase this block. */
1697 dev_dbg(dev, "\tErasing block 0x%x\n", block);
1698 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page);
1699 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1);
1701 /* Wait for the erase to finish. */
1702 status = chip->waitfunc(mtd, chip);
1703 if (status & NAND_STATUS_FAIL)
1704 dev_err(dev, "[%s] Erase failed.\n", __func__);
1707 /* Write the NCB fingerprint into the page buffer. */
1708 memset(buffer, ~0, mtd->writesize);
1709 memcpy(buffer + 12, fingerprint, strlen(fingerprint));
1711 /* Loop through the first search area, writing NCB fingerprints. */
1712 dev_dbg(dev, "Writing NCB fingerprints...\n");
1713 for (stride = 0; stride < search_area_size_in_strides; stride++) {
1714 /* Compute the page addresses. */
1715 page = stride * rom_geo->stride_size_in_pages;
1717 /* Write the first page of the current stride. */
1718 dev_dbg(dev, "Writing an NCB fingerprint in page 0x%x\n", page);
1719 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page);
1720 chip->ecc.write_page_raw(mtd, chip, buffer, 0);
1721 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1);
1723 /* Wait for the write to finish. */
1724 status = chip->waitfunc(mtd, chip);
1725 if (status & NAND_STATUS_FAIL)
1726 dev_err(dev, "[%s] Write failed.\n", __func__);
1729 /* Deselect chip 0. */
1730 chip->select_chip(mtd, saved_chip_number);
1734 static int mx23_boot_init(struct gpmi_nand_data *this)
1736 struct device *dev = this->dev;
1737 struct nand_chip *chip = &this->nand;
1738 struct mtd_info *mtd = &this->mtd;
1739 unsigned int block_count;
1748 * If control arrives here, we can't use block mark swapping, which
1749 * means we're forced to use transcription. First, scan for the
1750 * transcription stamp. If we find it, then we don't have to do
1751 * anything -- the block marks are already transcribed.
1753 if (mx23_check_transcription_stamp(this))
1757 * If control arrives here, we couldn't find a transcription stamp, so
1758 * so we presume the block marks are in the conventional location.
1760 dev_dbg(dev, "Transcribing bad block marks...\n");
1762 /* Compute the number of blocks in the entire medium. */
1763 block_count = chip->chipsize >> chip->phys_erase_shift;
1766 * Loop over all the blocks in the medium, transcribing block marks as
1769 for (block = 0; block < block_count; block++) {
1771 * Compute the chip, page and byte addresses for this block's
1772 * conventional mark.
1774 chipnr = block >> (chip->chip_shift - chip->phys_erase_shift);
1775 page = block << (chip->phys_erase_shift - chip->page_shift);
1776 byte = block << chip->phys_erase_shift;
1778 /* Send the command to read the conventional block mark. */
1779 chip->select_chip(mtd, chipnr);
1780 chip->cmdfunc(mtd, NAND_CMD_READ0, mtd->writesize, page);
1781 block_mark = chip->read_byte(mtd);
1782 chip->select_chip(mtd, -1);
1785 * Check if the block is marked bad. If so, we need to mark it
1786 * again, but this time the result will be a mark in the
1787 * location where we transcribe block marks.
1789 if (block_mark != 0xff) {
1790 dev_dbg(dev, "Transcribing mark in block %u\n", block);
1791 ret = chip->block_markbad(mtd, byte);
1794 "Failed to mark block bad with ret %d\n",
1799 /* Write the stamp that indicates we've transcribed the block marks. */
1800 mx23_write_transcription_stamp(this);
1804 static int nand_boot_init(struct gpmi_nand_data *this)
1806 nand_boot_set_geometry(this);
1808 /* This is ROM arch-specific initilization before the BBT scanning. */
1809 if (GPMI_IS_MX23(this))
1810 return mx23_boot_init(this);
1814 static int gpmi_set_geometry(struct gpmi_nand_data *this)
1818 /* Free the temporary DMA memory for reading ID. */
1819 gpmi_free_dma_buffer(this);
1821 /* Set up the NFC geometry which is used by BCH. */
1822 ret = bch_set_geometry(this);
1824 dev_err(this->dev, "Error setting BCH geometry : %d\n", ret);
1828 /* Alloc the new DMA buffers according to the pagesize and oobsize */
1829 return gpmi_alloc_dma_buffer(this);
1832 static void gpmi_nand_exit(struct gpmi_nand_data *this)
1834 nand_release(&this->mtd);
1835 gpmi_free_dma_buffer(this);
1838 static int gpmi_init_last(struct gpmi_nand_data *this)
1840 struct mtd_info *mtd = &this->mtd;
1841 struct nand_chip *chip = mtd->priv;
1842 struct nand_ecc_ctrl *ecc = &chip->ecc;
1843 struct bch_geometry *bch_geo = &this->bch_geometry;
1846 /* Set up the medium geometry */
1847 ret = gpmi_set_geometry(this);
1851 /* Init the nand_ecc_ctrl{} */
1852 ecc->read_page = gpmi_ecc_read_page;
1853 ecc->write_page = gpmi_ecc_write_page;
1854 ecc->read_oob = gpmi_ecc_read_oob;
1855 ecc->write_oob = gpmi_ecc_write_oob;
1856 ecc->read_page_raw = gpmi_ecc_read_page_raw;
1857 ecc->write_page_raw = gpmi_ecc_write_page_raw;
1858 ecc->read_oob_raw = gpmi_ecc_read_oob_raw;
1859 ecc->write_oob_raw = gpmi_ecc_write_oob_raw;
1860 ecc->mode = NAND_ECC_HW;
1861 ecc->size = bch_geo->ecc_chunk_size;
1862 ecc->strength = bch_geo->ecc_strength;
1863 ecc->layout = &gpmi_hw_ecclayout;
1866 * We only enable the subpage read when:
1867 * (1) the chip is imx6, and
1868 * (2) the size of the ECC parity is byte aligned.
1870 if (GPMI_IS_MX6(this) &&
1871 ((bch_geo->gf_len * bch_geo->ecc_strength) % 8) == 0) {
1872 ecc->read_subpage = gpmi_ecc_read_subpage;
1873 chip->options |= NAND_SUBPAGE_READ;
1877 * Can we enable the extra features? such as EDO or Sync mode.
1879 * We do not check the return value now. That's means if we fail in
1880 * enable the extra features, we still can run in the normal way.
1882 gpmi_extra_init(this);
1887 static int gpmi_nand_init(struct gpmi_nand_data *this)
1889 struct mtd_info *mtd = &this->mtd;
1890 struct nand_chip *chip = &this->nand;
1891 struct mtd_part_parser_data ppdata = {};
1894 /* init current chip */
1895 this->current_chip = -1;
1897 /* init the MTD data structures */
1899 mtd->name = "gpmi-nand";
1900 mtd->owner = THIS_MODULE;
1902 /* init the nand_chip{}, we don't support a 16-bit NAND Flash bus. */
1904 chip->select_chip = gpmi_select_chip;
1905 chip->cmd_ctrl = gpmi_cmd_ctrl;
1906 chip->dev_ready = gpmi_dev_ready;
1907 chip->read_byte = gpmi_read_byte;
1908 chip->read_buf = gpmi_read_buf;
1909 chip->write_buf = gpmi_write_buf;
1910 chip->badblock_pattern = &gpmi_bbt_descr;
1911 chip->block_markbad = gpmi_block_markbad;
1912 chip->options |= NAND_NO_SUBPAGE_WRITE;
1914 /* Set up swap_block_mark, must be set before the gpmi_set_geometry() */
1915 this->swap_block_mark = !GPMI_IS_MX23(this);
1917 if (of_get_nand_on_flash_bbt(this->dev->of_node)) {
1918 chip->bbt_options |= NAND_BBT_USE_FLASH | NAND_BBT_NO_OOB;
1920 if (of_property_read_bool(this->dev->of_node,
1921 "fsl,no-blockmark-swap"))
1922 this->swap_block_mark = false;
1924 dev_dbg(this->dev, "Blockmark swapping %sabled\n",
1925 this->swap_block_mark ? "en" : "dis");
1928 * Allocate a temporary DMA buffer for reading ID in the
1929 * nand_scan_ident().
1931 this->bch_geometry.payload_size = 1024;
1932 this->bch_geometry.auxiliary_size = 128;
1933 ret = gpmi_alloc_dma_buffer(this);
1937 ret = nand_scan_ident(mtd, GPMI_IS_MX6(this) ? 2 : 1, NULL);
1941 ret = gpmi_init_last(this);
1945 chip->options |= NAND_SKIP_BBTSCAN;
1946 ret = nand_scan_tail(mtd);
1950 ret = nand_boot_init(this);
1953 chip->scan_bbt(mtd);
1955 ppdata.of_node = this->pdev->dev.of_node;
1956 ret = mtd_device_parse_register(mtd, NULL, &ppdata, NULL, 0);
1962 gpmi_nand_exit(this);
1966 static const struct of_device_id gpmi_nand_id_table[] = {
1968 .compatible = "fsl,imx23-gpmi-nand",
1969 .data = &gpmi_devdata_imx23,
1971 .compatible = "fsl,imx28-gpmi-nand",
1972 .data = &gpmi_devdata_imx28,
1974 .compatible = "fsl,imx6q-gpmi-nand",
1975 .data = &gpmi_devdata_imx6q,
1977 .compatible = "fsl,imx6sx-gpmi-nand",
1978 .data = &gpmi_devdata_imx6sx,
1981 MODULE_DEVICE_TABLE(of, gpmi_nand_id_table);
1983 static int gpmi_nand_probe(struct platform_device *pdev)
1985 struct gpmi_nand_data *this;
1986 const struct of_device_id *of_id;
1989 this = devm_kzalloc(&pdev->dev, sizeof(*this), GFP_KERNEL);
1993 of_id = of_match_device(gpmi_nand_id_table, &pdev->dev);
1995 this->devdata = of_id->data;
1997 dev_err(&pdev->dev, "Failed to find the right device id.\n");
2001 platform_set_drvdata(pdev, this);
2003 this->dev = &pdev->dev;
2005 ret = acquire_resources(this);
2007 goto exit_acquire_resources;
2009 ret = init_hardware(this);
2013 ret = gpmi_nand_init(this);
2017 dev_info(this->dev, "driver registered.\n");
2022 release_resources(this);
2023 exit_acquire_resources:
2028 static int gpmi_nand_remove(struct platform_device *pdev)
2030 struct gpmi_nand_data *this = platform_get_drvdata(pdev);
2032 gpmi_nand_exit(this);
2033 release_resources(this);
2037 static struct platform_driver gpmi_nand_driver = {
2039 .name = "gpmi-nand",
2040 .of_match_table = gpmi_nand_id_table,
2042 .probe = gpmi_nand_probe,
2043 .remove = gpmi_nand_remove,
2045 module_platform_driver(gpmi_nand_driver);
2047 MODULE_AUTHOR("Freescale Semiconductor, Inc.");
2048 MODULE_DESCRIPTION("i.MX GPMI NAND Flash Controller Driver");
2049 MODULE_LICENSE("GPL");