drivers/mtd/nand/orion_nand.c

   1 /*
   2  * drivers/mtd/nand/orion_nand.c
   3  *
   4  * NAND support for Marvell Orion SoC platforms
   5  *
   6  * Tzachi Perelstein <tzachi@marvell.com>
   7  *
   8  * This file is licensed under  the terms of the GNU General Public
   9  * License version 2. This program is licensed "as is" without any
  10  * warranty of any kind, whether express or implied.
  11  */
  12
  13 #include <linux/slab.h>
  14 #include <linux/module.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/of.h>
  17 #include <linux/mtd/mtd.h>
  18 #include <linux/mtd/nand.h>
  19 #include <linux/mtd/partitions.h>
  20 #include <asm/io.h>
  21 #include <asm/sizes.h>
  22 #include <mach/hardware.h>
  23 #include <plat/orion_nand.h>
  24
  25 static void orion_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
  26 {
  27         struct nand_chip *nc = mtd->priv;
  28         struct orion_nand_data *board = nc->priv;
  29         u32 offs;
  30
  31         if (cmd == NAND_CMD_NONE)
  32                 return;
  33
  34         if (ctrl & NAND_CLE)
  35                 offs = (1 << board->cle);
  36         else if (ctrl & NAND_ALE)
  37                 offs = (1 << board->ale);
  38         else
  39                 return;
  40
  41         if (nc->options & NAND_BUSWIDTH_16)
  42                 offs <<= 1;
  43
  44         writeb(cmd, nc->IO_ADDR_W + offs);
  45 }
  46
  47 static void orion_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
  48 {
  49         struct nand_chip *chip = mtd->priv;
  50         void __iomem *io_base = chip->IO_ADDR_R;
  51         uint64_t *buf64;
  52         int i = 0;
  53
  54         while (len && (unsigned long)buf & 7) {
  55                 *buf++ = readb(io_base);
  56                 len--;
  57         }
  58         buf64 = (uint64_t *)buf;
  59         while (i < len/8) {
  60                 /*
  61                  * Since GCC has no proper constraint (PR 43518)
  62                  * force x variable to r2/r3 registers as ldrd instruction
  63                  * requires first register to be even.
  64                  */
  65                 register uint64_t x asm ("r2");
  66
  67                 asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base));
  68                 buf64[i++] = x;
  69         }
  70         i *= 8;
  71         while (i < len)
  72                 buf[i++] = readb(io_base);
  73 }
  74
  75 static int __init orion_nand_probe(struct platform_device *pdev)
  76 {
  77         struct mtd_info *mtd;
  78         struct mtd_part_parser_data ppdata = {};
  79         struct nand_chip *nc;
  80         struct orion_nand_data *board;
  81         struct resource *res;
  82         void __iomem *io_base;
  83         int ret = 0;
  84         u32 val = 0;
  85
  86         nc = kzalloc(sizeof(struct nand_chip) + sizeof(struct mtd_info), GFP_KERNEL);
  87         if (!nc) {
  88                 printk(KERN_ERR "orion_nand: failed to allocate device structure.\n");
  89                 ret = -ENOMEM;
  90                 goto no_res;
  91         }
  92         mtd = (struct mtd_info *)(nc + 1);
  93
  94         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  95         if (!res) {
  96                 ret = -ENODEV;
  97                 goto no_res;
  98         }
  99
 100         io_base = ioremap(res->start, resource_size(res));
 101         if (!io_base) {
 102                 printk(KERN_ERR "orion_nand: ioremap failed\n");
 103                 ret = -EIO;
 104                 goto no_res;
 105         }
 106
 107         if (pdev->dev.of_node) {
 108                 board = devm_kzalloc(&pdev->dev, sizeof(struct orion_nand_data),
 109                                         GFP_KERNEL);
 110                 if (!board) {
 111                         printk(KERN_ERR "orion_nand: failed to allocate board structure.\n");
 112                         ret = -ENOMEM;
 113                         goto no_res;
 114                 }
 115                 if (!of_property_read_u32(pdev->dev.of_node, "cle", &val))
 116                         board->cle = (u8)val;
 117                 else
 118                         board->cle = 0;
 119                 if (!of_property_read_u32(pdev->dev.of_node, "ale", &val))
 120                         board->ale = (u8)val;
 121                 else
 122                         board->ale = 1;
 123                 if (!of_property_read_u32(pdev->dev.of_node,
 124                                                 "bank-width", &val))
 125                         board->width = (u8)val * 8;
 126                 else
 127                         board->width = 8;
 128                 if (!of_property_read_u32(pdev->dev.of_node,
 129                                                 "chip-delay", &val))
 130                         board->chip_delay = (u8)val;
 131         } else
 132                 board = pdev->dev.platform_data;
 133
 134         mtd->priv = nc;
 135         mtd->owner = THIS_MODULE;
 136
 137         nc->priv = board;
 138         nc->IO_ADDR_R = nc->IO_ADDR_W = io_base;
 139         nc->cmd_ctrl = orion_nand_cmd_ctrl;
 140         nc->read_buf = orion_nand_read_buf;
 141         nc->ecc.mode = NAND_ECC_SOFT;
 142
 143         if (board->chip_delay)
 144                 nc->chip_delay = board->chip_delay;
 145
 146         WARN(board->width > 16,
 147                 "%d bit bus width out of range",
 148                 board->width);
 149
 150         if (board->width == 16)
 151                 nc->options |= NAND_BUSWIDTH_16;
 152
 153         if (board->dev_ready)
 154                 nc->dev_ready = board->dev_ready;
 155
 156         platform_set_drvdata(pdev, mtd);
 157
 158         if (nand_scan(mtd, 1)) {
 159                 ret = -ENXIO;
 160                 goto no_dev;
 161         }
 162
 163         mtd->name = "orion_nand";
 164         ppdata.of_node = pdev->dev.of_node;
 165         ret = mtd_device_parse_register(mtd, NULL, &ppdata,
 166                         board->parts, board->nr_parts);
 167         if (ret) {
 168                 nand_release(mtd);
 169                 goto no_dev;
 170         }
 171
 172         return 0;
 173
 174 no_dev:
 175         platform_set_drvdata(pdev, NULL);
 176         iounmap(io_base);
 177 no_res:
 178         kfree(nc);
 179
 180         return ret;
 181 }
 182
 183 static int __devexit orion_nand_remove(struct platform_device *pdev)
 184 {
 185         struct mtd_info *mtd = platform_get_drvdata(pdev);
 186         struct nand_chip *nc = mtd->priv;
 187
 188         nand_release(mtd);
 189
 190         iounmap(nc->IO_ADDR_W);
 191
 192         kfree(nc);
 193
 194         return 0;
 195 }
 196
 197 #ifdef CONFIG_OF
 198 static struct of_device_id orion_nand_of_match_table[] = {
 199         { .compatible = "mrvl,orion-nand", },
 200         {},
 201 };
 202 #endif
 203
 204 static struct platform_driver orion_nand_driver = {
 205         .remove         = __devexit_p(orion_nand_remove),
 206         .driver         = {
 207                 .name   = "orion_nand",
 208                 .owner  = THIS_MODULE,
 209                 .of_match_table = of_match_ptr(orion_nand_of_match_table),
 210         },
 211 };
 212
 213 static int __init orion_nand_init(void)
 214 {
 215         return platform_driver_probe(&orion_nand_driver, orion_nand_probe);
 216 }
 217
 218 static void __exit orion_nand_exit(void)
 219 {
 220         platform_driver_unregister(&orion_nand_driver);
 221 }
 222
 223 module_init(orion_nand_init);
 224 module_exit(orion_nand_exit);
 225
 226 MODULE_LICENSE("GPL");
 227 MODULE_AUTHOR("Tzachi Perelstein");
 228 MODULE_DESCRIPTION("NAND glue for Orion platforms");
 229 MODULE_ALIAS("platform:orion_nand");