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[karo-tx-linux.git] / drivers / mtd / nand / orion_nand.c
1 /*
2  * drivers/mtd/nand/orion_nand.c
3  *
4  * NAND support for Marvell Orion SoC platforms
5  *
6  * Tzachi Perelstein <tzachi@marvell.com>
7  *
8  * This file is licensed under  the terms of the GNU General Public
9  * License version 2. This program is licensed "as is" without any
10  * warranty of any kind, whether express or implied.
11  */
12
13 #include <linux/slab.h>
14 #include <linux/module.h>
15 #include <linux/platform_device.h>
16 #include <linux/of.h>
17 #include <linux/mtd/mtd.h>
18 #include <linux/mtd/nand.h>
19 #include <linux/mtd/partitions.h>
20 #include <linux/clk.h>
21 #include <linux/err.h>
22 #include <asm/io.h>
23 #include <asm/sizes.h>
24 #include <linux/platform_data/mtd-orion_nand.h>
25
26 static void orion_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
27 {
28         struct nand_chip *nc = mtd->priv;
29         struct orion_nand_data *board = nc->priv;
30         u32 offs;
31
32         if (cmd == NAND_CMD_NONE)
33                 return;
34
35         if (ctrl & NAND_CLE)
36                 offs = (1 << board->cle);
37         else if (ctrl & NAND_ALE)
38                 offs = (1 << board->ale);
39         else
40                 return;
41
42         if (nc->options & NAND_BUSWIDTH_16)
43                 offs <<= 1;
44
45         writeb(cmd, nc->IO_ADDR_W + offs);
46 }
47
48 static void orion_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
49 {
50         struct nand_chip *chip = mtd->priv;
51         void __iomem *io_base = chip->IO_ADDR_R;
52         uint64_t *buf64;
53         int i = 0;
54
55         while (len && (unsigned long)buf & 7) {
56                 *buf++ = readb(io_base);
57                 len--;
58         }
59         buf64 = (uint64_t *)buf;
60         while (i < len/8) {
61                 /*
62                  * Since GCC has no proper constraint (PR 43518)
63                  * force x variable to r2/r3 registers as ldrd instruction
64                  * requires first register to be even.
65                  */
66                 register uint64_t x asm ("r2");
67
68                 asm volatile ("ldrd\t%0, [%1]" : "=&r" (x) : "r" (io_base));
69                 buf64[i++] = x;
70         }
71         i *= 8;
72         while (i < len)
73                 buf[i++] = readb(io_base);
74 }
75
76 static int __init orion_nand_probe(struct platform_device *pdev)
77 {
78         struct mtd_info *mtd;
79         struct mtd_part_parser_data ppdata = {};
80         struct nand_chip *nc;
81         struct orion_nand_data *board;
82         struct resource *res;
83         struct clk *clk;
84         void __iomem *io_base;
85         int ret = 0;
86         u32 val = 0;
87
88         nc = kzalloc(sizeof(struct nand_chip) + sizeof(struct mtd_info), GFP_KERNEL);
89         if (!nc) {
90                 printk(KERN_ERR "orion_nand: failed to allocate device structure.\n");
91                 ret = -ENOMEM;
92                 goto no_res;
93         }
94         mtd = (struct mtd_info *)(nc + 1);
95
96         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
97         if (!res) {
98                 ret = -ENODEV;
99                 goto no_res;
100         }
101
102         io_base = ioremap(res->start, resource_size(res));
103         if (!io_base) {
104                 printk(KERN_ERR "orion_nand: ioremap failed\n");
105                 ret = -EIO;
106                 goto no_res;
107         }
108
109         if (pdev->dev.of_node) {
110                 board = devm_kzalloc(&pdev->dev, sizeof(struct orion_nand_data),
111                                         GFP_KERNEL);
112                 if (!board) {
113                         printk(KERN_ERR "orion_nand: failed to allocate board structure.\n");
114                         ret = -ENOMEM;
115                         goto no_res;
116                 }
117                 if (!of_property_read_u32(pdev->dev.of_node, "cle", &val))
118                         board->cle = (u8)val;
119                 else
120                         board->cle = 0;
121                 if (!of_property_read_u32(pdev->dev.of_node, "ale", &val))
122                         board->ale = (u8)val;
123                 else
124                         board->ale = 1;
125                 if (!of_property_read_u32(pdev->dev.of_node,
126                                                 "bank-width", &val))
127                         board->width = (u8)val * 8;
128                 else
129                         board->width = 8;
130                 if (!of_property_read_u32(pdev->dev.of_node,
131                                                 "chip-delay", &val))
132                         board->chip_delay = (u8)val;
133         } else
134                 board = pdev->dev.platform_data;
135
136         mtd->priv = nc;
137         mtd->owner = THIS_MODULE;
138
139         nc->priv = board;
140         nc->IO_ADDR_R = nc->IO_ADDR_W = io_base;
141         nc->cmd_ctrl = orion_nand_cmd_ctrl;
142         nc->read_buf = orion_nand_read_buf;
143         nc->ecc.mode = NAND_ECC_SOFT;
144
145         if (board->chip_delay)
146                 nc->chip_delay = board->chip_delay;
147
148         WARN(board->width > 16,
149                 "%d bit bus width out of range",
150                 board->width);
151
152         if (board->width == 16)
153                 nc->options |= NAND_BUSWIDTH_16;
154
155         if (board->dev_ready)
156                 nc->dev_ready = board->dev_ready;
157
158         platform_set_drvdata(pdev, mtd);
159
160         /* Not all platforms can gate the clock, so it is not
161            an error if the clock does not exists. */
162         clk = clk_get(&pdev->dev, NULL);
163         if (!IS_ERR(clk)) {
164                 clk_prepare_enable(clk);
165                 clk_put(clk);
166         }
167
168         if (nand_scan(mtd, 1)) {
169                 ret = -ENXIO;
170                 goto no_dev;
171         }
172
173         mtd->name = "orion_nand";
174         ppdata.of_node = pdev->dev.of_node;
175         ret = mtd_device_parse_register(mtd, NULL, &ppdata,
176                         board->parts, board->nr_parts);
177         if (ret) {
178                 nand_release(mtd);
179                 goto no_dev;
180         }
181
182         return 0;
183
184 no_dev:
185         if (!IS_ERR(clk)) {
186                 clk_disable_unprepare(clk);
187                 clk_put(clk);
188         }
189         platform_set_drvdata(pdev, NULL);
190         iounmap(io_base);
191 no_res:
192         kfree(nc);
193
194         return ret;
195 }
196
197 static int orion_nand_remove(struct platform_device *pdev)
198 {
199         struct mtd_info *mtd = platform_get_drvdata(pdev);
200         struct nand_chip *nc = mtd->priv;
201         struct clk *clk;
202
203         nand_release(mtd);
204
205         iounmap(nc->IO_ADDR_W);
206
207         kfree(nc);
208
209         clk = clk_get(&pdev->dev, NULL);
210         if (!IS_ERR(clk)) {
211                 clk_disable_unprepare(clk);
212                 clk_put(clk);
213         }
214
215         return 0;
216 }
217
218 #ifdef CONFIG_OF
219 static struct of_device_id orion_nand_of_match_table[] = {
220         { .compatible = "marvell,orion-nand", },
221         {},
222 };
223 #endif
224
225 static struct platform_driver orion_nand_driver = {
226         .remove         = orion_nand_remove,
227         .driver         = {
228                 .name   = "orion_nand",
229                 .owner  = THIS_MODULE,
230                 .of_match_table = of_match_ptr(orion_nand_of_match_table),
231         },
232 };
233
234 static int __init orion_nand_init(void)
235 {
236         return platform_driver_probe(&orion_nand_driver, orion_nand_probe);
237 }
238
239 static void __exit orion_nand_exit(void)
240 {
241         platform_driver_unregister(&orion_nand_driver);
242 }
243
244 module_init(orion_nand_init);
245 module_exit(orion_nand_exit);
246
247 MODULE_LICENSE("GPL");
248 MODULE_AUTHOR("Tzachi Perelstein");
249 MODULE_DESCRIPTION("NAND glue for Orion platforms");
250 MODULE_ALIAS("platform:orion_nand");