drivers/mtd/onenand/onenand_base.c

   1 /*
   2  *  linux/drivers/mtd/onenand/onenand_base.c
   3  *
   4  *  Copyright (C) 2005-2006 Samsung Electronics
   5  *  Kyungmin Park <kyungmin.park@samsung.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/module.h>
  14 #include <linux/init.h>
  15 #include <linux/sched.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/jiffies.h>
  18 #include <linux/mtd/mtd.h>
  19 #include <linux/mtd/onenand.h>
  20 #include <linux/mtd/partitions.h>
  21
  22 #include <asm/io.h>
  23
  24 /**
  25  * onenand_oob_64 - oob info for large (2KB) page
  26  */
  27 static struct nand_ecclayout onenand_oob_64 = {
  28         .eccbytes       = 20,
  29         .eccpos         = {
  30                 8, 9, 10, 11, 12,
  31                 24, 25, 26, 27, 28,
  32                 40, 41, 42, 43, 44,
  33                 56, 57, 58, 59, 60,
  34                 },
  35         .oobfree        = {
  36                 {2, 3}, {14, 2}, {18, 3}, {30, 2},
  37                 {34, 3}, {46, 2}, {50, 3}, {62, 2}
  38         }
  39 };
  40
  41 /**
  42  * onenand_oob_32 - oob info for middle (1KB) page
  43  */
  44 static struct nand_ecclayout onenand_oob_32 = {
  45         .eccbytes       = 10,
  46         .eccpos         = {
  47                 8, 9, 10, 11, 12,
  48                 24, 25, 26, 27, 28,
  49                 },
  50         .oobfree        = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
  51 };
  52
  53 static const unsigned char ffchars[] = {
  54         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  55         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
  56         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  57         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
  58         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  59         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
  60         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
  61         0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
  62 };
  63
  64 /**
  65  * onenand_readw - [OneNAND Interface] Read OneNAND register
  66  * @param addr          address to read
  67  *
  68  * Read OneNAND register
  69  */
  70 static unsigned short onenand_readw(void __iomem *addr)
  71 {
  72         return readw(addr);
  73 }
  74
  75 /**
  76  * onenand_writew - [OneNAND Interface] Write OneNAND register with value
  77  * @param value         value to write
  78  * @param addr          address to write
  79  *
  80  * Write OneNAND register with value
  81  */
  82 static void onenand_writew(unsigned short value, void __iomem *addr)
  83 {
  84         writew(value, addr);
  85 }
  86
  87 /**
  88  * onenand_block_address - [DEFAULT] Get block address
  89  * @param this          onenand chip data structure
  90  * @param block         the block
  91  * @return              translated block address if DDP, otherwise same
  92  *
  93  * Setup Start Address 1 Register (F100h)
  94  */
  95 static int onenand_block_address(struct onenand_chip *this, int block)
  96 {
  97         if (this->device_id & ONENAND_DEVICE_IS_DDP) {
  98                 /* Device Flash Core select, NAND Flash Block Address */
  99                 int dfs = 0;
 100
 101                 if (block & this->density_mask)
 102                         dfs = 1;
 103
 104                 return (dfs << ONENAND_DDP_SHIFT) |
 105                         (block & (this->density_mask - 1));
 106         }
 107
 108         return block;
 109 }
 110
 111 /**
 112  * onenand_bufferram_address - [DEFAULT] Get bufferram address
 113  * @param this          onenand chip data structure
 114  * @param block         the block
 115  * @return              set DBS value if DDP, otherwise 0
 116  *
 117  * Setup Start Address 2 Register (F101h) for DDP
 118  */
 119 static int onenand_bufferram_address(struct onenand_chip *this, int block)
 120 {
 121         if (this->device_id & ONENAND_DEVICE_IS_DDP) {
 122                 /* Device BufferRAM Select */
 123                 int dbs = 0;
 124
 125                 if (block & this->density_mask)
 126                         dbs = 1;
 127
 128                 return (dbs << ONENAND_DDP_SHIFT);
 129         }
 130
 131         return 0;
 132 }
 133
 134 /**
 135  * onenand_page_address - [DEFAULT] Get page address
 136  * @param page          the page address
 137  * @param sector        the sector address
 138  * @return              combined page and sector address
 139  *
 140  * Setup Start Address 8 Register (F107h)
 141  */
 142 static int onenand_page_address(int page, int sector)
 143 {
 144         /* Flash Page Address, Flash Sector Address */
 145         int fpa, fsa;
 146
 147         fpa = page & ONENAND_FPA_MASK;
 148         fsa = sector & ONENAND_FSA_MASK;
 149
 150         return ((fpa << ONENAND_FPA_SHIFT) | fsa);
 151 }
 152
 153 /**
 154  * onenand_buffer_address - [DEFAULT] Get buffer address
 155  * @param dataram1      DataRAM index
 156  * @param sectors       the sector address
 157  * @param count         the number of sectors
 158  * @return              the start buffer value
 159  *
 160  * Setup Start Buffer Register (F200h)
 161  */
 162 static int onenand_buffer_address(int dataram1, int sectors, int count)
 163 {
 164         int bsa, bsc;
 165
 166         /* BufferRAM Sector Address */
 167         bsa = sectors & ONENAND_BSA_MASK;
 168
 169         if (dataram1)
 170                 bsa |= ONENAND_BSA_DATARAM1;    /* DataRAM1 */
 171         else
 172                 bsa |= ONENAND_BSA_DATARAM0;    /* DataRAM0 */
 173
 174         /* BufferRAM Sector Count */
 175         bsc = count & ONENAND_BSC_MASK;
 176
 177         return ((bsa << ONENAND_BSA_SHIFT) | bsc);
 178 }
 179
 180 /**
 181  * onenand_command - [DEFAULT] Send command to OneNAND device
 182  * @param mtd           MTD device structure
 183  * @param cmd           the command to be sent
 184  * @param addr          offset to read from or write to
 185  * @param len           number of bytes to read or write
 186  *
 187  * Send command to OneNAND device. This function is used for middle/large page
 188  * devices (1KB/2KB Bytes per page)
 189  */
 190 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
 191 {
 192         struct onenand_chip *this = mtd->priv;
 193         int value, readcmd = 0, block_cmd = 0;
 194         int block, page;
 195
 196         /* Address translation */
 197         switch (cmd) {
 198         case ONENAND_CMD_UNLOCK:
 199         case ONENAND_CMD_LOCK:
 200         case ONENAND_CMD_LOCK_TIGHT:
 201         case ONENAND_CMD_UNLOCK_ALL:
 202                 block = -1;
 203                 page = -1;
 204                 break;
 205
 206         case ONENAND_CMD_ERASE:
 207         case ONENAND_CMD_BUFFERRAM:
 208         case ONENAND_CMD_OTP_ACCESS:
 209                 block_cmd = 1;
 210                 block = (int) (addr >> this->erase_shift);
 211                 page = -1;
 212                 break;
 213
 214         default:
 215                 block = (int) (addr >> this->erase_shift);
 216                 page = (int) (addr >> this->page_shift);
 217                 page &= this->page_mask;
 218                 break;
 219         }
 220
 221         /* NOTE: The setting order of the registers is very important! */
 222         if (cmd == ONENAND_CMD_BUFFERRAM) {
 223                 /* Select DataRAM for DDP */
 224                 value = onenand_bufferram_address(this, block);
 225                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 226
 227                 /* Switch to the next data buffer */
 228                 ONENAND_SET_NEXT_BUFFERRAM(this);
 229
 230                 return 0;
 231         }
 232
 233         if (block != -1) {
 234                 /* Write 'DFS, FBA' of Flash */
 235                 value = onenand_block_address(this, block);
 236                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
 237
 238                 if (block_cmd) {
 239                         /* Select DataRAM for DDP */
 240                         value = onenand_bufferram_address(this, block);
 241                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 242                 }
 243         }
 244
 245         if (page != -1) {
 246                 /* Now we use page size operation */
 247                 int sectors = 4, count = 4;
 248                 int dataram;
 249
 250                 switch (cmd) {
 251                 case ONENAND_CMD_READ:
 252                 case ONENAND_CMD_READOOB:
 253                         dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
 254                         readcmd = 1;
 255                         break;
 256
 257                 default:
 258                         dataram = ONENAND_CURRENT_BUFFERRAM(this);
 259                         break;
 260                 }
 261
 262                 /* Write 'FPA, FSA' of Flash */
 263                 value = onenand_page_address(page, sectors);
 264                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
 265
 266                 /* Write 'BSA, BSC' of DataRAM */
 267                 value = onenand_buffer_address(dataram, sectors, count);
 268                 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
 269
 270                 if (readcmd) {
 271                         /* Select DataRAM for DDP */
 272                         value = onenand_bufferram_address(this, block);
 273                         this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
 274                 }
 275         }
 276
 277         /* Interrupt clear */
 278         this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
 279
 280         /* Write command */
 281         this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
 282
 283         return 0;
 284 }
 285
 286 /**
 287  * onenand_wait - [DEFAULT] wait until the command is done
 288  * @param mtd           MTD device structure
 289  * @param state         state to select the max. timeout value
 290  *
 291  * Wait for command done. This applies to all OneNAND command
 292  * Read can take up to 30us, erase up to 2ms and program up to 350us
 293  * according to general OneNAND specs
 294  */
 295 static int onenand_wait(struct mtd_info *mtd, int state)
 296 {
 297         struct onenand_chip * this = mtd->priv;
 298         unsigned long timeout;
 299         unsigned int flags = ONENAND_INT_MASTER;
 300         unsigned int interrupt = 0;
 301         unsigned int ctrl, ecc;
 302
 303         /* The 20 msec is enough */
 304         timeout = jiffies + msecs_to_jiffies(20);
 305         while (time_before(jiffies, timeout)) {
 306                 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 307
 308                 if (interrupt & flags)
 309                         break;
 310
 311                 if (state != FL_READING)
 312                         cond_resched();
 313                 touch_softlockup_watchdog();
 314         }
 315         /* To get correct interrupt status in timeout case */
 316         interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
 317
 318         ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
 319
 320         if (ctrl & ONENAND_CTRL_ERROR) {
 321                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
 322                 if (ctrl & ONENAND_CTRL_LOCK)
 323                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error.\n");
 324                 return ctrl;
 325         }
 326
 327         if (interrupt & ONENAND_INT_READ) {
 328                 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
 329                 if (ecc) {
 330                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
 331                         if (ecc & ONENAND_ECC_2BIT_ALL)
 332                                 mtd->ecc_stats.failed++;
 333                         else if (ecc & ONENAND_ECC_1BIT_ALL)
 334                                 mtd->ecc_stats.corrected++;
 335                 }
 336         }
 337
 338         return 0;
 339 }
 340
 341 /*
 342  * onenand_interrupt - [DEFAULT] onenand interrupt handler
 343  * @param irq           onenand interrupt number
 344  * @param dev_id        interrupt data
 345  *
 346  * complete the work
 347  */
 348 static irqreturn_t onenand_interrupt(int irq, void *data)
 349 {
 350         struct onenand_chip *this = (struct onenand_chip *) data;
 351
 352         /* To handle shared interrupt */
 353         if (!this->complete.done)
 354                 complete(&this->complete);
 355
 356         return IRQ_HANDLED;
 357 }
 358
 359 /*
 360  * onenand_interrupt_wait - [DEFAULT] wait until the command is done
 361  * @param mtd           MTD device structure
 362  * @param state         state to select the max. timeout value
 363  *
 364  * Wait for command done.
 365  */
 366 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
 367 {
 368         struct onenand_chip *this = mtd->priv;
 369
 370         /* To prevent soft lockup */
 371         touch_softlockup_watchdog();
 372
 373         wait_for_completion(&this->complete);
 374
 375         return onenand_wait(mtd, state);
 376 }
 377
 378 /*
 379  * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
 380  * @param mtd           MTD device structure
 381  * @param state         state to select the max. timeout value
 382  *
 383  * Try interrupt based wait (It is used one-time)
 384  */
 385 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
 386 {
 387         struct onenand_chip *this = mtd->priv;
 388         unsigned long remain, timeout;
 389
 390         /* We use interrupt wait first */
 391         this->wait = onenand_interrupt_wait;
 392
 393         /* To prevent soft lockup */
 394         touch_softlockup_watchdog();
 395
 396         timeout = msecs_to_jiffies(100);
 397         remain = wait_for_completion_timeout(&this->complete, timeout);
 398         if (!remain) {
 399                 printk(KERN_INFO "OneNAND: There's no interrupt. "
 400                                 "We use the normal wait\n");
 401
 402                 /* Release the irq */
 403                 free_irq(this->irq, this);
 404
 405                 this->wait = onenand_wait;
 406         }
 407
 408         return onenand_wait(mtd, state);
 409 }
 410
 411 /*
 412  * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
 413  * @param mtd           MTD device structure
 414  *
 415  * There's two method to wait onenand work
 416  * 1. polling - read interrupt status register
 417  * 2. interrupt - use the kernel interrupt method
 418  */
 419 static void onenand_setup_wait(struct mtd_info *mtd)
 420 {
 421         struct onenand_chip *this = mtd->priv;
 422         int syscfg;
 423
 424         init_completion(&this->complete);
 425
 426         if (this->irq <= 0) {
 427                 this->wait = onenand_wait;
 428                 return;
 429         }
 430
 431         if (request_irq(this->irq, &onenand_interrupt,
 432                                 IRQF_SHARED, "onenand", this)) {
 433                 /* If we can't get irq, use the normal wait */
 434                 this->wait = onenand_wait;
 435                 return;
 436         }
 437
 438         /* Enable interrupt */
 439         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
 440         syscfg |= ONENAND_SYS_CFG1_IOBE;
 441         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
 442
 443         this->wait = onenand_try_interrupt_wait;
 444 }
 445
 446 /**
 447  * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
 448  * @param mtd           MTD data structure
 449  * @param area          BufferRAM area
 450  * @return              offset given area
 451  *
 452  * Return BufferRAM offset given area
 453  */
 454 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
 455 {
 456         struct onenand_chip *this = mtd->priv;
 457
 458         if (ONENAND_CURRENT_BUFFERRAM(this)) {
 459                 if (area == ONENAND_DATARAM)
 460                         return mtd->writesize;
 461                 if (area == ONENAND_SPARERAM)
 462                         return mtd->oobsize;
 463         }
 464
 465         return 0;
 466 }
 467
 468 /**
 469  * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
 470  * @param mtd           MTD data structure
 471  * @param area          BufferRAM area
 472  * @param buffer        the databuffer to put/get data
 473  * @param offset        offset to read from or write to
 474  * @param count         number of bytes to read/write
 475  *
 476  * Read the BufferRAM area
 477  */
 478 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
 479                 unsigned char *buffer, int offset, size_t count)
 480 {
 481         struct onenand_chip *this = mtd->priv;
 482         void __iomem *bufferram;
 483
 484         bufferram = this->base + area;
 485
 486         bufferram += onenand_bufferram_offset(mtd, area);
 487
 488         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 489                 unsigned short word;
 490
 491                 /* Align with word(16-bit) size */
 492                 count--;
 493
 494                 /* Read word and save byte */
 495                 word = this->read_word(bufferram + offset + count);
 496                 buffer[count] = (word & 0xff);
 497         }
 498
 499         memcpy(buffer, bufferram + offset, count);
 500
 501         return 0;
 502 }
 503
 504 /**
 505  * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
 506  * @param mtd           MTD data structure
 507  * @param area          BufferRAM area
 508  * @param buffer        the databuffer to put/get data
 509  * @param offset        offset to read from or write to
 510  * @param count         number of bytes to read/write
 511  *
 512  * Read the BufferRAM area with Sync. Burst Mode
 513  */
 514 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
 515                 unsigned char *buffer, int offset, size_t count)
 516 {
 517         struct onenand_chip *this = mtd->priv;
 518         void __iomem *bufferram;
 519
 520         bufferram = this->base + area;
 521
 522         bufferram += onenand_bufferram_offset(mtd, area);
 523
 524         this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
 525
 526         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 527                 unsigned short word;
 528
 529                 /* Align with word(16-bit) size */
 530                 count--;
 531
 532                 /* Read word and save byte */
 533                 word = this->read_word(bufferram + offset + count);
 534                 buffer[count] = (word & 0xff);
 535         }
 536
 537         memcpy(buffer, bufferram + offset, count);
 538
 539         this->mmcontrol(mtd, 0);
 540
 541         return 0;
 542 }
 543
 544 /**
 545  * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
 546  * @param mtd           MTD data structure
 547  * @param area          BufferRAM area
 548  * @param buffer        the databuffer to put/get data
 549  * @param offset        offset to read from or write to
 550  * @param count         number of bytes to read/write
 551  *
 552  * Write the BufferRAM area
 553  */
 554 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
 555                 const unsigned char *buffer, int offset, size_t count)
 556 {
 557         struct onenand_chip *this = mtd->priv;
 558         void __iomem *bufferram;
 559
 560         bufferram = this->base + area;
 561
 562         bufferram += onenand_bufferram_offset(mtd, area);
 563
 564         if (ONENAND_CHECK_BYTE_ACCESS(count)) {
 565                 unsigned short word;
 566                 int byte_offset;
 567
 568                 /* Align with word(16-bit) size */
 569                 count--;
 570
 571                 /* Calculate byte access offset */
 572                 byte_offset = offset + count;
 573
 574                 /* Read word and save byte */
 575                 word = this->read_word(bufferram + byte_offset);
 576                 word = (word & ~0xff) | buffer[count];
 577                 this->write_word(word, bufferram + byte_offset);
 578         }
 579
 580         memcpy(bufferram + offset, buffer, count);
 581
 582         return 0;
 583 }
 584
 585 /**
 586  * onenand_check_bufferram - [GENERIC] Check BufferRAM information
 587  * @param mtd           MTD data structure
 588  * @param addr          address to check
 589  * @return              1 if there are valid data, otherwise 0
 590  *
 591  * Check bufferram if there is data we required
 592  */
 593 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
 594 {
 595         struct onenand_chip *this = mtd->priv;
 596         int block, page;
 597         int i;
 598
 599         block = (int) (addr >> this->erase_shift);
 600         page = (int) (addr >> this->page_shift);
 601         page &= this->page_mask;
 602
 603         i = ONENAND_CURRENT_BUFFERRAM(this);
 604
 605         /* Is there valid data? */
 606         if (this->bufferram[i].block == block &&
 607             this->bufferram[i].page == page &&
 608             this->bufferram[i].valid)
 609                 return 1;
 610
 611         return 0;
 612 }
 613
 614 /**
 615  * onenand_update_bufferram - [GENERIC] Update BufferRAM information
 616  * @param mtd           MTD data structure
 617  * @param addr          address to update
 618  * @param valid         valid flag
 619  *
 620  * Update BufferRAM information
 621  */
 622 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
 623                 int valid)
 624 {
 625         struct onenand_chip *this = mtd->priv;
 626         int block, page;
 627         int i;
 628
 629         block = (int) (addr >> this->erase_shift);
 630         page = (int) (addr >> this->page_shift);
 631         page &= this->page_mask;
 632
 633         /* Invalidate BufferRAM */
 634         for (i = 0; i < MAX_BUFFERRAM; i++) {
 635                 if (this->bufferram[i].block == block &&
 636                     this->bufferram[i].page == page)
 637                         this->bufferram[i].valid = 0;
 638         }
 639
 640         /* Update BufferRAM */
 641         i = ONENAND_CURRENT_BUFFERRAM(this);
 642         this->bufferram[i].block = block;
 643         this->bufferram[i].page = page;
 644         this->bufferram[i].valid = valid;
 645
 646         return 0;
 647 }
 648
 649 /**
 650  * onenand_get_device - [GENERIC] Get chip for selected access
 651  * @param mtd           MTD device structure
 652  * @param new_state     the state which is requested
 653  *
 654  * Get the device and lock it for exclusive access
 655  */
 656 static int onenand_get_device(struct mtd_info *mtd, int new_state)
 657 {
 658         struct onenand_chip *this = mtd->priv;
 659         DECLARE_WAITQUEUE(wait, current);
 660
 661         /*
 662          * Grab the lock and see if the device is available
 663          */
 664         while (1) {
 665                 spin_lock(&this->chip_lock);
 666                 if (this->state == FL_READY) {
 667                         this->state = new_state;
 668                         spin_unlock(&this->chip_lock);
 669                         break;
 670                 }
 671                 if (new_state == FL_PM_SUSPENDED) {
 672                         spin_unlock(&this->chip_lock);
 673                         return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
 674                 }
 675                 set_current_state(TASK_UNINTERRUPTIBLE);
 676                 add_wait_queue(&this->wq, &wait);
 677                 spin_unlock(&this->chip_lock);
 678                 schedule();
 679                 remove_wait_queue(&this->wq, &wait);
 680         }
 681
 682         return 0;
 683 }
 684
 685 /**
 686  * onenand_release_device - [GENERIC] release chip
 687  * @param mtd           MTD device structure
 688  *
 689  * Deselect, release chip lock and wake up anyone waiting on the device
 690  */
 691 static void onenand_release_device(struct mtd_info *mtd)
 692 {
 693         struct onenand_chip *this = mtd->priv;
 694
 695         /* Release the chip */
 696         spin_lock(&this->chip_lock);
 697         this->state = FL_READY;
 698         wake_up(&this->wq);
 699         spin_unlock(&this->chip_lock);
 700 }
 701
 702 /**
 703  * onenand_read - [MTD Interface] Read data from flash
 704  * @param mtd           MTD device structure
 705  * @param from          offset to read from
 706  * @param len           number of bytes to read
 707  * @param retlen        pointer to variable to store the number of read bytes
 708  * @param buf           the databuffer to put data
 709  *
 710  * Read with ecc
 711 */
 712 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
 713         size_t *retlen, u_char *buf)
 714 {
 715         struct onenand_chip *this = mtd->priv;
 716         struct mtd_ecc_stats stats;
 717         int read = 0, column;
 718         int thislen;
 719         int ret = 0;
 720
 721         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 722
 723         /* Do not allow reads past end of device */
 724         if ((from + len) > mtd->size) {
 725                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: Attempt read beyond end of device\n");
 726                 *retlen = 0;
 727                 return -EINVAL;
 728         }
 729
 730         /* Grab the lock and see if the device is available */
 731         onenand_get_device(mtd, FL_READING);
 732
 733         /* TODO handling oob */
 734
 735         stats = mtd->ecc_stats;
 736         while (read < len) {
 737                 thislen = min_t(int, mtd->writesize, len - read);
 738
 739                 column = from & (mtd->writesize - 1);
 740                 if (column + thislen > mtd->writesize)
 741                         thislen = mtd->writesize - column;
 742
 743                 if (!onenand_check_bufferram(mtd, from)) {
 744                         this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
 745
 746                         ret = this->wait(mtd, FL_READING);
 747                         /* First copy data and check return value for ECC handling */
 748                         onenand_update_bufferram(mtd, from, !ret);
 749                 }
 750
 751                 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
 752
 753                 if (ret) {
 754                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: read failed = %d\n", ret);
 755                         goto out;
 756                 }
 757
 758                 read += thislen;
 759
 760                 if (read == len)
 761                         break;
 762
 763                 from += thislen;
 764                 buf += thislen;
 765         }
 766
 767 out:
 768         /* Deselect and wake up anyone waiting on the device */
 769         onenand_release_device(mtd);
 770
 771         /*
 772          * Return success, if no ECC failures, else -EBADMSG
 773          * fs driver will take care of that, because
 774          * retlen == desired len and result == -EBADMSG
 775          */
 776         *retlen = read;
 777
 778         if (mtd->ecc_stats.failed - stats.failed)
 779                 return -EBADMSG;
 780
 781         return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0;
 782 }
 783
 784 /**
 785  * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
 786  * @param mtd           MTD device structure
 787  * @param from          offset to read from
 788  * @param len           number of bytes to read
 789  * @param retlen        pointer to variable to store the number of read bytes
 790  * @param buf           the databuffer to put data
 791  *
 792  * OneNAND read out-of-band data from the spare area
 793  */
 794 int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
 795                         size_t *retlen, u_char *buf)
 796 {
 797         struct onenand_chip *this = mtd->priv;
 798         int read = 0, thislen, column;
 799         int ret = 0;
 800
 801         DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
 802
 803         /* Initialize return length value */
 804         *retlen = 0;
 805
 806         /* Do not allow reads past end of device */
 807         if (unlikely((from + len) > mtd->size)) {
 808                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n");
 809                 return -EINVAL;
 810         }
 811
 812         /* Grab the lock and see if the device is available */
 813         onenand_get_device(mtd, FL_READING);
 814
 815         column = from & (mtd->oobsize - 1);
 816
 817         while (read < len) {
 818                 thislen = mtd->oobsize - column;
 819                 thislen = min_t(int, thislen, len);
 820
 821                 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
 822
 823                 onenand_update_bufferram(mtd, from, 0);
 824
 825                 ret = this->wait(mtd, FL_READING);
 826                 /* First copy data and check return value for ECC handling */
 827
 828                 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
 829
 830                 if (ret) {
 831                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = 0x%x\n", ret);
 832                         goto out;
 833                 }
 834
 835                 read += thislen;
 836
 837                 if (read == len)
 838                         break;
 839
 840                 buf += thislen;
 841
 842                 /* Read more? */
 843                 if (read < len) {
 844                         /* Page size */
 845                         from += mtd->writesize;
 846                         column = 0;
 847                 }
 848         }
 849
 850 out:
 851         /* Deselect and wake up anyone waiting on the device */
 852         onenand_release_device(mtd);
 853
 854         *retlen = read;
 855         return ret;
 856 }
 857
 858 /**
 859  * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
 860  * @mtd:        MTD device structure
 861  * @from:       offset to read from
 862  * @ops:        oob operation description structure
 863  */
 864 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
 865                             struct mtd_oob_ops *ops)
 866 {
 867         BUG_ON(ops->mode != MTD_OOB_PLACE);
 868
 869         return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->ooblen,
 870                                    &ops->oobretlen, ops->oobbuf);
 871 }
 872
 873 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
 874 /**
 875  * onenand_verify_oob - [GENERIC] verify the oob contents after a write
 876  * @param mtd           MTD device structure
 877  * @param buf           the databuffer to verify
 878  * @param to            offset to read from
 879  * @param len           number of bytes to read and compare
 880  *
 881  */
 882 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to, int len)
 883 {
 884         struct onenand_chip *this = mtd->priv;
 885         char *readp = this->page_buf;
 886         int column = to & (mtd->oobsize - 1);
 887         int status, i;
 888
 889         this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
 890         onenand_update_bufferram(mtd, to, 0);
 891         status = this->wait(mtd, FL_READING);
 892         if (status)
 893                 return status;
 894
 895         this->read_bufferram(mtd, ONENAND_SPARERAM, readp, column, len);
 896
 897         for(i = 0; i < len; i++)
 898                 if (buf[i] != 0xFF && buf[i] != readp[i])
 899                         return -EBADMSG;
 900
 901         return 0;
 902 }
 903
 904 /**
 905  * onenand_verify_page - [GENERIC] verify the chip contents after a write
 906  * @param mtd           MTD device structure
 907  * @param buf           the databuffer to verify
 908  *
 909  * Check DataRAM area directly
 910  */
 911 static int onenand_verify_page(struct mtd_info *mtd, u_char *buf, loff_t addr)
 912 {
 913         struct onenand_chip *this = mtd->priv;
 914         void __iomem *dataram0, *dataram1;
 915         int ret = 0;
 916
 917         /* In partial page write, just skip it */
 918         if ((addr & (mtd->writesize - 1)) != 0)
 919                 return 0;
 920
 921         this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
 922
 923         ret = this->wait(mtd, FL_READING);
 924         if (ret)
 925                 return ret;
 926
 927         onenand_update_bufferram(mtd, addr, 1);
 928
 929         /* Check, if the two dataram areas are same */
 930         dataram0 = this->base + ONENAND_DATARAM;
 931         dataram1 = dataram0 + mtd->writesize;
 932
 933         if (memcmp(dataram0, dataram1, mtd->writesize))
 934                 return -EBADMSG;
 935
 936         return 0;
 937 }
 938 #else
 939 #define onenand_verify_page(...)        (0)
 940 #define onenand_verify_oob(...)         (0)
 941 #endif
 942
 943 #define NOTALIGNED(x)   ((x & (this->subpagesize - 1)) != 0)
 944
 945 /**
 946  * onenand_write - [MTD Interface] write buffer to FLASH
 947  * @param mtd           MTD device structure
 948  * @param to            offset to write to
 949  * @param len           number of bytes to write
 950  * @param retlen        pointer to variable to store the number of written bytes
 951  * @param buf           the data to write
 952  *
 953  * Write with ECC
 954  */
 955 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
 956         size_t *retlen, const u_char *buf)
 957 {
 958         struct onenand_chip *this = mtd->priv;
 959         int written = 0;
 960         int ret = 0;
 961         int column, subpage;
 962
 963         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
 964
 965         /* Initialize retlen, in case of early exit */
 966         *retlen = 0;
 967
 968         /* Do not allow writes past end of device */
 969         if (unlikely((to + len) > mtd->size)) {
 970                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt write to past end of device\n");
 971                 return -EINVAL;
 972         }
 973
 974         /* Reject writes, which are not page aligned */
 975         if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
 976                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt to write not page aligned data\n");
 977                 return -EINVAL;
 978         }
 979
 980         column = to & (mtd->writesize - 1);
 981         subpage = column || (len & (mtd->writesize - 1));
 982
 983         /* Grab the lock and see if the device is available */
 984         onenand_get_device(mtd, FL_WRITING);
 985
 986         /* Loop until all data write */
 987         while (written < len) {
 988                 int bytes = mtd->writesize;
 989                 int thislen = min_t(int, bytes, len - written);
 990                 u_char *wbuf = (u_char *) buf;
 991
 992                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, bytes);
 993
 994                 /* Partial page write */
 995                 if (subpage) {
 996                         bytes = min_t(int, bytes - column, (int) len);
 997                         memset(this->page_buf, 0xff, mtd->writesize);
 998                         memcpy(this->page_buf + column, buf, bytes);
 999                         wbuf = this->page_buf;
1000                         /* Even though partial write, we need page size */
1001                         thislen = mtd->writesize;
1002                 }
1003
1004                 this->write_bufferram(mtd, ONENAND_DATARAM, wbuf, 0, thislen);
1005                 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
1006
1007                 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
1008
1009                 /* In partial page write we don't update bufferram */
1010                 onenand_update_bufferram(mtd, to, !subpage);
1011
1012                 ret = this->wait(mtd, FL_WRITING);
1013                 if (ret) {
1014                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: write filaed %d\n", ret);
1015                         break;
1016                 }
1017
1018                 /* Only check verify write turn on */
1019                 ret = onenand_verify_page(mtd, (u_char *) wbuf, to);
1020                 if (ret) {
1021                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: verify failed %d\n", ret);
1022                         break;
1023                 }
1024
1025                 written += thislen;
1026
1027                 if (written == len)
1028                         break;
1029
1030                 column = 0;
1031                 to += thislen;
1032                 buf += thislen;
1033         }
1034
1035         /* Deselect and wake up anyone waiting on the device */
1036         onenand_release_device(mtd);
1037
1038         *retlen = written;
1039
1040         return ret;
1041 }
1042
1043 /**
1044  * onenand_do_write_oob - [Internal] OneNAND write out-of-band
1045  * @param mtd           MTD device structure
1046  * @param to            offset to write to
1047  * @param len           number of bytes to write
1048  * @param retlen        pointer to variable to store the number of written bytes
1049  * @param buf           the data to write
1050  *
1051  * OneNAND write out-of-band
1052  */
1053 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
1054                                 size_t *retlen, const u_char *buf)
1055 {
1056         struct onenand_chip *this = mtd->priv;
1057         int column, ret = 0;
1058         int written = 0;
1059
1060         DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1061
1062         /* Initialize retlen, in case of early exit */
1063         *retlen = 0;
1064
1065         /* Do not allow writes past end of device */
1066         if (unlikely((to + len) > mtd->size)) {
1067                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n");
1068                 return -EINVAL;
1069         }
1070
1071         /* Grab the lock and see if the device is available */
1072         onenand_get_device(mtd, FL_WRITING);
1073
1074         /* Loop until all data write */
1075         while (written < len) {
1076                 int thislen = min_t(int, mtd->oobsize, len - written);
1077
1078                 column = to & (mtd->oobsize - 1);
1079
1080                 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1081
1082                 /* We send data to spare ram with oobsize
1083                  * to prevent byte access */
1084                 memset(this->page_buf, 0xff, mtd->oobsize);
1085                 memcpy(this->page_buf + column, buf, thislen);
1086                 this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
1087
1088                 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1089
1090                 onenand_update_bufferram(mtd, to, 0);
1091
1092                 ret = this->wait(mtd, FL_WRITING);
1093                 if (ret) {
1094                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: write filaed %d\n", ret);
1095                         goto out;
1096                 }
1097
1098                 ret = onenand_verify_oob(mtd, buf, to, thislen);
1099                 if (ret) {
1100                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: verify failed %d\n", ret);
1101                         goto out;
1102                 }
1103
1104                 written += thislen;
1105
1106                 if (written == len)
1107                         break;
1108
1109                 to += thislen;
1110                 buf += thislen;
1111         }
1112
1113 out:
1114         /* Deselect and wake up anyone waiting on the device */
1115         onenand_release_device(mtd);
1116
1117         *retlen = written;
1118
1119         return ret;
1120 }
1121
1122 /**
1123  * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1124  * @mtd:        MTD device structure
1125  * @from:       offset to read from
1126  * @ops:        oob operation description structure
1127  */
1128 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1129                              struct mtd_oob_ops *ops)
1130 {
1131         BUG_ON(ops->mode != MTD_OOB_PLACE);
1132
1133         return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->ooblen,
1134                                     &ops->oobretlen, ops->oobbuf);
1135 }
1136
1137 /**
1138  * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1139  * @param mtd           MTD device structure
1140  * @param ofs           offset from device start
1141  * @param getchip       0, if the chip is already selected
1142  * @param allowbbt      1, if its allowed to access the bbt area
1143  *
1144  * Check, if the block is bad. Either by reading the bad block table or
1145  * calling of the scan function.
1146  */
1147 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1148 {
1149         struct onenand_chip *this = mtd->priv;
1150         struct bbm_info *bbm = this->bbm;
1151
1152         /* Return info from the table */
1153         return bbm->isbad_bbt(mtd, ofs, allowbbt);
1154 }
1155
1156 /**
1157  * onenand_erase - [MTD Interface] erase block(s)
1158  * @param mtd           MTD device structure
1159  * @param instr         erase instruction
1160  *
1161  * Erase one ore more blocks
1162  */
1163 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1164 {
1165         struct onenand_chip *this = mtd->priv;
1166         unsigned int block_size;
1167         loff_t addr;
1168         int len;
1169         int ret = 0;
1170
1171         DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1172
1173         block_size = (1 << this->erase_shift);
1174
1175         /* Start address must align on block boundary */
1176         if (unlikely(instr->addr & (block_size - 1))) {
1177                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
1178                 return -EINVAL;
1179         }
1180
1181         /* Length must align on block boundary */
1182         if (unlikely(instr->len & (block_size - 1))) {
1183                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
1184                 return -EINVAL;
1185         }
1186
1187         /* Do not allow erase past end of device */
1188         if (unlikely((instr->len + instr->addr) > mtd->size)) {
1189                 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
1190                 return -EINVAL;
1191         }
1192
1193         instr->fail_addr = 0xffffffff;
1194
1195         /* Grab the lock and see if the device is available */
1196         onenand_get_device(mtd, FL_ERASING);
1197
1198         /* Loop throught the pages */
1199         len = instr->len;
1200         addr = instr->addr;
1201
1202         instr->state = MTD_ERASING;
1203
1204         while (len) {
1205
1206                 /* Check if we have a bad block, we do not erase bad blocks */
1207                 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1208                         printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1209                         instr->state = MTD_ERASE_FAILED;
1210                         goto erase_exit;
1211                 }
1212
1213                 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1214
1215                 ret = this->wait(mtd, FL_ERASING);
1216                 /* Check, if it is write protected */
1217                 if (ret) {
1218                         DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1219                         instr->state = MTD_ERASE_FAILED;
1220                         instr->fail_addr = addr;
1221                         goto erase_exit;
1222                 }
1223
1224                 len -= block_size;
1225                 addr += block_size;
1226         }
1227
1228         instr->state = MTD_ERASE_DONE;
1229
1230 erase_exit:
1231
1232         ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1233         /* Do call back function */
1234         if (!ret)
1235                 mtd_erase_callback(instr);
1236
1237         /* Deselect and wake up anyone waiting on the device */
1238         onenand_release_device(mtd);
1239
1240         return ret;
1241 }
1242
1243 /**
1244  * onenand_sync - [MTD Interface] sync
1245  * @param mtd           MTD device structure
1246  *
1247  * Sync is actually a wait for chip ready function
1248  */
1249 static void onenand_sync(struct mtd_info *mtd)
1250 {
1251         DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1252
1253         /* Grab the lock and see if the device is available */
1254         onenand_get_device(mtd, FL_SYNCING);
1255
1256         /* Release it and go back */
1257         onenand_release_device(mtd);
1258 }
1259
1260 /**
1261  * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1262  * @param mtd           MTD device structure
1263  * @param ofs           offset relative to mtd start
1264  *
1265  * Check whether the block is bad
1266  */
1267 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1268 {
1269         /* Check for invalid offset */
1270         if (ofs > mtd->size)
1271                 return -EINVAL;
1272
1273         return onenand_block_checkbad(mtd, ofs, 1, 0);
1274 }
1275
1276 /**
1277  * onenand_default_block_markbad - [DEFAULT] mark a block bad
1278  * @param mtd           MTD device structure
1279  * @param ofs           offset from device start
1280  *
1281  * This is the default implementation, which can be overridden by
1282  * a hardware specific driver.
1283  */
1284 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1285 {
1286         struct onenand_chip *this = mtd->priv;
1287         struct bbm_info *bbm = this->bbm;
1288         u_char buf[2] = {0, 0};
1289         size_t retlen;
1290         int block;
1291
1292         /* Get block number */
1293         block = ((int) ofs) >> bbm->bbt_erase_shift;
1294         if (bbm->bbt)
1295                 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1296
1297         /* We write two bytes, so we dont have to mess with 16 bit access */
1298         ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1299         return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf);
1300 }
1301
1302 /**
1303  * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1304  * @param mtd           MTD device structure
1305  * @param ofs           offset relative to mtd start
1306  *
1307  * Mark the block as bad
1308  */
1309 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1310 {
1311         struct onenand_chip *this = mtd->priv;
1312         int ret;
1313
1314         ret = onenand_block_isbad(mtd, ofs);
1315         if (ret) {
1316                 /* If it was bad already, return success and do nothing */
1317                 if (ret > 0)
1318                         return 0;
1319                 return ret;
1320         }
1321
1322         return this->block_markbad(mtd, ofs);
1323 }
1324
1325 /**
1326  * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1327  * @param mtd           MTD device structure
1328  * @param ofs           offset relative to mtd start
1329  * @param len           number of bytes to lock or unlock
1330  *
1331  * Lock or unlock one or more blocks
1332  */
1333 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1334 {
1335         struct onenand_chip *this = mtd->priv;
1336         int start, end, block, value, status;
1337         int wp_status_mask;
1338
1339         start = ofs >> this->erase_shift;
1340         end = len >> this->erase_shift;
1341
1342         if (cmd == ONENAND_CMD_LOCK)
1343                 wp_status_mask = ONENAND_WP_LS;
1344         else
1345                 wp_status_mask = ONENAND_WP_US;
1346
1347         /* Continuous lock scheme */
1348         if (this->options & ONENAND_HAS_CONT_LOCK) {
1349                 /* Set start block address */
1350                 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1351                 /* Set end block address */
1352                 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1353                 /* Write lock command */
1354                 this->command(mtd, cmd, 0, 0);
1355
1356                 /* There's no return value */
1357                 this->wait(mtd, FL_LOCKING);
1358
1359                 /* Sanity check */
1360                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1361                     & ONENAND_CTRL_ONGO)
1362                         continue;
1363
1364                 /* Check lock status */
1365                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1366                 if (!(status & wp_status_mask))
1367                         printk(KERN_ERR "wp status = 0x%x\n", status);
1368
1369                 return 0;
1370         }
1371
1372         /* Block lock scheme */
1373         for (block = start; block < start + end; block++) {
1374                 /* Set block address */
1375                 value = onenand_block_address(this, block);
1376                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1377                 /* Select DataRAM for DDP */
1378                 value = onenand_bufferram_address(this, block);
1379                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1380                 /* Set start block address */
1381                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1382                 /* Write lock command */
1383                 this->command(mtd, cmd, 0, 0);
1384
1385                 /* There's no return value */
1386                 this->wait(mtd, FL_LOCKING);
1387
1388                 /* Sanity check */
1389                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1390                     & ONENAND_CTRL_ONGO)
1391                         continue;
1392
1393                 /* Check lock status */
1394                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1395                 if (!(status & wp_status_mask))
1396                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1397         }
1398
1399         return 0;
1400 }
1401
1402 /**
1403  * onenand_lock - [MTD Interface] Lock block(s)
1404  * @param mtd           MTD device structure
1405  * @param ofs           offset relative to mtd start
1406  * @param len           number of bytes to unlock
1407  *
1408  * Lock one or more blocks
1409  */
1410 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1411 {
1412         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1413 }
1414
1415 /**
1416  * onenand_unlock - [MTD Interface] Unlock block(s)
1417  * @param mtd           MTD device structure
1418  * @param ofs           offset relative to mtd start
1419  * @param len           number of bytes to unlock
1420  *
1421  * Unlock one or more blocks
1422  */
1423 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1424 {
1425         return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1426 }
1427
1428 /**
1429  * onenand_check_lock_status - [OneNAND Interface] Check lock status
1430  * @param this          onenand chip data structure
1431  *
1432  * Check lock status
1433  */
1434 static void onenand_check_lock_status(struct onenand_chip *this)
1435 {
1436         unsigned int value, block, status;
1437         unsigned int end;
1438
1439         end = this->chipsize >> this->erase_shift;
1440         for (block = 0; block < end; block++) {
1441                 /* Set block address */
1442                 value = onenand_block_address(this, block);
1443                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1444                 /* Select DataRAM for DDP */
1445                 value = onenand_bufferram_address(this, block);
1446                 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1447                 /* Set start block address */
1448                 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1449
1450                 /* Check lock status */
1451                 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1452                 if (!(status & ONENAND_WP_US))
1453                         printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1454         }
1455 }
1456
1457 /**
1458  * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1459  * @param mtd           MTD device structure
1460  *
1461  * Unlock all blocks
1462  */
1463 static int onenand_unlock_all(struct mtd_info *mtd)
1464 {
1465         struct onenand_chip *this = mtd->priv;
1466
1467         if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1468                 /* Write unlock command */
1469                 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1470
1471                 /* There's no return value */
1472                 this->wait(mtd, FL_LOCKING);
1473
1474                 /* Sanity check */
1475                 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1476                     & ONENAND_CTRL_ONGO)
1477                         continue;
1478
1479                 /* Workaround for all block unlock in DDP */
1480                 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
1481                         loff_t ofs;
1482                         size_t len;
1483
1484                         /* 1st block on another chip */
1485                         ofs = this->chipsize >> 1;
1486                         len = 1 << this->erase_shift;
1487
1488                         onenand_unlock(mtd, ofs, len);
1489                 }
1490
1491                 onenand_check_lock_status(this);
1492
1493                 return 0;
1494         }
1495
1496         onenand_unlock(mtd, 0x0, this->chipsize);
1497
1498         return 0;
1499 }
1500
1501 #ifdef CONFIG_MTD_ONENAND_OTP
1502
1503 /* Interal OTP operation */
1504 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1505                 size_t *retlen, u_char *buf);
1506
1507 /**
1508  * do_otp_read - [DEFAULT] Read OTP block area
1509  * @param mtd           MTD device structure
1510  * @param from          The offset to read
1511  * @param len           number of bytes to read
1512  * @param retlen        pointer to variable to store the number of readbytes
1513  * @param buf           the databuffer to put/get data
1514  *
1515  * Read OTP block area.
1516  */
1517 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1518                 size_t *retlen, u_char *buf)
1519 {
1520         struct onenand_chip *this = mtd->priv;
1521         int ret;
1522
1523         /* Enter OTP access mode */
1524         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1525         this->wait(mtd, FL_OTPING);
1526
1527         ret = mtd->read(mtd, from, len, retlen, buf);
1528
1529         /* Exit OTP access mode */
1530         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1531         this->wait(mtd, FL_RESETING);
1532
1533         return ret;
1534 }
1535
1536 /**
1537  * do_otp_write - [DEFAULT] Write OTP block area
1538  * @param mtd           MTD device structure
1539  * @param from          The offset to write
1540  * @param len           number of bytes to write
1541  * @param retlen        pointer to variable to store the number of write bytes
1542  * @param buf           the databuffer to put/get data
1543  *
1544  * Write OTP block area.
1545  */
1546 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1547                 size_t *retlen, u_char *buf)
1548 {
1549         struct onenand_chip *this = mtd->priv;
1550         unsigned char *pbuf = buf;
1551         int ret;
1552
1553         /* Force buffer page aligned */
1554         if (len < mtd->writesize) {
1555                 memcpy(this->page_buf, buf, len);
1556                 memset(this->page_buf + len, 0xff, mtd->writesize - len);
1557                 pbuf = this->page_buf;
1558                 len = mtd->writesize;
1559         }
1560
1561         /* Enter OTP access mode */
1562         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1563         this->wait(mtd, FL_OTPING);
1564
1565         ret = mtd->write(mtd, from, len, retlen, pbuf);
1566
1567         /* Exit OTP access mode */
1568         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1569         this->wait(mtd, FL_RESETING);
1570
1571         return ret;
1572 }
1573
1574 /**
1575  * do_otp_lock - [DEFAULT] Lock OTP block area
1576  * @param mtd           MTD device structure
1577  * @param from          The offset to lock
1578  * @param len           number of bytes to lock
1579  * @param retlen        pointer to variable to store the number of lock bytes
1580  * @param buf           the databuffer to put/get data
1581  *
1582  * Lock OTP block area.
1583  */
1584 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1585                 size_t *retlen, u_char *buf)
1586 {
1587         struct onenand_chip *this = mtd->priv;
1588         int ret;
1589
1590         /* Enter OTP access mode */
1591         this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1592         this->wait(mtd, FL_OTPING);
1593
1594         ret = onenand_do_write_oob(mtd, from, len, retlen, buf);
1595
1596         /* Exit OTP access mode */
1597         this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1598         this->wait(mtd, FL_RESETING);
1599
1600         return ret;
1601 }
1602
1603 /**
1604  * onenand_otp_walk - [DEFAULT] Handle OTP operation
1605  * @param mtd           MTD device structure
1606  * @param from          The offset to read/write
1607  * @param len           number of bytes to read/write
1608  * @param retlen        pointer to variable to store the number of read bytes
1609  * @param buf           the databuffer to put/get data
1610  * @param action        do given action
1611  * @param mode          specify user and factory
1612  *
1613  * Handle OTP operation.
1614  */
1615 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1616                         size_t *retlen, u_char *buf,
1617                         otp_op_t action, int mode)
1618 {
1619         struct onenand_chip *this = mtd->priv;
1620         int otp_pages;
1621         int density;
1622         int ret = 0;
1623
1624         *retlen = 0;
1625
1626         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1627         if (density < ONENAND_DEVICE_DENSITY_512Mb)
1628                 otp_pages = 20;
1629         else
1630                 otp_pages = 10;
1631
1632         if (mode == MTD_OTP_FACTORY) {
1633                 from += mtd->writesize * otp_pages;
1634                 otp_pages = 64 - otp_pages;
1635         }
1636
1637         /* Check User/Factory boundary */
1638         if (((mtd->writesize * otp_pages) - (from + len)) < 0)
1639                 return 0;
1640
1641         while (len > 0 && otp_pages > 0) {
1642                 if (!action) {  /* OTP Info functions */
1643                         struct otp_info *otpinfo;
1644
1645                         len -= sizeof(struct otp_info);
1646                         if (len <= 0)
1647                                 return -ENOSPC;
1648
1649                         otpinfo = (struct otp_info *) buf;
1650                         otpinfo->start = from;
1651                         otpinfo->length = mtd->writesize;
1652                         otpinfo->locked = 0;
1653
1654                         from += mtd->writesize;
1655                         buf += sizeof(struct otp_info);
1656                         *retlen += sizeof(struct otp_info);
1657                 } else {
1658                         size_t tmp_retlen;
1659                         int size = len;
1660
1661                         ret = action(mtd, from, len, &tmp_retlen, buf);
1662
1663                         buf += size;
1664                         len -= size;
1665                         *retlen += size;
1666
1667                         if (ret < 0)
1668                                 return ret;
1669                 }
1670                 otp_pages--;
1671         }
1672
1673         return 0;
1674 }
1675
1676 /**
1677  * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
1678  * @param mtd           MTD device structure
1679  * @param buf           the databuffer to put/get data
1680  * @param len           number of bytes to read
1681  *
1682  * Read factory OTP info.
1683  */
1684 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
1685                         struct otp_info *buf, size_t len)
1686 {
1687         size_t retlen;
1688         int ret;
1689
1690         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
1691
1692         return ret ? : retlen;
1693 }
1694
1695 /**
1696  * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
1697  * @param mtd           MTD device structure
1698  * @param from          The offset to read
1699  * @param len           number of bytes to read
1700  * @param retlen        pointer to variable to store the number of read bytes
1701  * @param buf           the databuffer to put/get data
1702  *
1703  * Read factory OTP area.
1704  */
1705 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
1706                         size_t len, size_t *retlen, u_char *buf)
1707 {
1708         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
1709 }
1710
1711 /**
1712  * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
1713  * @param mtd           MTD device structure
1714  * @param buf           the databuffer to put/get data
1715  * @param len           number of bytes to read
1716  *
1717  * Read user OTP info.
1718  */
1719 static int onenand_get_user_prot_info(struct mtd_info *mtd,
1720                         struct otp_info *buf, size_t len)
1721 {
1722         size_t retlen;
1723         int ret;
1724
1725         ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
1726
1727         return ret ? : retlen;
1728 }
1729
1730 /**
1731  * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
1732  * @param mtd           MTD device structure
1733  * @param from          The offset to read
1734  * @param len           number of bytes to read
1735  * @param retlen        pointer to variable to store the number of read bytes
1736  * @param buf           the databuffer to put/get data
1737  *
1738  * Read user OTP area.
1739  */
1740 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
1741                         size_t len, size_t *retlen, u_char *buf)
1742 {
1743         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
1744 }
1745
1746 /**
1747  * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
1748  * @param mtd           MTD device structure
1749  * @param from          The offset to write
1750  * @param len           number of bytes to write
1751  * @param retlen        pointer to variable to store the number of write bytes
1752  * @param buf           the databuffer to put/get data
1753  *
1754  * Write user OTP area.
1755  */
1756 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
1757                         size_t len, size_t *retlen, u_char *buf)
1758 {
1759         return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
1760 }
1761
1762 /**
1763  * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
1764  * @param mtd           MTD device structure
1765  * @param from          The offset to lock
1766  * @param len           number of bytes to unlock
1767  *
1768  * Write lock mark on spare area in page 0 in OTP block
1769  */
1770 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
1771                         size_t len)
1772 {
1773         unsigned char oob_buf[64];
1774         size_t retlen;
1775         int ret;
1776
1777         memset(oob_buf, 0xff, mtd->oobsize);
1778         /*
1779          * Note: OTP lock operation
1780          *       OTP block : 0xXXFC
1781          *       1st block : 0xXXF3 (If chip support)
1782          *       Both      : 0xXXF0 (If chip support)
1783          */
1784         oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
1785
1786         /*
1787          * Write lock mark to 8th word of sector0 of page0 of the spare0.
1788          * We write 16 bytes spare area instead of 2 bytes.
1789          */
1790         from = 0;
1791         len = 16;
1792
1793         ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
1794
1795         return ret ? : retlen;
1796 }
1797 #endif  /* CONFIG_MTD_ONENAND_OTP */
1798
1799 /**
1800  * onenand_lock_scheme - Check and set OneNAND lock scheme
1801  * @param mtd           MTD data structure
1802  *
1803  * Check and set OneNAND lock scheme
1804  */
1805 static void onenand_lock_scheme(struct mtd_info *mtd)
1806 {
1807         struct onenand_chip *this = mtd->priv;
1808         unsigned int density, process;
1809
1810         /* Lock scheme depends on density and process */
1811         density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1812         process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
1813
1814         /* Lock scheme */
1815         if (density >= ONENAND_DEVICE_DENSITY_1Gb) {
1816                 /* A-Die has all block unlock */
1817                 if (process) {
1818                         printk(KERN_DEBUG "Chip support all block unlock\n");
1819                         this->options |= ONENAND_HAS_UNLOCK_ALL;
1820                 }
1821         } else {
1822                 /* Some OneNAND has continues lock scheme */
1823                 if (!process) {
1824                         printk(KERN_DEBUG "Lock scheme is Continues Lock\n");
1825                         this->options |= ONENAND_HAS_CONT_LOCK;
1826                 }
1827         }
1828 }
1829
1830 /**
1831  * onenand_print_device_info - Print device ID
1832  * @param device        device ID
1833  *
1834  * Print device ID
1835  */
1836 static void onenand_print_device_info(int device, int version)
1837 {
1838         int vcc, demuxed, ddp, density;
1839
1840         vcc = device & ONENAND_DEVICE_VCC_MASK;
1841         demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1842         ddp = device & ONENAND_DEVICE_IS_DDP;
1843         density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1844         printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
1845                 demuxed ? "" : "Muxed ",
1846                 ddp ? "(DDP)" : "",
1847                 (16 << density),
1848                 vcc ? "2.65/3.3" : "1.8",
1849                 device);
1850         printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
1851 }
1852
1853 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1854         {ONENAND_MFR_SAMSUNG, "Samsung"},
1855 };
1856
1857 /**
1858  * onenand_check_maf - Check manufacturer ID
1859  * @param manuf         manufacturer ID
1860  *
1861  * Check manufacturer ID
1862  */
1863 static int onenand_check_maf(int manuf)
1864 {
1865         int size = ARRAY_SIZE(onenand_manuf_ids);
1866         char *name;
1867         int i;
1868
1869         for (i = 0; i < size; i++)
1870                 if (manuf == onenand_manuf_ids[i].id)
1871                         break;
1872
1873         if (i < size)
1874                 name = onenand_manuf_ids[i].name;
1875         else
1876                 name = "Unknown";
1877
1878         printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
1879
1880         return (i == size);
1881 }
1882
1883 /**
1884  * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1885  * @param mtd           MTD device structure
1886  *
1887  * OneNAND detection method:
1888  *   Compare the the values from command with ones from register
1889  */
1890 static int onenand_probe(struct mtd_info *mtd)
1891 {
1892         struct onenand_chip *this = mtd->priv;
1893         int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
1894         int density;
1895         int syscfg;
1896
1897         /* Save system configuration 1 */
1898         syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
1899         /* Clear Sync. Burst Read mode to read BootRAM */
1900         this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
1901
1902         /* Send the command for reading device ID from BootRAM */
1903         this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1904
1905         /* Read manufacturer and device IDs from BootRAM */
1906         bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1907         bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1908
1909         /* Reset OneNAND to read default register values */
1910         this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1911         /* Wait reset */
1912         this->wait(mtd, FL_RESETING);
1913
1914         /* Restore system configuration 1 */
1915         this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
1916
1917         /* Check manufacturer ID */
1918         if (onenand_check_maf(bram_maf_id))
1919                 return -ENXIO;
1920
1921         /* Read manufacturer and device IDs from Register */
1922         maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1923         dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1924         ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID);
1925
1926         /* Check OneNAND device */
1927         if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1928                 return -ENXIO;
1929
1930         /* Flash device information */
1931         onenand_print_device_info(dev_id, ver_id);
1932         this->device_id = dev_id;
1933         this->version_id = ver_id;
1934
1935         density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1936         this->chipsize = (16 << density) << 20;
1937         /* Set density mask. it is used for DDP */
1938         this->density_mask = (1 << (density + 6));
1939
1940         /* OneNAND page size & block size */
1941         /* The data buffer size is equal to page size */
1942         mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1943         mtd->oobsize = mtd->writesize >> 5;
1944         /* Pagers per block is always 64 in OneNAND */
1945         mtd->erasesize = mtd->writesize << 6;
1946
1947         this->erase_shift = ffs(mtd->erasesize) - 1;
1948         this->page_shift = ffs(mtd->writesize) - 1;
1949         this->ppb_shift = (this->erase_shift - this->page_shift);
1950         this->page_mask = (mtd->erasesize / mtd->writesize) - 1;
1951
1952         /* REVIST: Multichip handling */
1953
1954         mtd->size = this->chipsize;
1955
1956         /* Check OneNAND lock scheme */
1957         onenand_lock_scheme(mtd);
1958
1959         return 0;
1960 }
1961
1962 /**
1963  * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
1964  * @param mtd           MTD device structure
1965  */
1966 static int onenand_suspend(struct mtd_info *mtd)
1967 {
1968         return onenand_get_device(mtd, FL_PM_SUSPENDED);
1969 }
1970
1971 /**
1972  * onenand_resume - [MTD Interface] Resume the OneNAND flash
1973  * @param mtd           MTD device structure
1974  */
1975 static void onenand_resume(struct mtd_info *mtd)
1976 {
1977         struct onenand_chip *this = mtd->priv;
1978
1979         if (this->state == FL_PM_SUSPENDED)
1980                 onenand_release_device(mtd);
1981         else
1982                 printk(KERN_ERR "resume() called for the chip which is not"
1983                                 "in suspended state\n");
1984 }
1985
1986 /**
1987  * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
1988  * @param mtd           MTD device structure
1989  * @param maxchips      Number of chips to scan for
1990  *
1991  * This fills out all the not initialized function pointers
1992  * with the defaults.
1993  * The flash ID is read and the mtd/chip structures are
1994  * filled with the appropriate values.
1995  */
1996 int onenand_scan(struct mtd_info *mtd, int maxchips)
1997 {
1998         struct onenand_chip *this = mtd->priv;
1999
2000         if (!this->read_word)
2001                 this->read_word = onenand_readw;
2002         if (!this->write_word)
2003                 this->write_word = onenand_writew;
2004
2005         if (!this->command)
2006                 this->command = onenand_command;
2007         if (!this->wait)
2008                 onenand_setup_wait(mtd);
2009
2010         if (!this->read_bufferram)
2011                 this->read_bufferram = onenand_read_bufferram;
2012         if (!this->write_bufferram)
2013                 this->write_bufferram = onenand_write_bufferram;
2014
2015         if (!this->block_markbad)
2016                 this->block_markbad = onenand_default_block_markbad;
2017         if (!this->scan_bbt)
2018                 this->scan_bbt = onenand_default_bbt;
2019
2020         if (onenand_probe(mtd))
2021                 return -ENXIO;
2022
2023         /* Set Sync. Burst Read after probing */
2024         if (this->mmcontrol) {
2025                 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2026                 this->read_bufferram = onenand_sync_read_bufferram;
2027         }
2028
2029         /* Allocate buffers, if necessary */
2030         if (!this->page_buf) {
2031                 size_t len;
2032                 len = mtd->writesize + mtd->oobsize;
2033                 this->page_buf = kmalloc(len, GFP_KERNEL);
2034                 if (!this->page_buf) {
2035                         printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2036                         return -ENOMEM;
2037                 }
2038                 this->options |= ONENAND_PAGEBUF_ALLOC;
2039         }
2040
2041         this->state = FL_READY;
2042         init_waitqueue_head(&this->wq);
2043         spin_lock_init(&this->chip_lock);
2044
2045         /*
2046          * Allow subpage writes up to oobsize.
2047          */
2048         switch (mtd->oobsize) {
2049         case 64:
2050                 this->ecclayout = &onenand_oob_64;
2051                 mtd->subpage_sft = 2;
2052                 break;
2053
2054         case 32:
2055                 this->ecclayout = &onenand_oob_32;
2056                 mtd->subpage_sft = 1;
2057                 break;
2058
2059         default:
2060                 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2061                         mtd->oobsize);
2062                 mtd->subpage_sft = 0;
2063                 /* To prevent kernel oops */
2064                 this->ecclayout = &onenand_oob_32;
2065                 break;
2066         }
2067
2068         this->subpagesize = mtd->writesize >> mtd->subpage_sft;
2069         mtd->ecclayout = this->ecclayout;
2070
2071         /* Fill in remaining MTD driver data */
2072         mtd->type = MTD_NANDFLASH;
2073         mtd->flags = MTD_CAP_NANDFLASH;
2074         mtd->ecctype = MTD_ECC_SW;
2075         mtd->erase = onenand_erase;
2076         mtd->point = NULL;
2077         mtd->unpoint = NULL;
2078         mtd->read = onenand_read;
2079         mtd->write = onenand_write;
2080         mtd->read_oob = onenand_read_oob;
2081         mtd->write_oob = onenand_write_oob;
2082 #ifdef CONFIG_MTD_ONENAND_OTP
2083         mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2084         mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2085         mtd->get_user_prot_info = onenand_get_user_prot_info;
2086         mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2087         mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2088         mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2089 #endif
2090         mtd->sync = onenand_sync;
2091         mtd->lock = onenand_lock;
2092         mtd->unlock = onenand_unlock;
2093         mtd->suspend = onenand_suspend;
2094         mtd->resume = onenand_resume;
2095         mtd->block_isbad = onenand_block_isbad;
2096         mtd->block_markbad = onenand_block_markbad;
2097         mtd->owner = THIS_MODULE;
2098
2099         /* Unlock whole block */
2100         onenand_unlock_all(mtd);
2101
2102         return this->scan_bbt(mtd);
2103 }
2104
2105 /**
2106  * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2107  * @param mtd           MTD device structure
2108  */
2109 void onenand_release(struct mtd_info *mtd)
2110 {
2111         struct onenand_chip *this = mtd->priv;
2112
2113 #ifdef CONFIG_MTD_PARTITIONS
2114         /* Deregister partitions */
2115         del_mtd_partitions (mtd);
2116 #endif
2117         /* Deregister the device */
2118         del_mtd_device (mtd);
2119
2120         /* Free bad block table memory, if allocated */
2121         if (this->bbm)
2122                 kfree(this->bbm);
2123         /* Buffer allocated by onenand_scan */
2124         if (this->options & ONENAND_PAGEBUF_ALLOC)
2125                 kfree(this->page_buf);
2126 }
2127
2128 EXPORT_SYMBOL_GPL(onenand_scan);
2129 EXPORT_SYMBOL_GPL(onenand_release);
2130
2131 MODULE_LICENSE("GPL");
2132 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2133 MODULE_DESCRIPTION("Generic OneNAND flash driver code");