2 * linux/drivers/mtd/onenand/onenand_base.c
4 * Copyright (C) 2005-2006 Samsung Electronics
5 * Kyungmin Park <kyungmin.park@samsung.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/sched.h>
16 #include <linux/interrupt.h>
17 #include <linux/jiffies.h>
18 #include <linux/mtd/mtd.h>
19 #include <linux/mtd/onenand.h>
20 #include <linux/mtd/partitions.h>
25 * onenand_oob_64 - oob info for large (2KB) page
27 static struct nand_ecclayout onenand_oob_64 = {
36 {2, 3}, {14, 2}, {18, 3}, {30, 2},
37 {34, 3}, {46, 2}, {50, 3}, {62, 2}
42 * onenand_oob_32 - oob info for middle (1KB) page
44 static struct nand_ecclayout onenand_oob_32 = {
50 .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} }
53 static const unsigned char ffchars[] = {
54 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
55 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */
56 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
57 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */
58 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
59 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */
60 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
61 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */
65 * onenand_readw - [OneNAND Interface] Read OneNAND register
66 * @param addr address to read
68 * Read OneNAND register
70 static unsigned short onenand_readw(void __iomem *addr)
76 * onenand_writew - [OneNAND Interface] Write OneNAND register with value
77 * @param value value to write
78 * @param addr address to write
80 * Write OneNAND register with value
82 static void onenand_writew(unsigned short value, void __iomem *addr)
88 * onenand_block_address - [DEFAULT] Get block address
89 * @param this onenand chip data structure
90 * @param block the block
91 * @return translated block address if DDP, otherwise same
93 * Setup Start Address 1 Register (F100h)
95 static int onenand_block_address(struct onenand_chip *this, int block)
97 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
98 /* Device Flash Core select, NAND Flash Block Address */
101 if (block & this->density_mask)
104 return (dfs << ONENAND_DDP_SHIFT) |
105 (block & (this->density_mask - 1));
112 * onenand_bufferram_address - [DEFAULT] Get bufferram address
113 * @param this onenand chip data structure
114 * @param block the block
115 * @return set DBS value if DDP, otherwise 0
117 * Setup Start Address 2 Register (F101h) for DDP
119 static int onenand_bufferram_address(struct onenand_chip *this, int block)
121 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
122 /* Device BufferRAM Select */
125 if (block & this->density_mask)
128 return (dbs << ONENAND_DDP_SHIFT);
135 * onenand_page_address - [DEFAULT] Get page address
136 * @param page the page address
137 * @param sector the sector address
138 * @return combined page and sector address
140 * Setup Start Address 8 Register (F107h)
142 static int onenand_page_address(int page, int sector)
144 /* Flash Page Address, Flash Sector Address */
147 fpa = page & ONENAND_FPA_MASK;
148 fsa = sector & ONENAND_FSA_MASK;
150 return ((fpa << ONENAND_FPA_SHIFT) | fsa);
154 * onenand_buffer_address - [DEFAULT] Get buffer address
155 * @param dataram1 DataRAM index
156 * @param sectors the sector address
157 * @param count the number of sectors
158 * @return the start buffer value
160 * Setup Start Buffer Register (F200h)
162 static int onenand_buffer_address(int dataram1, int sectors, int count)
166 /* BufferRAM Sector Address */
167 bsa = sectors & ONENAND_BSA_MASK;
170 bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */
172 bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */
174 /* BufferRAM Sector Count */
175 bsc = count & ONENAND_BSC_MASK;
177 return ((bsa << ONENAND_BSA_SHIFT) | bsc);
181 * onenand_command - [DEFAULT] Send command to OneNAND device
182 * @param mtd MTD device structure
183 * @param cmd the command to be sent
184 * @param addr offset to read from or write to
185 * @param len number of bytes to read or write
187 * Send command to OneNAND device. This function is used for middle/large page
188 * devices (1KB/2KB Bytes per page)
190 static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len)
192 struct onenand_chip *this = mtd->priv;
193 int value, readcmd = 0, block_cmd = 0;
195 /* Now we use page size operation */
196 int sectors = 4, count = 4;
198 /* Address translation */
200 case ONENAND_CMD_UNLOCK:
201 case ONENAND_CMD_LOCK:
202 case ONENAND_CMD_LOCK_TIGHT:
203 case ONENAND_CMD_UNLOCK_ALL:
208 case ONENAND_CMD_ERASE:
209 case ONENAND_CMD_BUFFERRAM:
210 case ONENAND_CMD_OTP_ACCESS:
212 block = (int) (addr >> this->erase_shift);
217 block = (int) (addr >> this->erase_shift);
218 page = (int) (addr >> this->page_shift);
219 page &= this->page_mask;
223 /* NOTE: The setting order of the registers is very important! */
224 if (cmd == ONENAND_CMD_BUFFERRAM) {
225 /* Select DataRAM for DDP */
226 value = onenand_bufferram_address(this, block);
227 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
229 /* Switch to the next data buffer */
230 ONENAND_SET_NEXT_BUFFERRAM(this);
236 /* Write 'DFS, FBA' of Flash */
237 value = onenand_block_address(this, block);
238 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
241 /* Select DataRAM for DDP */
242 value = onenand_bufferram_address(this, block);
243 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
251 case ONENAND_CMD_READ:
252 case ONENAND_CMD_READOOB:
253 dataram = ONENAND_SET_NEXT_BUFFERRAM(this);
258 dataram = ONENAND_CURRENT_BUFFERRAM(this);
262 /* Write 'FPA, FSA' of Flash */
263 value = onenand_page_address(page, sectors);
264 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8);
266 /* Write 'BSA, BSC' of DataRAM */
267 value = onenand_buffer_address(dataram, sectors, count);
268 this->write_word(value, this->base + ONENAND_REG_START_BUFFER);
271 /* Select DataRAM for DDP */
272 value = onenand_bufferram_address(this, block);
273 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
277 /* Interrupt clear */
278 this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT);
281 this->write_word(cmd, this->base + ONENAND_REG_COMMAND);
287 * onenand_wait - [DEFAULT] wait until the command is done
288 * @param mtd MTD device structure
289 * @param state state to select the max. timeout value
291 * Wait for command done. This applies to all OneNAND command
292 * Read can take up to 30us, erase up to 2ms and program up to 350us
293 * according to general OneNAND specs
295 static int onenand_wait(struct mtd_info *mtd, int state)
297 struct onenand_chip * this = mtd->priv;
298 unsigned long timeout;
299 unsigned int flags = ONENAND_INT_MASTER;
300 unsigned int interrupt = 0;
301 unsigned int ctrl, ecc;
303 /* The 20 msec is enough */
304 timeout = jiffies + msecs_to_jiffies(20);
305 while (time_before(jiffies, timeout)) {
306 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
308 if (interrupt & flags)
311 if (state != FL_READING)
313 touch_softlockup_watchdog();
315 /* To get correct interrupt status in timeout case */
316 interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT);
318 ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS);
320 if (ctrl & ONENAND_CTRL_ERROR) {
321 /* It maybe occur at initial bad block */
322 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl);
323 /* Clear other interrupt bits for preventing ECC error */
324 interrupt &= ONENAND_INT_MASTER;
327 if (ctrl & ONENAND_CTRL_LOCK) {
328 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error = 0x%04x\n", ctrl);
332 if (interrupt & ONENAND_INT_READ) {
333 ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS);
334 if (ecc & ONENAND_ECC_2BIT_ALL) {
335 DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc);
344 * onenand_interrupt - [DEFAULT] onenand interrupt handler
345 * @param irq onenand interrupt number
346 * @param dev_id interrupt data
350 static irqreturn_t onenand_interrupt(int irq, void *data)
352 struct onenand_chip *this = (struct onenand_chip *) data;
354 /* To handle shared interrupt */
355 if (!this->complete.done)
356 complete(&this->complete);
362 * onenand_interrupt_wait - [DEFAULT] wait until the command is done
363 * @param mtd MTD device structure
364 * @param state state to select the max. timeout value
366 * Wait for command done.
368 static int onenand_interrupt_wait(struct mtd_info *mtd, int state)
370 struct onenand_chip *this = mtd->priv;
372 /* To prevent soft lockup */
373 touch_softlockup_watchdog();
375 wait_for_completion(&this->complete);
377 return onenand_wait(mtd, state);
381 * onenand_try_interrupt_wait - [DEFAULT] try interrupt wait
382 * @param mtd MTD device structure
383 * @param state state to select the max. timeout value
385 * Try interrupt based wait (It is used one-time)
387 static int onenand_try_interrupt_wait(struct mtd_info *mtd, int state)
389 struct onenand_chip *this = mtd->priv;
390 unsigned long remain, timeout;
392 /* We use interrupt wait first */
393 this->wait = onenand_interrupt_wait;
395 /* To prevent soft lockup */
396 touch_softlockup_watchdog();
398 timeout = msecs_to_jiffies(100);
399 remain = wait_for_completion_timeout(&this->complete, timeout);
401 printk(KERN_INFO "OneNAND: There's no interrupt. "
402 "We use the normal wait\n");
404 /* Release the irq */
405 free_irq(this->irq, this);
407 this->wait = onenand_wait;
410 return onenand_wait(mtd, state);
414 * onenand_setup_wait - [OneNAND Interface] setup onenand wait method
415 * @param mtd MTD device structure
417 * There's two method to wait onenand work
418 * 1. polling - read interrupt status register
419 * 2. interrupt - use the kernel interrupt method
421 static void onenand_setup_wait(struct mtd_info *mtd)
423 struct onenand_chip *this = mtd->priv;
426 init_completion(&this->complete);
428 if (this->irq <= 0) {
429 this->wait = onenand_wait;
433 if (request_irq(this->irq, &onenand_interrupt,
434 IRQF_SHARED, "onenand", this)) {
435 /* If we can't get irq, use the normal wait */
436 this->wait = onenand_wait;
440 /* Enable interrupt */
441 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
442 syscfg |= ONENAND_SYS_CFG1_IOBE;
443 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
445 this->wait = onenand_try_interrupt_wait;
449 * onenand_bufferram_offset - [DEFAULT] BufferRAM offset
450 * @param mtd MTD data structure
451 * @param area BufferRAM area
452 * @return offset given area
454 * Return BufferRAM offset given area
456 static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area)
458 struct onenand_chip *this = mtd->priv;
460 if (ONENAND_CURRENT_BUFFERRAM(this)) {
461 if (area == ONENAND_DATARAM)
462 return mtd->writesize;
463 if (area == ONENAND_SPARERAM)
471 * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area
472 * @param mtd MTD data structure
473 * @param area BufferRAM area
474 * @param buffer the databuffer to put/get data
475 * @param offset offset to read from or write to
476 * @param count number of bytes to read/write
478 * Read the BufferRAM area
480 static int onenand_read_bufferram(struct mtd_info *mtd, int area,
481 unsigned char *buffer, int offset, size_t count)
483 struct onenand_chip *this = mtd->priv;
484 void __iomem *bufferram;
486 bufferram = this->base + area;
488 bufferram += onenand_bufferram_offset(mtd, area);
490 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
493 /* Align with word(16-bit) size */
496 /* Read word and save byte */
497 word = this->read_word(bufferram + offset + count);
498 buffer[count] = (word & 0xff);
501 memcpy(buffer, bufferram + offset, count);
507 * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode
508 * @param mtd MTD data structure
509 * @param area BufferRAM area
510 * @param buffer the databuffer to put/get data
511 * @param offset offset to read from or write to
512 * @param count number of bytes to read/write
514 * Read the BufferRAM area with Sync. Burst Mode
516 static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area,
517 unsigned char *buffer, int offset, size_t count)
519 struct onenand_chip *this = mtd->priv;
520 void __iomem *bufferram;
522 bufferram = this->base + area;
524 bufferram += onenand_bufferram_offset(mtd, area);
526 this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ);
528 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
531 /* Align with word(16-bit) size */
534 /* Read word and save byte */
535 word = this->read_word(bufferram + offset + count);
536 buffer[count] = (word & 0xff);
539 memcpy(buffer, bufferram + offset, count);
541 this->mmcontrol(mtd, 0);
547 * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area
548 * @param mtd MTD data structure
549 * @param area BufferRAM area
550 * @param buffer the databuffer to put/get data
551 * @param offset offset to read from or write to
552 * @param count number of bytes to read/write
554 * Write the BufferRAM area
556 static int onenand_write_bufferram(struct mtd_info *mtd, int area,
557 const unsigned char *buffer, int offset, size_t count)
559 struct onenand_chip *this = mtd->priv;
560 void __iomem *bufferram;
562 bufferram = this->base + area;
564 bufferram += onenand_bufferram_offset(mtd, area);
566 if (ONENAND_CHECK_BYTE_ACCESS(count)) {
570 /* Align with word(16-bit) size */
573 /* Calculate byte access offset */
574 byte_offset = offset + count;
576 /* Read word and save byte */
577 word = this->read_word(bufferram + byte_offset);
578 word = (word & ~0xff) | buffer[count];
579 this->write_word(word, bufferram + byte_offset);
582 memcpy(bufferram + offset, buffer, count);
588 * onenand_check_bufferram - [GENERIC] Check BufferRAM information
589 * @param mtd MTD data structure
590 * @param addr address to check
591 * @return 1 if there are valid data, otherwise 0
593 * Check bufferram if there is data we required
595 static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr)
597 struct onenand_chip *this = mtd->priv;
601 block = (int) (addr >> this->erase_shift);
602 page = (int) (addr >> this->page_shift);
603 page &= this->page_mask;
605 i = ONENAND_CURRENT_BUFFERRAM(this);
607 /* Is there valid data? */
608 if (this->bufferram[i].block == block &&
609 this->bufferram[i].page == page &&
610 this->bufferram[i].valid)
617 * onenand_update_bufferram - [GENERIC] Update BufferRAM information
618 * @param mtd MTD data structure
619 * @param addr address to update
620 * @param valid valid flag
622 * Update BufferRAM information
624 static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr,
627 struct onenand_chip *this = mtd->priv;
631 block = (int) (addr >> this->erase_shift);
632 page = (int) (addr >> this->page_shift);
633 page &= this->page_mask;
635 /* Invalidate BufferRAM */
636 for (i = 0; i < MAX_BUFFERRAM; i++) {
637 if (this->bufferram[i].block == block &&
638 this->bufferram[i].page == page)
639 this->bufferram[i].valid = 0;
642 /* Update BufferRAM */
643 i = ONENAND_CURRENT_BUFFERRAM(this);
644 this->bufferram[i].block = block;
645 this->bufferram[i].page = page;
646 this->bufferram[i].valid = valid;
652 * onenand_get_device - [GENERIC] Get chip for selected access
653 * @param mtd MTD device structure
654 * @param new_state the state which is requested
656 * Get the device and lock it for exclusive access
658 static int onenand_get_device(struct mtd_info *mtd, int new_state)
660 struct onenand_chip *this = mtd->priv;
661 DECLARE_WAITQUEUE(wait, current);
664 * Grab the lock and see if the device is available
667 spin_lock(&this->chip_lock);
668 if (this->state == FL_READY) {
669 this->state = new_state;
670 spin_unlock(&this->chip_lock);
673 if (new_state == FL_PM_SUSPENDED) {
674 spin_unlock(&this->chip_lock);
675 return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN;
677 set_current_state(TASK_UNINTERRUPTIBLE);
678 add_wait_queue(&this->wq, &wait);
679 spin_unlock(&this->chip_lock);
681 remove_wait_queue(&this->wq, &wait);
688 * onenand_release_device - [GENERIC] release chip
689 * @param mtd MTD device structure
691 * Deselect, release chip lock and wake up anyone waiting on the device
693 static void onenand_release_device(struct mtd_info *mtd)
695 struct onenand_chip *this = mtd->priv;
697 /* Release the chip */
698 spin_lock(&this->chip_lock);
699 this->state = FL_READY;
701 spin_unlock(&this->chip_lock);
705 * onenand_read - [MTD Interface] Read data from flash
706 * @param mtd MTD device structure
707 * @param from offset to read from
708 * @param len number of bytes to read
709 * @param retlen pointer to variable to store the number of read bytes
710 * @param buf the databuffer to put data
714 static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len,
715 size_t *retlen, u_char *buf)
717 struct onenand_chip *this = mtd->priv;
718 int read = 0, column;
722 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
724 /* Do not allow reads past end of device */
725 if ((from + len) > mtd->size) {
726 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: Attempt read beyond end of device\n");
731 /* Grab the lock and see if the device is available */
732 onenand_get_device(mtd, FL_READING);
734 /* TODO handling oob */
737 thislen = min_t(int, mtd->writesize, len - read);
739 column = from & (mtd->writesize - 1);
740 if (column + thislen > mtd->writesize)
741 thislen = mtd->writesize - column;
743 if (!onenand_check_bufferram(mtd, from)) {
744 this->command(mtd, ONENAND_CMD_READ, from, mtd->writesize);
746 ret = this->wait(mtd, FL_READING);
747 /* First copy data and check return value for ECC handling */
748 onenand_update_bufferram(mtd, from, 1);
751 this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen);
759 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read: read failed = %d\n", ret);
768 /* Deselect and wake up anyone waiting on the device */
769 onenand_release_device(mtd);
772 * Return success, if no ECC failures, else -EBADMSG
773 * fs driver will take care of that, because
774 * retlen == desired len and result == -EBADMSG
781 * onenand_do_read_oob - [MTD Interface] OneNAND read out-of-band
782 * @param mtd MTD device structure
783 * @param from offset to read from
784 * @param len number of bytes to read
785 * @param retlen pointer to variable to store the number of read bytes
786 * @param buf the databuffer to put data
788 * OneNAND read out-of-band data from the spare area
790 int onenand_do_read_oob(struct mtd_info *mtd, loff_t from, size_t len,
791 size_t *retlen, u_char *buf)
793 struct onenand_chip *this = mtd->priv;
794 int read = 0, thislen, column;
797 DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
799 /* Initialize return length value */
802 /* Do not allow reads past end of device */
803 if (unlikely((from + len) > mtd->size)) {
804 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n");
808 /* Grab the lock and see if the device is available */
809 onenand_get_device(mtd, FL_READING);
811 column = from & (mtd->oobsize - 1);
814 thislen = mtd->oobsize - column;
815 thislen = min_t(int, thislen, len);
817 this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize);
819 onenand_update_bufferram(mtd, from, 0);
821 ret = this->wait(mtd, FL_READING);
822 /* First copy data and check return value for ECC handling */
824 this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen);
832 DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = %d\n", ret);
841 from += mtd->writesize;
847 /* Deselect and wake up anyone waiting on the device */
848 onenand_release_device(mtd);
855 * onenand_read_oob - [MTD Interface] NAND write data and/or out-of-band
856 * @mtd: MTD device structure
857 * @from: offset to read from
858 * @ops: oob operation description structure
860 static int onenand_read_oob(struct mtd_info *mtd, loff_t from,
861 struct mtd_oob_ops *ops)
863 BUG_ON(ops->mode != MTD_OOB_PLACE);
865 return onenand_do_read_oob(mtd, from + ops->ooboffs, ops->len,
866 &ops->retlen, ops->oobbuf);
869 #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE
871 * onenand_verify_oob - [GENERIC] verify the oob contents after a write
872 * @param mtd MTD device structure
873 * @param buf the databuffer to verify
874 * @param to offset to read from
875 * @param len number of bytes to read and compare
878 static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to, int len)
880 struct onenand_chip *this = mtd->priv;
881 char *readp = this->page_buf;
882 int column = to & (mtd->oobsize - 1);
885 this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize);
886 onenand_update_bufferram(mtd, to, 0);
887 status = this->wait(mtd, FL_READING);
891 this->read_bufferram(mtd, ONENAND_SPARERAM, readp, column, len);
893 for(i = 0; i < len; i++)
894 if (buf[i] != 0xFF && buf[i] != readp[i])
901 * onenand_verify_page - [GENERIC] verify the chip contents after a write
902 * @param mtd MTD device structure
903 * @param buf the databuffer to verify
905 * Check DataRAM area directly
907 static int onenand_verify_page(struct mtd_info *mtd, u_char *buf, loff_t addr)
909 struct onenand_chip *this = mtd->priv;
910 void __iomem *dataram0, *dataram1;
913 this->command(mtd, ONENAND_CMD_READ, addr, mtd->writesize);
915 ret = this->wait(mtd, FL_READING);
919 onenand_update_bufferram(mtd, addr, 1);
921 /* Check, if the two dataram areas are same */
922 dataram0 = this->base + ONENAND_DATARAM;
923 dataram1 = dataram0 + mtd->writesize;
925 if (memcmp(dataram0, dataram1, mtd->writesize))
931 #define onenand_verify_page(...) (0)
932 #define onenand_verify_oob(...) (0)
935 #define NOTALIGNED(x) ((x & (mtd->writesize - 1)) != 0)
938 * onenand_write - [MTD Interface] write buffer to FLASH
939 * @param mtd MTD device structure
940 * @param to offset to write to
941 * @param len number of bytes to write
942 * @param retlen pointer to variable to store the number of written bytes
943 * @param buf the data to write
947 static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len,
948 size_t *retlen, const u_char *buf)
950 struct onenand_chip *this = mtd->priv;
954 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
956 /* Initialize retlen, in case of early exit */
959 /* Do not allow writes past end of device */
960 if (unlikely((to + len) > mtd->size)) {
961 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt write to past end of device\n");
965 /* Reject writes, which are not page aligned */
966 if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) {
967 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: Attempt to write not page aligned data\n");
971 /* Grab the lock and see if the device is available */
972 onenand_get_device(mtd, FL_WRITING);
974 /* Loop until all data write */
975 while (written < len) {
976 int thislen = min_t(int, mtd->writesize, len - written);
978 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->writesize);
980 this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen);
981 this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize);
983 this->command(mtd, ONENAND_CMD_PROG, to, mtd->writesize);
985 onenand_update_bufferram(mtd, to, 1);
987 ret = this->wait(mtd, FL_WRITING);
989 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: write filaed %d\n", ret);
995 /* Only check verify write turn on */
996 ret = onenand_verify_page(mtd, (u_char *) buf, to);
998 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write: verify failed %d\n", ret);
1010 /* Deselect and wake up anyone waiting on the device */
1011 onenand_release_device(mtd);
1019 * onenand_do_write_oob - [Internal] OneNAND write out-of-band
1020 * @param mtd MTD device structure
1021 * @param to offset to write to
1022 * @param len number of bytes to write
1023 * @param retlen pointer to variable to store the number of written bytes
1024 * @param buf the data to write
1026 * OneNAND write out-of-band
1028 static int onenand_do_write_oob(struct mtd_info *mtd, loff_t to, size_t len,
1029 size_t *retlen, const u_char *buf)
1031 struct onenand_chip *this = mtd->priv;
1032 int column, ret = 0;
1035 DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1037 /* Initialize retlen, in case of early exit */
1040 /* Do not allow writes past end of device */
1041 if (unlikely((to + len) > mtd->size)) {
1042 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n");
1046 /* Grab the lock and see if the device is available */
1047 onenand_get_device(mtd, FL_WRITING);
1049 /* Loop until all data write */
1050 while (written < len) {
1051 int thislen = min_t(int, mtd->oobsize, len - written);
1053 column = to & (mtd->oobsize - 1);
1055 this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize);
1057 /* We send data to spare ram with oobsize
1058 * to prevent byte access */
1059 memset(this->page_buf, 0xff, mtd->oobsize);
1060 memcpy(this->page_buf + column, buf, thislen);
1061 this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize);
1063 this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize);
1065 onenand_update_bufferram(mtd, to, 0);
1067 ret = this->wait(mtd, FL_WRITING);
1069 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: write filaed %d\n", ret);
1073 ret = onenand_verify_oob(mtd, buf, to, thislen);
1075 DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: verify failed %d\n", ret);
1089 /* Deselect and wake up anyone waiting on the device */
1090 onenand_release_device(mtd);
1098 * onenand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1099 * @mtd: MTD device structure
1100 * @from: offset to read from
1101 * @ops: oob operation description structure
1103 static int onenand_write_oob(struct mtd_info *mtd, loff_t to,
1104 struct mtd_oob_ops *ops)
1106 BUG_ON(ops->mode != MTD_OOB_PLACE);
1108 return onenand_do_write_oob(mtd, to + ops->ooboffs, ops->len,
1109 &ops->retlen, ops->oobbuf);
1113 * onenand_block_checkbad - [GENERIC] Check if a block is marked bad
1114 * @param mtd MTD device structure
1115 * @param ofs offset from device start
1116 * @param getchip 0, if the chip is already selected
1117 * @param allowbbt 1, if its allowed to access the bbt area
1119 * Check, if the block is bad. Either by reading the bad block table or
1120 * calling of the scan function.
1122 static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
1124 struct onenand_chip *this = mtd->priv;
1125 struct bbm_info *bbm = this->bbm;
1127 /* Return info from the table */
1128 return bbm->isbad_bbt(mtd, ofs, allowbbt);
1132 * onenand_erase - [MTD Interface] erase block(s)
1133 * @param mtd MTD device structure
1134 * @param instr erase instruction
1136 * Erase one ore more blocks
1138 static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr)
1140 struct onenand_chip *this = mtd->priv;
1141 unsigned int block_size;
1146 DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
1148 block_size = (1 << this->erase_shift);
1150 /* Start address must align on block boundary */
1151 if (unlikely(instr->addr & (block_size - 1))) {
1152 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n");
1156 /* Length must align on block boundary */
1157 if (unlikely(instr->len & (block_size - 1))) {
1158 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n");
1162 /* Do not allow erase past end of device */
1163 if (unlikely((instr->len + instr->addr) > mtd->size)) {
1164 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n");
1168 instr->fail_addr = 0xffffffff;
1170 /* Grab the lock and see if the device is available */
1171 onenand_get_device(mtd, FL_ERASING);
1173 /* Loop throught the pages */
1177 instr->state = MTD_ERASING;
1181 /* Check if we have a bad block, we do not erase bad blocks */
1182 if (onenand_block_checkbad(mtd, addr, 0, 0)) {
1183 printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr);
1184 instr->state = MTD_ERASE_FAILED;
1188 this->command(mtd, ONENAND_CMD_ERASE, addr, block_size);
1190 ret = this->wait(mtd, FL_ERASING);
1191 /* Check, if it is write protected */
1194 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Device is write protected!!!\n");
1196 DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift));
1197 instr->state = MTD_ERASE_FAILED;
1198 instr->fail_addr = addr;
1206 instr->state = MTD_ERASE_DONE;
1210 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
1211 /* Do call back function */
1213 mtd_erase_callback(instr);
1215 /* Deselect and wake up anyone waiting on the device */
1216 onenand_release_device(mtd);
1222 * onenand_sync - [MTD Interface] sync
1223 * @param mtd MTD device structure
1225 * Sync is actually a wait for chip ready function
1227 static void onenand_sync(struct mtd_info *mtd)
1229 DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n");
1231 /* Grab the lock and see if the device is available */
1232 onenand_get_device(mtd, FL_SYNCING);
1234 /* Release it and go back */
1235 onenand_release_device(mtd);
1239 * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
1240 * @param mtd MTD device structure
1241 * @param ofs offset relative to mtd start
1243 * Check whether the block is bad
1245 static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs)
1247 /* Check for invalid offset */
1248 if (ofs > mtd->size)
1251 return onenand_block_checkbad(mtd, ofs, 1, 0);
1255 * onenand_default_block_markbad - [DEFAULT] mark a block bad
1256 * @param mtd MTD device structure
1257 * @param ofs offset from device start
1259 * This is the default implementation, which can be overridden by
1260 * a hardware specific driver.
1262 static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
1264 struct onenand_chip *this = mtd->priv;
1265 struct bbm_info *bbm = this->bbm;
1266 u_char buf[2] = {0, 0};
1270 /* Get block number */
1271 block = ((int) ofs) >> bbm->bbt_erase_shift;
1273 bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
1275 /* We write two bytes, so we dont have to mess with 16 bit access */
1276 ofs += mtd->oobsize + (bbm->badblockpos & ~0x01);
1277 return onenand_do_write_oob(mtd, ofs , 2, &retlen, buf);
1281 * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
1282 * @param mtd MTD device structure
1283 * @param ofs offset relative to mtd start
1285 * Mark the block as bad
1287 static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs)
1289 struct onenand_chip *this = mtd->priv;
1292 ret = onenand_block_isbad(mtd, ofs);
1294 /* If it was bad already, return success and do nothing */
1300 return this->block_markbad(mtd, ofs);
1304 * onenand_do_lock_cmd - [OneNAND Interface] Lock or unlock block(s)
1305 * @param mtd MTD device structure
1306 * @param ofs offset relative to mtd start
1307 * @param len number of bytes to lock or unlock
1309 * Lock or unlock one or more blocks
1311 static int onenand_do_lock_cmd(struct mtd_info *mtd, loff_t ofs, size_t len, int cmd)
1313 struct onenand_chip *this = mtd->priv;
1314 int start, end, block, value, status;
1317 start = ofs >> this->erase_shift;
1318 end = len >> this->erase_shift;
1320 if (cmd == ONENAND_CMD_LOCK)
1321 wp_status_mask = ONENAND_WP_LS;
1323 wp_status_mask = ONENAND_WP_US;
1325 /* Continuous lock scheme */
1326 if (this->options & ONENAND_HAS_CONT_LOCK) {
1327 /* Set start block address */
1328 this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1329 /* Set end block address */
1330 this->write_word(start + end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS);
1331 /* Write lock command */
1332 this->command(mtd, cmd, 0, 0);
1334 /* There's no return value */
1335 this->wait(mtd, FL_LOCKING);
1338 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1339 & ONENAND_CTRL_ONGO)
1342 /* Check lock status */
1343 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1344 if (!(status & wp_status_mask))
1345 printk(KERN_ERR "wp status = 0x%x\n", status);
1350 /* Block lock scheme */
1351 for (block = start; block < start + end; block++) {
1352 /* Set block address */
1353 value = onenand_block_address(this, block);
1354 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1355 /* Select DataRAM for DDP */
1356 value = onenand_bufferram_address(this, block);
1357 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1358 /* Set start block address */
1359 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1360 /* Write lock command */
1361 this->command(mtd, cmd, 0, 0);
1363 /* There's no return value */
1364 this->wait(mtd, FL_LOCKING);
1367 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1368 & ONENAND_CTRL_ONGO)
1371 /* Check lock status */
1372 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1373 if (!(status & wp_status_mask))
1374 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1381 * onenand_lock - [MTD Interface] Lock block(s)
1382 * @param mtd MTD device structure
1383 * @param ofs offset relative to mtd start
1384 * @param len number of bytes to unlock
1386 * Lock one or more blocks
1388 static int onenand_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
1390 return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_LOCK);
1395 * onenand_unlock - [MTD Interface] Unlock block(s)
1396 * @param mtd MTD device structure
1397 * @param ofs offset relative to mtd start
1398 * @param len number of bytes to unlock
1400 * Unlock one or more blocks
1402 static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len)
1404 return onenand_do_lock_cmd(mtd, ofs, len, ONENAND_CMD_UNLOCK);
1408 * onenand_check_lock_status - [OneNAND Interface] Check lock status
1409 * @param this onenand chip data structure
1413 static void onenand_check_lock_status(struct onenand_chip *this)
1415 unsigned int value, block, status;
1418 end = this->chipsize >> this->erase_shift;
1419 for (block = 0; block < end; block++) {
1420 /* Set block address */
1421 value = onenand_block_address(this, block);
1422 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1);
1423 /* Select DataRAM for DDP */
1424 value = onenand_bufferram_address(this, block);
1425 this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2);
1426 /* Set start block address */
1427 this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS);
1429 /* Check lock status */
1430 status = this->read_word(this->base + ONENAND_REG_WP_STATUS);
1431 if (!(status & ONENAND_WP_US))
1432 printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status);
1437 * onenand_unlock_all - [OneNAND Interface] unlock all blocks
1438 * @param mtd MTD device structure
1442 static int onenand_unlock_all(struct mtd_info *mtd)
1444 struct onenand_chip *this = mtd->priv;
1446 if (this->options & ONENAND_HAS_UNLOCK_ALL) {
1447 /* Write unlock command */
1448 this->command(mtd, ONENAND_CMD_UNLOCK_ALL, 0, 0);
1450 /* There's no return value */
1451 this->wait(mtd, FL_LOCKING);
1454 while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS)
1455 & ONENAND_CTRL_ONGO)
1458 /* Workaround for all block unlock in DDP */
1459 if (this->device_id & ONENAND_DEVICE_IS_DDP) {
1463 /* 1st block on another chip */
1464 ofs = this->chipsize >> 1;
1465 len = 1 << this->erase_shift;
1467 onenand_unlock(mtd, ofs, len);
1470 onenand_check_lock_status(this);
1475 onenand_unlock(mtd, 0x0, this->chipsize);
1480 #ifdef CONFIG_MTD_ONENAND_OTP
1482 /* Interal OTP operation */
1483 typedef int (*otp_op_t)(struct mtd_info *mtd, loff_t form, size_t len,
1484 size_t *retlen, u_char *buf);
1487 * do_otp_read - [DEFAULT] Read OTP block area
1488 * @param mtd MTD device structure
1489 * @param from The offset to read
1490 * @param len number of bytes to read
1491 * @param retlen pointer to variable to store the number of readbytes
1492 * @param buf the databuffer to put/get data
1494 * Read OTP block area.
1496 static int do_otp_read(struct mtd_info *mtd, loff_t from, size_t len,
1497 size_t *retlen, u_char *buf)
1499 struct onenand_chip *this = mtd->priv;
1502 /* Enter OTP access mode */
1503 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1504 this->wait(mtd, FL_OTPING);
1506 ret = mtd->read(mtd, from, len, retlen, buf);
1508 /* Exit OTP access mode */
1509 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1510 this->wait(mtd, FL_RESETING);
1516 * do_otp_write - [DEFAULT] Write OTP block area
1517 * @param mtd MTD device structure
1518 * @param from The offset to write
1519 * @param len number of bytes to write
1520 * @param retlen pointer to variable to store the number of write bytes
1521 * @param buf the databuffer to put/get data
1523 * Write OTP block area.
1525 static int do_otp_write(struct mtd_info *mtd, loff_t from, size_t len,
1526 size_t *retlen, u_char *buf)
1528 struct onenand_chip *this = mtd->priv;
1529 unsigned char *pbuf = buf;
1532 /* Force buffer page aligned */
1533 if (len < mtd->writesize) {
1534 memcpy(this->page_buf, buf, len);
1535 memset(this->page_buf + len, 0xff, mtd->writesize - len);
1536 pbuf = this->page_buf;
1537 len = mtd->writesize;
1540 /* Enter OTP access mode */
1541 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1542 this->wait(mtd, FL_OTPING);
1544 ret = mtd->write(mtd, from, len, retlen, pbuf);
1546 /* Exit OTP access mode */
1547 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1548 this->wait(mtd, FL_RESETING);
1554 * do_otp_lock - [DEFAULT] Lock OTP block area
1555 * @param mtd MTD device structure
1556 * @param from The offset to lock
1557 * @param len number of bytes to lock
1558 * @param retlen pointer to variable to store the number of lock bytes
1559 * @param buf the databuffer to put/get data
1561 * Lock OTP block area.
1563 static int do_otp_lock(struct mtd_info *mtd, loff_t from, size_t len,
1564 size_t *retlen, u_char *buf)
1566 struct onenand_chip *this = mtd->priv;
1569 /* Enter OTP access mode */
1570 this->command(mtd, ONENAND_CMD_OTP_ACCESS, 0, 0);
1571 this->wait(mtd, FL_OTPING);
1573 ret = onenand_do_write_oob(mtd, from, len, retlen, buf);
1575 /* Exit OTP access mode */
1576 this->command(mtd, ONENAND_CMD_RESET, 0, 0);
1577 this->wait(mtd, FL_RESETING);
1583 * onenand_otp_walk - [DEFAULT] Handle OTP operation
1584 * @param mtd MTD device structure
1585 * @param from The offset to read/write
1586 * @param len number of bytes to read/write
1587 * @param retlen pointer to variable to store the number of read bytes
1588 * @param buf the databuffer to put/get data
1589 * @param action do given action
1590 * @param mode specify user and factory
1592 * Handle OTP operation.
1594 static int onenand_otp_walk(struct mtd_info *mtd, loff_t from, size_t len,
1595 size_t *retlen, u_char *buf,
1596 otp_op_t action, int mode)
1598 struct onenand_chip *this = mtd->priv;
1605 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1606 if (density < ONENAND_DEVICE_DENSITY_512Mb)
1611 if (mode == MTD_OTP_FACTORY) {
1612 from += mtd->writesize * otp_pages;
1613 otp_pages = 64 - otp_pages;
1616 /* Check User/Factory boundary */
1617 if (((mtd->writesize * otp_pages) - (from + len)) < 0)
1620 while (len > 0 && otp_pages > 0) {
1621 if (!action) { /* OTP Info functions */
1622 struct otp_info *otpinfo;
1624 len -= sizeof(struct otp_info);
1628 otpinfo = (struct otp_info *) buf;
1629 otpinfo->start = from;
1630 otpinfo->length = mtd->writesize;
1631 otpinfo->locked = 0;
1633 from += mtd->writesize;
1634 buf += sizeof(struct otp_info);
1635 *retlen += sizeof(struct otp_info);
1640 ret = action(mtd, from, len, &tmp_retlen, buf);
1656 * onenand_get_fact_prot_info - [MTD Interface] Read factory OTP info
1657 * @param mtd MTD device structure
1658 * @param buf the databuffer to put/get data
1659 * @param len number of bytes to read
1661 * Read factory OTP info.
1663 static int onenand_get_fact_prot_info(struct mtd_info *mtd,
1664 struct otp_info *buf, size_t len)
1669 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_FACTORY);
1671 return ret ? : retlen;
1675 * onenand_read_fact_prot_reg - [MTD Interface] Read factory OTP area
1676 * @param mtd MTD device structure
1677 * @param from The offset to read
1678 * @param len number of bytes to read
1679 * @param retlen pointer to variable to store the number of read bytes
1680 * @param buf the databuffer to put/get data
1682 * Read factory OTP area.
1684 static int onenand_read_fact_prot_reg(struct mtd_info *mtd, loff_t from,
1685 size_t len, size_t *retlen, u_char *buf)
1687 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_FACTORY);
1691 * onenand_get_user_prot_info - [MTD Interface] Read user OTP info
1692 * @param mtd MTD device structure
1693 * @param buf the databuffer to put/get data
1694 * @param len number of bytes to read
1696 * Read user OTP info.
1698 static int onenand_get_user_prot_info(struct mtd_info *mtd,
1699 struct otp_info *buf, size_t len)
1704 ret = onenand_otp_walk(mtd, 0, len, &retlen, (u_char *) buf, NULL, MTD_OTP_USER);
1706 return ret ? : retlen;
1710 * onenand_read_user_prot_reg - [MTD Interface] Read user OTP area
1711 * @param mtd MTD device structure
1712 * @param from The offset to read
1713 * @param len number of bytes to read
1714 * @param retlen pointer to variable to store the number of read bytes
1715 * @param buf the databuffer to put/get data
1717 * Read user OTP area.
1719 static int onenand_read_user_prot_reg(struct mtd_info *mtd, loff_t from,
1720 size_t len, size_t *retlen, u_char *buf)
1722 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_read, MTD_OTP_USER);
1726 * onenand_write_user_prot_reg - [MTD Interface] Write user OTP area
1727 * @param mtd MTD device structure
1728 * @param from The offset to write
1729 * @param len number of bytes to write
1730 * @param retlen pointer to variable to store the number of write bytes
1731 * @param buf the databuffer to put/get data
1733 * Write user OTP area.
1735 static int onenand_write_user_prot_reg(struct mtd_info *mtd, loff_t from,
1736 size_t len, size_t *retlen, u_char *buf)
1738 return onenand_otp_walk(mtd, from, len, retlen, buf, do_otp_write, MTD_OTP_USER);
1742 * onenand_lock_user_prot_reg - [MTD Interface] Lock user OTP area
1743 * @param mtd MTD device structure
1744 * @param from The offset to lock
1745 * @param len number of bytes to unlock
1747 * Write lock mark on spare area in page 0 in OTP block
1749 static int onenand_lock_user_prot_reg(struct mtd_info *mtd, loff_t from,
1752 unsigned char oob_buf[64];
1756 memset(oob_buf, 0xff, mtd->oobsize);
1758 * Note: OTP lock operation
1759 * OTP block : 0xXXFC
1760 * 1st block : 0xXXF3 (If chip support)
1761 * Both : 0xXXF0 (If chip support)
1763 oob_buf[ONENAND_OTP_LOCK_OFFSET] = 0xFC;
1766 * Write lock mark to 8th word of sector0 of page0 of the spare0.
1767 * We write 16 bytes spare area instead of 2 bytes.
1772 ret = onenand_otp_walk(mtd, from, len, &retlen, oob_buf, do_otp_lock, MTD_OTP_USER);
1774 return ret ? : retlen;
1776 #endif /* CONFIG_MTD_ONENAND_OTP */
1779 * onenand_lock_scheme - Check and set OneNAND lock scheme
1780 * @param mtd MTD data structure
1782 * Check and set OneNAND lock scheme
1784 static void onenand_lock_scheme(struct mtd_info *mtd)
1786 struct onenand_chip *this = mtd->priv;
1787 unsigned int density, process;
1789 /* Lock scheme depends on density and process */
1790 density = this->device_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1791 process = this->version_id >> ONENAND_VERSION_PROCESS_SHIFT;
1794 if (density >= ONENAND_DEVICE_DENSITY_1Gb) {
1795 /* A-Die has all block unlock */
1797 printk(KERN_DEBUG "Chip support all block unlock\n");
1798 this->options |= ONENAND_HAS_UNLOCK_ALL;
1801 /* Some OneNAND has continues lock scheme */
1803 printk(KERN_DEBUG "Lock scheme is Continues Lock\n");
1804 this->options |= ONENAND_HAS_CONT_LOCK;
1810 * onenand_print_device_info - Print device ID
1811 * @param device device ID
1815 static void onenand_print_device_info(int device, int version)
1817 int vcc, demuxed, ddp, density;
1819 vcc = device & ONENAND_DEVICE_VCC_MASK;
1820 demuxed = device & ONENAND_DEVICE_IS_DEMUX;
1821 ddp = device & ONENAND_DEVICE_IS_DDP;
1822 density = device >> ONENAND_DEVICE_DENSITY_SHIFT;
1823 printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n",
1824 demuxed ? "" : "Muxed ",
1827 vcc ? "2.65/3.3" : "1.8",
1829 printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version);
1832 static const struct onenand_manufacturers onenand_manuf_ids[] = {
1833 {ONENAND_MFR_SAMSUNG, "Samsung"},
1837 * onenand_check_maf - Check manufacturer ID
1838 * @param manuf manufacturer ID
1840 * Check manufacturer ID
1842 static int onenand_check_maf(int manuf)
1844 int size = ARRAY_SIZE(onenand_manuf_ids);
1848 for (i = 0; i < size; i++)
1849 if (manuf == onenand_manuf_ids[i].id)
1853 name = onenand_manuf_ids[i].name;
1857 printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf);
1863 * onenand_probe - [OneNAND Interface] Probe the OneNAND device
1864 * @param mtd MTD device structure
1866 * OneNAND detection method:
1867 * Compare the the values from command with ones from register
1869 static int onenand_probe(struct mtd_info *mtd)
1871 struct onenand_chip *this = mtd->priv;
1872 int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id;
1876 /* Save system configuration 1 */
1877 syscfg = this->read_word(this->base + ONENAND_REG_SYS_CFG1);
1878 /* Clear Sync. Burst Read mode to read BootRAM */
1879 this->write_word((syscfg & ~ONENAND_SYS_CFG1_SYNC_READ), this->base + ONENAND_REG_SYS_CFG1);
1881 /* Send the command for reading device ID from BootRAM */
1882 this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM);
1884 /* Read manufacturer and device IDs from BootRAM */
1885 bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0);
1886 bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2);
1888 /* Reset OneNAND to read default register values */
1889 this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM);
1891 this->wait(mtd, FL_RESETING);
1893 /* Restore system configuration 1 */
1894 this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1);
1896 /* Check manufacturer ID */
1897 if (onenand_check_maf(bram_maf_id))
1900 /* Read manufacturer and device IDs from Register */
1901 maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID);
1902 dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID);
1903 ver_id= this->read_word(this->base + ONENAND_REG_VERSION_ID);
1905 /* Check OneNAND device */
1906 if (maf_id != bram_maf_id || dev_id != bram_dev_id)
1909 /* Flash device information */
1910 onenand_print_device_info(dev_id, ver_id);
1911 this->device_id = dev_id;
1912 this->version_id = ver_id;
1914 density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT;
1915 this->chipsize = (16 << density) << 20;
1916 /* Set density mask. it is used for DDP */
1917 this->density_mask = (1 << (density + 6));
1919 /* OneNAND page size & block size */
1920 /* The data buffer size is equal to page size */
1921 mtd->writesize = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE);
1922 mtd->oobsize = mtd->writesize >> 5;
1923 /* Pagers per block is always 64 in OneNAND */
1924 mtd->erasesize = mtd->writesize << 6;
1926 this->erase_shift = ffs(mtd->erasesize) - 1;
1927 this->page_shift = ffs(mtd->writesize) - 1;
1928 this->ppb_shift = (this->erase_shift - this->page_shift);
1929 this->page_mask = (mtd->erasesize / mtd->writesize) - 1;
1931 /* REVIST: Multichip handling */
1933 mtd->size = this->chipsize;
1935 /* Check OneNAND lock scheme */
1936 onenand_lock_scheme(mtd);
1942 * onenand_suspend - [MTD Interface] Suspend the OneNAND flash
1943 * @param mtd MTD device structure
1945 static int onenand_suspend(struct mtd_info *mtd)
1947 return onenand_get_device(mtd, FL_PM_SUSPENDED);
1951 * onenand_resume - [MTD Interface] Resume the OneNAND flash
1952 * @param mtd MTD device structure
1954 static void onenand_resume(struct mtd_info *mtd)
1956 struct onenand_chip *this = mtd->priv;
1958 if (this->state == FL_PM_SUSPENDED)
1959 onenand_release_device(mtd);
1961 printk(KERN_ERR "resume() called for the chip which is not"
1962 "in suspended state\n");
1966 * onenand_scan - [OneNAND Interface] Scan for the OneNAND device
1967 * @param mtd MTD device structure
1968 * @param maxchips Number of chips to scan for
1970 * This fills out all the not initialized function pointers
1971 * with the defaults.
1972 * The flash ID is read and the mtd/chip structures are
1973 * filled with the appropriate values.
1975 int onenand_scan(struct mtd_info *mtd, int maxchips)
1977 struct onenand_chip *this = mtd->priv;
1979 if (!this->read_word)
1980 this->read_word = onenand_readw;
1981 if (!this->write_word)
1982 this->write_word = onenand_writew;
1985 this->command = onenand_command;
1987 onenand_setup_wait(mtd);
1989 if (!this->read_bufferram)
1990 this->read_bufferram = onenand_read_bufferram;
1991 if (!this->write_bufferram)
1992 this->write_bufferram = onenand_write_bufferram;
1994 if (!this->block_markbad)
1995 this->block_markbad = onenand_default_block_markbad;
1996 if (!this->scan_bbt)
1997 this->scan_bbt = onenand_default_bbt;
1999 if (onenand_probe(mtd))
2002 /* Set Sync. Burst Read after probing */
2003 if (this->mmcontrol) {
2004 printk(KERN_INFO "OneNAND Sync. Burst Read support\n");
2005 this->read_bufferram = onenand_sync_read_bufferram;
2008 /* Allocate buffers, if necessary */
2009 if (!this->page_buf) {
2011 len = mtd->writesize + mtd->oobsize;
2012 this->page_buf = kmalloc(len, GFP_KERNEL);
2013 if (!this->page_buf) {
2014 printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n");
2017 this->options |= ONENAND_PAGEBUF_ALLOC;
2020 this->state = FL_READY;
2021 init_waitqueue_head(&this->wq);
2022 spin_lock_init(&this->chip_lock);
2024 switch (mtd->oobsize) {
2026 this->ecclayout = &onenand_oob_64;
2030 this->ecclayout = &onenand_oob_32;
2034 printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n",
2036 /* To prevent kernel oops */
2037 this->ecclayout = &onenand_oob_32;
2041 mtd->ecclayout = this->ecclayout;
2043 /* Fill in remaining MTD driver data */
2044 mtd->type = MTD_NANDFLASH;
2045 mtd->flags = MTD_CAP_NANDFLASH;
2046 mtd->ecctype = MTD_ECC_SW;
2047 mtd->erase = onenand_erase;
2049 mtd->unpoint = NULL;
2050 mtd->read = onenand_read;
2051 mtd->write = onenand_write;
2052 mtd->read_oob = onenand_read_oob;
2053 mtd->write_oob = onenand_write_oob;
2054 #ifdef CONFIG_MTD_ONENAND_OTP
2055 mtd->get_fact_prot_info = onenand_get_fact_prot_info;
2056 mtd->read_fact_prot_reg = onenand_read_fact_prot_reg;
2057 mtd->get_user_prot_info = onenand_get_user_prot_info;
2058 mtd->read_user_prot_reg = onenand_read_user_prot_reg;
2059 mtd->write_user_prot_reg = onenand_write_user_prot_reg;
2060 mtd->lock_user_prot_reg = onenand_lock_user_prot_reg;
2062 mtd->sync = onenand_sync;
2063 mtd->lock = onenand_lock;
2064 mtd->unlock = onenand_unlock;
2065 mtd->suspend = onenand_suspend;
2066 mtd->resume = onenand_resume;
2067 mtd->block_isbad = onenand_block_isbad;
2068 mtd->block_markbad = onenand_block_markbad;
2069 mtd->owner = THIS_MODULE;
2071 /* Unlock whole block */
2072 onenand_unlock_all(mtd);
2074 return this->scan_bbt(mtd);
2078 * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device
2079 * @param mtd MTD device structure
2081 void onenand_release(struct mtd_info *mtd)
2083 struct onenand_chip *this = mtd->priv;
2085 #ifdef CONFIG_MTD_PARTITIONS
2086 /* Deregister partitions */
2087 del_mtd_partitions (mtd);
2089 /* Deregister the device */
2090 del_mtd_device (mtd);
2092 /* Free bad block table memory, if allocated */
2095 /* Buffer allocated by onenand_scan */
2096 if (this->options & ONENAND_PAGEBUF_ALLOC)
2097 kfree(this->page_buf);
2100 EXPORT_SYMBOL_GPL(onenand_scan);
2101 EXPORT_SYMBOL_GPL(onenand_release);
2103 MODULE_LICENSE("GPL");
2104 MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>");
2105 MODULE_DESCRIPTION("Generic OneNAND flash driver code");