drivers/mtd/spi/spi_flash_probe.c

   1 /*
   2  * SPI flash probing
   3  *
   4  * Copyright (C) 2008 Atmel Corporation
   5  * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
   6  * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc.
   7  *
   8  * Licensed under the GPL-2 or later.
   9  */
  10
  11 #include <common.h>
  12 #include <fdtdec.h>
  13 #include <malloc.h>
  14 #include <spi.h>
  15 #include <spi_flash.h>
  16
  17 #include "spi_flash_internal.h"
  18
  19 DECLARE_GLOBAL_DATA_PTR;
  20
  21 /*
  22  * struct spi_flash_params - SPI/QSPI flash device params structure
  23  *
  24  * @name:               Device name ([MANUFLETTER][DEVTYPE][DENSITY][EXTRAINFO])
  25  * @jedec:              Device jedec ID (0x[1byte_manuf_id][2byte_dev_id])
  26  * @ext_jedec:          Device ext_jedec ID
  27  * @sector_size:        Sector size of this device
  28  * @nr_sectors: No.of sectors on this device
  29  */
  30 struct spi_flash_params {
  31         const char *name;
  32         u32 jedec;
  33         u16 ext_jedec;
  34         u32 sector_size;
  35         u32 nr_sectors;
  36 };
  37
  38 static const struct spi_flash_params spi_flash_params_table[] = {
  39 #ifdef CONFIG_SPI_FLASH_EON             /* EON */
  40         {"EN25Q32B",            0x1c3016, 0x0,     64 * 1024,     64},
  41         {"EN25Q128B",           0x1c3018, 0x0,     64 * 1024,    256},
  42 #endif
  43 #ifdef CONFIG_SPI_FLASH_GIGADEVICE      /* GIGADEVICE */
  44         {"GD25Q64B",            0xc84017, 0x0,     64 * 1024,    128},
  45         {"GD25LQ32",            0xc86016, 0x0,     64 * 1024,     64},
  46 #endif
  47 #ifdef CONFIG_SPI_FLASH_MACRONIX        /* MACRONIX */
  48         {"MX25L4005",           0xc22013, 0x0,     64 * 1024,      8},
  49         {"MX25L8005",           0xc22014, 0x0,     64 * 1024,     16},
  50         {"MX25L1605D",          0xc22015, 0x0,     64 * 1024,     32},
  51         {"MX25L3205D",          0xc22016, 0x0,     64 * 1024,     64},
  52         {"MX25L6405D",          0xc22017, 0x0,     64 * 1024,    128},
  53         {"MX25L12805",          0xc22018, 0x0,     64 * 1024,    256},
  54         {"MX25L12855E",         0xc22618, 0x0,     64 * 1024,    256},
  55 #endif
  56 #ifdef CONFIG_SPI_FLASH_SPANSION        /* SPANSION */
  57         {"S25FL008A",           0x010213, 0x0,     64 * 1024,     16},
  58         {"S25FL016A",           0x010214, 0x0,     64 * 1024,     32},
  59         {"S25FL032A",           0x010215, 0x0,     64 * 1024,     64},
  60         {"S25FL064A",           0x010216, 0x0,     64 * 1024,    128},
  61         {"S25FL128P_256K",      0x012018, 0x0300, 256 * 1024,     64},
  62         {"S25FL128P_64K",       0x012018, 0x0301,  64 * 1024,    256},
  63         {"S25FL032P",           0x010215, 0x4d00,  64 * 1024,     64},
  64         {"S25FL064P",           0x010216, 0x4d00,  64 * 1024,    128},
  65         {"S25FL128S_64K",       0x012018, 0x4d01,  64 * 1024,    256},
  66         {"S25FL256S_64K",       0x010219, 0x4d01,  64 * 1024,    512},
  67         {"S25FL512S_64K",       0x010220, 0x4d01,  64 * 1024,   1024},
  68 #endif
  69 #ifdef CONFIG_SPI_FLASH_STMICRO         /* STMICRO */
  70         {"M25P10",              0x202011, 0x0,     32 * 1024,      4},
  71         {"M25P20",              0x202012, 0x0,     64 * 1024,      4},
  72         {"M25P40",              0x202013, 0x0,     64 * 1024,      8},
  73         {"M25P80",              0x202014, 0x0,     64 * 1024,     16},
  74         {"M25P16",              0x202015, 0x0,     64 * 1024,     32},
  75         {"M25P32",              0x202016, 0x0,     64 * 1024,     64},
  76         {"M25P64",              0x202017, 0x0,     64 * 1024,    128},
  77         {"M25P128",             0x202018, 0x0,    256 * 1024,     64},
  78         {"N25Q32",              0x20ba16, 0x0,     64 * 1024,     64},
  79         {"N25Q32A",             0x20bb16, 0x0,     64 * 1024,     64},
  80         {"N25Q64",              0x20ba17, 0x0,     64 * 1024,    128},
  81         {"N25Q64A",             0x20bb17, 0x0,     64 * 1024,    128},
  82         {"N25Q128",             0x20ba18, 0x0,     64 * 1024,    256},
  83         {"N25Q128A",            0x20bb18, 0x0,     64 * 1024,    256},
  84         {"N25Q256",             0x20ba19, 0x0,     64 * 1024,    512},
  85         {"N25Q256A",            0x20bb19, 0x0,     64 * 1024,    512},
  86         {"N25Q512",             0x20ba20, 0x0,     64 * 1024,   1024},
  87         {"N25Q512A",            0x20bb20, 0x0,     64 * 1024,   1024},
  88         {"N25Q1024",            0x20ba21, 0x0,     64 * 1024,   2048},
  89         {"N25Q1024A",           0x20bb21, 0x0,     64 * 1024,   2048},
  90 #endif
  91 #ifdef CONFIG_SPI_FLASH_SST             /* SST */
  92         {"SST25VF040B",         0xbf258d, 0x0,     64 * 1024,      8},
  93         {"SST25VF080B",         0xbf258e, 0x0,     64 * 1024,     16},
  94         {"SST25VF016B",         0xbf2541, 0x0,     64 * 1024,     32},
  95         {"SST25VF032B",         0xbf254a, 0x0,     64 * 1024,     64},
  96         {"SST25VF064C",         0xbf254b, 0x0,     64 * 1024,    128},
  97         {"SST25WF512",          0xbf2501, 0x0,     64 * 1024,      1},
  98         {"SST25WF010",          0xbf2502, 0x0,     64 * 1024,      2},
  99         {"SST25WF020",          0xbf2503, 0x0,     64 * 1024,      4},
 100         {"SST25WF040",          0xbf2504, 0x0,     64 * 1024,      8},
 101         {"SST25WF080",          0xbf2505, 0x0,     64 * 1024,     16},
 102 #endif
 103 #ifdef CONFIG_SPI_FLASH_WINBOND         /* WINBOND */
 104         {"W25P80",              0xef2014, 0x0,     64 * 1024,     16},
 105         {"W25P16",              0xef2015, 0x0,     64 * 1024,     32},
 106         {"W25P32",              0xef2016, 0x0,     64 * 1024,     64},
 107         {"W25X40",              0xef3013, 0x0,     64 * 1024,      8},
 108         {"W25X16",              0xef3015, 0x0,     64 * 1024,     32},
 109         {"W25X32",              0xef3016, 0x0,     64 * 1024,     64},
 110         {"W25X64",              0xef3017, 0x0,     64 * 1024,    128},
 111         {"W25Q80BL",            0xef4014, 0x0,     64 * 1024,     16},
 112         {"W25Q16CL",            0xef4015, 0x0,     64 * 1024,     32},
 113         {"W25Q32BV",            0xef4016, 0x0,     64 * 1024,     64},
 114         {"W25Q64CV",            0xef4017, 0x0,     64 * 1024,    128},
 115         {"W25Q128BV",           0xef4018, 0x0,     64 * 1024,    256},
 116         {"W25Q256",             0xef4019, 0x0,     64 * 1024,    512},
 117         {"W25Q80BW",            0xef5014, 0x0,     64 * 1024,     16},
 118         {"W25Q16DW",            0xef6015, 0x0,     64 * 1024,     32},
 119         {"W25Q32DW",            0xef6016, 0x0,     64 * 1024,     64},
 120         {"W25Q64DW",            0xef6017, 0x0,     64 * 1024,    128},
 121         {"W25Q128FW",           0xef6018, 0x0,     64 * 1024,    256},
 122 #endif
 123         /*
 124          * Note:
 125          * Below paired flash devices has similar spi_flash_params params.
 126          * (S25FL129P_64K, S25FL128S_64K)
 127          * (W25Q80BL, W25Q80BV)
 128          * (W25Q16CL, W25Q16DV)
 129          * (W25Q32BV, W25Q32FV_SPI)
 130          * (W25Q64CV, W25Q64FV_SPI)
 131          * (W25Q128BV, W25Q128FV_SPI)
 132          * (W25Q32DW, W25Q32FV_QPI)
 133          * (W25Q64DW, W25Q64FV_QPI)
 134          * (W25Q128FW, W25Q128FV_QPI)
 135          */
 136         /*
 137          * TODO:
 138          * ATMEL
 139          * RAMTRON
 140          */
 141 };
 142
 143 struct spi_flash *spi_flash_validate_ids(struct spi_slave *spi, u8 *idcode)
 144 {
 145         const struct spi_flash_params *params;
 146         struct spi_flash *flash;
 147         int i;
 148         u16 jedec = idcode[1] << 8 | idcode[2];
 149         u16 ext_jedec = idcode[3] << 8 | idcode[4];
 150
 151         /* Get the flash id (jedec = manuf_id + dev_id, ext_jedec) */
 152         for (i = 0; i < ARRAY_SIZE(spi_flash_params_table); i++) {
 153                 params = &spi_flash_params_table[i];
 154                 if ((params->jedec >> 16) == idcode[0]) {
 155                         if ((params->jedec & 0xFFFF) == jedec) {
 156                                 if (params->ext_jedec == 0)
 157                                         break;
 158                                 else if (params->ext_jedec == ext_jedec)
 159                                         break;
 160                         }
 161                 }
 162         }
 163
 164         if (i == ARRAY_SIZE(spi_flash_params_table)) {
 165                 printf("SF: Unsupported flash IDs: ");
 166                 printf("manuf %02x, jedec %04x, ext_jedec %04x\n",
 167                        idcode[0], jedec, ext_jedec);
 168                 return NULL;
 169         }
 170
 171         flash = malloc(sizeof(*flash));
 172         if (!flash) {
 173                 debug("SF: Failed to allocate spi_flash\n");
 174                 return NULL;
 175         }
 176         memset(flash, '\0', sizeof(*flash));
 177
 178         flash->spi = spi;
 179         flash->name = params->name;
 180         flash->poll_cmd = CMD_READ_STATUS;
 181
 182         /* Assign spi_flash ops */
 183         flash->write = spi_flash_cmd_write_multi;
 184         flash->erase = spi_flash_cmd_erase;
 185         flash->read = spi_flash_cmd_read_fast;
 186
 187         /* Compute the flash size */
 188         flash->page_size = 256;
 189         flash->sector_size = params->sector_size;
 190         flash->size = flash->sector_size * params->nr_sectors;
 191
 192         return flash;
 193 }
 194
 195 #ifdef CONFIG_SPI_FLASH_BAR
 196 int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0)
 197 {
 198         u8 cmd;
 199         u8 curr_bank = 0;
 200
 201         /* discover bank cmds */
 202         switch (idcode0) {
 203         case SPI_FLASH_SPANSION_IDCODE0:
 204                 flash->bank_read_cmd = CMD_BANKADDR_BRRD;
 205                 flash->bank_write_cmd = CMD_BANKADDR_BRWR;
 206                 break;
 207         case SPI_FLASH_STMICRO_IDCODE0:
 208         case SPI_FLASH_WINBOND_IDCODE0:
 209                 flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
 210                 flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
 211                 break;
 212         default:
 213                 printf("SF: Unsupported bank commands %02x\n", idcode0);
 214                 return -1;
 215         }
 216
 217         /* read the bank reg - on which bank the flash is in currently */
 218         cmd = flash->bank_read_cmd;
 219         if (flash->size > SPI_FLASH_16MB_BOUN) {
 220                 if (spi_flash_read_common(flash, &cmd, 1, &curr_bank, 1)) {
 221                         debug("SF: fail to read bank addr register\n");
 222                         return -1;
 223                 }
 224                 flash->bank_curr = curr_bank;
 225         } else {
 226                 flash->bank_curr = curr_bank;
 227         }
 228
 229         return 0;
 230 }
 231 #endif
 232
 233 #ifdef CONFIG_OF_CONTROL
 234 int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
 235 {
 236         fdt_addr_t addr;
 237         fdt_size_t size;
 238         int node;
 239
 240         /* If there is no node, do nothing */
 241         node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
 242         if (node < 0)
 243                 return 0;
 244
 245         addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
 246         if (addr == FDT_ADDR_T_NONE) {
 247                 debug("%s: Cannot decode address\n", __func__);
 248                 return 0;
 249         }
 250
 251         if (flash->size != size) {
 252                 debug("%s: Memory map must cover entire device\n", __func__);
 253                 return -1;
 254         }
 255         flash->memory_map = (void *)addr;
 256
 257         return 0;
 258 }
 259 #endif /* CONFIG_OF_CONTROL */
 260
 261 struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
 262                 unsigned int max_hz, unsigned int spi_mode)
 263 {
 264         struct spi_slave *spi;
 265         struct spi_flash *flash = NULL;
 266         u8 idcode[5], *idp;
 267         int ret;
 268
 269         /* Setup spi_slave */
 270         spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
 271         if (!spi) {
 272                 printf("SF: Failed to set up slave\n");
 273                 return NULL;
 274         }
 275
 276         /* Claim spi bus */
 277         ret = spi_claim_bus(spi);
 278         if (ret) {
 279                 debug("SF: Failed to claim SPI bus: %d\n", ret);
 280                 goto err_claim_bus;
 281         }
 282
 283         /* Read the ID codes */
 284         ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
 285         if (ret) {
 286                 printf("SF: Failed to get idcodes\n");
 287                 goto err_read_id;
 288         }
 289
 290 #ifdef DEBUG
 291         printf("SF: Got idcodes\n");
 292         print_buffer(0, idcode, 1, sizeof(idcode), 0);
 293 #endif
 294
 295         /* Validate ID's from flash dev table */
 296         idp = idcode;
 297         flash = spi_flash_validate_ids(spi, idp);
 298         if (!flash)
 299                 goto err_read_id;
 300
 301 #ifdef CONFIG_SPI_FLASH_BAR
 302         /* Configure the BAR - discover bank cmds and read current bank  */
 303         ret = spi_flash_bank_config(flash, *idp);
 304         if (ret < 0)
 305                 goto err_read_id;
 306 #endif
 307
 308 #ifdef CONFIG_OF_CONTROL
 309         if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
 310                 debug("SF: FDT decode error\n");
 311                 goto err_read_id;
 312         }
 313 #endif
 314 #ifndef CONFIG_SPL_BUILD
 315         printf("SF: Detected %s with page size ", flash->name);
 316         print_size(flash->sector_size, ", total ");
 317         print_size(flash->size, "");
 318         if (flash->memory_map)
 319                 printf(", mapped at %p", flash->memory_map);
 320         puts("\n");
 321 #endif
 322 #ifndef CONFIG_SPI_FLASH_BAR
 323         if (flash->size > SPI_FLASH_16MB_BOUN) {
 324                 puts("SF: Warning - Only lower 16MiB accessible,");
 325                 puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");
 326         }
 327 #endif
 328
 329         /* Release spi bus */
 330         spi_release_bus(spi);
 331
 332         return flash;
 333
 334 err_read_id:
 335         spi_release_bus(spi);
 336 err_claim_bus:
 337         spi_free_slave(spi);
 338         return NULL;
 339 }
 340
 341 void spi_flash_free(struct spi_flash *flash)
 342 {
 343         spi_free_slave(flash->spi);
 344         free(flash);
 345 }