2 * acenic.c: Linux driver for the Alteon AceNIC Gigabit Ethernet card
3 * and other Tigon based cards.
5 * Copyright 1998-2002 by Jes Sorensen, <jes@trained-monkey.org>.
7 * Thanks to Alteon and 3Com for providing hardware and documentation
8 * enabling me to write this driver.
10 * A mailing list for discussing the use of this driver has been
11 * setup, please subscribe to the lists if you have any questions
12 * about the driver. Send mail to linux-acenic-help@sunsite.auc.dk to
13 * see how to subscribe.
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
21 * Pete Wyckoff <wyckoff@ca.sandia.gov>: Initial Linux/Alpha and trace
22 * dump support. The trace dump support has not been
23 * integrated yet however.
24 * Troy Benjegerdes: Big Endian (PPC) patches.
25 * Nate Stahl: Better out of memory handling and stats support.
26 * Aman Singla: Nasty race between interrupt handler and tx code dealing
27 * with 'testing the tx_ret_csm and setting tx_full'
28 * David S. Miller <davem@redhat.com>: conversion to new PCI dma mapping
29 * infrastructure and Sparc support
30 * Pierrick Pinasseau (CERN): For lending me an Ultra 5 to test the
31 * driver under Linux/Sparc64
32 * Matt Domsch <Matt_Domsch@dell.com>: Detect Alteon 1000baseT cards
33 * ETHTOOL_GDRVINFO support
34 * Chip Salzenberg <chip@valinux.com>: Fix race condition between tx
35 * handler and close() cleanup.
36 * Ken Aaker <kdaaker@rchland.vnet.ibm.com>: Correct check for whether
37 * memory mapped IO is enabled to
38 * make the driver work on RS/6000.
39 * Takayoshi Kouchi <kouchi@hpc.bs1.fc.nec.co.jp>: Identifying problem
40 * where the driver would disable
41 * bus master mode if it had to disable
42 * write and invalidate.
43 * Stephen Hack <stephen_hack@hp.com>: Fixed ace_set_mac_addr for little
45 * Val Henson <vhenson@esscom.com>: Reset Jumbo skb producer and
46 * rx producer index when
47 * flushing the Jumbo ring.
48 * Hans Grobler <grobh@sun.ac.za>: Memory leak fixes in the
50 * Grant Grundler <grundler@cup.hp.com>: PCI write posting fixes.
53 #include <linux/module.h>
54 #include <linux/moduleparam.h>
55 #include <linux/types.h>
56 #include <linux/errno.h>
57 #include <linux/ioport.h>
58 #include <linux/pci.h>
59 #include <linux/dma-mapping.h>
60 #include <linux/kernel.h>
61 #include <linux/netdevice.h>
62 #include <linux/etherdevice.h>
63 #include <linux/skbuff.h>
64 #include <linux/init.h>
65 #include <linux/delay.h>
67 #include <linux/highmem.h>
68 #include <linux/sockios.h>
69 #include <linux/firmware.h>
71 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
72 #include <linux/if_vlan.h>
76 #include <linux/ethtool.h>
82 #include <asm/system.h>
85 #include <asm/byteorder.h>
86 #include <asm/uaccess.h>
89 #define DRV_NAME "acenic"
93 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
94 #define ACE_IS_TIGON_I(ap) 0
95 #define ACE_TX_RING_ENTRIES(ap) MAX_TX_RING_ENTRIES
97 #define ACE_IS_TIGON_I(ap) (ap->version == 1)
98 #define ACE_TX_RING_ENTRIES(ap) ap->tx_ring_entries
101 #ifndef PCI_VENDOR_ID_ALTEON
102 #define PCI_VENDOR_ID_ALTEON 0x12ae
104 #ifndef PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE
105 #define PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE 0x0001
106 #define PCI_DEVICE_ID_ALTEON_ACENIC_COPPER 0x0002
108 #ifndef PCI_DEVICE_ID_3COM_3C985
109 #define PCI_DEVICE_ID_3COM_3C985 0x0001
111 #ifndef PCI_VENDOR_ID_NETGEAR
112 #define PCI_VENDOR_ID_NETGEAR 0x1385
113 #define PCI_DEVICE_ID_NETGEAR_GA620 0x620a
115 #ifndef PCI_DEVICE_ID_NETGEAR_GA620T
116 #define PCI_DEVICE_ID_NETGEAR_GA620T 0x630a
121 * Farallon used the DEC vendor ID by mistake and they seem not
124 #ifndef PCI_DEVICE_ID_FARALLON_PN9000SX
125 #define PCI_DEVICE_ID_FARALLON_PN9000SX 0x1a
127 #ifndef PCI_DEVICE_ID_FARALLON_PN9100T
128 #define PCI_DEVICE_ID_FARALLON_PN9100T 0xfa
130 #ifndef PCI_VENDOR_ID_SGI
131 #define PCI_VENDOR_ID_SGI 0x10a9
133 #ifndef PCI_DEVICE_ID_SGI_ACENIC
134 #define PCI_DEVICE_ID_SGI_ACENIC 0x0009
137 static struct pci_device_id acenic_pci_tbl[] = {
138 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_FIBRE,
139 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
140 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_ALTEON_ACENIC_COPPER,
141 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
142 { PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C985,
143 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
144 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620,
145 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
146 { PCI_VENDOR_ID_NETGEAR, PCI_DEVICE_ID_NETGEAR_GA620T,
147 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
149 * Farallon used the DEC vendor ID on their cards incorrectly,
150 * then later Alteon's ID.
152 { PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_FARALLON_PN9000SX,
153 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
154 { PCI_VENDOR_ID_ALTEON, PCI_DEVICE_ID_FARALLON_PN9100T,
155 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
156 { PCI_VENDOR_ID_SGI, PCI_DEVICE_ID_SGI_ACENIC,
157 PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_NETWORK_ETHERNET << 8, 0xffff00, },
160 MODULE_DEVICE_TABLE(pci, acenic_pci_tbl);
162 #define ace_sync_irq(irq) synchronize_irq(irq)
164 #ifndef offset_in_page
165 #define offset_in_page(ptr) ((unsigned long)(ptr) & ~PAGE_MASK)
168 #define ACE_MAX_MOD_PARMS 8
169 #define BOARD_IDX_STATIC 0
170 #define BOARD_IDX_OVERFLOW -1
172 #if (defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)) && \
173 defined(NETIF_F_HW_VLAN_RX)
174 #define ACENIC_DO_VLAN 1
175 #define ACE_RCB_VLAN_FLAG RCB_FLG_VLAN_ASSIST
177 #define ACENIC_DO_VLAN 0
178 #define ACE_RCB_VLAN_FLAG 0
184 * These must be defined before the firmware is included.
186 #define MAX_TEXT_LEN 96*1024
187 #define MAX_RODATA_LEN 8*1024
188 #define MAX_DATA_LEN 2*1024
190 #ifndef tigon2FwReleaseLocal
191 #define tigon2FwReleaseLocal 0
195 * This driver currently supports Tigon I and Tigon II based cards
196 * including the Alteon AceNIC, the 3Com 3C985[B] and NetGear
197 * GA620. The driver should also work on the SGI, DEC and Farallon
198 * versions of the card, however I have not been able to test that
201 * This card is really neat, it supports receive hardware checksumming
202 * and jumbo frames (up to 9000 bytes) and does a lot of work in the
203 * firmware. Also the programming interface is quite neat, except for
204 * the parts dealing with the i2c eeprom on the card ;-)
206 * Using jumbo frames:
208 * To enable jumbo frames, simply specify an mtu between 1500 and 9000
209 * bytes to ifconfig. Jumbo frames can be enabled or disabled at any time
210 * by running `ifconfig eth<X> mtu <MTU>' with <X> being the Ethernet
211 * interface number and <MTU> being the MTU value.
215 * When compiled as a loadable module, the driver allows for a number
216 * of module parameters to be specified. The driver supports the
217 * following module parameters:
219 * trace=<val> - Firmware trace level. This requires special traced
220 * firmware to replace the firmware supplied with
221 * the driver - for debugging purposes only.
223 * link=<val> - Link state. Normally you want to use the default link
224 * parameters set by the driver. This can be used to
225 * override these in case your switch doesn't negotiate
226 * the link properly. Valid values are:
227 * 0x0001 - Force half duplex link.
228 * 0x0002 - Do not negotiate line speed with the other end.
229 * 0x0010 - 10Mbit/sec link.
230 * 0x0020 - 100Mbit/sec link.
231 * 0x0040 - 1000Mbit/sec link.
232 * 0x0100 - Do not negotiate flow control.
233 * 0x0200 - Enable RX flow control Y
234 * 0x0400 - Enable TX flow control Y (Tigon II NICs only).
235 * Default value is 0x0270, ie. enable link+flow
236 * control negotiation. Negotiating the highest
237 * possible link speed with RX flow control enabled.
239 * When disabling link speed negotiation, only one link
240 * speed is allowed to be specified!
242 * tx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
243 * to wait for more packets to arive before
244 * interrupting the host, from the time the first
247 * rx_coal_tick=<val> - number of coalescing clock ticks (us) allowed
248 * to wait for more packets to arive in the transmit ring,
249 * before interrupting the host, after transmitting the
250 * first packet in the ring.
252 * max_tx_desc=<val> - maximum number of transmit descriptors
253 * (packets) transmitted before interrupting the host.
255 * max_rx_desc=<val> - maximum number of receive descriptors
256 * (packets) received before interrupting the host.
258 * tx_ratio=<val> - 7 bit value (0 - 63) specifying the split in 64th
259 * increments of the NIC's on board memory to be used for
260 * transmit and receive buffers. For the 1MB NIC app. 800KB
261 * is available, on the 1/2MB NIC app. 300KB is available.
262 * 68KB will always be available as a minimum for both
263 * directions. The default value is a 50/50 split.
264 * dis_pci_mem_inval=<val> - disable PCI memory write and invalidate
265 * operations, default (1) is to always disable this as
266 * that is what Alteon does on NT. I have not been able
267 * to measure any real performance differences with
268 * this on my systems. Set <val>=0 if you want to
269 * enable these operations.
271 * If you use more than one NIC, specify the parameters for the
272 * individual NICs with a comma, ie. trace=0,0x00001fff,0 you want to
273 * run tracing on NIC #2 but not on NIC #1 and #3.
277 * - Proper multicast support.
278 * - NIC dump support.
279 * - More tuning parameters.
281 * The mini ring is not used under Linux and I am not sure it makes sense
282 * to actually use it.
284 * New interrupt handler strategy:
286 * The old interrupt handler worked using the traditional method of
287 * replacing an skbuff with a new one when a packet arrives. However
288 * the rx rings do not need to contain a static number of buffer
289 * descriptors, thus it makes sense to move the memory allocation out
290 * of the main interrupt handler and do it in a bottom half handler
291 * and only allocate new buffers when the number of buffers in the
292 * ring is below a certain threshold. In order to avoid starving the
293 * NIC under heavy load it is however necessary to force allocation
294 * when hitting a minimum threshold. The strategy for alloction is as
297 * RX_LOW_BUF_THRES - allocate buffers in the bottom half
298 * RX_PANIC_LOW_THRES - we are very low on buffers, allocate
299 * the buffers in the interrupt handler
300 * RX_RING_THRES - maximum number of buffers in the rx ring
301 * RX_MINI_THRES - maximum number of buffers in the mini ring
302 * RX_JUMBO_THRES - maximum number of buffers in the jumbo ring
304 * One advantagous side effect of this allocation approach is that the
305 * entire rx processing can be done without holding any spin lock
306 * since the rx rings and registers are totally independent of the tx
307 * ring and its registers. This of course includes the kmalloc's of
308 * new skb's. Thus start_xmit can run in parallel with rx processing
309 * and the memory allocation on SMP systems.
311 * Note that running the skb reallocation in a bottom half opens up
312 * another can of races which needs to be handled properly. In
313 * particular it can happen that the interrupt handler tries to run
314 * the reallocation while the bottom half is either running on another
315 * CPU or was interrupted on the same CPU. To get around this the
316 * driver uses bitops to prevent the reallocation routines from being
319 * TX handling can also be done without holding any spin lock, wheee
320 * this is fun! since tx_ret_csm is only written to by the interrupt
321 * handler. The case to be aware of is when shutting down the device
322 * and cleaning up where it is necessary to make sure that
323 * start_xmit() is not running while this is happening. Well DaveM
324 * informs me that this case is already protected against ... bye bye
325 * Mr. Spin Lock, it was nice to know you.
327 * TX interrupts are now partly disabled so the NIC will only generate
328 * TX interrupts for the number of coal ticks, not for the number of
329 * TX packets in the queue. This should reduce the number of TX only,
330 * ie. when no RX processing is done, interrupts seen.
334 * Threshold values for RX buffer allocation - the low water marks for
335 * when to start refilling the rings are set to 75% of the ring
336 * sizes. It seems to make sense to refill the rings entirely from the
337 * intrrupt handler once it gets below the panic threshold, that way
338 * we don't risk that the refilling is moved to another CPU when the
339 * one running the interrupt handler just got the slab code hot in its
342 #define RX_RING_SIZE 72
343 #define RX_MINI_SIZE 64
344 #define RX_JUMBO_SIZE 48
346 #define RX_PANIC_STD_THRES 16
347 #define RX_PANIC_STD_REFILL (3*RX_PANIC_STD_THRES)/2
348 #define RX_LOW_STD_THRES (3*RX_RING_SIZE)/4
349 #define RX_PANIC_MINI_THRES 12
350 #define RX_PANIC_MINI_REFILL (3*RX_PANIC_MINI_THRES)/2
351 #define RX_LOW_MINI_THRES (3*RX_MINI_SIZE)/4
352 #define RX_PANIC_JUMBO_THRES 6
353 #define RX_PANIC_JUMBO_REFILL (3*RX_PANIC_JUMBO_THRES)/2
354 #define RX_LOW_JUMBO_THRES (3*RX_JUMBO_SIZE)/4
358 * Size of the mini ring entries, basically these just should be big
359 * enough to take TCP ACKs
361 #define ACE_MINI_SIZE 100
363 #define ACE_MINI_BUFSIZE ACE_MINI_SIZE
364 #define ACE_STD_BUFSIZE (ACE_STD_MTU + ETH_HLEN + 4)
365 #define ACE_JUMBO_BUFSIZE (ACE_JUMBO_MTU + ETH_HLEN + 4)
368 * There seems to be a magic difference in the effect between 995 and 996
369 * but little difference between 900 and 995 ... no idea why.
371 * There is now a default set of tuning parameters which is set, depending
372 * on whether or not the user enables Jumbo frames. It's assumed that if
373 * Jumbo frames are enabled, the user wants optimal tuning for that case.
375 #define DEF_TX_COAL 400 /* 996 */
376 #define DEF_TX_MAX_DESC 60 /* was 40 */
377 #define DEF_RX_COAL 120 /* 1000 */
378 #define DEF_RX_MAX_DESC 25
379 #define DEF_TX_RATIO 21 /* 24 */
381 #define DEF_JUMBO_TX_COAL 20
382 #define DEF_JUMBO_TX_MAX_DESC 60
383 #define DEF_JUMBO_RX_COAL 30
384 #define DEF_JUMBO_RX_MAX_DESC 6
385 #define DEF_JUMBO_TX_RATIO 21
387 #if tigon2FwReleaseLocal < 20001118
389 * Standard firmware and early modifications duplicate
390 * IRQ load without this flag (coal timer is never reset).
391 * Note that with this flag tx_coal should be less than
392 * time to xmit full tx ring.
393 * 400usec is not so bad for tx ring size of 128.
395 #define TX_COAL_INTS_ONLY 1 /* worth it */
398 * With modified firmware, this is not necessary, but still useful.
400 #define TX_COAL_INTS_ONLY 1
404 #define DEF_STAT (2 * TICKS_PER_SEC)
407 static int link_state[ACE_MAX_MOD_PARMS];
408 static int trace[ACE_MAX_MOD_PARMS];
409 static int tx_coal_tick[ACE_MAX_MOD_PARMS];
410 static int rx_coal_tick[ACE_MAX_MOD_PARMS];
411 static int max_tx_desc[ACE_MAX_MOD_PARMS];
412 static int max_rx_desc[ACE_MAX_MOD_PARMS];
413 static int tx_ratio[ACE_MAX_MOD_PARMS];
414 static int dis_pci_mem_inval[ACE_MAX_MOD_PARMS] = {1, 1, 1, 1, 1, 1, 1, 1};
416 MODULE_AUTHOR("Jes Sorensen <jes@trained-monkey.org>");
417 MODULE_LICENSE("GPL");
418 MODULE_DESCRIPTION("AceNIC/3C985/GA620 Gigabit Ethernet driver");
419 #ifndef CONFIG_ACENIC_OMIT_TIGON_I
420 MODULE_FIRMWARE("acenic/tg1.bin");
422 MODULE_FIRMWARE("acenic/tg2.bin");
424 module_param_array_named(link, link_state, int, NULL, 0);
425 module_param_array(trace, int, NULL, 0);
426 module_param_array(tx_coal_tick, int, NULL, 0);
427 module_param_array(max_tx_desc, int, NULL, 0);
428 module_param_array(rx_coal_tick, int, NULL, 0);
429 module_param_array(max_rx_desc, int, NULL, 0);
430 module_param_array(tx_ratio, int, NULL, 0);
431 MODULE_PARM_DESC(link, "AceNIC/3C985/NetGear link state");
432 MODULE_PARM_DESC(trace, "AceNIC/3C985/NetGear firmware trace level");
433 MODULE_PARM_DESC(tx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first tx descriptor arrives");
434 MODULE_PARM_DESC(max_tx_desc, "AceNIC/3C985/GA620 max number of transmit descriptors to wait");
435 MODULE_PARM_DESC(rx_coal_tick, "AceNIC/3C985/GA620 max clock ticks to wait from first rx descriptor arrives");
436 MODULE_PARM_DESC(max_rx_desc, "AceNIC/3C985/GA620 max number of receive descriptors to wait");
437 MODULE_PARM_DESC(tx_ratio, "AceNIC/3C985/GA620 ratio of NIC memory used for TX/RX descriptors (range 0-63)");
440 static const char version[] __devinitconst =
441 "acenic.c: v0.92 08/05/2002 Jes Sorensen, linux-acenic@SunSITE.dk\n"
442 " http://home.cern.ch/~jes/gige/acenic.html\n";
444 static int ace_get_settings(struct net_device *, struct ethtool_cmd *);
445 static int ace_set_settings(struct net_device *, struct ethtool_cmd *);
446 static void ace_get_drvinfo(struct net_device *, struct ethtool_drvinfo *);
448 static const struct ethtool_ops ace_ethtool_ops = {
449 .get_settings = ace_get_settings,
450 .set_settings = ace_set_settings,
451 .get_drvinfo = ace_get_drvinfo,
454 static void ace_watchdog(struct net_device *dev);
456 static const struct net_device_ops ace_netdev_ops = {
457 .ndo_open = ace_open,
458 .ndo_stop = ace_close,
459 .ndo_tx_timeout = ace_watchdog,
460 .ndo_get_stats = ace_get_stats,
461 .ndo_start_xmit = ace_start_xmit,
462 .ndo_set_multicast_list = ace_set_multicast_list,
463 .ndo_validate_addr = eth_validate_addr,
464 .ndo_set_mac_address = ace_set_mac_addr,
465 .ndo_change_mtu = ace_change_mtu,
467 .ndo_vlan_rx_register = ace_vlan_rx_register,
471 static int __devinit acenic_probe_one(struct pci_dev *pdev,
472 const struct pci_device_id *id)
474 struct net_device *dev;
475 struct ace_private *ap;
476 static int boards_found;
478 dev = alloc_etherdev(sizeof(struct ace_private));
480 printk(KERN_ERR "acenic: Unable to allocate "
481 "net_device structure!\n");
485 SET_NETDEV_DEV(dev, &pdev->dev);
487 ap = netdev_priv(dev);
489 ap->name = pci_name(pdev);
491 dev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
493 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
496 dev->watchdog_timeo = 5*HZ;
498 dev->netdev_ops = &ace_netdev_ops;
499 SET_ETHTOOL_OPS(dev, &ace_ethtool_ops);
501 /* we only display this string ONCE */
505 if (pci_enable_device(pdev))
506 goto fail_free_netdev;
509 * Enable master mode before we start playing with the
510 * pci_command word since pci_set_master() will modify
513 pci_set_master(pdev);
515 pci_read_config_word(pdev, PCI_COMMAND, &ap->pci_command);
517 /* OpenFirmware on Mac's does not set this - DOH.. */
518 if (!(ap->pci_command & PCI_COMMAND_MEMORY)) {
519 printk(KERN_INFO "%s: Enabling PCI Memory Mapped "
520 "access - was not enabled by BIOS/Firmware\n",
522 ap->pci_command = ap->pci_command | PCI_COMMAND_MEMORY;
523 pci_write_config_word(ap->pdev, PCI_COMMAND,
528 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &ap->pci_latency);
529 if (ap->pci_latency <= 0x40) {
530 ap->pci_latency = 0x40;
531 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, ap->pci_latency);
535 * Remap the regs into kernel space - this is abuse of
536 * dev->base_addr since it was means for I/O port
537 * addresses but who gives a damn.
539 dev->base_addr = pci_resource_start(pdev, 0);
540 ap->regs = ioremap(dev->base_addr, 0x4000);
542 printk(KERN_ERR "%s: Unable to map I/O register, "
543 "AceNIC %i will be disabled.\n",
544 ap->name, boards_found);
545 goto fail_free_netdev;
548 switch(pdev->vendor) {
549 case PCI_VENDOR_ID_ALTEON:
550 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9100T) {
551 printk(KERN_INFO "%s: Farallon PN9100-T ",
554 printk(KERN_INFO "%s: Alteon AceNIC ",
558 case PCI_VENDOR_ID_3COM:
559 printk(KERN_INFO "%s: 3Com 3C985 ", ap->name);
561 case PCI_VENDOR_ID_NETGEAR:
562 printk(KERN_INFO "%s: NetGear GA620 ", ap->name);
564 case PCI_VENDOR_ID_DEC:
565 if (pdev->device == PCI_DEVICE_ID_FARALLON_PN9000SX) {
566 printk(KERN_INFO "%s: Farallon PN9000-SX ",
570 case PCI_VENDOR_ID_SGI:
571 printk(KERN_INFO "%s: SGI AceNIC ", ap->name);
574 printk(KERN_INFO "%s: Unknown AceNIC ", ap->name);
578 printk("Gigabit Ethernet at 0x%08lx, ", dev->base_addr);
579 printk("irq %d\n", pdev->irq);
581 #ifdef CONFIG_ACENIC_OMIT_TIGON_I
582 if ((readl(&ap->regs->HostCtrl) >> 28) == 4) {
583 printk(KERN_ERR "%s: Driver compiled without Tigon I"
584 " support - NIC disabled\n", dev->name);
589 if (ace_allocate_descriptors(dev))
590 goto fail_free_netdev;
593 if (boards_found >= ACE_MAX_MOD_PARMS)
594 ap->board_idx = BOARD_IDX_OVERFLOW;
596 ap->board_idx = boards_found;
598 ap->board_idx = BOARD_IDX_STATIC;
602 goto fail_free_netdev;
604 if (register_netdev(dev)) {
605 printk(KERN_ERR "acenic: device registration failed\n");
608 ap->name = dev->name;
610 if (ap->pci_using_dac)
611 dev->features |= NETIF_F_HIGHDMA;
613 pci_set_drvdata(pdev, dev);
619 ace_init_cleanup(dev);
625 static void __devexit acenic_remove_one(struct pci_dev *pdev)
627 struct net_device *dev = pci_get_drvdata(pdev);
628 struct ace_private *ap = netdev_priv(dev);
629 struct ace_regs __iomem *regs = ap->regs;
632 unregister_netdev(dev);
634 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
635 if (ap->version >= 2)
636 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
639 * This clears any pending interrupts
641 writel(1, ®s->Mb0Lo);
642 readl(®s->CpuCtrl); /* flush */
645 * Make sure no other CPUs are processing interrupts
646 * on the card before the buffers are being released.
647 * Otherwise one might experience some `interesting'
650 * Then release the RX buffers - jumbo buffers were
651 * already released in ace_close().
653 ace_sync_irq(dev->irq);
655 for (i = 0; i < RX_STD_RING_ENTRIES; i++) {
656 struct sk_buff *skb = ap->skb->rx_std_skbuff[i].skb;
659 struct ring_info *ringp;
662 ringp = &ap->skb->rx_std_skbuff[i];
663 mapping = pci_unmap_addr(ringp, mapping);
664 pci_unmap_page(ap->pdev, mapping,
668 ap->rx_std_ring[i].size = 0;
669 ap->skb->rx_std_skbuff[i].skb = NULL;
674 if (ap->version >= 2) {
675 for (i = 0; i < RX_MINI_RING_ENTRIES; i++) {
676 struct sk_buff *skb = ap->skb->rx_mini_skbuff[i].skb;
679 struct ring_info *ringp;
682 ringp = &ap->skb->rx_mini_skbuff[i];
683 mapping = pci_unmap_addr(ringp,mapping);
684 pci_unmap_page(ap->pdev, mapping,
688 ap->rx_mini_ring[i].size = 0;
689 ap->skb->rx_mini_skbuff[i].skb = NULL;
695 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
696 struct sk_buff *skb = ap->skb->rx_jumbo_skbuff[i].skb;
698 struct ring_info *ringp;
701 ringp = &ap->skb->rx_jumbo_skbuff[i];
702 mapping = pci_unmap_addr(ringp, mapping);
703 pci_unmap_page(ap->pdev, mapping,
707 ap->rx_jumbo_ring[i].size = 0;
708 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
713 ace_init_cleanup(dev);
717 static struct pci_driver acenic_pci_driver = {
719 .id_table = acenic_pci_tbl,
720 .probe = acenic_probe_one,
721 .remove = __devexit_p(acenic_remove_one),
724 static int __init acenic_init(void)
726 return pci_register_driver(&acenic_pci_driver);
729 static void __exit acenic_exit(void)
731 pci_unregister_driver(&acenic_pci_driver);
734 module_init(acenic_init);
735 module_exit(acenic_exit);
737 static void ace_free_descriptors(struct net_device *dev)
739 struct ace_private *ap = netdev_priv(dev);
742 if (ap->rx_std_ring != NULL) {
743 size = (sizeof(struct rx_desc) *
744 (RX_STD_RING_ENTRIES +
745 RX_JUMBO_RING_ENTRIES +
746 RX_MINI_RING_ENTRIES +
747 RX_RETURN_RING_ENTRIES));
748 pci_free_consistent(ap->pdev, size, ap->rx_std_ring,
749 ap->rx_ring_base_dma);
750 ap->rx_std_ring = NULL;
751 ap->rx_jumbo_ring = NULL;
752 ap->rx_mini_ring = NULL;
753 ap->rx_return_ring = NULL;
755 if (ap->evt_ring != NULL) {
756 size = (sizeof(struct event) * EVT_RING_ENTRIES);
757 pci_free_consistent(ap->pdev, size, ap->evt_ring,
761 if (ap->tx_ring != NULL && !ACE_IS_TIGON_I(ap)) {
762 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
763 pci_free_consistent(ap->pdev, size, ap->tx_ring,
768 if (ap->evt_prd != NULL) {
769 pci_free_consistent(ap->pdev, sizeof(u32),
770 (void *)ap->evt_prd, ap->evt_prd_dma);
773 if (ap->rx_ret_prd != NULL) {
774 pci_free_consistent(ap->pdev, sizeof(u32),
775 (void *)ap->rx_ret_prd,
777 ap->rx_ret_prd = NULL;
779 if (ap->tx_csm != NULL) {
780 pci_free_consistent(ap->pdev, sizeof(u32),
781 (void *)ap->tx_csm, ap->tx_csm_dma);
787 static int ace_allocate_descriptors(struct net_device *dev)
789 struct ace_private *ap = netdev_priv(dev);
792 size = (sizeof(struct rx_desc) *
793 (RX_STD_RING_ENTRIES +
794 RX_JUMBO_RING_ENTRIES +
795 RX_MINI_RING_ENTRIES +
796 RX_RETURN_RING_ENTRIES));
798 ap->rx_std_ring = pci_alloc_consistent(ap->pdev, size,
799 &ap->rx_ring_base_dma);
800 if (ap->rx_std_ring == NULL)
803 ap->rx_jumbo_ring = ap->rx_std_ring + RX_STD_RING_ENTRIES;
804 ap->rx_mini_ring = ap->rx_jumbo_ring + RX_JUMBO_RING_ENTRIES;
805 ap->rx_return_ring = ap->rx_mini_ring + RX_MINI_RING_ENTRIES;
807 size = (sizeof(struct event) * EVT_RING_ENTRIES);
809 ap->evt_ring = pci_alloc_consistent(ap->pdev, size, &ap->evt_ring_dma);
811 if (ap->evt_ring == NULL)
815 * Only allocate a host TX ring for the Tigon II, the Tigon I
816 * has to use PCI registers for this ;-(
818 if (!ACE_IS_TIGON_I(ap)) {
819 size = (sizeof(struct tx_desc) * MAX_TX_RING_ENTRIES);
821 ap->tx_ring = pci_alloc_consistent(ap->pdev, size,
824 if (ap->tx_ring == NULL)
828 ap->evt_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
830 if (ap->evt_prd == NULL)
833 ap->rx_ret_prd = pci_alloc_consistent(ap->pdev, sizeof(u32),
834 &ap->rx_ret_prd_dma);
835 if (ap->rx_ret_prd == NULL)
838 ap->tx_csm = pci_alloc_consistent(ap->pdev, sizeof(u32),
840 if (ap->tx_csm == NULL)
847 ace_init_cleanup(dev);
853 * Generic cleanup handling data allocated during init. Used when the
854 * module is unloaded or if an error occurs during initialization
856 static void ace_init_cleanup(struct net_device *dev)
858 struct ace_private *ap;
860 ap = netdev_priv(dev);
862 ace_free_descriptors(dev);
865 pci_free_consistent(ap->pdev, sizeof(struct ace_info),
866 ap->info, ap->info_dma);
868 kfree(ap->trace_buf);
871 free_irq(dev->irq, dev);
878 * Commands are considered to be slow.
880 static inline void ace_issue_cmd(struct ace_regs __iomem *regs, struct cmd *cmd)
884 idx = readl(®s->CmdPrd);
886 writel(*(u32 *)(cmd), ®s->CmdRng[idx]);
887 idx = (idx + 1) % CMD_RING_ENTRIES;
889 writel(idx, ®s->CmdPrd);
893 static int __devinit ace_init(struct net_device *dev)
895 struct ace_private *ap;
896 struct ace_regs __iomem *regs;
897 struct ace_info *info = NULL;
898 struct pci_dev *pdev;
901 u32 tig_ver, mac1, mac2, tmp, pci_state;
902 int board_idx, ecode = 0;
904 unsigned char cache_size;
906 ap = netdev_priv(dev);
909 board_idx = ap->board_idx;
912 * aman@sgi.com - its useful to do a NIC reset here to
913 * address the `Firmware not running' problem subsequent
914 * to any crashes involving the NIC
916 writel(HW_RESET | (HW_RESET << 24), ®s->HostCtrl);
917 readl(®s->HostCtrl); /* PCI write posting */
921 * Don't access any other registers before this point!
925 * This will most likely need BYTE_SWAP once we switch
926 * to using __raw_writel()
928 writel((WORD_SWAP | CLR_INT | ((WORD_SWAP | CLR_INT) << 24)),
931 writel((CLR_INT | WORD_SWAP | ((CLR_INT | WORD_SWAP) << 24)),
934 readl(®s->HostCtrl); /* PCI write posting */
937 * Stop the NIC CPU and clear pending interrupts
939 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
940 readl(®s->CpuCtrl); /* PCI write posting */
941 writel(0, ®s->Mb0Lo);
943 tig_ver = readl(®s->HostCtrl) >> 28;
946 #ifndef CONFIG_ACENIC_OMIT_TIGON_I
949 printk(KERN_INFO " Tigon I (Rev. %i), Firmware: %i.%i.%i, ",
950 tig_ver, ap->firmware_major, ap->firmware_minor,
952 writel(0, ®s->LocalCtrl);
954 ap->tx_ring_entries = TIGON_I_TX_RING_ENTRIES;
958 printk(KERN_INFO " Tigon II (Rev. %i), Firmware: %i.%i.%i, ",
959 tig_ver, ap->firmware_major, ap->firmware_minor,
961 writel(readl(®s->CpuBCtrl) | CPU_HALT, ®s->CpuBCtrl);
962 readl(®s->CpuBCtrl); /* PCI write posting */
964 * The SRAM bank size does _not_ indicate the amount
965 * of memory on the card, it controls the _bank_ size!
966 * Ie. a 1MB AceNIC will have two banks of 512KB.
968 writel(SRAM_BANK_512K, ®s->LocalCtrl);
969 writel(SYNC_SRAM_TIMING, ®s->MiscCfg);
971 ap->tx_ring_entries = MAX_TX_RING_ENTRIES;
974 printk(KERN_WARNING " Unsupported Tigon version detected "
981 * ModeStat _must_ be set after the SRAM settings as this change
982 * seems to corrupt the ModeStat and possible other registers.
983 * The SRAM settings survive resets and setting it to the same
984 * value a second time works as well. This is what caused the
985 * `Firmware not running' problem on the Tigon II.
988 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL | ACE_BYTE_SWAP_BD |
989 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
991 writel(ACE_BYTE_SWAP_DMA | ACE_WARN | ACE_FATAL |
992 ACE_WORD_SWAP_BD | ACE_NO_JUMBO_FRAG, ®s->ModeStat);
994 readl(®s->ModeStat); /* PCI write posting */
997 for(i = 0; i < 4; i++) {
1001 t = read_eeprom_byte(dev, 0x8c+i);
1009 for(i = 4; i < 8; i++) {
1013 t = read_eeprom_byte(dev, 0x8c+i);
1021 writel(mac1, ®s->MacAddrHi);
1022 writel(mac2, ®s->MacAddrLo);
1024 dev->dev_addr[0] = (mac1 >> 8) & 0xff;
1025 dev->dev_addr[1] = mac1 & 0xff;
1026 dev->dev_addr[2] = (mac2 >> 24) & 0xff;
1027 dev->dev_addr[3] = (mac2 >> 16) & 0xff;
1028 dev->dev_addr[4] = (mac2 >> 8) & 0xff;
1029 dev->dev_addr[5] = mac2 & 0xff;
1031 printk("MAC: %pM\n", dev->dev_addr);
1034 * Looks like this is necessary to deal with on all architectures,
1035 * even this %$#%$# N440BX Intel based thing doesn't get it right.
1036 * Ie. having two NICs in the machine, one will have the cache
1037 * line set at boot time, the other will not.
1040 pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &cache_size);
1042 if (cache_size != SMP_CACHE_BYTES) {
1043 printk(KERN_INFO " PCI cache line size set incorrectly "
1044 "(%i bytes) by BIOS/FW, ", cache_size);
1045 if (cache_size > SMP_CACHE_BYTES)
1046 printk("expecting %i\n", SMP_CACHE_BYTES);
1048 printk("correcting to %i\n", SMP_CACHE_BYTES);
1049 pci_write_config_byte(pdev, PCI_CACHE_LINE_SIZE,
1050 SMP_CACHE_BYTES >> 2);
1054 pci_state = readl(®s->PciState);
1055 printk(KERN_INFO " PCI bus width: %i bits, speed: %iMHz, "
1056 "latency: %i clks\n",
1057 (pci_state & PCI_32BIT) ? 32 : 64,
1058 (pci_state & PCI_66MHZ) ? 66 : 33,
1062 * Set the max DMA transfer size. Seems that for most systems
1063 * the performance is better when no MAX parameter is
1064 * set. However for systems enabling PCI write and invalidate,
1065 * DMA writes must be set to the L1 cache line size to get
1066 * optimal performance.
1068 * The default is now to turn the PCI write and invalidate off
1069 * - that is what Alteon does for NT.
1071 tmp = READ_CMD_MEM | WRITE_CMD_MEM;
1072 if (ap->version >= 2) {
1073 tmp |= (MEM_READ_MULTIPLE | (pci_state & PCI_66MHZ));
1075 * Tuning parameters only supported for 8 cards
1077 if (board_idx == BOARD_IDX_OVERFLOW ||
1078 dis_pci_mem_inval[board_idx]) {
1079 if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1080 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1081 pci_write_config_word(pdev, PCI_COMMAND,
1083 printk(KERN_INFO " Disabling PCI memory "
1084 "write and invalidate\n");
1086 } else if (ap->pci_command & PCI_COMMAND_INVALIDATE) {
1087 printk(KERN_INFO " PCI memory write & invalidate "
1088 "enabled by BIOS, enabling counter measures\n");
1090 switch(SMP_CACHE_BYTES) {
1092 tmp |= DMA_WRITE_MAX_16;
1095 tmp |= DMA_WRITE_MAX_32;
1098 tmp |= DMA_WRITE_MAX_64;
1101 tmp |= DMA_WRITE_MAX_128;
1104 printk(KERN_INFO " Cache line size %i not "
1105 "supported, PCI write and invalidate "
1106 "disabled\n", SMP_CACHE_BYTES);
1107 ap->pci_command &= ~PCI_COMMAND_INVALIDATE;
1108 pci_write_config_word(pdev, PCI_COMMAND,
1116 * On this platform, we know what the best dma settings
1117 * are. We use 64-byte maximum bursts, because if we
1118 * burst larger than the cache line size (or even cross
1119 * a 64byte boundary in a single burst) the UltraSparc
1120 * PCI controller will disconnect at 64-byte multiples.
1122 * Read-multiple will be properly enabled above, and when
1123 * set will give the PCI controller proper hints about
1126 tmp &= ~DMA_READ_WRITE_MASK;
1127 tmp |= DMA_READ_MAX_64;
1128 tmp |= DMA_WRITE_MAX_64;
1131 tmp &= ~DMA_READ_WRITE_MASK;
1132 tmp |= DMA_READ_MAX_128;
1134 * All the docs say MUST NOT. Well, I did.
1135 * Nothing terrible happens, if we load wrong size.
1136 * Bit w&i still works better!
1138 tmp |= DMA_WRITE_MAX_128;
1140 writel(tmp, ®s->PciState);
1144 * The Host PCI bus controller driver has to set FBB.
1145 * If all devices on that PCI bus support FBB, then the controller
1146 * can enable FBB support in the Host PCI Bus controller (or on
1147 * the PCI-PCI bridge if that applies).
1151 * I have received reports from people having problems when this
1154 if (!(ap->pci_command & PCI_COMMAND_FAST_BACK)) {
1155 printk(KERN_INFO " Enabling PCI Fast Back to Back\n");
1156 ap->pci_command |= PCI_COMMAND_FAST_BACK;
1157 pci_write_config_word(pdev, PCI_COMMAND, ap->pci_command);
1162 * Configure DMA attributes.
1164 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
1165 ap->pci_using_dac = 1;
1166 } else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
1167 ap->pci_using_dac = 0;
1174 * Initialize the generic info block and the command+event rings
1175 * and the control blocks for the transmit and receive rings
1176 * as they need to be setup once and for all.
1178 if (!(info = pci_alloc_consistent(ap->pdev, sizeof(struct ace_info),
1186 * Get the memory for the skb rings.
1188 if (!(ap->skb = kmalloc(sizeof(struct ace_skb), GFP_KERNEL))) {
1193 ecode = request_irq(pdev->irq, ace_interrupt, IRQF_SHARED,
1196 printk(KERN_WARNING "%s: Requested IRQ %d is busy\n",
1197 DRV_NAME, pdev->irq);
1200 dev->irq = pdev->irq;
1203 spin_lock_init(&ap->debug_lock);
1204 ap->last_tx = ACE_TX_RING_ENTRIES(ap) - 1;
1205 ap->last_std_rx = 0;
1206 ap->last_mini_rx = 0;
1209 memset(ap->info, 0, sizeof(struct ace_info));
1210 memset(ap->skb, 0, sizeof(struct ace_skb));
1212 if (ace_load_firmware(dev))
1217 tmp_ptr = ap->info_dma;
1218 writel(tmp_ptr >> 32, ®s->InfoPtrHi);
1219 writel(tmp_ptr & 0xffffffff, ®s->InfoPtrLo);
1221 memset(ap->evt_ring, 0, EVT_RING_ENTRIES * sizeof(struct event));
1223 set_aceaddr(&info->evt_ctrl.rngptr, ap->evt_ring_dma);
1224 info->evt_ctrl.flags = 0;
1228 set_aceaddr(&info->evt_prd_ptr, ap->evt_prd_dma);
1229 writel(0, ®s->EvtCsm);
1231 set_aceaddr(&info->cmd_ctrl.rngptr, 0x100);
1232 info->cmd_ctrl.flags = 0;
1233 info->cmd_ctrl.max_len = 0;
1235 for (i = 0; i < CMD_RING_ENTRIES; i++)
1236 writel(0, ®s->CmdRng[i]);
1238 writel(0, ®s->CmdPrd);
1239 writel(0, ®s->CmdCsm);
1241 tmp_ptr = ap->info_dma;
1242 tmp_ptr += (unsigned long) &(((struct ace_info *)0)->s.stats);
1243 set_aceaddr(&info->stats2_ptr, (dma_addr_t) tmp_ptr);
1245 set_aceaddr(&info->rx_std_ctrl.rngptr, ap->rx_ring_base_dma);
1246 info->rx_std_ctrl.max_len = ACE_STD_BUFSIZE;
1247 info->rx_std_ctrl.flags =
1248 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1250 memset(ap->rx_std_ring, 0,
1251 RX_STD_RING_ENTRIES * sizeof(struct rx_desc));
1253 for (i = 0; i < RX_STD_RING_ENTRIES; i++)
1254 ap->rx_std_ring[i].flags = BD_FLG_TCP_UDP_SUM;
1256 ap->rx_std_skbprd = 0;
1257 atomic_set(&ap->cur_rx_bufs, 0);
1259 set_aceaddr(&info->rx_jumbo_ctrl.rngptr,
1260 (ap->rx_ring_base_dma +
1261 (sizeof(struct rx_desc) * RX_STD_RING_ENTRIES)));
1262 info->rx_jumbo_ctrl.max_len = 0;
1263 info->rx_jumbo_ctrl.flags =
1264 RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1266 memset(ap->rx_jumbo_ring, 0,
1267 RX_JUMBO_RING_ENTRIES * sizeof(struct rx_desc));
1269 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++)
1270 ap->rx_jumbo_ring[i].flags = BD_FLG_TCP_UDP_SUM | BD_FLG_JUMBO;
1272 ap->rx_jumbo_skbprd = 0;
1273 atomic_set(&ap->cur_jumbo_bufs, 0);
1275 memset(ap->rx_mini_ring, 0,
1276 RX_MINI_RING_ENTRIES * sizeof(struct rx_desc));
1278 if (ap->version >= 2) {
1279 set_aceaddr(&info->rx_mini_ctrl.rngptr,
1280 (ap->rx_ring_base_dma +
1281 (sizeof(struct rx_desc) *
1282 (RX_STD_RING_ENTRIES +
1283 RX_JUMBO_RING_ENTRIES))));
1284 info->rx_mini_ctrl.max_len = ACE_MINI_SIZE;
1285 info->rx_mini_ctrl.flags =
1286 RCB_FLG_TCP_UDP_SUM|RCB_FLG_NO_PSEUDO_HDR|ACE_RCB_VLAN_FLAG;
1288 for (i = 0; i < RX_MINI_RING_ENTRIES; i++)
1289 ap->rx_mini_ring[i].flags =
1290 BD_FLG_TCP_UDP_SUM | BD_FLG_MINI;
1292 set_aceaddr(&info->rx_mini_ctrl.rngptr, 0);
1293 info->rx_mini_ctrl.flags = RCB_FLG_RNG_DISABLE;
1294 info->rx_mini_ctrl.max_len = 0;
1297 ap->rx_mini_skbprd = 0;
1298 atomic_set(&ap->cur_mini_bufs, 0);
1300 set_aceaddr(&info->rx_return_ctrl.rngptr,
1301 (ap->rx_ring_base_dma +
1302 (sizeof(struct rx_desc) *
1303 (RX_STD_RING_ENTRIES +
1304 RX_JUMBO_RING_ENTRIES +
1305 RX_MINI_RING_ENTRIES))));
1306 info->rx_return_ctrl.flags = 0;
1307 info->rx_return_ctrl.max_len = RX_RETURN_RING_ENTRIES;
1309 memset(ap->rx_return_ring, 0,
1310 RX_RETURN_RING_ENTRIES * sizeof(struct rx_desc));
1312 set_aceaddr(&info->rx_ret_prd_ptr, ap->rx_ret_prd_dma);
1313 *(ap->rx_ret_prd) = 0;
1315 writel(TX_RING_BASE, ®s->WinBase);
1317 if (ACE_IS_TIGON_I(ap)) {
1318 ap->tx_ring = (__force struct tx_desc *) regs->Window;
1319 for (i = 0; i < (TIGON_I_TX_RING_ENTRIES
1320 * sizeof(struct tx_desc)) / sizeof(u32); i++)
1321 writel(0, (__force void __iomem *)ap->tx_ring + i * 4);
1323 set_aceaddr(&info->tx_ctrl.rngptr, TX_RING_BASE);
1325 memset(ap->tx_ring, 0,
1326 MAX_TX_RING_ENTRIES * sizeof(struct tx_desc));
1328 set_aceaddr(&info->tx_ctrl.rngptr, ap->tx_ring_dma);
1331 info->tx_ctrl.max_len = ACE_TX_RING_ENTRIES(ap);
1332 tmp = RCB_FLG_TCP_UDP_SUM | RCB_FLG_NO_PSEUDO_HDR | ACE_RCB_VLAN_FLAG;
1335 * The Tigon I does not like having the TX ring in host memory ;-(
1337 if (!ACE_IS_TIGON_I(ap))
1338 tmp |= RCB_FLG_TX_HOST_RING;
1339 #if TX_COAL_INTS_ONLY
1340 tmp |= RCB_FLG_COAL_INT_ONLY;
1342 info->tx_ctrl.flags = tmp;
1344 set_aceaddr(&info->tx_csm_ptr, ap->tx_csm_dma);
1347 * Potential item for tuning parameter
1350 writel(DMA_THRESH_16W, ®s->DmaReadCfg);
1351 writel(DMA_THRESH_16W, ®s->DmaWriteCfg);
1353 writel(DMA_THRESH_8W, ®s->DmaReadCfg);
1354 writel(DMA_THRESH_8W, ®s->DmaWriteCfg);
1357 writel(0, ®s->MaskInt);
1358 writel(1, ®s->IfIdx);
1361 * McKinley boxes do not like us fiddling with AssistState
1364 writel(1, ®s->AssistState);
1367 writel(DEF_STAT, ®s->TuneStatTicks);
1368 writel(DEF_TRACE, ®s->TuneTrace);
1370 ace_set_rxtx_parms(dev, 0);
1372 if (board_idx == BOARD_IDX_OVERFLOW) {
1373 printk(KERN_WARNING "%s: more than %i NICs detected, "
1374 "ignoring module parameters!\n",
1375 ap->name, ACE_MAX_MOD_PARMS);
1376 } else if (board_idx >= 0) {
1377 if (tx_coal_tick[board_idx])
1378 writel(tx_coal_tick[board_idx],
1379 ®s->TuneTxCoalTicks);
1380 if (max_tx_desc[board_idx])
1381 writel(max_tx_desc[board_idx], ®s->TuneMaxTxDesc);
1383 if (rx_coal_tick[board_idx])
1384 writel(rx_coal_tick[board_idx],
1385 ®s->TuneRxCoalTicks);
1386 if (max_rx_desc[board_idx])
1387 writel(max_rx_desc[board_idx], ®s->TuneMaxRxDesc);
1389 if (trace[board_idx])
1390 writel(trace[board_idx], ®s->TuneTrace);
1392 if ((tx_ratio[board_idx] > 0) && (tx_ratio[board_idx] < 64))
1393 writel(tx_ratio[board_idx], ®s->TxBufRat);
1397 * Default link parameters
1399 tmp = LNK_ENABLE | LNK_FULL_DUPLEX | LNK_1000MB | LNK_100MB |
1400 LNK_10MB | LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL | LNK_NEGOTIATE;
1401 if(ap->version >= 2)
1402 tmp |= LNK_TX_FLOW_CTL_Y;
1405 * Override link default parameters
1407 if ((board_idx >= 0) && link_state[board_idx]) {
1408 int option = link_state[board_idx];
1412 if (option & 0x01) {
1413 printk(KERN_INFO "%s: Setting half duplex link\n",
1415 tmp &= ~LNK_FULL_DUPLEX;
1418 tmp &= ~LNK_NEGOTIATE;
1425 if ((option & 0x70) == 0) {
1426 printk(KERN_WARNING "%s: No media speed specified, "
1427 "forcing auto negotiation\n", ap->name);
1428 tmp |= LNK_NEGOTIATE | LNK_1000MB |
1429 LNK_100MB | LNK_10MB;
1431 if ((option & 0x100) == 0)
1432 tmp |= LNK_NEG_FCTL;
1434 printk(KERN_INFO "%s: Disabling flow control "
1435 "negotiation\n", ap->name);
1437 tmp |= LNK_RX_FLOW_CTL_Y;
1438 if ((option & 0x400) && (ap->version >= 2)) {
1439 printk(KERN_INFO "%s: Enabling TX flow control\n",
1441 tmp |= LNK_TX_FLOW_CTL_Y;
1446 writel(tmp, ®s->TuneLink);
1447 if (ap->version >= 2)
1448 writel(tmp, ®s->TuneFastLink);
1450 writel(ap->firmware_start, ®s->Pc);
1452 writel(0, ®s->Mb0Lo);
1455 * Set tx_csm before we start receiving interrupts, otherwise
1456 * the interrupt handler might think it is supposed to process
1457 * tx ints before we are up and running, which may cause a null
1458 * pointer access in the int handler.
1461 ap->tx_prd = *(ap->tx_csm) = ap->tx_ret_csm = 0;
1464 ace_set_txprd(regs, ap, 0);
1465 writel(0, ®s->RxRetCsm);
1468 * Enable DMA engine now.
1469 * If we do this sooner, Mckinley box pukes.
1470 * I assume it's because Tigon II DMA engine wants to check
1471 * *something* even before the CPU is started.
1473 writel(1, ®s->AssistState); /* enable DMA */
1478 writel(readl(®s->CpuCtrl) & ~(CPU_HALT|CPU_TRACE), ®s->CpuCtrl);
1479 readl(®s->CpuCtrl);
1482 * Wait for the firmware to spin up - max 3 seconds.
1484 myjif = jiffies + 3 * HZ;
1485 while (time_before(jiffies, myjif) && !ap->fw_running)
1488 if (!ap->fw_running) {
1489 printk(KERN_ERR "%s: Firmware NOT running!\n", ap->name);
1492 writel(readl(®s->CpuCtrl) | CPU_HALT, ®s->CpuCtrl);
1493 readl(®s->CpuCtrl);
1495 /* aman@sgi.com - account for badly behaving firmware/NIC:
1496 * - have observed that the NIC may continue to generate
1497 * interrupts for some reason; attempt to stop it - halt
1498 * second CPU for Tigon II cards, and also clear Mb0
1499 * - if we're a module, we'll fail to load if this was
1500 * the only GbE card in the system => if the kernel does
1501 * see an interrupt from the NIC, code to handle it is
1502 * gone and OOps! - so free_irq also
1504 if (ap->version >= 2)
1505 writel(readl(®s->CpuBCtrl) | CPU_HALT,
1507 writel(0, ®s->Mb0Lo);
1508 readl(®s->Mb0Lo);
1515 * We load the ring here as there seem to be no way to tell the
1516 * firmware to wipe the ring without re-initializing it.
1518 if (!test_and_set_bit(0, &ap->std_refill_busy))
1519 ace_load_std_rx_ring(ap, RX_RING_SIZE);
1521 printk(KERN_ERR "%s: Someone is busy refilling the RX ring\n",
1523 if (ap->version >= 2) {
1524 if (!test_and_set_bit(0, &ap->mini_refill_busy))
1525 ace_load_mini_rx_ring(ap, RX_MINI_SIZE);
1527 printk(KERN_ERR "%s: Someone is busy refilling "
1528 "the RX mini ring\n", ap->name);
1533 ace_init_cleanup(dev);
1538 static void ace_set_rxtx_parms(struct net_device *dev, int jumbo)
1540 struct ace_private *ap = netdev_priv(dev);
1541 struct ace_regs __iomem *regs = ap->regs;
1542 int board_idx = ap->board_idx;
1544 if (board_idx >= 0) {
1546 if (!tx_coal_tick[board_idx])
1547 writel(DEF_TX_COAL, ®s->TuneTxCoalTicks);
1548 if (!max_tx_desc[board_idx])
1549 writel(DEF_TX_MAX_DESC, ®s->TuneMaxTxDesc);
1550 if (!rx_coal_tick[board_idx])
1551 writel(DEF_RX_COAL, ®s->TuneRxCoalTicks);
1552 if (!max_rx_desc[board_idx])
1553 writel(DEF_RX_MAX_DESC, ®s->TuneMaxRxDesc);
1554 if (!tx_ratio[board_idx])
1555 writel(DEF_TX_RATIO, ®s->TxBufRat);
1557 if (!tx_coal_tick[board_idx])
1558 writel(DEF_JUMBO_TX_COAL,
1559 ®s->TuneTxCoalTicks);
1560 if (!max_tx_desc[board_idx])
1561 writel(DEF_JUMBO_TX_MAX_DESC,
1562 ®s->TuneMaxTxDesc);
1563 if (!rx_coal_tick[board_idx])
1564 writel(DEF_JUMBO_RX_COAL,
1565 ®s->TuneRxCoalTicks);
1566 if (!max_rx_desc[board_idx])
1567 writel(DEF_JUMBO_RX_MAX_DESC,
1568 ®s->TuneMaxRxDesc);
1569 if (!tx_ratio[board_idx])
1570 writel(DEF_JUMBO_TX_RATIO, ®s->TxBufRat);
1576 static void ace_watchdog(struct net_device *data)
1578 struct net_device *dev = data;
1579 struct ace_private *ap = netdev_priv(dev);
1580 struct ace_regs __iomem *regs = ap->regs;
1583 * We haven't received a stats update event for more than 2.5
1584 * seconds and there is data in the transmit queue, thus we
1585 * asume the card is stuck.
1587 if (*ap->tx_csm != ap->tx_ret_csm) {
1588 printk(KERN_WARNING "%s: Transmitter is stuck, %08x\n",
1589 dev->name, (unsigned int)readl(®s->HostCtrl));
1590 /* This can happen due to ieee flow control. */
1592 printk(KERN_DEBUG "%s: BUG... transmitter died. Kicking it.\n",
1595 netif_wake_queue(dev);
1601 static void ace_tasklet(unsigned long dev)
1603 struct ace_private *ap = netdev_priv((struct net_device *)dev);
1606 cur_size = atomic_read(&ap->cur_rx_bufs);
1607 if ((cur_size < RX_LOW_STD_THRES) &&
1608 !test_and_set_bit(0, &ap->std_refill_busy)) {
1610 printk("refilling buffers (current %i)\n", cur_size);
1612 ace_load_std_rx_ring(ap, RX_RING_SIZE - cur_size);
1615 if (ap->version >= 2) {
1616 cur_size = atomic_read(&ap->cur_mini_bufs);
1617 if ((cur_size < RX_LOW_MINI_THRES) &&
1618 !test_and_set_bit(0, &ap->mini_refill_busy)) {
1620 printk("refilling mini buffers (current %i)\n",
1623 ace_load_mini_rx_ring(ap, RX_MINI_SIZE - cur_size);
1627 cur_size = atomic_read(&ap->cur_jumbo_bufs);
1628 if (ap->jumbo && (cur_size < RX_LOW_JUMBO_THRES) &&
1629 !test_and_set_bit(0, &ap->jumbo_refill_busy)) {
1631 printk("refilling jumbo buffers (current %i)\n", cur_size);
1633 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE - cur_size);
1635 ap->tasklet_pending = 0;
1640 * Copy the contents of the NIC's trace buffer to kernel memory.
1642 static void ace_dump_trace(struct ace_private *ap)
1646 if (!(ap->trace_buf = kmalloc(ACE_TRACE_SIZE, GFP_KERNEL)))
1653 * Load the standard rx ring.
1655 * Loading rings is safe without holding the spin lock since this is
1656 * done only before the device is enabled, thus no interrupts are
1657 * generated and by the interrupt handler/tasklet handler.
1659 static void ace_load_std_rx_ring(struct ace_private *ap, int nr_bufs)
1661 struct ace_regs __iomem *regs = ap->regs;
1665 prefetchw(&ap->cur_rx_bufs);
1667 idx = ap->rx_std_skbprd;
1669 for (i = 0; i < nr_bufs; i++) {
1670 struct sk_buff *skb;
1674 skb = alloc_skb(ACE_STD_BUFSIZE + NET_IP_ALIGN, GFP_ATOMIC);
1678 skb_reserve(skb, NET_IP_ALIGN);
1679 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1680 offset_in_page(skb->data),
1682 PCI_DMA_FROMDEVICE);
1683 ap->skb->rx_std_skbuff[idx].skb = skb;
1684 pci_unmap_addr_set(&ap->skb->rx_std_skbuff[idx],
1687 rd = &ap->rx_std_ring[idx];
1688 set_aceaddr(&rd->addr, mapping);
1689 rd->size = ACE_STD_BUFSIZE;
1691 idx = (idx + 1) % RX_STD_RING_ENTRIES;
1697 atomic_add(i, &ap->cur_rx_bufs);
1698 ap->rx_std_skbprd = idx;
1700 if (ACE_IS_TIGON_I(ap)) {
1702 cmd.evt = C_SET_RX_PRD_IDX;
1704 cmd.idx = ap->rx_std_skbprd;
1705 ace_issue_cmd(regs, &cmd);
1707 writel(idx, ®s->RxStdPrd);
1712 clear_bit(0, &ap->std_refill_busy);
1716 printk(KERN_INFO "Out of memory when allocating "
1717 "standard receive buffers\n");
1722 static void ace_load_mini_rx_ring(struct ace_private *ap, int nr_bufs)
1724 struct ace_regs __iomem *regs = ap->regs;
1727 prefetchw(&ap->cur_mini_bufs);
1729 idx = ap->rx_mini_skbprd;
1730 for (i = 0; i < nr_bufs; i++) {
1731 struct sk_buff *skb;
1735 skb = alloc_skb(ACE_MINI_BUFSIZE + NET_IP_ALIGN, GFP_ATOMIC);
1739 skb_reserve(skb, NET_IP_ALIGN);
1740 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1741 offset_in_page(skb->data),
1743 PCI_DMA_FROMDEVICE);
1744 ap->skb->rx_mini_skbuff[idx].skb = skb;
1745 pci_unmap_addr_set(&ap->skb->rx_mini_skbuff[idx],
1748 rd = &ap->rx_mini_ring[idx];
1749 set_aceaddr(&rd->addr, mapping);
1750 rd->size = ACE_MINI_BUFSIZE;
1752 idx = (idx + 1) % RX_MINI_RING_ENTRIES;
1758 atomic_add(i, &ap->cur_mini_bufs);
1760 ap->rx_mini_skbprd = idx;
1762 writel(idx, ®s->RxMiniPrd);
1766 clear_bit(0, &ap->mini_refill_busy);
1769 printk(KERN_INFO "Out of memory when allocating "
1770 "mini receive buffers\n");
1776 * Load the jumbo rx ring, this may happen at any time if the MTU
1777 * is changed to a value > 1500.
1779 static void ace_load_jumbo_rx_ring(struct ace_private *ap, int nr_bufs)
1781 struct ace_regs __iomem *regs = ap->regs;
1784 idx = ap->rx_jumbo_skbprd;
1786 for (i = 0; i < nr_bufs; i++) {
1787 struct sk_buff *skb;
1791 skb = alloc_skb(ACE_JUMBO_BUFSIZE + NET_IP_ALIGN, GFP_ATOMIC);
1795 skb_reserve(skb, NET_IP_ALIGN);
1796 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
1797 offset_in_page(skb->data),
1799 PCI_DMA_FROMDEVICE);
1800 ap->skb->rx_jumbo_skbuff[idx].skb = skb;
1801 pci_unmap_addr_set(&ap->skb->rx_jumbo_skbuff[idx],
1804 rd = &ap->rx_jumbo_ring[idx];
1805 set_aceaddr(&rd->addr, mapping);
1806 rd->size = ACE_JUMBO_BUFSIZE;
1808 idx = (idx + 1) % RX_JUMBO_RING_ENTRIES;
1814 atomic_add(i, &ap->cur_jumbo_bufs);
1815 ap->rx_jumbo_skbprd = idx;
1817 if (ACE_IS_TIGON_I(ap)) {
1819 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1821 cmd.idx = ap->rx_jumbo_skbprd;
1822 ace_issue_cmd(regs, &cmd);
1824 writel(idx, ®s->RxJumboPrd);
1829 clear_bit(0, &ap->jumbo_refill_busy);
1832 if (net_ratelimit())
1833 printk(KERN_INFO "Out of memory when allocating "
1834 "jumbo receive buffers\n");
1840 * All events are considered to be slow (RX/TX ints do not generate
1841 * events) and are handled here, outside the main interrupt handler,
1842 * to reduce the size of the handler.
1844 static u32 ace_handle_event(struct net_device *dev, u32 evtcsm, u32 evtprd)
1846 struct ace_private *ap;
1848 ap = netdev_priv(dev);
1850 while (evtcsm != evtprd) {
1851 switch (ap->evt_ring[evtcsm].evt) {
1853 printk(KERN_INFO "%s: Firmware up and running\n",
1858 case E_STATS_UPDATED:
1862 u16 code = ap->evt_ring[evtcsm].code;
1866 u32 state = readl(&ap->regs->GigLnkState);
1867 printk(KERN_WARNING "%s: Optical link UP "
1868 "(%s Duplex, Flow Control: %s%s)\n",
1870 state & LNK_FULL_DUPLEX ? "Full":"Half",
1871 state & LNK_TX_FLOW_CTL_Y ? "TX " : "",
1872 state & LNK_RX_FLOW_CTL_Y ? "RX" : "");
1876 printk(KERN_WARNING "%s: Optical link DOWN\n",
1879 case E_C_LINK_10_100:
1880 printk(KERN_WARNING "%s: 10/100BaseT link "
1884 printk(KERN_ERR "%s: Unknown optical link "
1885 "state %02x\n", ap->name, code);
1890 switch(ap->evt_ring[evtcsm].code) {
1891 case E_C_ERR_INVAL_CMD:
1892 printk(KERN_ERR "%s: invalid command error\n",
1895 case E_C_ERR_UNIMP_CMD:
1896 printk(KERN_ERR "%s: unimplemented command "
1897 "error\n", ap->name);
1899 case E_C_ERR_BAD_CFG:
1900 printk(KERN_ERR "%s: bad config error\n",
1904 printk(KERN_ERR "%s: unknown error %02x\n",
1905 ap->name, ap->evt_ring[evtcsm].code);
1908 case E_RESET_JUMBO_RNG:
1911 for (i = 0; i < RX_JUMBO_RING_ENTRIES; i++) {
1912 if (ap->skb->rx_jumbo_skbuff[i].skb) {
1913 ap->rx_jumbo_ring[i].size = 0;
1914 set_aceaddr(&ap->rx_jumbo_ring[i].addr, 0);
1915 dev_kfree_skb(ap->skb->rx_jumbo_skbuff[i].skb);
1916 ap->skb->rx_jumbo_skbuff[i].skb = NULL;
1920 if (ACE_IS_TIGON_I(ap)) {
1922 cmd.evt = C_SET_RX_JUMBO_PRD_IDX;
1925 ace_issue_cmd(ap->regs, &cmd);
1927 writel(0, &((ap->regs)->RxJumboPrd));
1932 ap->rx_jumbo_skbprd = 0;
1933 printk(KERN_INFO "%s: Jumbo ring flushed\n",
1935 clear_bit(0, &ap->jumbo_refill_busy);
1939 printk(KERN_ERR "%s: Unhandled event 0x%02x\n",
1940 ap->name, ap->evt_ring[evtcsm].evt);
1942 evtcsm = (evtcsm + 1) % EVT_RING_ENTRIES;
1949 static void ace_rx_int(struct net_device *dev, u32 rxretprd, u32 rxretcsm)
1951 struct ace_private *ap = netdev_priv(dev);
1953 int mini_count = 0, std_count = 0;
1957 prefetchw(&ap->cur_rx_bufs);
1958 prefetchw(&ap->cur_mini_bufs);
1960 while (idx != rxretprd) {
1961 struct ring_info *rip;
1962 struct sk_buff *skb;
1963 struct rx_desc *rxdesc, *retdesc;
1965 int bd_flags, desc_type, mapsize;
1969 /* make sure the rx descriptor isn't read before rxretprd */
1970 if (idx == rxretcsm)
1973 retdesc = &ap->rx_return_ring[idx];
1974 skbidx = retdesc->idx;
1975 bd_flags = retdesc->flags;
1976 desc_type = bd_flags & (BD_FLG_JUMBO | BD_FLG_MINI);
1980 * Normal frames do not have any flags set
1982 * Mini and normal frames arrive frequently,
1983 * so use a local counter to avoid doing
1984 * atomic operations for each packet arriving.
1987 rip = &ap->skb->rx_std_skbuff[skbidx];
1988 mapsize = ACE_STD_BUFSIZE;
1989 rxdesc = &ap->rx_std_ring[skbidx];
1993 rip = &ap->skb->rx_jumbo_skbuff[skbidx];
1994 mapsize = ACE_JUMBO_BUFSIZE;
1995 rxdesc = &ap->rx_jumbo_ring[skbidx];
1996 atomic_dec(&ap->cur_jumbo_bufs);
1999 rip = &ap->skb->rx_mini_skbuff[skbidx];
2000 mapsize = ACE_MINI_BUFSIZE;
2001 rxdesc = &ap->rx_mini_ring[skbidx];
2005 printk(KERN_INFO "%s: unknown frame type (0x%02x) "
2006 "returned by NIC\n", dev->name,
2013 pci_unmap_page(ap->pdev,
2014 pci_unmap_addr(rip, mapping),
2016 PCI_DMA_FROMDEVICE);
2017 skb_put(skb, retdesc->size);
2022 csum = retdesc->tcp_udp_csum;
2024 skb->protocol = eth_type_trans(skb, dev);
2027 * Instead of forcing the poor tigon mips cpu to calculate
2028 * pseudo hdr checksum, we do this ourselves.
2030 if (bd_flags & BD_FLG_TCP_UDP_SUM) {
2031 skb->csum = htons(csum);
2032 skb->ip_summed = CHECKSUM_COMPLETE;
2034 skb->ip_summed = CHECKSUM_NONE;
2039 if (ap->vlgrp && (bd_flags & BD_FLG_VLAN_TAG)) {
2040 vlan_hwaccel_rx(skb, ap->vlgrp, retdesc->vlan);
2045 dev->stats.rx_packets++;
2046 dev->stats.rx_bytes += retdesc->size;
2048 idx = (idx + 1) % RX_RETURN_RING_ENTRIES;
2051 atomic_sub(std_count, &ap->cur_rx_bufs);
2052 if (!ACE_IS_TIGON_I(ap))
2053 atomic_sub(mini_count, &ap->cur_mini_bufs);
2057 * According to the documentation RxRetCsm is obsolete with
2058 * the 12.3.x Firmware - my Tigon I NICs seem to disagree!
2060 if (ACE_IS_TIGON_I(ap)) {
2061 writel(idx, &ap->regs->RxRetCsm);
2072 static inline void ace_tx_int(struct net_device *dev,
2075 struct ace_private *ap = netdev_priv(dev);
2078 struct sk_buff *skb;
2080 struct tx_ring_info *info;
2082 info = ap->skb->tx_skbuff + idx;
2084 mapping = pci_unmap_addr(info, mapping);
2087 pci_unmap_page(ap->pdev, mapping,
2088 pci_unmap_len(info, maplen),
2090 pci_unmap_addr_set(info, mapping, 0);
2094 dev->stats.tx_packets++;
2095 dev->stats.tx_bytes += skb->len;
2096 dev_kfree_skb_irq(skb);
2100 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2101 } while (idx != txcsm);
2103 if (netif_queue_stopped(dev))
2104 netif_wake_queue(dev);
2107 ap->tx_ret_csm = txcsm;
2109 /* So... tx_ret_csm is advanced _after_ check for device wakeup.
2111 * We could try to make it before. In this case we would get
2112 * the following race condition: hard_start_xmit on other cpu
2113 * enters after we advanced tx_ret_csm and fills space,
2114 * which we have just freed, so that we make illegal device wakeup.
2115 * There is no good way to workaround this (at entry
2116 * to ace_start_xmit detects this condition and prevents
2117 * ring corruption, but it is not a good workaround.)
2119 * When tx_ret_csm is advanced after, we wake up device _only_
2120 * if we really have some space in ring (though the core doing
2121 * hard_start_xmit can see full ring for some period and has to
2122 * synchronize.) Superb.
2123 * BUT! We get another subtle race condition. hard_start_xmit
2124 * may think that ring is full between wakeup and advancing
2125 * tx_ret_csm and will stop device instantly! It is not so bad.
2126 * We are guaranteed that there is something in ring, so that
2127 * the next irq will resume transmission. To speedup this we could
2128 * mark descriptor, which closes ring with BD_FLG_COAL_NOW
2129 * (see ace_start_xmit).
2131 * Well, this dilemma exists in all lock-free devices.
2132 * We, following scheme used in drivers by Donald Becker,
2133 * select the least dangerous.
2139 static irqreturn_t ace_interrupt(int irq, void *dev_id)
2141 struct net_device *dev = (struct net_device *)dev_id;
2142 struct ace_private *ap = netdev_priv(dev);
2143 struct ace_regs __iomem *regs = ap->regs;
2145 u32 txcsm, rxretcsm, rxretprd;
2149 * In case of PCI shared interrupts or spurious interrupts,
2150 * we want to make sure it is actually our interrupt before
2151 * spending any time in here.
2153 if (!(readl(®s->HostCtrl) & IN_INT))
2157 * ACK intr now. Otherwise we will lose updates to rx_ret_prd,
2158 * which happened _after_ rxretprd = *ap->rx_ret_prd; but before
2159 * writel(0, ®s->Mb0Lo).
2161 * "IRQ avoidance" recommended in docs applies to IRQs served
2162 * threads and it is wrong even for that case.
2164 writel(0, ®s->Mb0Lo);
2165 readl(®s->Mb0Lo);
2168 * There is no conflict between transmit handling in
2169 * start_xmit and receive processing, thus there is no reason
2170 * to take a spin lock for RX handling. Wait until we start
2171 * working on the other stuff - hey we don't need a spin lock
2174 rxretprd = *ap->rx_ret_prd;
2175 rxretcsm = ap->cur_rx;
2177 if (rxretprd != rxretcsm)
2178 ace_rx_int(dev, rxretprd, rxretcsm);
2180 txcsm = *ap->tx_csm;
2181 idx = ap->tx_ret_csm;
2185 * If each skb takes only one descriptor this check degenerates
2186 * to identity, because new space has just been opened.
2187 * But if skbs are fragmented we must check that this index
2188 * update releases enough of space, otherwise we just
2189 * wait for device to make more work.
2191 if (!tx_ring_full(ap, txcsm, ap->tx_prd))
2192 ace_tx_int(dev, txcsm, idx);
2195 evtcsm = readl(®s->EvtCsm);
2196 evtprd = *ap->evt_prd;
2198 if (evtcsm != evtprd) {
2199 evtcsm = ace_handle_event(dev, evtcsm, evtprd);
2200 writel(evtcsm, ®s->EvtCsm);
2204 * This has to go last in the interrupt handler and run with
2205 * the spin lock released ... what lock?
2207 if (netif_running(dev)) {
2209 int run_tasklet = 0;
2211 cur_size = atomic_read(&ap->cur_rx_bufs);
2212 if (cur_size < RX_LOW_STD_THRES) {
2213 if ((cur_size < RX_PANIC_STD_THRES) &&
2214 !test_and_set_bit(0, &ap->std_refill_busy)) {
2216 printk("low on std buffers %i\n", cur_size);
2218 ace_load_std_rx_ring(ap,
2219 RX_RING_SIZE - cur_size);
2224 if (!ACE_IS_TIGON_I(ap)) {
2225 cur_size = atomic_read(&ap->cur_mini_bufs);
2226 if (cur_size < RX_LOW_MINI_THRES) {
2227 if ((cur_size < RX_PANIC_MINI_THRES) &&
2228 !test_and_set_bit(0,
2229 &ap->mini_refill_busy)) {
2231 printk("low on mini buffers %i\n",
2234 ace_load_mini_rx_ring(ap, RX_MINI_SIZE - cur_size);
2241 cur_size = atomic_read(&ap->cur_jumbo_bufs);
2242 if (cur_size < RX_LOW_JUMBO_THRES) {
2243 if ((cur_size < RX_PANIC_JUMBO_THRES) &&
2244 !test_and_set_bit(0,
2245 &ap->jumbo_refill_busy)){
2247 printk("low on jumbo buffers %i\n",
2250 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE - cur_size);
2255 if (run_tasklet && !ap->tasklet_pending) {
2256 ap->tasklet_pending = 1;
2257 tasklet_schedule(&ap->ace_tasklet);
2266 static void ace_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
2268 struct ace_private *ap = netdev_priv(dev);
2269 unsigned long flags;
2271 local_irq_save(flags);
2276 ace_unmask_irq(dev);
2277 local_irq_restore(flags);
2279 #endif /* ACENIC_DO_VLAN */
2282 static int ace_open(struct net_device *dev)
2284 struct ace_private *ap = netdev_priv(dev);
2285 struct ace_regs __iomem *regs = ap->regs;
2288 if (!(ap->fw_running)) {
2289 printk(KERN_WARNING "%s: Firmware not running!\n", dev->name);
2293 writel(dev->mtu + ETH_HLEN + 4, ®s->IfMtu);
2295 cmd.evt = C_CLEAR_STATS;
2298 ace_issue_cmd(regs, &cmd);
2300 cmd.evt = C_HOST_STATE;
2301 cmd.code = C_C_STACK_UP;
2303 ace_issue_cmd(regs, &cmd);
2306 !test_and_set_bit(0, &ap->jumbo_refill_busy))
2307 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE);
2309 if (dev->flags & IFF_PROMISC) {
2310 cmd.evt = C_SET_PROMISC_MODE;
2311 cmd.code = C_C_PROMISC_ENABLE;
2313 ace_issue_cmd(regs, &cmd);
2321 cmd.evt = C_LNK_NEGOTIATION;
2324 ace_issue_cmd(regs, &cmd);
2327 netif_start_queue(dev);
2330 * Setup the bottom half rx ring refill handler
2332 tasklet_init(&ap->ace_tasklet, ace_tasklet, (unsigned long)dev);
2337 static int ace_close(struct net_device *dev)
2339 struct ace_private *ap = netdev_priv(dev);
2340 struct ace_regs __iomem *regs = ap->regs;
2342 unsigned long flags;
2346 * Without (or before) releasing irq and stopping hardware, this
2347 * is an absolute non-sense, by the way. It will be reset instantly
2350 netif_stop_queue(dev);
2354 cmd.evt = C_SET_PROMISC_MODE;
2355 cmd.code = C_C_PROMISC_DISABLE;
2357 ace_issue_cmd(regs, &cmd);
2361 cmd.evt = C_HOST_STATE;
2362 cmd.code = C_C_STACK_DOWN;
2364 ace_issue_cmd(regs, &cmd);
2366 tasklet_kill(&ap->ace_tasklet);
2369 * Make sure one CPU is not processing packets while
2370 * buffers are being released by another.
2373 local_irq_save(flags);
2376 for (i = 0; i < ACE_TX_RING_ENTRIES(ap); i++) {
2377 struct sk_buff *skb;
2379 struct tx_ring_info *info;
2381 info = ap->skb->tx_skbuff + i;
2383 mapping = pci_unmap_addr(info, mapping);
2386 if (ACE_IS_TIGON_I(ap)) {
2387 /* NB: TIGON_1 is special, tx_ring is in io space */
2388 struct tx_desc __iomem *tx;
2389 tx = (__force struct tx_desc __iomem *) &ap->tx_ring[i];
2390 writel(0, &tx->addr.addrhi);
2391 writel(0, &tx->addr.addrlo);
2392 writel(0, &tx->flagsize);
2394 memset(ap->tx_ring + i, 0,
2395 sizeof(struct tx_desc));
2396 pci_unmap_page(ap->pdev, mapping,
2397 pci_unmap_len(info, maplen),
2399 pci_unmap_addr_set(info, mapping, 0);
2408 cmd.evt = C_RESET_JUMBO_RNG;
2411 ace_issue_cmd(regs, &cmd);
2414 ace_unmask_irq(dev);
2415 local_irq_restore(flags);
2421 static inline dma_addr_t
2422 ace_map_tx_skb(struct ace_private *ap, struct sk_buff *skb,
2423 struct sk_buff *tail, u32 idx)
2426 struct tx_ring_info *info;
2428 mapping = pci_map_page(ap->pdev, virt_to_page(skb->data),
2429 offset_in_page(skb->data),
2430 skb->len, PCI_DMA_TODEVICE);
2432 info = ap->skb->tx_skbuff + idx;
2434 pci_unmap_addr_set(info, mapping, mapping);
2435 pci_unmap_len_set(info, maplen, skb->len);
2441 ace_load_tx_bd(struct ace_private *ap, struct tx_desc *desc, u64 addr,
2442 u32 flagsize, u32 vlan_tag)
2444 #if !USE_TX_COAL_NOW
2445 flagsize &= ~BD_FLG_COAL_NOW;
2448 if (ACE_IS_TIGON_I(ap)) {
2449 struct tx_desc __iomem *io = (__force struct tx_desc __iomem *) desc;
2450 writel(addr >> 32, &io->addr.addrhi);
2451 writel(addr & 0xffffffff, &io->addr.addrlo);
2452 writel(flagsize, &io->flagsize);
2454 writel(vlan_tag, &io->vlanres);
2457 desc->addr.addrhi = addr >> 32;
2458 desc->addr.addrlo = addr;
2459 desc->flagsize = flagsize;
2461 desc->vlanres = vlan_tag;
2467 static int ace_start_xmit(struct sk_buff *skb, struct net_device *dev)
2469 struct ace_private *ap = netdev_priv(dev);
2470 struct ace_regs __iomem *regs = ap->regs;
2471 struct tx_desc *desc;
2473 unsigned long maxjiff = jiffies + 3*HZ;
2478 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2481 if (!skb_shinfo(skb)->nr_frags) {
2485 mapping = ace_map_tx_skb(ap, skb, skb, idx);
2486 flagsize = (skb->len << 16) | (BD_FLG_END);
2487 if (skb->ip_summed == CHECKSUM_PARTIAL)
2488 flagsize |= BD_FLG_TCP_UDP_SUM;
2490 if (vlan_tx_tag_present(skb)) {
2491 flagsize |= BD_FLG_VLAN_TAG;
2492 vlan_tag = vlan_tx_tag_get(skb);
2495 desc = ap->tx_ring + idx;
2496 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2498 /* Look at ace_tx_int for explanations. */
2499 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2500 flagsize |= BD_FLG_COAL_NOW;
2502 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2508 mapping = ace_map_tx_skb(ap, skb, NULL, idx);
2509 flagsize = (skb_headlen(skb) << 16);
2510 if (skb->ip_summed == CHECKSUM_PARTIAL)
2511 flagsize |= BD_FLG_TCP_UDP_SUM;
2513 if (vlan_tx_tag_present(skb)) {
2514 flagsize |= BD_FLG_VLAN_TAG;
2515 vlan_tag = vlan_tx_tag_get(skb);
2519 ace_load_tx_bd(ap, ap->tx_ring + idx, mapping, flagsize, vlan_tag);
2521 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2523 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2524 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
2525 struct tx_ring_info *info;
2528 info = ap->skb->tx_skbuff + idx;
2529 desc = ap->tx_ring + idx;
2531 mapping = pci_map_page(ap->pdev, frag->page,
2532 frag->page_offset, frag->size,
2535 flagsize = (frag->size << 16);
2536 if (skb->ip_summed == CHECKSUM_PARTIAL)
2537 flagsize |= BD_FLG_TCP_UDP_SUM;
2538 idx = (idx + 1) % ACE_TX_RING_ENTRIES(ap);
2540 if (i == skb_shinfo(skb)->nr_frags - 1) {
2541 flagsize |= BD_FLG_END;
2542 if (tx_ring_full(ap, ap->tx_ret_csm, idx))
2543 flagsize |= BD_FLG_COAL_NOW;
2546 * Only the last fragment frees
2553 pci_unmap_addr_set(info, mapping, mapping);
2554 pci_unmap_len_set(info, maplen, frag->size);
2555 ace_load_tx_bd(ap, desc, mapping, flagsize, vlan_tag);
2561 ace_set_txprd(regs, ap, idx);
2563 if (flagsize & BD_FLG_COAL_NOW) {
2564 netif_stop_queue(dev);
2567 * A TX-descriptor producer (an IRQ) might have gotten
2568 * inbetween, making the ring free again. Since xmit is
2569 * serialized, this is the only situation we have to
2572 if (!tx_ring_full(ap, ap->tx_ret_csm, idx))
2573 netif_wake_queue(dev);
2576 return NETDEV_TX_OK;
2580 * This race condition is unavoidable with lock-free drivers.
2581 * We wake up the queue _before_ tx_prd is advanced, so that we can
2582 * enter hard_start_xmit too early, while tx ring still looks closed.
2583 * This happens ~1-4 times per 100000 packets, so that we can allow
2584 * to loop syncing to other CPU. Probably, we need an additional
2585 * wmb() in ace_tx_intr as well.
2587 * Note that this race is relieved by reserving one more entry
2588 * in tx ring than it is necessary (see original non-SG driver).
2589 * However, with SG we need to reserve 2*MAX_SKB_FRAGS+1, which
2590 * is already overkill.
2592 * Alternative is to return with 1 not throttling queue. In this
2593 * case loop becomes longer, no more useful effects.
2595 if (time_before(jiffies, maxjiff)) {
2601 /* The ring is stuck full. */
2602 printk(KERN_WARNING "%s: Transmit ring stuck full\n", dev->name);
2603 return NETDEV_TX_BUSY;
2607 static int ace_change_mtu(struct net_device *dev, int new_mtu)
2609 struct ace_private *ap = netdev_priv(dev);
2610 struct ace_regs __iomem *regs = ap->regs;
2612 if (new_mtu > ACE_JUMBO_MTU)
2615 writel(new_mtu + ETH_HLEN + 4, ®s->IfMtu);
2618 if (new_mtu > ACE_STD_MTU) {
2620 printk(KERN_INFO "%s: Enabling Jumbo frame "
2621 "support\n", dev->name);
2623 if (!test_and_set_bit(0, &ap->jumbo_refill_busy))
2624 ace_load_jumbo_rx_ring(ap, RX_JUMBO_SIZE);
2625 ace_set_rxtx_parms(dev, 1);
2628 while (test_and_set_bit(0, &ap->jumbo_refill_busy));
2629 ace_sync_irq(dev->irq);
2630 ace_set_rxtx_parms(dev, 0);
2634 cmd.evt = C_RESET_JUMBO_RNG;
2637 ace_issue_cmd(regs, &cmd);
2644 static int ace_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2646 struct ace_private *ap = netdev_priv(dev);
2647 struct ace_regs __iomem *regs = ap->regs;
2650 memset(ecmd, 0, sizeof(struct ethtool_cmd));
2652 (SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full |
2653 SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full |
2654 SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full |
2655 SUPPORTED_Autoneg | SUPPORTED_FIBRE);
2657 ecmd->port = PORT_FIBRE;
2658 ecmd->transceiver = XCVR_INTERNAL;
2660 link = readl(®s->GigLnkState);
2661 if (link & LNK_1000MB)
2662 ecmd->speed = SPEED_1000;
2664 link = readl(®s->FastLnkState);
2665 if (link & LNK_100MB)
2666 ecmd->speed = SPEED_100;
2667 else if (link & LNK_10MB)
2668 ecmd->speed = SPEED_10;
2672 if (link & LNK_FULL_DUPLEX)
2673 ecmd->duplex = DUPLEX_FULL;
2675 ecmd->duplex = DUPLEX_HALF;
2677 if (link & LNK_NEGOTIATE)
2678 ecmd->autoneg = AUTONEG_ENABLE;
2680 ecmd->autoneg = AUTONEG_DISABLE;
2684 * Current struct ethtool_cmd is insufficient
2686 ecmd->trace = readl(®s->TuneTrace);
2688 ecmd->txcoal = readl(®s->TuneTxCoalTicks);
2689 ecmd->rxcoal = readl(®s->TuneRxCoalTicks);
2691 ecmd->maxtxpkt = readl(®s->TuneMaxTxDesc);
2692 ecmd->maxrxpkt = readl(®s->TuneMaxRxDesc);
2697 static int ace_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
2699 struct ace_private *ap = netdev_priv(dev);
2700 struct ace_regs __iomem *regs = ap->regs;
2703 link = readl(®s->GigLnkState);
2704 if (link & LNK_1000MB)
2707 link = readl(®s->FastLnkState);
2708 if (link & LNK_100MB)
2710 else if (link & LNK_10MB)
2716 link = LNK_ENABLE | LNK_1000MB | LNK_100MB | LNK_10MB |
2717 LNK_RX_FLOW_CTL_Y | LNK_NEG_FCTL;
2718 if (!ACE_IS_TIGON_I(ap))
2719 link |= LNK_TX_FLOW_CTL_Y;
2720 if (ecmd->autoneg == AUTONEG_ENABLE)
2721 link |= LNK_NEGOTIATE;
2722 if (ecmd->speed != speed) {
2723 link &= ~(LNK_1000MB | LNK_100MB | LNK_10MB);
2737 if (ecmd->duplex == DUPLEX_FULL)
2738 link |= LNK_FULL_DUPLEX;
2740 if (link != ap->link) {
2742 printk(KERN_INFO "%s: Renegotiating link state\n",
2746 writel(link, ®s->TuneLink);
2747 if (!ACE_IS_TIGON_I(ap))
2748 writel(link, ®s->TuneFastLink);
2751 cmd.evt = C_LNK_NEGOTIATION;
2754 ace_issue_cmd(regs, &cmd);
2759 static void ace_get_drvinfo(struct net_device *dev,
2760 struct ethtool_drvinfo *info)
2762 struct ace_private *ap = netdev_priv(dev);
2764 strlcpy(info->driver, "acenic", sizeof(info->driver));
2765 snprintf(info->version, sizeof(info->version), "%i.%i.%i",
2766 ap->firmware_major, ap->firmware_minor,
2770 strlcpy(info->bus_info, pci_name(ap->pdev),
2771 sizeof(info->bus_info));
2776 * Set the hardware MAC address.
2778 static int ace_set_mac_addr(struct net_device *dev, void *p)
2780 struct ace_private *ap = netdev_priv(dev);
2781 struct ace_regs __iomem *regs = ap->regs;
2782 struct sockaddr *addr=p;
2786 if(netif_running(dev))
2789 memcpy(dev->dev_addr, addr->sa_data,dev->addr_len);
2791 da = (u8 *)dev->dev_addr;
2793 writel(da[0] << 8 | da[1], ®s->MacAddrHi);
2794 writel((da[2] << 24) | (da[3] << 16) | (da[4] << 8) | da[5],
2797 cmd.evt = C_SET_MAC_ADDR;
2800 ace_issue_cmd(regs, &cmd);
2806 static void ace_set_multicast_list(struct net_device *dev)
2808 struct ace_private *ap = netdev_priv(dev);
2809 struct ace_regs __iomem *regs = ap->regs;
2812 if ((dev->flags & IFF_ALLMULTI) && !(ap->mcast_all)) {
2813 cmd.evt = C_SET_MULTICAST_MODE;
2814 cmd.code = C_C_MCAST_ENABLE;
2816 ace_issue_cmd(regs, &cmd);
2818 } else if (ap->mcast_all) {
2819 cmd.evt = C_SET_MULTICAST_MODE;
2820 cmd.code = C_C_MCAST_DISABLE;
2822 ace_issue_cmd(regs, &cmd);
2826 if ((dev->flags & IFF_PROMISC) && !(ap->promisc)) {
2827 cmd.evt = C_SET_PROMISC_MODE;
2828 cmd.code = C_C_PROMISC_ENABLE;
2830 ace_issue_cmd(regs, &cmd);
2832 }else if (!(dev->flags & IFF_PROMISC) && (ap->promisc)) {
2833 cmd.evt = C_SET_PROMISC_MODE;
2834 cmd.code = C_C_PROMISC_DISABLE;
2836 ace_issue_cmd(regs, &cmd);
2841 * For the time being multicast relies on the upper layers
2842 * filtering it properly. The Firmware does not allow one to
2843 * set the entire multicast list at a time and keeping track of
2844 * it here is going to be messy.
2846 if ((dev->mc_count) && !(ap->mcast_all)) {
2847 cmd.evt = C_SET_MULTICAST_MODE;
2848 cmd.code = C_C_MCAST_ENABLE;
2850 ace_issue_cmd(regs, &cmd);
2851 }else if (!ap->mcast_all) {
2852 cmd.evt = C_SET_MULTICAST_MODE;
2853 cmd.code = C_C_MCAST_DISABLE;
2855 ace_issue_cmd(regs, &cmd);
2860 static struct net_device_stats *ace_get_stats(struct net_device *dev)
2862 struct ace_private *ap = netdev_priv(dev);
2863 struct ace_mac_stats __iomem *mac_stats =
2864 (struct ace_mac_stats __iomem *)ap->regs->Stats;
2866 dev->stats.rx_missed_errors = readl(&mac_stats->drop_space);
2867 dev->stats.multicast = readl(&mac_stats->kept_mc);
2868 dev->stats.collisions = readl(&mac_stats->coll);
2874 static void __devinit ace_copy(struct ace_regs __iomem *regs, const __be32 *src,
2877 void __iomem *tdest;
2884 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2885 min_t(u32, size, ACE_WINDOW_SIZE));
2886 tdest = (void __iomem *) ®s->Window +
2887 (dest & (ACE_WINDOW_SIZE - 1));
2888 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
2889 for (i = 0; i < (tsize / 4); i++) {
2890 /* Firmware is big-endian */
2891 writel(be32_to_cpup(src), tdest);
2901 static void __devinit ace_clear(struct ace_regs __iomem *regs, u32 dest, int size)
2903 void __iomem *tdest;
2910 tsize = min_t(u32, ((~dest & (ACE_WINDOW_SIZE - 1)) + 1),
2911 min_t(u32, size, ACE_WINDOW_SIZE));
2912 tdest = (void __iomem *) ®s->Window +
2913 (dest & (ACE_WINDOW_SIZE - 1));
2914 writel(dest & ~(ACE_WINDOW_SIZE - 1), ®s->WinBase);
2916 for (i = 0; i < (tsize / 4); i++) {
2917 writel(0, tdest + i*4);
2929 * Download the firmware into the SRAM on the NIC
2931 * This operation requires the NIC to be halted and is performed with
2932 * interrupts disabled and with the spinlock hold.
2934 static int __devinit ace_load_firmware(struct net_device *dev)
2936 const struct firmware *fw;
2937 const char *fw_name = "acenic/tg2.bin";
2938 struct ace_private *ap = netdev_priv(dev);
2939 struct ace_regs __iomem *regs = ap->regs;
2940 const __be32 *fw_data;
2944 if (!(readl(®s->CpuCtrl) & CPU_HALTED)) {
2945 printk(KERN_ERR "%s: trying to download firmware while the "
2946 "CPU is running!\n", ap->name);
2950 if (ACE_IS_TIGON_I(ap))
2951 fw_name = "acenic/tg1.bin";
2953 ret = request_firmware(&fw, fw_name, &ap->pdev->dev);
2955 printk(KERN_ERR "%s: Failed to load firmware \"%s\"\n",
2960 fw_data = (void *)fw->data;
2962 /* Firmware blob starts with version numbers, followed by
2963 load and start address. Remainder is the blob to be loaded
2964 contiguously from load address. We don't bother to represent
2965 the BSS/SBSS sections any more, since we were clearing the
2966 whole thing anyway. */
2967 ap->firmware_major = fw->data[0];
2968 ap->firmware_minor = fw->data[1];
2969 ap->firmware_fix = fw->data[2];
2971 ap->firmware_start = be32_to_cpu(fw_data[1]);
2972 if (ap->firmware_start < 0x4000 || ap->firmware_start >= 0x80000) {
2973 printk(KERN_ERR "%s: bogus load address %08x in \"%s\"\n",
2974 ap->name, ap->firmware_start, fw_name);
2979 load_addr = be32_to_cpu(fw_data[2]);
2980 if (load_addr < 0x4000 || load_addr >= 0x80000) {
2981 printk(KERN_ERR "%s: bogus load address %08x in \"%s\"\n",
2982 ap->name, load_addr, fw_name);
2988 * Do not try to clear more than 512KiB or we end up seeing
2989 * funny things on NICs with only 512KiB SRAM
2991 ace_clear(regs, 0x2000, 0x80000-0x2000);
2992 ace_copy(regs, &fw_data[3], load_addr, fw->size-12);
2994 release_firmware(fw);
3000 * The eeprom on the AceNIC is an Atmel i2c EEPROM.
3002 * Accessing the EEPROM is `interesting' to say the least - don't read
3003 * this code right after dinner.
3005 * This is all about black magic and bit-banging the device .... I
3006 * wonder in what hospital they have put the guy who designed the i2c
3009 * Oh yes, this is only the beginning!
3011 * Thanks to Stevarino Webinski for helping tracking down the bugs in the
3012 * code i2c readout code by beta testing all my hacks.
3014 static void __devinit eeprom_start(struct ace_regs __iomem *regs)
3018 readl(®s->LocalCtrl);
3019 udelay(ACE_SHORT_DELAY);
3020 local = readl(®s->LocalCtrl);
3021 local |= EEPROM_DATA_OUT | EEPROM_WRITE_ENABLE;
3022 writel(local, ®s->LocalCtrl);
3023 readl(®s->LocalCtrl);
3025 udelay(ACE_SHORT_DELAY);
3026 local |= EEPROM_CLK_OUT;
3027 writel(local, ®s->LocalCtrl);
3028 readl(®s->LocalCtrl);
3030 udelay(ACE_SHORT_DELAY);
3031 local &= ~EEPROM_DATA_OUT;
3032 writel(local, ®s->LocalCtrl);
3033 readl(®s->LocalCtrl);
3035 udelay(ACE_SHORT_DELAY);
3036 local &= ~EEPROM_CLK_OUT;
3037 writel(local, ®s->LocalCtrl);
3038 readl(®s->LocalCtrl);
3043 static void __devinit eeprom_prep(struct ace_regs __iomem *regs, u8 magic)
3048 udelay(ACE_SHORT_DELAY);
3049 local = readl(®s->LocalCtrl);
3050 local &= ~EEPROM_DATA_OUT;
3051 local |= EEPROM_WRITE_ENABLE;
3052 writel(local, ®s->LocalCtrl);
3053 readl(®s->LocalCtrl);
3056 for (i = 0; i < 8; i++, magic <<= 1) {
3057 udelay(ACE_SHORT_DELAY);
3059 local |= EEPROM_DATA_OUT;
3061 local &= ~EEPROM_DATA_OUT;
3062 writel(local, ®s->LocalCtrl);
3063 readl(®s->LocalCtrl);
3066 udelay(ACE_SHORT_DELAY);
3067 local |= EEPROM_CLK_OUT;
3068 writel(local, ®s->LocalCtrl);
3069 readl(®s->LocalCtrl);
3071 udelay(ACE_SHORT_DELAY);
3072 local &= ~(EEPROM_CLK_OUT | EEPROM_DATA_OUT);
3073 writel(local, ®s->LocalCtrl);
3074 readl(®s->LocalCtrl);
3080 static int __devinit eeprom_check_ack(struct ace_regs __iomem *regs)
3085 local = readl(®s->LocalCtrl);
3086 local &= ~EEPROM_WRITE_ENABLE;
3087 writel(local, ®s->LocalCtrl);
3088 readl(®s->LocalCtrl);
3090 udelay(ACE_LONG_DELAY);
3091 local |= EEPROM_CLK_OUT;
3092 writel(local, ®s->LocalCtrl);
3093 readl(®s->LocalCtrl);
3095 udelay(ACE_SHORT_DELAY);
3096 /* sample data in middle of high clk */
3097 state = (readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0;
3098 udelay(ACE_SHORT_DELAY);
3100 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3101 readl(®s->LocalCtrl);
3108 static void __devinit eeprom_stop(struct ace_regs __iomem *regs)
3112 udelay(ACE_SHORT_DELAY);
3113 local = readl(®s->LocalCtrl);
3114 local |= EEPROM_WRITE_ENABLE;
3115 writel(local, ®s->LocalCtrl);
3116 readl(®s->LocalCtrl);
3118 udelay(ACE_SHORT_DELAY);
3119 local &= ~EEPROM_DATA_OUT;
3120 writel(local, ®s->LocalCtrl);
3121 readl(®s->LocalCtrl);
3123 udelay(ACE_SHORT_DELAY);
3124 local |= EEPROM_CLK_OUT;
3125 writel(local, ®s->LocalCtrl);
3126 readl(®s->LocalCtrl);
3128 udelay(ACE_SHORT_DELAY);
3129 local |= EEPROM_DATA_OUT;
3130 writel(local, ®s->LocalCtrl);
3131 readl(®s->LocalCtrl);
3133 udelay(ACE_LONG_DELAY);
3134 local &= ~EEPROM_CLK_OUT;
3135 writel(local, ®s->LocalCtrl);
3141 * Read a whole byte from the EEPROM.
3143 static int __devinit read_eeprom_byte(struct net_device *dev,
3144 unsigned long offset)
3146 struct ace_private *ap = netdev_priv(dev);
3147 struct ace_regs __iomem *regs = ap->regs;
3148 unsigned long flags;
3154 * Don't take interrupts on this CPU will bit banging
3155 * the %#%#@$ I2C device
3157 local_irq_save(flags);
3161 eeprom_prep(regs, EEPROM_WRITE_SELECT);
3162 if (eeprom_check_ack(regs)) {
3163 local_irq_restore(flags);
3164 printk(KERN_ERR "%s: Unable to sync eeprom\n", ap->name);
3166 goto eeprom_read_error;
3169 eeprom_prep(regs, (offset >> 8) & 0xff);
3170 if (eeprom_check_ack(regs)) {
3171 local_irq_restore(flags);
3172 printk(KERN_ERR "%s: Unable to set address byte 0\n",
3175 goto eeprom_read_error;
3178 eeprom_prep(regs, offset & 0xff);
3179 if (eeprom_check_ack(regs)) {
3180 local_irq_restore(flags);
3181 printk(KERN_ERR "%s: Unable to set address byte 1\n",
3184 goto eeprom_read_error;
3188 eeprom_prep(regs, EEPROM_READ_SELECT);
3189 if (eeprom_check_ack(regs)) {
3190 local_irq_restore(flags);
3191 printk(KERN_ERR "%s: Unable to set READ_SELECT\n",
3194 goto eeprom_read_error;
3197 for (i = 0; i < 8; i++) {
3198 local = readl(®s->LocalCtrl);
3199 local &= ~EEPROM_WRITE_ENABLE;
3200 writel(local, ®s->LocalCtrl);
3201 readl(®s->LocalCtrl);
3202 udelay(ACE_LONG_DELAY);
3204 local |= EEPROM_CLK_OUT;
3205 writel(local, ®s->LocalCtrl);
3206 readl(®s->LocalCtrl);
3208 udelay(ACE_SHORT_DELAY);
3209 /* sample data mid high clk */
3210 result = (result << 1) |
3211 ((readl(®s->LocalCtrl) & EEPROM_DATA_IN) != 0);
3212 udelay(ACE_SHORT_DELAY);
3214 local = readl(®s->LocalCtrl);
3215 local &= ~EEPROM_CLK_OUT;
3216 writel(local, ®s->LocalCtrl);
3217 readl(®s->LocalCtrl);
3218 udelay(ACE_SHORT_DELAY);
3221 local |= EEPROM_WRITE_ENABLE;
3222 writel(local, ®s->LocalCtrl);
3223 readl(®s->LocalCtrl);
3225 udelay(ACE_SHORT_DELAY);
3229 local |= EEPROM_DATA_OUT;
3230 writel(local, ®s->LocalCtrl);
3231 readl(®s->LocalCtrl);
3233 udelay(ACE_SHORT_DELAY);
3234 writel(readl(®s->LocalCtrl) | EEPROM_CLK_OUT, ®s->LocalCtrl);
3235 readl(®s->LocalCtrl);
3236 udelay(ACE_LONG_DELAY);
3237 writel(readl(®s->LocalCtrl) & ~EEPROM_CLK_OUT, ®s->LocalCtrl);
3238 readl(®s->LocalCtrl);
3240 udelay(ACE_SHORT_DELAY);
3243 local_irq_restore(flags);
3248 printk(KERN_ERR "%s: Unable to read eeprom byte 0x%02lx\n",