2 * Copyright(c) 2007 Atheros Corporation. All rights reserved.
4 * Derived from Intel e1000 driver
5 * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the Free
9 * Software Foundation; either version 2 of the License, or (at your option)
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc., 59
19 * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
24 #define DRV_VERSION "1.0.0.7-NAPI"
26 char atl1e_driver_name[] = "ATL1E";
27 char atl1e_driver_version[] = DRV_VERSION;
28 #define PCI_DEVICE_ID_ATTANSIC_L1E 0x1026
30 * atl1e_pci_tbl - PCI Device ID Table
32 * Wildcard entries (PCI_ANY_ID) should come last
33 * Last entry must be all 0s
35 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
36 * Class, Class Mask, private data (not used) }
38 static struct pci_device_id atl1e_pci_tbl[] = {
39 {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1E)},
40 /* required last entry */
43 MODULE_DEVICE_TABLE(pci, atl1e_pci_tbl);
45 MODULE_AUTHOR("Atheros Corporation, <xiong.huang@atheros.com>, Jie Yang <jie.yang@atheros.com>");
46 MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
47 MODULE_LICENSE("GPL");
48 MODULE_VERSION(DRV_VERSION);
50 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter);
53 atl1e_rx_page_vld_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
55 {REG_HOST_RXF0_PAGE0_VLD, REG_HOST_RXF0_PAGE1_VLD},
56 {REG_HOST_RXF1_PAGE0_VLD, REG_HOST_RXF1_PAGE1_VLD},
57 {REG_HOST_RXF2_PAGE0_VLD, REG_HOST_RXF2_PAGE1_VLD},
58 {REG_HOST_RXF3_PAGE0_VLD, REG_HOST_RXF3_PAGE1_VLD}
61 static const u16 atl1e_rx_page_hi_addr_regs[AT_MAX_RECEIVE_QUEUE] =
63 REG_RXF0_BASE_ADDR_HI,
64 REG_RXF1_BASE_ADDR_HI,
65 REG_RXF2_BASE_ADDR_HI,
70 atl1e_rx_page_lo_addr_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
72 {REG_HOST_RXF0_PAGE0_LO, REG_HOST_RXF0_PAGE1_LO},
73 {REG_HOST_RXF1_PAGE0_LO, REG_HOST_RXF1_PAGE1_LO},
74 {REG_HOST_RXF2_PAGE0_LO, REG_HOST_RXF2_PAGE1_LO},
75 {REG_HOST_RXF3_PAGE0_LO, REG_HOST_RXF3_PAGE1_LO}
79 atl1e_rx_page_write_offset_regs[AT_MAX_RECEIVE_QUEUE][AT_PAGE_NUM_PER_QUEUE] =
81 {REG_HOST_RXF0_MB0_LO, REG_HOST_RXF0_MB1_LO},
82 {REG_HOST_RXF1_MB0_LO, REG_HOST_RXF1_MB1_LO},
83 {REG_HOST_RXF2_MB0_LO, REG_HOST_RXF2_MB1_LO},
84 {REG_HOST_RXF3_MB0_LO, REG_HOST_RXF3_MB1_LO}
87 static const u16 atl1e_pay_load_size[] = {
88 128, 256, 512, 1024, 2048, 4096,
92 * atl1e_irq_enable - Enable default interrupt generation settings
93 * @adapter: board private structure
95 static inline void atl1e_irq_enable(struct atl1e_adapter *adapter)
97 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
98 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
99 AT_WRITE_REG(&adapter->hw, REG_IMR, IMR_NORMAL_MASK);
100 AT_WRITE_FLUSH(&adapter->hw);
105 * atl1e_irq_disable - Mask off interrupt generation on the NIC
106 * @adapter: board private structure
108 static inline void atl1e_irq_disable(struct atl1e_adapter *adapter)
110 atomic_inc(&adapter->irq_sem);
111 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
112 AT_WRITE_FLUSH(&adapter->hw);
113 synchronize_irq(adapter->pdev->irq);
117 * atl1e_irq_reset - reset interrupt confiure on the NIC
118 * @adapter: board private structure
120 static inline void atl1e_irq_reset(struct atl1e_adapter *adapter)
122 atomic_set(&adapter->irq_sem, 0);
123 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
124 AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
125 AT_WRITE_FLUSH(&adapter->hw);
129 * atl1e_phy_config - Timer Call-back
130 * @data: pointer to netdev cast into an unsigned long
132 static void atl1e_phy_config(unsigned long data)
134 struct atl1e_adapter *adapter = (struct atl1e_adapter *) data;
135 struct atl1e_hw *hw = &adapter->hw;
138 spin_lock_irqsave(&adapter->mdio_lock, flags);
139 atl1e_restart_autoneg(hw);
140 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
143 void atl1e_reinit_locked(struct atl1e_adapter *adapter)
146 WARN_ON(in_interrupt());
147 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
151 clear_bit(__AT_RESETTING, &adapter->flags);
154 static void atl1e_reset_task(struct work_struct *work)
156 struct atl1e_adapter *adapter;
157 adapter = container_of(work, struct atl1e_adapter, reset_task);
159 atl1e_reinit_locked(adapter);
162 static int atl1e_check_link(struct atl1e_adapter *adapter)
164 struct atl1e_hw *hw = &adapter->hw;
165 struct net_device *netdev = adapter->netdev;
166 struct pci_dev *pdev = adapter->pdev;
168 u16 speed, duplex, phy_data;
170 /* MII_BMSR must read twise */
171 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
172 atl1e_read_phy_reg(hw, MII_BMSR, &phy_data);
173 if ((phy_data & BMSR_LSTATUS) == 0) {
175 if (netif_carrier_ok(netdev)) { /* old link state: Up */
178 value = AT_READ_REG(hw, REG_MAC_CTRL);
179 value &= ~MAC_CTRL_RX_EN;
180 AT_WRITE_REG(hw, REG_MAC_CTRL, value);
181 adapter->link_speed = SPEED_0;
182 netif_carrier_off(netdev);
183 netif_stop_queue(netdev);
187 err = atl1e_get_speed_and_duplex(hw, &speed, &duplex);
191 /* link result is our setting */
192 if (adapter->link_speed != speed ||
193 adapter->link_duplex != duplex) {
194 adapter->link_speed = speed;
195 adapter->link_duplex = duplex;
196 atl1e_setup_mac_ctrl(adapter);
198 "%s: %s NIC Link is Up<%d Mbps %s>\n",
199 atl1e_driver_name, netdev->name,
201 adapter->link_duplex == FULL_DUPLEX ?
202 "Full Duplex" : "Half Duplex");
205 if (!netif_carrier_ok(netdev)) {
206 /* Link down -> Up */
207 netif_carrier_on(netdev);
208 netif_wake_queue(netdev);
215 * atl1e_link_chg_task - deal with link change event Out of interrupt context
216 * @netdev: network interface device structure
218 static void atl1e_link_chg_task(struct work_struct *work)
220 struct atl1e_adapter *adapter;
223 adapter = container_of(work, struct atl1e_adapter, link_chg_task);
224 spin_lock_irqsave(&adapter->mdio_lock, flags);
225 atl1e_check_link(adapter);
226 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
229 static void atl1e_link_chg_event(struct atl1e_adapter *adapter)
231 struct net_device *netdev = adapter->netdev;
232 struct pci_dev *pdev = adapter->pdev;
236 spin_lock(&adapter->mdio_lock);
237 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
238 atl1e_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
239 spin_unlock(&adapter->mdio_lock);
240 link_up = phy_data & BMSR_LSTATUS;
241 /* notify upper layer link down ASAP */
243 if (netif_carrier_ok(netdev)) {
244 /* old link state: Up */
245 dev_info(&pdev->dev, "%s: %s NIC Link is Down\n",
246 atl1e_driver_name, netdev->name);
247 adapter->link_speed = SPEED_0;
248 netif_stop_queue(netdev);
251 schedule_work(&adapter->link_chg_task);
254 static void atl1e_del_timer(struct atl1e_adapter *adapter)
256 del_timer_sync(&adapter->phy_config_timer);
259 static void atl1e_cancel_work(struct atl1e_adapter *adapter)
261 cancel_work_sync(&adapter->reset_task);
262 cancel_work_sync(&adapter->link_chg_task);
266 * atl1e_tx_timeout - Respond to a Tx Hang
267 * @netdev: network interface device structure
269 static void atl1e_tx_timeout(struct net_device *netdev)
271 struct atl1e_adapter *adapter = netdev_priv(netdev);
273 /* Do the reset outside of interrupt context */
274 schedule_work(&adapter->reset_task);
278 * atl1e_set_multi - Multicast and Promiscuous mode set
279 * @netdev: network interface device structure
281 * The set_multi entry point is called whenever the multicast address
282 * list or the network interface flags are updated. This routine is
283 * responsible for configuring the hardware for proper multicast,
284 * promiscuous mode, and all-multi behavior.
286 static void atl1e_set_multi(struct net_device *netdev)
288 struct atl1e_adapter *adapter = netdev_priv(netdev);
289 struct atl1e_hw *hw = &adapter->hw;
290 struct dev_mc_list *mc_ptr;
291 u32 mac_ctrl_data = 0;
294 /* Check for Promiscuous and All Multicast modes */
295 mac_ctrl_data = AT_READ_REG(hw, REG_MAC_CTRL);
297 if (netdev->flags & IFF_PROMISC) {
298 mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
299 } else if (netdev->flags & IFF_ALLMULTI) {
300 mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
301 mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
303 mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
306 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
308 /* clear the old settings from the multicast hash table */
309 AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
310 AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
312 /* comoute mc addresses' hash value ,and put it into hash table */
313 for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
314 hash_value = atl1e_hash_mc_addr(hw, mc_ptr->dmi_addr);
315 atl1e_hash_set(hw, hash_value);
319 static void atl1e_vlan_rx_register(struct net_device *netdev,
320 struct vlan_group *grp)
322 struct atl1e_adapter *adapter = netdev_priv(netdev);
323 struct pci_dev *pdev = adapter->pdev;
324 u32 mac_ctrl_data = 0;
326 dev_dbg(&pdev->dev, "atl1e_vlan_rx_register\n");
328 atl1e_irq_disable(adapter);
330 adapter->vlgrp = grp;
331 mac_ctrl_data = AT_READ_REG(&adapter->hw, REG_MAC_CTRL);
334 /* enable VLAN tag insert/strip */
335 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
337 /* disable VLAN tag insert/strip */
338 mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
341 AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
342 atl1e_irq_enable(adapter);
345 static void atl1e_restore_vlan(struct atl1e_adapter *adapter)
347 struct pci_dev *pdev = adapter->pdev;
349 dev_dbg(&pdev->dev, "atl1e_restore_vlan !");
350 atl1e_vlan_rx_register(adapter->netdev, adapter->vlgrp);
353 * atl1e_set_mac - Change the Ethernet Address of the NIC
354 * @netdev: network interface device structure
355 * @p: pointer to an address structure
357 * Returns 0 on success, negative on failure
359 static int atl1e_set_mac_addr(struct net_device *netdev, void *p)
361 struct atl1e_adapter *adapter = netdev_priv(netdev);
362 struct sockaddr *addr = p;
364 if (!is_valid_ether_addr(addr->sa_data))
365 return -EADDRNOTAVAIL;
367 if (netif_running(netdev))
370 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
371 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
373 atl1e_hw_set_mac_addr(&adapter->hw);
379 * atl1e_change_mtu - Change the Maximum Transfer Unit
380 * @netdev: network interface device structure
381 * @new_mtu: new value for maximum frame size
383 * Returns 0 on success, negative on failure
385 static int atl1e_change_mtu(struct net_device *netdev, int new_mtu)
387 struct atl1e_adapter *adapter = netdev_priv(netdev);
388 int old_mtu = netdev->mtu;
389 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
391 if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
392 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
393 dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
397 if (old_mtu != new_mtu && netif_running(netdev)) {
398 while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
400 netdev->mtu = new_mtu;
401 adapter->hw.max_frame_size = new_mtu;
402 adapter->hw.rx_jumbo_th = (max_frame + 7) >> 3;
405 clear_bit(__AT_RESETTING, &adapter->flags);
411 * caller should hold mdio_lock
413 static int atl1e_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
415 struct atl1e_adapter *adapter = netdev_priv(netdev);
418 atl1e_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
422 static void atl1e_mdio_write(struct net_device *netdev, int phy_id,
423 int reg_num, int val)
425 struct atl1e_adapter *adapter = netdev_priv(netdev);
427 atl1e_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
436 static int atl1e_mii_ioctl(struct net_device *netdev,
437 struct ifreq *ifr, int cmd)
439 struct atl1e_adapter *adapter = netdev_priv(netdev);
440 struct pci_dev *pdev = adapter->pdev;
441 struct mii_ioctl_data *data = if_mii(ifr);
445 if (!netif_running(netdev))
448 spin_lock_irqsave(&adapter->mdio_lock, flags);
455 if (!capable(CAP_NET_ADMIN)) {
459 if (atl1e_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
467 if (!capable(CAP_NET_ADMIN)) {
471 if (data->reg_num & ~(0x1F)) {
476 dev_dbg(&pdev->dev, "<atl1e_mii_ioctl> write %x %x",
477 data->reg_num, data->val_in);
478 if (atl1e_write_phy_reg(&adapter->hw,
479 data->reg_num, data->val_in)) {
486 retval = -EOPNOTSUPP;
490 spin_unlock_irqrestore(&adapter->mdio_lock, flags);
501 static int atl1e_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
507 return atl1e_mii_ioctl(netdev, ifr, cmd);
513 static void atl1e_setup_pcicmd(struct pci_dev *pdev)
517 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
518 cmd &= ~(PCI_COMMAND_INTX_DISABLE | PCI_COMMAND_IO);
519 cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
520 pci_write_config_word(pdev, PCI_COMMAND, cmd);
523 * some motherboards BIOS(PXE/EFI) driver may set PME
524 * while they transfer control to OS (Windows/Linux)
525 * so we should clear this bit before NIC work normally
527 pci_write_config_dword(pdev, REG_PM_CTRLSTAT, 0);
532 * atl1e_alloc_queues - Allocate memory for all rings
533 * @adapter: board private structure to initialize
536 static int __devinit atl1e_alloc_queues(struct atl1e_adapter *adapter)
542 * atl1e_sw_init - Initialize general software structures (struct atl1e_adapter)
543 * @adapter: board private structure to initialize
545 * atl1e_sw_init initializes the Adapter private data structure.
546 * Fields are initialized based on PCI device information and
547 * OS network device settings (MTU size).
549 static int __devinit atl1e_sw_init(struct atl1e_adapter *adapter)
551 struct atl1e_hw *hw = &adapter->hw;
552 struct pci_dev *pdev = adapter->pdev;
553 u32 phy_status_data = 0;
556 adapter->link_speed = SPEED_0; /* hardware init */
557 adapter->link_duplex = FULL_DUPLEX;
558 adapter->num_rx_queues = 1;
560 /* PCI config space info */
561 hw->vendor_id = pdev->vendor;
562 hw->device_id = pdev->device;
563 hw->subsystem_vendor_id = pdev->subsystem_vendor;
564 hw->subsystem_id = pdev->subsystem_device;
566 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
567 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
569 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
571 if (hw->revision_id >= 0xF0) {
572 hw->nic_type = athr_l2e_revB;
574 if (phy_status_data & PHY_STATUS_100M)
575 hw->nic_type = athr_l1e;
577 hw->nic_type = athr_l2e_revA;
580 phy_status_data = AT_READ_REG(hw, REG_PHY_STATUS);
582 if (phy_status_data & PHY_STATUS_EMI_CA)
587 hw->phy_configured = false;
588 hw->preamble_len = 7;
589 hw->max_frame_size = adapter->netdev->mtu;
590 hw->rx_jumbo_th = (hw->max_frame_size + ETH_HLEN +
591 VLAN_HLEN + ETH_FCS_LEN + 7) >> 3;
593 hw->rrs_type = atl1e_rrs_disable;
594 hw->indirect_tab = 0;
599 hw->ict = 50000; /* 100ms */
600 hw->smb_timer = 200000; /* 200ms */
603 hw->tpd_thresh = adapter->tx_ring.count / 2;
604 hw->rx_count_down = 4; /* 2us resolution */
605 hw->tx_count_down = hw->imt * 4 / 3;
606 hw->dmar_block = atl1e_dma_req_1024;
607 hw->dmaw_block = atl1e_dma_req_1024;
608 hw->dmar_dly_cnt = 15;
609 hw->dmaw_dly_cnt = 4;
611 if (atl1e_alloc_queues(adapter)) {
612 dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
616 atomic_set(&adapter->irq_sem, 1);
617 spin_lock_init(&adapter->mdio_lock);
618 spin_lock_init(&adapter->tx_lock);
620 set_bit(__AT_DOWN, &adapter->flags);
626 * atl1e_clean_tx_ring - Free Tx-skb
627 * @adapter: board private structure
629 static void atl1e_clean_tx_ring(struct atl1e_adapter *adapter)
631 struct atl1e_tx_ring *tx_ring = (struct atl1e_tx_ring *)
633 struct atl1e_tx_buffer *tx_buffer = NULL;
634 struct pci_dev *pdev = adapter->pdev;
635 u16 index, ring_count;
637 if (tx_ring->desc == NULL || tx_ring->tx_buffer == NULL)
640 ring_count = tx_ring->count;
641 /* first unmmap dma */
642 for (index = 0; index < ring_count; index++) {
643 tx_buffer = &tx_ring->tx_buffer[index];
644 if (tx_buffer->dma) {
645 pci_unmap_page(pdev, tx_buffer->dma,
646 tx_buffer->length, PCI_DMA_TODEVICE);
650 /* second free skb */
651 for (index = 0; index < ring_count; index++) {
652 tx_buffer = &tx_ring->tx_buffer[index];
653 if (tx_buffer->skb) {
654 dev_kfree_skb_any(tx_buffer->skb);
655 tx_buffer->skb = NULL;
658 /* Zero out Tx-buffers */
659 memset(tx_ring->desc, 0, sizeof(struct atl1e_tpd_desc) *
661 memset(tx_ring->tx_buffer, 0, sizeof(struct atl1e_tx_buffer) *
666 * atl1e_clean_rx_ring - Free rx-reservation skbs
667 * @adapter: board private structure
669 static void atl1e_clean_rx_ring(struct atl1e_adapter *adapter)
671 struct atl1e_rx_ring *rx_ring =
672 (struct atl1e_rx_ring *)&adapter->rx_ring;
673 struct atl1e_rx_page_desc *rx_page_desc = rx_ring->rx_page_desc;
677 if (adapter->ring_vir_addr == NULL)
679 /* Zero out the descriptor ring */
680 for (i = 0; i < adapter->num_rx_queues; i++) {
681 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
682 if (rx_page_desc[i].rx_page[j].addr != NULL) {
683 memset(rx_page_desc[i].rx_page[j].addr, 0,
684 rx_ring->real_page_size);
690 static void atl1e_cal_ring_size(struct atl1e_adapter *adapter, u32 *ring_size)
692 *ring_size = ((u32)(adapter->tx_ring.count *
693 sizeof(struct atl1e_tpd_desc) + 7
694 /* tx ring, qword align */
695 + adapter->rx_ring.real_page_size * AT_PAGE_NUM_PER_QUEUE *
696 adapter->num_rx_queues + 31
697 /* rx ring, 32 bytes align */
698 + (1 + AT_PAGE_NUM_PER_QUEUE * adapter->num_rx_queues) *
700 /* tx, rx cmd, dword align */
703 static void atl1e_init_ring_resources(struct atl1e_adapter *adapter)
705 struct atl1e_tx_ring *tx_ring = NULL;
706 struct atl1e_rx_ring *rx_ring = NULL;
708 tx_ring = &adapter->tx_ring;
709 rx_ring = &adapter->rx_ring;
711 rx_ring->real_page_size = adapter->rx_ring.page_size
712 + adapter->hw.max_frame_size
713 + ETH_HLEN + VLAN_HLEN
715 rx_ring->real_page_size = roundup(rx_ring->real_page_size, 32);
716 atl1e_cal_ring_size(adapter, &adapter->ring_size);
718 adapter->ring_vir_addr = NULL;
719 adapter->rx_ring.desc = NULL;
720 rwlock_init(&adapter->tx_ring.tx_lock);
726 * Read / Write Ptr Initialize:
728 static void atl1e_init_ring_ptrs(struct atl1e_adapter *adapter)
730 struct atl1e_tx_ring *tx_ring = NULL;
731 struct atl1e_rx_ring *rx_ring = NULL;
732 struct atl1e_rx_page_desc *rx_page_desc = NULL;
735 tx_ring = &adapter->tx_ring;
736 rx_ring = &adapter->rx_ring;
737 rx_page_desc = rx_ring->rx_page_desc;
739 tx_ring->next_to_use = 0;
740 atomic_set(&tx_ring->next_to_clean, 0);
742 for (i = 0; i < adapter->num_rx_queues; i++) {
743 rx_page_desc[i].rx_using = 0;
744 rx_page_desc[i].rx_nxseq = 0;
745 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
746 *rx_page_desc[i].rx_page[j].write_offset_addr = 0;
747 rx_page_desc[i].rx_page[j].read_offset = 0;
753 * atl1e_free_ring_resources - Free Tx / RX descriptor Resources
754 * @adapter: board private structure
756 * Free all transmit software resources
758 static void atl1e_free_ring_resources(struct atl1e_adapter *adapter)
760 struct pci_dev *pdev = adapter->pdev;
762 atl1e_clean_tx_ring(adapter);
763 atl1e_clean_rx_ring(adapter);
765 if (adapter->ring_vir_addr) {
766 pci_free_consistent(pdev, adapter->ring_size,
767 adapter->ring_vir_addr, adapter->ring_dma);
768 adapter->ring_vir_addr = NULL;
771 if (adapter->tx_ring.tx_buffer) {
772 kfree(adapter->tx_ring.tx_buffer);
773 adapter->tx_ring.tx_buffer = NULL;
778 * atl1e_setup_mem_resources - allocate Tx / RX descriptor resources
779 * @adapter: board private structure
781 * Return 0 on success, negative on failure
783 static int atl1e_setup_ring_resources(struct atl1e_adapter *adapter)
785 struct pci_dev *pdev = adapter->pdev;
786 struct atl1e_tx_ring *tx_ring;
787 struct atl1e_rx_ring *rx_ring;
788 struct atl1e_rx_page_desc *rx_page_desc;
793 if (adapter->ring_vir_addr != NULL)
794 return 0; /* alloced already */
796 tx_ring = &adapter->tx_ring;
797 rx_ring = &adapter->rx_ring;
799 /* real ring DMA buffer */
801 size = adapter->ring_size;
802 adapter->ring_vir_addr = pci_alloc_consistent(pdev,
803 adapter->ring_size, &adapter->ring_dma);
805 if (adapter->ring_vir_addr == NULL) {
806 dev_err(&pdev->dev, "pci_alloc_consistent failed, "
811 memset(adapter->ring_vir_addr, 0, adapter->ring_size);
813 rx_page_desc = rx_ring->rx_page_desc;
816 tx_ring->dma = roundup(adapter->ring_dma, 8);
817 offset = tx_ring->dma - adapter->ring_dma;
818 tx_ring->desc = (struct atl1e_tpd_desc *)
819 (adapter->ring_vir_addr + offset);
820 size = sizeof(struct atl1e_tx_buffer) * (tx_ring->count);
821 tx_ring->tx_buffer = kzalloc(size, GFP_KERNEL);
822 if (tx_ring->tx_buffer == NULL) {
823 dev_err(&pdev->dev, "kzalloc failed , size = D%d", size);
829 offset += (sizeof(struct atl1e_tpd_desc) * tx_ring->count);
830 offset = roundup(offset, 32);
832 for (i = 0; i < adapter->num_rx_queues; i++) {
833 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
834 rx_page_desc[i].rx_page[j].dma =
835 adapter->ring_dma + offset;
836 rx_page_desc[i].rx_page[j].addr =
837 adapter->ring_vir_addr + offset;
838 offset += rx_ring->real_page_size;
842 /* Init CMB dma address */
843 tx_ring->cmb_dma = adapter->ring_dma + offset;
844 tx_ring->cmb = (u32 *)(adapter->ring_vir_addr + offset);
845 offset += sizeof(u32);
847 for (i = 0; i < adapter->num_rx_queues; i++) {
848 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
849 rx_page_desc[i].rx_page[j].write_offset_dma =
850 adapter->ring_dma + offset;
851 rx_page_desc[i].rx_page[j].write_offset_addr =
852 adapter->ring_vir_addr + offset;
853 offset += sizeof(u32);
857 if (unlikely(offset > adapter->ring_size)) {
858 dev_err(&pdev->dev, "offset(%d) > ring size(%d) !!\n",
859 offset, adapter->ring_size);
866 if (adapter->ring_vir_addr != NULL) {
867 pci_free_consistent(pdev, adapter->ring_size,
868 adapter->ring_vir_addr, adapter->ring_dma);
869 adapter->ring_vir_addr = NULL;
874 static inline void atl1e_configure_des_ring(const struct atl1e_adapter *adapter)
877 struct atl1e_hw *hw = (struct atl1e_hw *)&adapter->hw;
878 struct atl1e_rx_ring *rx_ring =
879 (struct atl1e_rx_ring *)&adapter->rx_ring;
880 struct atl1e_tx_ring *tx_ring =
881 (struct atl1e_tx_ring *)&adapter->tx_ring;
882 struct atl1e_rx_page_desc *rx_page_desc = NULL;
885 AT_WRITE_REG(hw, REG_DESC_BASE_ADDR_HI,
886 (u32)((adapter->ring_dma & AT_DMA_HI_ADDR_MASK) >> 32));
887 AT_WRITE_REG(hw, REG_TPD_BASE_ADDR_LO,
888 (u32)((tx_ring->dma) & AT_DMA_LO_ADDR_MASK));
889 AT_WRITE_REG(hw, REG_TPD_RING_SIZE, (u16)(tx_ring->count));
890 AT_WRITE_REG(hw, REG_HOST_TX_CMB_LO,
891 (u32)((tx_ring->cmb_dma) & AT_DMA_LO_ADDR_MASK));
893 rx_page_desc = rx_ring->rx_page_desc;
894 /* RXF Page Physical address / Page Length */
895 for (i = 0; i < AT_MAX_RECEIVE_QUEUE; i++) {
896 AT_WRITE_REG(hw, atl1e_rx_page_hi_addr_regs[i],
897 (u32)((adapter->ring_dma &
898 AT_DMA_HI_ADDR_MASK) >> 32));
899 for (j = 0; j < AT_PAGE_NUM_PER_QUEUE; j++) {
903 page_phy_addr = rx_page_desc[i].rx_page[j].dma;
905 rx_page_desc[i].rx_page[j].write_offset_dma;
907 AT_WRITE_REG(hw, atl1e_rx_page_lo_addr_regs[i][j],
908 page_phy_addr & AT_DMA_LO_ADDR_MASK);
909 AT_WRITE_REG(hw, atl1e_rx_page_write_offset_regs[i][j],
910 offset_phy_addr & AT_DMA_LO_ADDR_MASK);
911 AT_WRITE_REGB(hw, atl1e_rx_page_vld_regs[i][j], 1);
915 AT_WRITE_REG(hw, REG_HOST_RXFPAGE_SIZE, rx_ring->page_size);
916 /* Load all of base address above */
917 AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
922 static inline void atl1e_configure_tx(struct atl1e_adapter *adapter)
924 struct atl1e_hw *hw = (struct atl1e_hw *)&adapter->hw;
925 u32 dev_ctrl_data = 0;
926 u32 max_pay_load = 0;
927 u32 jumbo_thresh = 0;
928 u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */
930 /* configure TXQ param */
931 if (hw->nic_type != athr_l2e_revB) {
932 extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
933 if (hw->max_frame_size <= 1500) {
934 jumbo_thresh = hw->max_frame_size + extra_size;
935 } else if (hw->max_frame_size < 6*1024) {
937 (hw->max_frame_size + extra_size) * 2 / 3;
939 jumbo_thresh = (hw->max_frame_size + extra_size) / 2;
941 AT_WRITE_REG(hw, REG_TX_EARLY_TH, (jumbo_thresh + 7) >> 3);
944 dev_ctrl_data = AT_READ_REG(hw, REG_DEVICE_CTRL);
946 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT)) &
947 DEVICE_CTRL_MAX_PAYLOAD_MASK;
949 hw->dmaw_block = min(max_pay_load, hw->dmaw_block);
951 max_pay_load = ((dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT)) &
952 DEVICE_CTRL_MAX_RREQ_SZ_MASK;
953 hw->dmar_block = min(max_pay_load, hw->dmar_block);
955 if (hw->nic_type != athr_l2e_revB)
956 AT_WRITE_REGW(hw, REG_TXQ_CTRL + 2,
957 atl1e_pay_load_size[hw->dmar_block]);
959 AT_WRITE_REGW(hw, REG_TXQ_CTRL,
960 (((u16)hw->tpd_burst & TXQ_CTRL_NUM_TPD_BURST_MASK)
961 << TXQ_CTRL_NUM_TPD_BURST_SHIFT)
962 | TXQ_CTRL_ENH_MODE | TXQ_CTRL_EN);
966 static inline void atl1e_configure_rx(struct atl1e_adapter *adapter)
968 struct atl1e_hw *hw = (struct atl1e_hw *)&adapter->hw;
972 u32 rxf_thresh_data = 0;
973 u32 rxq_ctrl_data = 0;
975 if (hw->nic_type != athr_l2e_revB) {
976 AT_WRITE_REGW(hw, REG_RXQ_JMBOSZ_RRDTIM,
977 (u16)((hw->rx_jumbo_th & RXQ_JMBOSZ_TH_MASK) <<
978 RXQ_JMBOSZ_TH_SHIFT |
979 (1 & RXQ_JMBO_LKAH_MASK) <<
980 RXQ_JMBO_LKAH_SHIFT));
982 rxf_len = AT_READ_REG(hw, REG_SRAM_RXF_LEN);
983 rxf_high = rxf_len * 4 / 5;
984 rxf_low = rxf_len / 5;
985 rxf_thresh_data = ((rxf_high & RXQ_RXF_PAUSE_TH_HI_MASK)
986 << RXQ_RXF_PAUSE_TH_HI_SHIFT) |
987 ((rxf_low & RXQ_RXF_PAUSE_TH_LO_MASK)
988 << RXQ_RXF_PAUSE_TH_LO_SHIFT);
990 AT_WRITE_REG(hw, REG_RXQ_RXF_PAUSE_THRESH, rxf_thresh_data);
994 AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
995 AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
997 if (hw->rrs_type & atl1e_rrs_ipv4)
998 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4;
1000 if (hw->rrs_type & atl1e_rrs_ipv4_tcp)
1001 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV4_TCP;
1003 if (hw->rrs_type & atl1e_rrs_ipv6)
1004 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6;
1006 if (hw->rrs_type & atl1e_rrs_ipv6_tcp)
1007 rxq_ctrl_data |= RXQ_CTRL_HASH_TYPE_IPV6_TCP;
1009 if (hw->rrs_type != atl1e_rrs_disable)
1011 (RXQ_CTRL_HASH_ENABLE | RXQ_CTRL_RSS_MODE_MQUESINT);
1013 rxq_ctrl_data |= RXQ_CTRL_IPV6_XSUM_VERIFY_EN | RXQ_CTRL_PBA_ALIGN_32 |
1014 RXQ_CTRL_CUT_THRU_EN | RXQ_CTRL_EN;
1016 AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
1020 static inline void atl1e_configure_dma(struct atl1e_adapter *adapter)
1022 struct atl1e_hw *hw = &adapter->hw;
1023 u32 dma_ctrl_data = 0;
1025 dma_ctrl_data = DMA_CTRL_RXCMB_EN;
1026 dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
1027 << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
1028 dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
1029 << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
1030 dma_ctrl_data |= DMA_CTRL_DMAR_REQ_PRI | DMA_CTRL_DMAR_OUT_ORDER;
1031 dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
1032 << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
1033 dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
1034 << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
1036 AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
1040 static void atl1e_setup_mac_ctrl(struct atl1e_adapter *adapter)
1043 struct atl1e_hw *hw = &adapter->hw;
1044 struct net_device *netdev = adapter->netdev;
1046 /* Config MAC CTRL Register */
1047 value = MAC_CTRL_TX_EN |
1050 if (FULL_DUPLEX == adapter->link_duplex)
1051 value |= MAC_CTRL_DUPLX;
1053 value |= ((u32)((SPEED_1000 == adapter->link_speed) ?
1054 MAC_CTRL_SPEED_1000 : MAC_CTRL_SPEED_10_100) <<
1055 MAC_CTRL_SPEED_SHIFT);
1056 value |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
1058 value |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
1059 value |= (((u32)adapter->hw.preamble_len &
1060 MAC_CTRL_PRMLEN_MASK) << MAC_CTRL_PRMLEN_SHIFT);
1063 value |= MAC_CTRL_RMV_VLAN;
1065 value |= MAC_CTRL_BC_EN;
1066 if (netdev->flags & IFF_PROMISC)
1067 value |= MAC_CTRL_PROMIS_EN;
1068 if (netdev->flags & IFF_ALLMULTI)
1069 value |= MAC_CTRL_MC_ALL_EN;
1071 AT_WRITE_REG(hw, REG_MAC_CTRL, value);
1075 * atl1e_configure - Configure Transmit&Receive Unit after Reset
1076 * @adapter: board private structure
1078 * Configure the Tx /Rx unit of the MAC after a reset.
1080 static int atl1e_configure(struct atl1e_adapter *adapter)
1082 struct atl1e_hw *hw = &adapter->hw;
1083 struct pci_dev *pdev = adapter->pdev;
1085 u32 intr_status_data = 0;
1087 /* clear interrupt status */
1088 AT_WRITE_REG(hw, REG_ISR, ~0);
1090 /* 1. set MAC Address */
1091 atl1e_hw_set_mac_addr(hw);
1093 /* 2. Init the Multicast HASH table done by set_muti */
1095 /* 3. Clear any WOL status */
1096 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
1098 /* 4. Descripter Ring BaseMem/Length/Read ptr/Write ptr
1099 * TPD Ring/SMB/RXF0 Page CMBs, they use the same
1100 * High 32bits memory */
1101 atl1e_configure_des_ring(adapter);
1103 /* 5. set Interrupt Moderator Timer */
1104 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER_INIT, hw->imt);
1105 AT_WRITE_REGW(hw, REG_IRQ_MODU_TIMER2_INIT, hw->imt);
1106 AT_WRITE_REG(hw, REG_MASTER_CTRL, MASTER_CTRL_LED_MODE |
1107 MASTER_CTRL_ITIMER_EN | MASTER_CTRL_ITIMER2_EN);
1109 /* 6. rx/tx threshold to trig interrupt */
1110 AT_WRITE_REGW(hw, REG_TRIG_RRD_THRESH, hw->rrd_thresh);
1111 AT_WRITE_REGW(hw, REG_TRIG_TPD_THRESH, hw->tpd_thresh);
1112 AT_WRITE_REGW(hw, REG_TRIG_RXTIMER, hw->rx_count_down);
1113 AT_WRITE_REGW(hw, REG_TRIG_TXTIMER, hw->tx_count_down);
1115 /* 7. set Interrupt Clear Timer */
1116 AT_WRITE_REGW(hw, REG_CMBDISDMA_TIMER, hw->ict);
1119 AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
1120 VLAN_HLEN + ETH_FCS_LEN);
1122 /* 9. config TXQ early tx threshold */
1123 atl1e_configure_tx(adapter);
1125 /* 10. config RXQ */
1126 atl1e_configure_rx(adapter);
1128 /* 11. config DMA Engine */
1129 atl1e_configure_dma(adapter);
1131 /* 12. smb timer to trig interrupt */
1132 AT_WRITE_REG(hw, REG_SMB_STAT_TIMER, hw->smb_timer);
1134 intr_status_data = AT_READ_REG(hw, REG_ISR);
1135 if (unlikely((intr_status_data & ISR_PHY_LINKDOWN) != 0)) {
1136 dev_err(&pdev->dev, "atl1e_configure failed,"
1137 "PCIE phy link down\n");
1141 AT_WRITE_REG(hw, REG_ISR, 0x7fffffff);
1146 * atl1e_get_stats - Get System Network Statistics
1147 * @netdev: network interface device structure
1149 * Returns the address of the device statistics structure.
1150 * The statistics are actually updated from the timer callback.
1152 static struct net_device_stats *atl1e_get_stats(struct net_device *netdev)
1154 struct atl1e_adapter *adapter = netdev_priv(netdev);
1155 struct atl1e_hw_stats *hw_stats = &adapter->hw_stats;
1156 struct net_device_stats *net_stats = &adapter->net_stats;
1158 net_stats->rx_packets = hw_stats->rx_ok;
1159 net_stats->tx_packets = hw_stats->tx_ok;
1160 net_stats->rx_bytes = hw_stats->rx_byte_cnt;
1161 net_stats->tx_bytes = hw_stats->tx_byte_cnt;
1162 net_stats->multicast = hw_stats->rx_mcast;
1163 net_stats->collisions = hw_stats->tx_1_col +
1164 hw_stats->tx_2_col * 2 +
1165 hw_stats->tx_late_col + hw_stats->tx_abort_col;
1167 net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
1168 hw_stats->rx_len_err + hw_stats->rx_sz_ov +
1169 hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
1170 net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
1171 net_stats->rx_length_errors = hw_stats->rx_len_err;
1172 net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
1173 net_stats->rx_frame_errors = hw_stats->rx_align_err;
1174 net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1176 net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
1178 net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
1179 hw_stats->tx_underrun + hw_stats->tx_trunc;
1180 net_stats->tx_fifo_errors = hw_stats->tx_underrun;
1181 net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
1182 net_stats->tx_window_errors = hw_stats->tx_late_col;
1184 return &adapter->net_stats;
1187 static void atl1e_update_hw_stats(struct atl1e_adapter *adapter)
1189 u16 hw_reg_addr = 0;
1190 unsigned long *stats_item = NULL;
1192 /* update rx status */
1193 hw_reg_addr = REG_MAC_RX_STATUS_BIN;
1194 stats_item = &adapter->hw_stats.rx_ok;
1195 while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
1196 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1200 /* update tx status */
1201 hw_reg_addr = REG_MAC_TX_STATUS_BIN;
1202 stats_item = &adapter->hw_stats.tx_ok;
1203 while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
1204 *stats_item += AT_READ_REG(&adapter->hw, hw_reg_addr);
1210 static inline void atl1e_clear_phy_int(struct atl1e_adapter *adapter)
1214 spin_lock(&adapter->mdio_lock);
1215 atl1e_read_phy_reg(&adapter->hw, MII_INT_STATUS, &phy_data);
1216 spin_unlock(&adapter->mdio_lock);
1219 static bool atl1e_clean_tx_irq(struct atl1e_adapter *adapter)
1221 struct atl1e_tx_ring *tx_ring = (struct atl1e_tx_ring *)
1223 struct atl1e_tx_buffer *tx_buffer = NULL;
1224 u16 hw_next_to_clean = AT_READ_REGW(&adapter->hw, REG_TPD_CONS_IDX);
1225 u16 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1227 while (next_to_clean != hw_next_to_clean) {
1228 tx_buffer = &tx_ring->tx_buffer[next_to_clean];
1229 if (tx_buffer->dma) {
1230 pci_unmap_page(adapter->pdev, tx_buffer->dma,
1231 tx_buffer->length, PCI_DMA_TODEVICE);
1235 if (tx_buffer->skb) {
1236 dev_kfree_skb_irq(tx_buffer->skb);
1237 tx_buffer->skb = NULL;
1240 if (++next_to_clean == tx_ring->count)
1244 atomic_set(&tx_ring->next_to_clean, next_to_clean);
1246 if (netif_queue_stopped(adapter->netdev) &&
1247 netif_carrier_ok(adapter->netdev)) {
1248 netif_wake_queue(adapter->netdev);
1255 * atl1e_intr - Interrupt Handler
1256 * @irq: interrupt number
1257 * @data: pointer to a network interface device structure
1258 * @pt_regs: CPU registers structure
1260 static irqreturn_t atl1e_intr(int irq, void *data)
1262 struct net_device *netdev = data;
1263 struct atl1e_adapter *adapter = netdev_priv(netdev);
1264 struct pci_dev *pdev = adapter->pdev;
1265 struct atl1e_hw *hw = &adapter->hw;
1266 int max_ints = AT_MAX_INT_WORK;
1267 int handled = IRQ_NONE;
1271 status = AT_READ_REG(hw, REG_ISR);
1272 if ((status & IMR_NORMAL_MASK) == 0 ||
1273 (status & ISR_DIS_INT) != 0) {
1274 if (max_ints != AT_MAX_INT_WORK)
1275 handled = IRQ_HANDLED;
1279 if (status & ISR_GPHY)
1280 atl1e_clear_phy_int(adapter);
1282 AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
1284 handled = IRQ_HANDLED;
1285 /* check if PCIE PHY Link down */
1286 if (status & ISR_PHY_LINKDOWN) {
1288 "pcie phy linkdown %x\n", status);
1289 if (netif_running(adapter->netdev)) {
1291 atl1e_irq_reset(adapter);
1292 schedule_work(&adapter->reset_task);
1297 /* check if DMA read/write error */
1298 if (status & (ISR_DMAR_TO_RST | ISR_DMAW_TO_RST)) {
1300 "PCIE DMA RW error (status = 0x%x)\n",
1302 atl1e_irq_reset(adapter);
1303 schedule_work(&adapter->reset_task);
1307 if (status & ISR_SMB)
1308 atl1e_update_hw_stats(adapter);
1311 if (status & (ISR_GPHY | ISR_MANUAL)) {
1312 adapter->net_stats.tx_carrier_errors++;
1313 atl1e_link_chg_event(adapter);
1317 /* transmit event */
1318 if (status & ISR_TX_EVENT)
1319 atl1e_clean_tx_irq(adapter);
1321 if (status & ISR_RX_EVENT) {
1323 * disable rx interrupts, without
1324 * the synchronize_irq bit
1326 AT_WRITE_REG(hw, REG_IMR,
1327 IMR_NORMAL_MASK & ~ISR_RX_EVENT);
1329 if (likely(napi_schedule_prep(
1331 __napi_schedule(&adapter->napi);
1333 } while (--max_ints > 0);
1334 /* re-enable Interrupt*/
1335 AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
1340 static inline void atl1e_rx_checksum(struct atl1e_adapter *adapter,
1341 struct sk_buff *skb, struct atl1e_recv_ret_status *prrs)
1343 u8 *packet = (u8 *)(prrs + 1);
1345 u16 head_len = ETH_HLEN;
1349 skb->ip_summed = CHECKSUM_NONE;
1350 pkt_flags = prrs->pkt_flag;
1351 err_flags = prrs->err_flag;
1352 if (((pkt_flags & RRS_IS_IPV4) || (pkt_flags & RRS_IS_IPV6)) &&
1353 ((pkt_flags & RRS_IS_TCP) || (pkt_flags & RRS_IS_UDP))) {
1354 if (pkt_flags & RRS_IS_IPV4) {
1355 if (pkt_flags & RRS_IS_802_3)
1357 iph = (struct iphdr *) (packet + head_len);
1358 if (iph->frag_off != 0 && !(pkt_flags & RRS_IS_IP_DF))
1361 if (!(err_flags & (RRS_ERR_IP_CSUM | RRS_ERR_L4_CSUM))) {
1362 skb->ip_summed = CHECKSUM_UNNECESSARY;
1371 static struct atl1e_rx_page *atl1e_get_rx_page(struct atl1e_adapter *adapter,
1374 struct atl1e_rx_page_desc *rx_page_desc =
1375 (struct atl1e_rx_page_desc *) adapter->rx_ring.rx_page_desc;
1376 u8 rx_using = rx_page_desc[que].rx_using;
1378 return (struct atl1e_rx_page *)&(rx_page_desc[que].rx_page[rx_using]);
1381 static void atl1e_clean_rx_irq(struct atl1e_adapter *adapter, u8 que,
1382 int *work_done, int work_to_do)
1384 struct pci_dev *pdev = adapter->pdev;
1385 struct net_device *netdev = adapter->netdev;
1386 struct atl1e_rx_ring *rx_ring = (struct atl1e_rx_ring *)
1388 struct atl1e_rx_page_desc *rx_page_desc =
1389 (struct atl1e_rx_page_desc *) rx_ring->rx_page_desc;
1390 struct sk_buff *skb = NULL;
1391 struct atl1e_rx_page *rx_page = atl1e_get_rx_page(adapter, que);
1392 u32 packet_size, write_offset;
1393 struct atl1e_recv_ret_status *prrs;
1395 write_offset = *(rx_page->write_offset_addr);
1396 if (likely(rx_page->read_offset < write_offset)) {
1398 if (*work_done >= work_to_do)
1401 /* get new packet's rrs */
1402 prrs = (struct atl1e_recv_ret_status *) (rx_page->addr +
1403 rx_page->read_offset);
1404 /* check sequence number */
1405 if (prrs->seq_num != rx_page_desc[que].rx_nxseq) {
1407 "rx sequence number"
1408 " error (rx=%d) (expect=%d)\n",
1410 rx_page_desc[que].rx_nxseq);
1411 rx_page_desc[que].rx_nxseq++;
1412 /* just for debug use */
1413 AT_WRITE_REG(&adapter->hw, REG_DEBUG_DATA0,
1414 (((u32)prrs->seq_num) << 16) |
1415 rx_page_desc[que].rx_nxseq);
1418 rx_page_desc[que].rx_nxseq++;
1421 if (prrs->pkt_flag & RRS_IS_ERR_FRAME) {
1422 if (prrs->err_flag & (RRS_ERR_BAD_CRC |
1423 RRS_ERR_DRIBBLE | RRS_ERR_CODE |
1425 /* hardware error, discard this packet*/
1427 "rx packet desc error %x\n",
1428 *((u32 *)prrs + 1));
1433 packet_size = ((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1434 RRS_PKT_SIZE_MASK) - 4; /* CRC */
1435 skb = netdev_alloc_skb(netdev,
1436 packet_size + NET_IP_ALIGN);
1438 dev_warn(&pdev->dev, "%s: Memory squeeze,"
1439 "deferring packet.\n", netdev->name);
1442 skb_reserve(skb, NET_IP_ALIGN);
1444 memcpy(skb->data, (u8 *)(prrs + 1), packet_size);
1445 skb_put(skb, packet_size);
1446 skb->protocol = eth_type_trans(skb, netdev);
1447 atl1e_rx_checksum(adapter, skb, prrs);
1449 if (unlikely(adapter->vlgrp &&
1450 (prrs->pkt_flag & RRS_IS_VLAN_TAG))) {
1451 u16 vlan_tag = (prrs->vtag >> 4) |
1452 ((prrs->vtag & 7) << 13) |
1453 ((prrs->vtag & 8) << 9);
1455 "RXD VLAN TAG<RRD>=0x%04x\n",
1457 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
1460 netif_receive_skb(skb);
1464 /* skip current packet whether it's ok or not. */
1465 rx_page->read_offset +=
1466 (((u32)((prrs->word1 >> RRS_PKT_SIZE_SHIFT) &
1467 RRS_PKT_SIZE_MASK) +
1468 sizeof(struct atl1e_recv_ret_status) + 31) &
1471 if (rx_page->read_offset >= rx_ring->page_size) {
1472 /* mark this page clean */
1476 rx_page->read_offset =
1477 *(rx_page->write_offset_addr) = 0;
1478 rx_using = rx_page_desc[que].rx_using;
1480 atl1e_rx_page_vld_regs[que][rx_using];
1481 AT_WRITE_REGB(&adapter->hw, reg_addr, 1);
1482 rx_page_desc[que].rx_using ^= 1;
1483 rx_page = atl1e_get_rx_page(adapter, que);
1485 write_offset = *(rx_page->write_offset_addr);
1486 } while (rx_page->read_offset < write_offset);
1492 if (!test_bit(__AT_DOWN, &adapter->flags))
1493 schedule_work(&adapter->reset_task);
1497 * atl1e_clean - NAPI Rx polling callback
1498 * @adapter: board private structure
1500 static int atl1e_clean(struct napi_struct *napi, int budget)
1502 struct atl1e_adapter *adapter =
1503 container_of(napi, struct atl1e_adapter, napi);
1504 struct pci_dev *pdev = adapter->pdev;
1508 /* Keep link state information with original netdev */
1509 if (!netif_carrier_ok(adapter->netdev))
1512 atl1e_clean_rx_irq(adapter, 0, &work_done, budget);
1514 /* If no Tx and not enough Rx work done, exit the polling mode */
1515 if (work_done < budget) {
1517 napi_complete(napi);
1518 imr_data = AT_READ_REG(&adapter->hw, REG_IMR);
1519 AT_WRITE_REG(&adapter->hw, REG_IMR, imr_data | ISR_RX_EVENT);
1521 if (test_bit(__AT_DOWN, &adapter->flags)) {
1522 atomic_dec(&adapter->irq_sem);
1524 "atl1e_clean is called when AT_DOWN\n");
1526 /* reenable RX intr */
1527 /*atl1e_irq_enable(adapter); */
1533 #ifdef CONFIG_NET_POLL_CONTROLLER
1536 * Polling 'interrupt' - used by things like netconsole to send skbs
1537 * without having to re-enable interrupts. It's not called while
1538 * the interrupt routine is executing.
1540 static void atl1e_netpoll(struct net_device *netdev)
1542 struct atl1e_adapter *adapter = netdev_priv(netdev);
1544 disable_irq(adapter->pdev->irq);
1545 atl1e_intr(adapter->pdev->irq, netdev);
1546 enable_irq(adapter->pdev->irq);
1550 static inline u16 atl1e_tpd_avail(struct atl1e_adapter *adapter)
1552 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1553 u16 next_to_use = 0;
1554 u16 next_to_clean = 0;
1556 next_to_clean = atomic_read(&tx_ring->next_to_clean);
1557 next_to_use = tx_ring->next_to_use;
1559 return (u16)(next_to_clean > next_to_use) ?
1560 (next_to_clean - next_to_use - 1) :
1561 (tx_ring->count + next_to_clean - next_to_use - 1);
1565 * get next usable tpd
1566 * Note: should call atl1e_tdp_avail to make sure
1567 * there is enough tpd to use
1569 static struct atl1e_tpd_desc *atl1e_get_tpd(struct atl1e_adapter *adapter)
1571 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1572 u16 next_to_use = 0;
1574 next_to_use = tx_ring->next_to_use;
1575 if (++tx_ring->next_to_use == tx_ring->count)
1576 tx_ring->next_to_use = 0;
1578 memset(&tx_ring->desc[next_to_use], 0, sizeof(struct atl1e_tpd_desc));
1579 return (struct atl1e_tpd_desc *)&tx_ring->desc[next_to_use];
1582 static struct atl1e_tx_buffer *
1583 atl1e_get_tx_buffer(struct atl1e_adapter *adapter, struct atl1e_tpd_desc *tpd)
1585 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1587 return &tx_ring->tx_buffer[tpd - tx_ring->desc];
1590 /* Calculate the transmit packet descript needed*/
1591 static u16 atl1e_cal_tdp_req(const struct sk_buff *skb)
1596 u16 proto_hdr_len = 0;
1598 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
1599 fg_size = skb_shinfo(skb)->frags[i].size;
1600 tpd_req += ((fg_size + MAX_TX_BUF_LEN - 1) >> MAX_TX_BUF_SHIFT);
1603 if (skb_is_gso(skb)) {
1604 if (skb->protocol == ntohs(ETH_P_IP) ||
1605 (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6)) {
1606 proto_hdr_len = skb_transport_offset(skb) +
1608 if (proto_hdr_len < skb_headlen(skb)) {
1609 tpd_req += ((skb_headlen(skb) - proto_hdr_len +
1610 MAX_TX_BUF_LEN - 1) >>
1619 static int atl1e_tso_csum(struct atl1e_adapter *adapter,
1620 struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1622 struct pci_dev *pdev = adapter->pdev;
1625 unsigned short offload_type;
1628 if (skb_is_gso(skb)) {
1629 if (skb_header_cloned(skb)) {
1630 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1634 offload_type = skb_shinfo(skb)->gso_type;
1636 if (offload_type & SKB_GSO_TCPV4) {
1637 real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
1638 + ntohs(ip_hdr(skb)->tot_len));
1640 if (real_len < skb->len)
1641 pskb_trim(skb, real_len);
1643 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1644 if (unlikely(skb->len == hdr_len)) {
1645 /* only xsum need */
1646 dev_warn(&pdev->dev,
1647 "IPV4 tso with zero data??\n");
1650 ip_hdr(skb)->check = 0;
1651 ip_hdr(skb)->tot_len = 0;
1652 tcp_hdr(skb)->check = ~csum_tcpudp_magic(
1656 tpd->word3 |= (ip_hdr(skb)->ihl &
1657 TDP_V4_IPHL_MASK) <<
1659 tpd->word3 |= ((tcp_hdrlen(skb) >> 2) &
1660 TPD_TCPHDRLEN_MASK) <<
1661 TPD_TCPHDRLEN_SHIFT;
1662 tpd->word3 |= ((skb_shinfo(skb)->gso_size) &
1663 TPD_MSS_MASK) << TPD_MSS_SHIFT;
1664 tpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
1669 if (offload_type & SKB_GSO_TCPV6) {
1670 real_len = (((unsigned char *)ipv6_hdr(skb) - skb->data)
1671 + ntohs(ipv6_hdr(skb)->payload_len));
1672 if (real_len < skb->len)
1673 pskb_trim(skb, real_len);
1675 /* check payload == 0 byte ? */
1676 hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
1677 if (unlikely(skb->len == hdr_len)) {
1678 /* only xsum need */
1679 dev_warn(&pdev->dev,
1680 "IPV6 tso with zero data??\n");
1683 tcp_hdr(skb)->check = ~csum_ipv6_magic(
1684 &ipv6_hdr(skb)->saddr,
1685 &ipv6_hdr(skb)->daddr,
1687 tpd->word3 |= 1 << TPD_IP_VERSION_SHIFT;
1689 tpd->word3 |= (hdr_len & TPD_V6_IPHLLO_MASK) <<
1690 TPD_V6_IPHLLO_SHIFT;
1691 tpd->word3 |= ((hdr_len >> 3) &
1692 TPD_V6_IPHLHI_MASK) <<
1693 TPD_V6_IPHLHI_SHIFT;
1694 tpd->word3 |= (tcp_hdrlen(skb) >> 2 &
1695 TPD_TCPHDRLEN_MASK) <<
1696 TPD_TCPHDRLEN_SHIFT;
1697 tpd->word3 |= ((skb_shinfo(skb)->gso_size) &
1698 TPD_MSS_MASK) << TPD_MSS_SHIFT;
1699 tpd->word3 |= 1 << TPD_SEGMENT_EN_SHIFT;
1706 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
1709 cso = skb_transport_offset(skb);
1710 if (unlikely(cso & 0x1)) {
1711 dev_err(&adapter->pdev->dev,
1712 "pay load offset should not ant event number\n");
1715 css = cso + skb->csum_offset;
1716 tpd->word3 |= (cso & TPD_PLOADOFFSET_MASK) <<
1717 TPD_PLOADOFFSET_SHIFT;
1718 tpd->word3 |= (css & TPD_CCSUMOFFSET_MASK) <<
1719 TPD_CCSUMOFFSET_SHIFT;
1720 tpd->word3 |= 1 << TPD_CC_SEGMENT_EN_SHIFT;
1727 static void atl1e_tx_map(struct atl1e_adapter *adapter,
1728 struct sk_buff *skb, struct atl1e_tpd_desc *tpd)
1730 struct atl1e_tpd_desc *use_tpd = NULL;
1731 struct atl1e_tx_buffer *tx_buffer = NULL;
1732 u16 buf_len = skb->len - skb->data_len;
1740 nr_frags = skb_shinfo(skb)->nr_frags;
1741 segment = (tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK;
1744 map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
1747 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1748 tx_buffer->length = map_len;
1749 tx_buffer->dma = pci_map_single(adapter->pdev,
1750 skb->data, hdr_len, PCI_DMA_TODEVICE);
1751 mapped_len += map_len;
1752 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1753 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1754 ((cpu_to_le32(tx_buffer->length) &
1755 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1758 while (mapped_len < buf_len) {
1759 /* mapped_len == 0, means we should use the first tpd,
1760 which is given by caller */
1761 if (mapped_len == 0) {
1764 use_tpd = atl1e_get_tpd(adapter);
1765 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1767 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1768 tx_buffer->skb = NULL;
1770 tx_buffer->length = map_len =
1771 ((buf_len - mapped_len) >= MAX_TX_BUF_LEN) ?
1772 MAX_TX_BUF_LEN : (buf_len - mapped_len);
1774 pci_map_single(adapter->pdev, skb->data + mapped_len,
1775 map_len, PCI_DMA_TODEVICE);
1776 mapped_len += map_len;
1777 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1778 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1779 ((cpu_to_le32(tx_buffer->length) &
1780 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1783 for (f = 0; f < nr_frags; f++) {
1784 struct skb_frag_struct *frag;
1788 frag = &skb_shinfo(skb)->frags[f];
1789 buf_len = frag->size;
1791 seg_num = (buf_len + MAX_TX_BUF_LEN - 1) / MAX_TX_BUF_LEN;
1792 for (i = 0; i < seg_num; i++) {
1793 use_tpd = atl1e_get_tpd(adapter);
1794 memcpy(use_tpd, tpd, sizeof(struct atl1e_tpd_desc));
1796 tx_buffer = atl1e_get_tx_buffer(adapter, use_tpd);
1800 tx_buffer->skb = NULL;
1802 (buf_len > MAX_TX_BUF_LEN) ?
1803 MAX_TX_BUF_LEN : buf_len;
1804 buf_len -= tx_buffer->length;
1807 pci_map_page(adapter->pdev, frag->page,
1809 (i * MAX_TX_BUF_LEN),
1812 use_tpd->buffer_addr = cpu_to_le64(tx_buffer->dma);
1813 use_tpd->word2 = (use_tpd->word2 & (~TPD_BUFLEN_MASK)) |
1814 ((cpu_to_le32(tx_buffer->length) &
1815 TPD_BUFLEN_MASK) << TPD_BUFLEN_SHIFT);
1819 if ((tpd->word3 >> TPD_SEGMENT_EN_SHIFT) & TPD_SEGMENT_EN_MASK)
1820 /* note this one is a tcp header */
1821 tpd->word3 |= 1 << TPD_HDRFLAG_SHIFT;
1824 use_tpd->word3 |= 1 << TPD_EOP_SHIFT;
1825 /* The last buffer info contain the skb address,
1826 so it will be free after unmap */
1827 tx_buffer->skb = skb;
1830 static void atl1e_tx_queue(struct atl1e_adapter *adapter, u16 count,
1831 struct atl1e_tpd_desc *tpd)
1833 struct atl1e_tx_ring *tx_ring = &adapter->tx_ring;
1834 /* Force memory writes to complete before letting h/w
1835 * know there are new descriptors to fetch. (Only
1836 * applicable for weak-ordered memory model archs,
1837 * such as IA-64). */
1839 AT_WRITE_REG(&adapter->hw, REG_MB_TPD_PROD_IDX, tx_ring->next_to_use);
1842 static int atl1e_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1844 struct atl1e_adapter *adapter = netdev_priv(netdev);
1845 unsigned long flags;
1847 struct atl1e_tpd_desc *tpd;
1849 if (test_bit(__AT_DOWN, &adapter->flags)) {
1850 dev_kfree_skb_any(skb);
1851 return NETDEV_TX_OK;
1854 if (unlikely(skb->len <= 0)) {
1855 dev_kfree_skb_any(skb);
1856 return NETDEV_TX_OK;
1858 tpd_req = atl1e_cal_tdp_req(skb);
1859 if (!spin_trylock_irqsave(&adapter->tx_lock, flags))
1860 return NETDEV_TX_LOCKED;
1862 if (atl1e_tpd_avail(adapter) < tpd_req) {
1863 /* no enough descriptor, just stop queue */
1864 netif_stop_queue(netdev);
1865 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1866 return NETDEV_TX_BUSY;
1869 tpd = atl1e_get_tpd(adapter);
1871 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1872 u16 vlan_tag = vlan_tx_tag_get(skb);
1875 tpd->word3 |= 1 << TPD_INS_VL_TAG_SHIFT;
1876 AT_VLAN_TAG_TO_TPD_TAG(vlan_tag, atl1e_vlan_tag);
1877 tpd->word2 |= (atl1e_vlan_tag & TPD_VLANTAG_MASK) <<
1881 if (skb->protocol == ntohs(ETH_P_8021Q))
1882 tpd->word3 |= 1 << TPD_VL_TAGGED_SHIFT;
1884 if (skb_network_offset(skb) != ETH_HLEN)
1885 tpd->word3 |= 1 << TPD_ETHTYPE_SHIFT; /* 802.3 frame */
1887 /* do TSO and check sum */
1888 if (atl1e_tso_csum(adapter, skb, tpd) != 0) {
1889 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1890 dev_kfree_skb_any(skb);
1891 return NETDEV_TX_OK;
1894 atl1e_tx_map(adapter, skb, tpd);
1895 atl1e_tx_queue(adapter, tpd_req, tpd);
1897 netdev->trans_start = jiffies;
1898 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1899 return NETDEV_TX_OK;
1902 static void atl1e_free_irq(struct atl1e_adapter *adapter)
1904 struct net_device *netdev = adapter->netdev;
1906 free_irq(adapter->pdev->irq, netdev);
1908 if (adapter->have_msi)
1909 pci_disable_msi(adapter->pdev);
1912 static int atl1e_request_irq(struct atl1e_adapter *adapter)
1914 struct pci_dev *pdev = adapter->pdev;
1915 struct net_device *netdev = adapter->netdev;
1919 adapter->have_msi = true;
1920 err = pci_enable_msi(adapter->pdev);
1923 "Unable to allocate MSI interrupt Error: %d\n", err);
1924 adapter->have_msi = false;
1926 netdev->irq = pdev->irq;
1929 if (!adapter->have_msi)
1930 flags |= IRQF_SHARED;
1931 err = request_irq(adapter->pdev->irq, &atl1e_intr, flags,
1932 netdev->name, netdev);
1935 "Unable to allocate interrupt Error: %d\n", err);
1936 if (adapter->have_msi)
1937 pci_disable_msi(adapter->pdev);
1940 dev_dbg(&pdev->dev, "atl1e_request_irq OK\n");
1944 int atl1e_up(struct atl1e_adapter *adapter)
1946 struct net_device *netdev = adapter->netdev;
1950 /* hardware has been reset, we need to reload some things */
1951 err = atl1e_init_hw(&adapter->hw);
1956 atl1e_init_ring_ptrs(adapter);
1957 atl1e_set_multi(netdev);
1958 atl1e_restore_vlan(adapter);
1960 if (atl1e_configure(adapter)) {
1965 clear_bit(__AT_DOWN, &adapter->flags);
1966 napi_enable(&adapter->napi);
1967 atl1e_irq_enable(adapter);
1968 val = AT_READ_REG(&adapter->hw, REG_MASTER_CTRL);
1969 AT_WRITE_REG(&adapter->hw, REG_MASTER_CTRL,
1970 val | MASTER_CTRL_MANUAL_INT);
1976 void atl1e_down(struct atl1e_adapter *adapter)
1978 struct net_device *netdev = adapter->netdev;
1980 /* signal that we're down so the interrupt handler does not
1981 * reschedule our watchdog timer */
1982 set_bit(__AT_DOWN, &adapter->flags);
1985 netif_stop_queue(netdev);
1987 netif_tx_disable(netdev);
1990 /* reset MAC to disable all RX/TX */
1991 atl1e_reset_hw(&adapter->hw);
1994 napi_disable(&adapter->napi);
1995 atl1e_del_timer(adapter);
1996 atl1e_irq_disable(adapter);
1998 netif_carrier_off(netdev);
1999 adapter->link_speed = SPEED_0;
2000 adapter->link_duplex = -1;
2001 atl1e_clean_tx_ring(adapter);
2002 atl1e_clean_rx_ring(adapter);
2006 * atl1e_open - Called when a network interface is made active
2007 * @netdev: network interface device structure
2009 * Returns 0 on success, negative value on failure
2011 * The open entry point is called when a network interface is made
2012 * active by the system (IFF_UP). At this point all resources needed
2013 * for transmit and receive operations are allocated, the interrupt
2014 * handler is registered with the OS, the watchdog timer is started,
2015 * and the stack is notified that the interface is ready.
2017 static int atl1e_open(struct net_device *netdev)
2019 struct atl1e_adapter *adapter = netdev_priv(netdev);
2022 /* disallow open during test */
2023 if (test_bit(__AT_TESTING, &adapter->flags))
2026 /* allocate rx/tx dma buffer & descriptors */
2027 atl1e_init_ring_resources(adapter);
2028 err = atl1e_setup_ring_resources(adapter);
2032 err = atl1e_request_irq(adapter);
2036 err = atl1e_up(adapter);
2043 atl1e_free_irq(adapter);
2045 atl1e_free_ring_resources(adapter);
2046 atl1e_reset_hw(&adapter->hw);
2052 * atl1e_close - Disables a network interface
2053 * @netdev: network interface device structure
2055 * Returns 0, this is not allowed to fail
2057 * The close entry point is called when an interface is de-activated
2058 * by the OS. The hardware is still under the drivers control, but
2059 * needs to be disabled. A global MAC reset is issued to stop the
2060 * hardware, and all transmit and receive resources are freed.
2062 static int atl1e_close(struct net_device *netdev)
2064 struct atl1e_adapter *adapter = netdev_priv(netdev);
2066 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2067 atl1e_down(adapter);
2068 atl1e_free_irq(adapter);
2069 atl1e_free_ring_resources(adapter);
2074 static int atl1e_suspend(struct pci_dev *pdev, pm_message_t state)
2076 struct net_device *netdev = pci_get_drvdata(pdev);
2077 struct atl1e_adapter *adapter = netdev_priv(netdev);
2078 struct atl1e_hw *hw = &adapter->hw;
2080 u32 mac_ctrl_data = 0;
2081 u32 wol_ctrl_data = 0;
2082 u16 mii_advertise_data = 0;
2083 u16 mii_bmsr_data = 0;
2084 u16 mii_intr_status_data = 0;
2085 u32 wufc = adapter->wol;
2091 if (netif_running(netdev)) {
2092 WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
2093 atl1e_down(adapter);
2095 netif_device_detach(netdev);
2098 retval = pci_save_state(pdev);
2104 /* get link status */
2105 atl1e_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
2106 atl1e_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
2108 mii_advertise_data = MII_AR_10T_HD_CAPS;
2110 if ((atl1e_write_phy_reg(hw, MII_AT001_CR, 0) != 0) ||
2111 (atl1e_write_phy_reg(hw,
2112 MII_ADVERTISE, mii_advertise_data) != 0) ||
2113 (atl1e_phy_commit(hw)) != 0) {
2114 dev_dbg(&pdev->dev, "set phy register failed\n");
2118 hw->phy_configured = false; /* re-init PHY when resume */
2120 /* turn on magic packet wol */
2121 if (wufc & AT_WUFC_MAG)
2122 wol_ctrl_data |= WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
2124 if (wufc & AT_WUFC_LNKC) {
2125 /* if orignal link status is link, just wait for retrive link */
2126 if (mii_bmsr_data & BMSR_LSTATUS) {
2127 for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) {
2129 atl1e_read_phy_reg(hw, MII_BMSR,
2130 (u16 *)&mii_bmsr_data);
2131 if (mii_bmsr_data & BMSR_LSTATUS)
2135 if ((mii_bmsr_data & BMSR_LSTATUS) == 0)
2137 "%s: Link may change"
2141 wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
2142 /* only link up can wake up */
2143 if (atl1e_write_phy_reg(hw, MII_INT_CTRL, 0x400) != 0) {
2144 dev_dbg(&pdev->dev, "%s: read write phy "
2145 "register failed.\n",
2150 /* clear phy interrupt */
2151 atl1e_read_phy_reg(hw, MII_INT_STATUS, &mii_intr_status_data);
2152 /* Config MAC Ctrl register */
2153 mac_ctrl_data = MAC_CTRL_RX_EN;
2154 /* set to 10/100M halt duplex */
2155 mac_ctrl_data |= MAC_CTRL_SPEED_10_100 << MAC_CTRL_SPEED_SHIFT;
2156 mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
2157 MAC_CTRL_PRMLEN_MASK) <<
2158 MAC_CTRL_PRMLEN_SHIFT);
2161 mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
2163 /* magic packet maybe Broadcast&multicast&Unicast frame */
2164 if (wufc & AT_WUFC_MAG)
2165 mac_ctrl_data |= MAC_CTRL_BC_EN;
2168 "%s: suspend MAC=0x%x\n",
2169 atl1e_driver_name, mac_ctrl_data);
2171 AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
2172 AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
2174 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2175 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2176 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2177 pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
2183 AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
2186 ctrl = AT_READ_REG(hw, REG_PCIE_PHYMISC);
2187 ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
2188 AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
2191 hw->phy_configured = false; /* re-init PHY when resume */
2193 pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
2197 if (netif_running(netdev))
2198 atl1e_free_irq(adapter);
2200 pci_disable_device(pdev);
2202 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2208 static int atl1e_resume(struct pci_dev *pdev)
2210 struct net_device *netdev = pci_get_drvdata(pdev);
2211 struct atl1e_adapter *adapter = netdev_priv(netdev);
2214 pci_set_power_state(pdev, PCI_D0);
2215 pci_restore_state(pdev);
2217 err = pci_enable_device(pdev);
2219 dev_err(&pdev->dev, "ATL1e: Cannot enable PCI"
2220 " device from suspend\n");
2224 pci_set_master(pdev);
2226 AT_READ_REG(&adapter->hw, REG_WOL_CTRL); /* clear WOL status */
2228 pci_enable_wake(pdev, PCI_D3hot, 0);
2229 pci_enable_wake(pdev, PCI_D3cold, 0);
2231 AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
2233 if (netif_running(netdev)) {
2234 err = atl1e_request_irq(adapter);
2239 atl1e_reset_hw(&adapter->hw);
2241 if (netif_running(netdev))
2244 netif_device_attach(netdev);
2250 static void atl1e_shutdown(struct pci_dev *pdev)
2252 atl1e_suspend(pdev, PMSG_SUSPEND);
2255 static const struct net_device_ops atl1e_netdev_ops = {
2256 .ndo_open = atl1e_open,
2257 .ndo_stop = atl1e_close,
2258 .ndo_start_xmit = atl1e_xmit_frame,
2259 .ndo_get_stats = atl1e_get_stats,
2260 .ndo_set_multicast_list = atl1e_set_multi,
2261 .ndo_validate_addr = eth_validate_addr,
2262 .ndo_set_mac_address = atl1e_set_mac_addr,
2263 .ndo_change_mtu = atl1e_change_mtu,
2264 .ndo_do_ioctl = atl1e_ioctl,
2265 .ndo_tx_timeout = atl1e_tx_timeout,
2266 .ndo_vlan_rx_register = atl1e_vlan_rx_register,
2267 #ifdef CONFIG_NET_POLL_CONTROLLER
2268 .ndo_poll_controller = atl1e_netpoll,
2273 static int atl1e_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
2275 SET_NETDEV_DEV(netdev, &pdev->dev);
2276 pci_set_drvdata(pdev, netdev);
2278 netdev->irq = pdev->irq;
2279 netdev->netdev_ops = &atl1e_netdev_ops;
2281 netdev->watchdog_timeo = AT_TX_WATCHDOG;
2282 atl1e_set_ethtool_ops(netdev);
2284 netdev->features = NETIF_F_SG | NETIF_F_HW_CSUM |
2285 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
2286 netdev->features |= NETIF_F_LLTX;
2287 netdev->features |= NETIF_F_TSO;
2288 netdev->features |= NETIF_F_TSO6;
2294 * atl1e_probe - Device Initialization Routine
2295 * @pdev: PCI device information struct
2296 * @ent: entry in atl1e_pci_tbl
2298 * Returns 0 on success, negative on failure
2300 * atl1e_probe initializes an adapter identified by a pci_dev structure.
2301 * The OS initialization, configuring of the adapter private structure,
2302 * and a hardware reset occur.
2304 static int __devinit atl1e_probe(struct pci_dev *pdev,
2305 const struct pci_device_id *ent)
2307 struct net_device *netdev;
2308 struct atl1e_adapter *adapter = NULL;
2309 static int cards_found;
2313 err = pci_enable_device(pdev);
2315 dev_err(&pdev->dev, "cannot enable PCI device\n");
2320 * The atl1e chip can DMA to 64-bit addresses, but it uses a single
2321 * shared register for the high 32 bits, so only a single, aligned,
2322 * 4 GB physical address range can be used at a time.
2324 * Supporting 64-bit DMA on this hardware is more trouble than it's
2325 * worth. It is far easier to limit to 32-bit DMA than update
2326 * various kernel subsystems to support the mechanics required by a
2327 * fixed-high-32-bit system.
2329 if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
2330 (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
2331 dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
2335 err = pci_request_regions(pdev, atl1e_driver_name);
2337 dev_err(&pdev->dev, "cannot obtain PCI resources\n");
2341 pci_set_master(pdev);
2343 netdev = alloc_etherdev(sizeof(struct atl1e_adapter));
2344 if (netdev == NULL) {
2346 dev_err(&pdev->dev, "etherdev alloc failed\n");
2347 goto err_alloc_etherdev;
2350 err = atl1e_init_netdev(netdev, pdev);
2352 dev_err(&pdev->dev, "init netdevice failed\n");
2353 goto err_init_netdev;
2355 adapter = netdev_priv(netdev);
2356 adapter->bd_number = cards_found;
2357 adapter->netdev = netdev;
2358 adapter->pdev = pdev;
2359 adapter->hw.adapter = adapter;
2360 adapter->hw.hw_addr = pci_iomap(pdev, BAR_0, 0);
2361 if (!adapter->hw.hw_addr) {
2363 dev_err(&pdev->dev, "cannot map device registers\n");
2366 netdev->base_addr = (unsigned long)adapter->hw.hw_addr;
2369 adapter->mii.dev = netdev;
2370 adapter->mii.mdio_read = atl1e_mdio_read;
2371 adapter->mii.mdio_write = atl1e_mdio_write;
2372 adapter->mii.phy_id_mask = 0x1f;
2373 adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
2375 netif_napi_add(netdev, &adapter->napi, atl1e_clean, 64);
2377 init_timer(&adapter->phy_config_timer);
2378 adapter->phy_config_timer.function = &atl1e_phy_config;
2379 adapter->phy_config_timer.data = (unsigned long) adapter;
2381 /* get user settings */
2382 atl1e_check_options(adapter);
2384 * Mark all PCI regions associated with PCI device
2385 * pdev as being reserved by owner atl1e_driver_name
2386 * Enables bus-mastering on the device and calls
2387 * pcibios_set_master to do the needed arch specific settings
2389 atl1e_setup_pcicmd(pdev);
2390 /* setup the private structure */
2391 err = atl1e_sw_init(adapter);
2393 dev_err(&pdev->dev, "net device private data init failed\n");
2397 /* Init GPHY as early as possible due to power saving issue */
2398 atl1e_phy_init(&adapter->hw);
2399 /* reset the controller to
2400 * put the device in a known good starting state */
2401 err = atl1e_reset_hw(&adapter->hw);
2407 if (atl1e_read_mac_addr(&adapter->hw) != 0) {
2409 dev_err(&pdev->dev, "get mac address failed\n");
2413 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
2414 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
2415 dev_dbg(&pdev->dev, "mac address : %02x-%02x-%02x-%02x-%02x-%02x\n",
2416 adapter->hw.mac_addr[0], adapter->hw.mac_addr[1],
2417 adapter->hw.mac_addr[2], adapter->hw.mac_addr[3],
2418 adapter->hw.mac_addr[4], adapter->hw.mac_addr[5]);
2420 INIT_WORK(&adapter->reset_task, atl1e_reset_task);
2421 INIT_WORK(&adapter->link_chg_task, atl1e_link_chg_task);
2422 err = register_netdev(netdev);
2424 dev_err(&pdev->dev, "register netdevice failed\n");
2428 /* assume we have no link for now */
2429 netif_stop_queue(netdev);
2430 netif_carrier_off(netdev);
2440 iounmap(adapter->hw.hw_addr);
2443 free_netdev(netdev);
2445 pci_release_regions(pdev);
2448 pci_disable_device(pdev);
2453 * atl1e_remove - Device Removal Routine
2454 * @pdev: PCI device information struct
2456 * atl1e_remove is called by the PCI subsystem to alert the driver
2457 * that it should release a PCI device. The could be caused by a
2458 * Hot-Plug event, or because the driver is going to be removed from
2461 static void __devexit atl1e_remove(struct pci_dev *pdev)
2463 struct net_device *netdev = pci_get_drvdata(pdev);
2464 struct atl1e_adapter *adapter = netdev_priv(netdev);
2467 * flush_scheduled work may reschedule our watchdog task, so
2468 * explicitly disable watchdog tasks from being rescheduled
2470 set_bit(__AT_DOWN, &adapter->flags);
2472 atl1e_del_timer(adapter);
2473 atl1e_cancel_work(adapter);
2475 unregister_netdev(netdev);
2476 atl1e_free_ring_resources(adapter);
2477 atl1e_force_ps(&adapter->hw);
2478 iounmap(adapter->hw.hw_addr);
2479 pci_release_regions(pdev);
2480 free_netdev(netdev);
2481 pci_disable_device(pdev);
2485 * atl1e_io_error_detected - called when PCI error is detected
2486 * @pdev: Pointer to PCI device
2487 * @state: The current pci connection state
2489 * This function is called after a PCI bus error affecting
2490 * this device has been detected.
2492 static pci_ers_result_t
2493 atl1e_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
2495 struct net_device *netdev = pci_get_drvdata(pdev);
2496 struct atl1e_adapter *adapter = netdev_priv(netdev);
2498 netif_device_detach(netdev);
2500 if (netif_running(netdev))
2501 atl1e_down(adapter);
2503 pci_disable_device(pdev);
2505 /* Request a slot slot reset. */
2506 return PCI_ERS_RESULT_NEED_RESET;
2510 * atl1e_io_slot_reset - called after the pci bus has been reset.
2511 * @pdev: Pointer to PCI device
2513 * Restart the card from scratch, as if from a cold-boot. Implementation
2514 * resembles the first-half of the e1000_resume routine.
2516 static pci_ers_result_t atl1e_io_slot_reset(struct pci_dev *pdev)
2518 struct net_device *netdev = pci_get_drvdata(pdev);
2519 struct atl1e_adapter *adapter = netdev_priv(netdev);
2521 if (pci_enable_device(pdev)) {
2523 "ATL1e: Cannot re-enable PCI device after reset.\n");
2524 return PCI_ERS_RESULT_DISCONNECT;
2526 pci_set_master(pdev);
2528 pci_enable_wake(pdev, PCI_D3hot, 0);
2529 pci_enable_wake(pdev, PCI_D3cold, 0);
2531 atl1e_reset_hw(&adapter->hw);
2533 return PCI_ERS_RESULT_RECOVERED;
2537 * atl1e_io_resume - called when traffic can start flowing again.
2538 * @pdev: Pointer to PCI device
2540 * This callback is called when the error recovery driver tells us that
2541 * its OK to resume normal operation. Implementation resembles the
2542 * second-half of the atl1e_resume routine.
2544 static void atl1e_io_resume(struct pci_dev *pdev)
2546 struct net_device *netdev = pci_get_drvdata(pdev);
2547 struct atl1e_adapter *adapter = netdev_priv(netdev);
2549 if (netif_running(netdev)) {
2550 if (atl1e_up(adapter)) {
2552 "ATL1e: can't bring device back up after reset\n");
2557 netif_device_attach(netdev);
2560 static struct pci_error_handlers atl1e_err_handler = {
2561 .error_detected = atl1e_io_error_detected,
2562 .slot_reset = atl1e_io_slot_reset,
2563 .resume = atl1e_io_resume,
2566 static struct pci_driver atl1e_driver = {
2567 .name = atl1e_driver_name,
2568 .id_table = atl1e_pci_tbl,
2569 .probe = atl1e_probe,
2570 .remove = __devexit_p(atl1e_remove),
2571 /* Power Managment Hooks */
2573 .suspend = atl1e_suspend,
2574 .resume = atl1e_resume,
2576 .shutdown = atl1e_shutdown,
2577 .err_handler = &atl1e_err_handler
2581 * atl1e_init_module - Driver Registration Routine
2583 * atl1e_init_module is the first routine called when the driver is
2584 * loaded. All it does is register with the PCI subsystem.
2586 static int __init atl1e_init_module(void)
2588 return pci_register_driver(&atl1e_driver);
2592 * atl1e_exit_module - Driver Exit Cleanup Routine
2594 * atl1e_exit_module is called just before the driver is removed
2597 static void __exit atl1e_exit_module(void)
2599 pci_unregister_driver(&atl1e_driver);
2602 module_init(atl1e_init_module);
2603 module_exit(atl1e_exit_module);