3 * Alchemy Au1x00 ethernet driver
5 * Copyright 2001-2003, 2006 MontaVista Software Inc.
6 * Copyright 2002 TimeSys Corp.
7 * Added ethtool/mii-tool support,
8 * Copyright 2004 Matt Porter <mporter@kernel.crashing.org>
9 * Update: 2004 Bjoern Riemer, riemer@fokus.fraunhofer.de
10 * or riemer@riemer-nt.de: fixed the link beat detection with
11 * ioctls (SIOCGMIIPHY)
12 * Copyright 2006 Herbert Valerio Riedel <hvr@gnu.org>
13 * converted to use linux-2.6.x's PHY framework
15 * Author: MontaVista Software, Inc.
16 * ppopov@mvista.com or source@mvista.com
18 * ########################################################################
20 * This program is free software; you can distribute it and/or modify it
21 * under the terms of the GNU General Public License (Version 2) as
22 * published by the Free Software Foundation.
24 * This program is distributed in the hope it will be useful, but WITHOUT
25 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
26 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
29 * You should have received a copy of the GNU General Public License along
30 * with this program; if not, write to the Free Software Foundation, Inc.,
31 * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
33 * ########################################################################
37 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
39 #include <linux/capability.h>
40 #include <linux/dma-mapping.h>
41 #include <linux/module.h>
42 #include <linux/kernel.h>
43 #include <linux/string.h>
44 #include <linux/timer.h>
45 #include <linux/errno.h>
47 #include <linux/ioport.h>
48 #include <linux/bitops.h>
49 #include <linux/slab.h>
50 #include <linux/interrupt.h>
51 #include <linux/init.h>
52 #include <linux/netdevice.h>
53 #include <linux/etherdevice.h>
54 #include <linux/ethtool.h>
55 #include <linux/mii.h>
56 #include <linux/skbuff.h>
57 #include <linux/delay.h>
58 #include <linux/crc32.h>
59 #include <linux/phy.h>
60 #include <linux/platform_device.h>
61 #include <linux/cpu.h>
64 #include <asm/mipsregs.h>
66 #include <asm/processor.h>
69 #include <au1xxx_eth.h>
72 #include "au1000_eth.h"
74 #ifdef AU1000_ETH_DEBUG
75 static int au1000_debug = 5;
77 static int au1000_debug = 3;
80 #define AU1000_DEF_MSG_ENABLE (NETIF_MSG_DRV | \
84 #define DRV_NAME "au1000_eth"
85 #define DRV_VERSION "1.7"
86 #define DRV_AUTHOR "Pete Popov <ppopov@embeddedalley.com>"
87 #define DRV_DESC "Au1xxx on-chip Ethernet driver"
89 MODULE_AUTHOR(DRV_AUTHOR);
90 MODULE_DESCRIPTION(DRV_DESC);
91 MODULE_LICENSE("GPL");
92 MODULE_VERSION(DRV_VERSION);
97 * The Au1000 MACs use a simple rx and tx descriptor ring scheme.
98 * There are four receive and four transmit descriptors. These
99 * descriptors are not in memory; rather, they are just a set of
100 * hardware registers.
102 * Since the Au1000 has a coherent data cache, the receive and
103 * transmit buffers are allocated from the KSEG0 segment. The
104 * hardware registers, however, are still mapped at KSEG1 to
105 * make sure there's no out-of-order writes, and that all writes
106 * complete immediately.
109 struct au1000_private *au_macs[NUM_ETH_INTERFACES];
112 * board-specific configurations
114 * PHY detection algorithm
116 * If phy_static_config is undefined, the PHY setup is
119 * mii_probe() first searches the current MAC's MII bus for a PHY,
120 * selecting the first (or last, if phy_search_highest_addr is
121 * defined) PHY address not already claimed by another netdev.
123 * If nothing was found that way when searching for the 2nd ethernet
124 * controller's PHY and phy1_search_mac0 is defined, then
125 * the first MII bus is searched as well for an unclaimed PHY; this is
126 * needed in case of a dual-PHY accessible only through the MAC0's MII
129 * Finally, if no PHY is found, then the corresponding ethernet
130 * controller is not registered to the network subsystem.
133 /* autodetection defaults: phy1_search_mac0 */
137 * most boards PHY setup should be detectable properly with the
138 * autodetection algorithm in mii_probe(), but in some cases (e.g. if
139 * you have a switch attached, or want to use the PHY's interrupt
140 * notification capabilities) you can provide a static PHY
143 * IRQs may only be set, if a PHY address was configured
144 * If a PHY address is given, also a bus id is required to be set
146 * ps: make sure the used irqs are configured properly in the board
150 static void au1000_enable_mac(struct net_device *dev, int force_reset)
153 struct au1000_private *aup = netdev_priv(dev);
155 spin_lock_irqsave(&aup->lock, flags);
157 if (force_reset || (!aup->mac_enabled)) {
158 *aup->enable = MAC_EN_CLOCK_ENABLE;
160 *aup->enable = (MAC_EN_RESET0 | MAC_EN_RESET1 | MAC_EN_RESET2
161 | MAC_EN_CLOCK_ENABLE);
164 aup->mac_enabled = 1;
167 spin_unlock_irqrestore(&aup->lock, flags);
173 static int au1000_mdio_read(struct net_device *dev, int phy_addr, int reg)
175 struct au1000_private *aup = netdev_priv(dev);
176 volatile u32 *const mii_control_reg = &aup->mac->mii_control;
177 volatile u32 *const mii_data_reg = &aup->mac->mii_data;
181 while (*mii_control_reg & MAC_MII_BUSY) {
183 if (--timedout == 0) {
184 netdev_err(dev, "read_MII busy timeout!!\n");
189 mii_control = MAC_SET_MII_SELECT_REG(reg) |
190 MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_READ;
192 *mii_control_reg = mii_control;
195 while (*mii_control_reg & MAC_MII_BUSY) {
197 if (--timedout == 0) {
198 netdev_err(dev, "mdio_read busy timeout!!\n");
202 return (int)*mii_data_reg;
205 static void au1000_mdio_write(struct net_device *dev, int phy_addr,
208 struct au1000_private *aup = netdev_priv(dev);
209 volatile u32 *const mii_control_reg = &aup->mac->mii_control;
210 volatile u32 *const mii_data_reg = &aup->mac->mii_data;
214 while (*mii_control_reg & MAC_MII_BUSY) {
216 if (--timedout == 0) {
217 netdev_err(dev, "mdio_write busy timeout!!\n");
222 mii_control = MAC_SET_MII_SELECT_REG(reg) |
223 MAC_SET_MII_SELECT_PHY(phy_addr) | MAC_MII_WRITE;
225 *mii_data_reg = value;
226 *mii_control_reg = mii_control;
229 static int au1000_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
231 /* WARNING: bus->phy_map[phy_addr].attached_dev == dev does
232 * _NOT_ hold (e.g. when PHY is accessed through other MAC's MII bus) */
233 struct net_device *const dev = bus->priv;
235 au1000_enable_mac(dev, 0); /* make sure the MAC associated with this
236 * mii_bus is enabled */
237 return au1000_mdio_read(dev, phy_addr, regnum);
240 static int au1000_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
243 struct net_device *const dev = bus->priv;
245 au1000_enable_mac(dev, 0); /* make sure the MAC associated with this
246 * mii_bus is enabled */
247 au1000_mdio_write(dev, phy_addr, regnum, value);
251 static int au1000_mdiobus_reset(struct mii_bus *bus)
253 struct net_device *const dev = bus->priv;
255 au1000_enable_mac(dev, 0); /* make sure the MAC associated with this
256 * mii_bus is enabled */
260 static void au1000_hard_stop(struct net_device *dev)
262 struct au1000_private *aup = netdev_priv(dev);
264 netif_dbg(aup, drv, dev, "hard stop\n");
266 aup->mac->control &= ~(MAC_RX_ENABLE | MAC_TX_ENABLE);
270 static void au1000_enable_rx_tx(struct net_device *dev)
272 struct au1000_private *aup = netdev_priv(dev);
274 netif_dbg(aup, hw, dev, "enable_rx_tx\n");
276 aup->mac->control |= (MAC_RX_ENABLE | MAC_TX_ENABLE);
281 au1000_adjust_link(struct net_device *dev)
283 struct au1000_private *aup = netdev_priv(dev);
284 struct phy_device *phydev = aup->phy_dev;
287 int status_change = 0;
289 BUG_ON(!aup->phy_dev);
291 spin_lock_irqsave(&aup->lock, flags);
293 if (phydev->link && (aup->old_speed != phydev->speed)) {
296 switch (phydev->speed) {
301 netdev_warn(dev, "Speed (%d) is not 10/100 ???\n",
306 aup->old_speed = phydev->speed;
311 if (phydev->link && (aup->old_duplex != phydev->duplex)) {
312 /* duplex mode changed */
314 /* switching duplex mode requires to disable rx and tx! */
315 au1000_hard_stop(dev);
317 if (DUPLEX_FULL == phydev->duplex)
318 aup->mac->control = ((aup->mac->control
320 & ~MAC_DISABLE_RX_OWN);
322 aup->mac->control = ((aup->mac->control
324 | MAC_DISABLE_RX_OWN);
327 au1000_enable_rx_tx(dev);
328 aup->old_duplex = phydev->duplex;
333 if (phydev->link != aup->old_link) {
334 /* link state changed */
339 aup->old_duplex = -1;
342 aup->old_link = phydev->link;
346 spin_unlock_irqrestore(&aup->lock, flags);
350 netdev_info(dev, "link up (%d/%s)\n",
352 DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
354 netdev_info(dev, "link down\n");
358 static int au1000_mii_probe(struct net_device *dev)
360 struct au1000_private *const aup = netdev_priv(dev);
361 struct phy_device *phydev = NULL;
364 if (aup->phy_static_config) {
365 BUG_ON(aup->mac_id < 0 || aup->mac_id > 1);
368 phydev = aup->mii_bus->phy_map[aup->phy_addr];
370 netdev_info(dev, "using PHY-less setup\n");
374 /* find the first (lowest address) PHY
375 * on the current MAC's MII bus */
376 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++)
377 if (aup->mii_bus->phy_map[phy_addr]) {
378 phydev = aup->mii_bus->phy_map[phy_addr];
379 if (!aup->phy_search_highest_addr)
380 /* break out with first one found */
384 if (aup->phy1_search_mac0) {
385 /* try harder to find a PHY */
386 if (!phydev && (aup->mac_id == 1)) {
387 /* no PHY found, maybe we have a dual PHY? */
388 dev_info(&dev->dev, ": no PHY found on MAC1, "
389 "let's see if it's attached to MAC0...\n");
391 /* find the first (lowest address) non-attached
392 * PHY on the MAC0 MII bus
394 for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
395 struct phy_device *const tmp_phydev =
396 aup->mii_bus->phy_map[phy_addr];
398 if (aup->mac_id == 1)
405 /* already claimed by MAC0 */
406 if (tmp_phydev->attached_dev)
410 break; /* found it */
416 netdev_err(dev, "no PHY found\n");
420 /* now we are supposed to have a proper phydev, to attach to... */
421 BUG_ON(phydev->attached_dev);
423 phydev = phy_connect(dev, dev_name(&phydev->dev), &au1000_adjust_link,
424 0, PHY_INTERFACE_MODE_MII);
426 if (IS_ERR(phydev)) {
427 netdev_err(dev, "Could not attach to PHY\n");
428 return PTR_ERR(phydev);
431 /* mask with MAC supported features */
432 phydev->supported &= (SUPPORTED_10baseT_Half
433 | SUPPORTED_10baseT_Full
434 | SUPPORTED_100baseT_Half
435 | SUPPORTED_100baseT_Full
437 /* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */
441 phydev->advertising = phydev->supported;
445 aup->old_duplex = -1;
446 aup->phy_dev = phydev;
448 netdev_info(dev, "attached PHY driver [%s] "
449 "(mii_bus:phy_addr=%s, irq=%d)\n",
450 phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
457 * Buffer allocation/deallocation routines. The buffer descriptor returned
458 * has the virtual and dma address of a buffer suitable for
459 * both, receive and transmit operations.
461 static struct db_dest *au1000_GetFreeDB(struct au1000_private *aup)
467 aup->pDBfree = pDB->pnext;
472 void au1000_ReleaseDB(struct au1000_private *aup, struct db_dest *pDB)
474 struct db_dest *pDBfree = aup->pDBfree;
476 pDBfree->pnext = pDB;
480 static void au1000_reset_mac_unlocked(struct net_device *dev)
482 struct au1000_private *const aup = netdev_priv(dev);
485 au1000_hard_stop(dev);
487 *aup->enable = MAC_EN_CLOCK_ENABLE;
493 for (i = 0; i < NUM_RX_DMA; i++) {
494 /* reset control bits */
495 aup->rx_dma_ring[i]->buff_stat &= ~0xf;
497 for (i = 0; i < NUM_TX_DMA; i++) {
498 /* reset control bits */
499 aup->tx_dma_ring[i]->buff_stat &= ~0xf;
502 aup->mac_enabled = 0;
506 static void au1000_reset_mac(struct net_device *dev)
508 struct au1000_private *const aup = netdev_priv(dev);
511 netif_dbg(aup, hw, dev, "reset mac, aup %x\n",
514 spin_lock_irqsave(&aup->lock, flags);
516 au1000_reset_mac_unlocked(dev);
518 spin_unlock_irqrestore(&aup->lock, flags);
522 * Setup the receive and transmit "rings". These pointers are the addresses
523 * of the rx and tx MAC DMA registers so they are fixed by the hardware --
524 * these are not descriptors sitting in memory.
527 au1000_setup_hw_rings(struct au1000_private *aup, u32 rx_base, u32 tx_base)
531 for (i = 0; i < NUM_RX_DMA; i++) {
532 aup->rx_dma_ring[i] =
533 (volatile struct rx_dma *)
534 (rx_base + sizeof(struct rx_dma)*i);
536 for (i = 0; i < NUM_TX_DMA; i++) {
537 aup->tx_dma_ring[i] =
538 (volatile struct tx_dma *)
539 (tx_base + sizeof(struct tx_dma)*i);
547 static int au1000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
549 struct au1000_private *aup = netdev_priv(dev);
552 return phy_ethtool_gset(aup->phy_dev, cmd);
557 static int au1000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
559 struct au1000_private *aup = netdev_priv(dev);
561 if (!capable(CAP_NET_ADMIN))
565 return phy_ethtool_sset(aup->phy_dev, cmd);
571 au1000_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
573 struct au1000_private *aup = netdev_priv(dev);
575 strcpy(info->driver, DRV_NAME);
576 strcpy(info->version, DRV_VERSION);
577 info->fw_version[0] = '\0';
578 sprintf(info->bus_info, "%s %d", DRV_NAME, aup->mac_id);
579 info->regdump_len = 0;
582 static void au1000_set_msglevel(struct net_device *dev, u32 value)
584 struct au1000_private *aup = netdev_priv(dev);
585 aup->msg_enable = value;
588 static u32 au1000_get_msglevel(struct net_device *dev)
590 struct au1000_private *aup = netdev_priv(dev);
591 return aup->msg_enable;
594 static const struct ethtool_ops au1000_ethtool_ops = {
595 .get_settings = au1000_get_settings,
596 .set_settings = au1000_set_settings,
597 .get_drvinfo = au1000_get_drvinfo,
598 .get_link = ethtool_op_get_link,
599 .get_msglevel = au1000_get_msglevel,
600 .set_msglevel = au1000_set_msglevel,
605 * Initialize the interface.
607 * When the device powers up, the clocks are disabled and the
608 * mac is in reset state. When the interface is closed, we
609 * do the same -- reset the device and disable the clocks to
610 * conserve power. Thus, whenever au1000_init() is called,
611 * the device should already be in reset state.
613 static int au1000_init(struct net_device *dev)
615 struct au1000_private *aup = netdev_priv(dev);
620 netif_dbg(aup, hw, dev, "au1000_init\n");
622 /* bring the device out of reset */
623 au1000_enable_mac(dev, 1);
625 spin_lock_irqsave(&aup->lock, flags);
627 aup->mac->control = 0;
628 aup->tx_head = (aup->tx_dma_ring[0]->buff_stat & 0xC) >> 2;
629 aup->tx_tail = aup->tx_head;
630 aup->rx_head = (aup->rx_dma_ring[0]->buff_stat & 0xC) >> 2;
632 aup->mac->mac_addr_high = dev->dev_addr[5]<<8 | dev->dev_addr[4];
633 aup->mac->mac_addr_low = dev->dev_addr[3]<<24 | dev->dev_addr[2]<<16 |
634 dev->dev_addr[1]<<8 | dev->dev_addr[0];
637 for (i = 0; i < NUM_RX_DMA; i++)
638 aup->rx_dma_ring[i]->buff_stat |= RX_DMA_ENABLE;
642 control = MAC_RX_ENABLE | MAC_TX_ENABLE;
643 #ifndef CONFIG_CPU_LITTLE_ENDIAN
644 control |= MAC_BIG_ENDIAN;
647 if (aup->phy_dev->link && (DUPLEX_FULL == aup->phy_dev->duplex))
648 control |= MAC_FULL_DUPLEX;
650 control |= MAC_DISABLE_RX_OWN;
651 } else { /* PHY-less op, assume full-duplex */
652 control |= MAC_FULL_DUPLEX;
655 aup->mac->control = control;
656 aup->mac->vlan1_tag = 0x8100; /* activate vlan support */
659 spin_unlock_irqrestore(&aup->lock, flags);
663 static inline void au1000_update_rx_stats(struct net_device *dev, u32 status)
665 struct net_device_stats *ps = &dev->stats;
668 if (status & RX_MCAST_FRAME)
671 if (status & RX_ERROR) {
673 if (status & RX_MISSED_FRAME)
674 ps->rx_missed_errors++;
675 if (status & (RX_OVERLEN | RX_RUNT | RX_LEN_ERROR))
676 ps->rx_length_errors++;
677 if (status & RX_CRC_ERROR)
679 if (status & RX_COLL)
682 ps->rx_bytes += status & RX_FRAME_LEN_MASK;
687 * Au1000 receive routine.
689 static int au1000_rx(struct net_device *dev)
691 struct au1000_private *aup = netdev_priv(dev);
693 volatile struct rx_dma *prxd;
694 u32 buff_stat, status;
698 netif_dbg(aup, rx_status, dev, "au1000_rx head %d\n", aup->rx_head);
700 prxd = aup->rx_dma_ring[aup->rx_head];
701 buff_stat = prxd->buff_stat;
702 while (buff_stat & RX_T_DONE) {
703 status = prxd->status;
704 pDB = aup->rx_db_inuse[aup->rx_head];
705 au1000_update_rx_stats(dev, status);
706 if (!(status & RX_ERROR)) {
709 frmlen = (status & RX_FRAME_LEN_MASK);
710 frmlen -= 4; /* Remove FCS */
711 skb = dev_alloc_skb(frmlen + 2);
713 netdev_err(dev, "Memory squeeze, dropping packet.\n");
714 dev->stats.rx_dropped++;
717 skb_reserve(skb, 2); /* 16 byte IP header align */
718 skb_copy_to_linear_data(skb,
719 (unsigned char *)pDB->vaddr, frmlen);
720 skb_put(skb, frmlen);
721 skb->protocol = eth_type_trans(skb, dev);
722 netif_rx(skb); /* pass the packet to upper layers */
724 if (au1000_debug > 4) {
725 pr_err("rx_error(s):");
726 if (status & RX_MISSED_FRAME)
728 if (status & RX_WDOG_TIMER)
730 if (status & RX_RUNT)
732 if (status & RX_OVERLEN)
734 if (status & RX_COLL)
736 if (status & RX_MII_ERROR)
737 pr_cont(" mii error");
738 if (status & RX_CRC_ERROR)
739 pr_cont(" crc error");
740 if (status & RX_LEN_ERROR)
741 pr_cont(" len error");
742 if (status & RX_U_CNTRL_FRAME)
743 pr_cont(" u control frame");
747 prxd->buff_stat = (u32)(pDB->dma_addr | RX_DMA_ENABLE);
748 aup->rx_head = (aup->rx_head + 1) & (NUM_RX_DMA - 1);
751 /* next descriptor */
752 prxd = aup->rx_dma_ring[aup->rx_head];
753 buff_stat = prxd->buff_stat;
758 static void au1000_update_tx_stats(struct net_device *dev, u32 status)
760 struct au1000_private *aup = netdev_priv(dev);
761 struct net_device_stats *ps = &dev->stats;
763 if (status & TX_FRAME_ABORTED) {
764 if (!aup->phy_dev || (DUPLEX_FULL == aup->phy_dev->duplex)) {
765 if (status & (TX_JAB_TIMEOUT | TX_UNDERRUN)) {
766 /* any other tx errors are only valid
767 * in half duplex mode */
769 ps->tx_aborted_errors++;
773 ps->tx_aborted_errors++;
774 if (status & (TX_NO_CARRIER | TX_LOSS_CARRIER))
775 ps->tx_carrier_errors++;
781 * Called from the interrupt service routine to acknowledge
782 * the TX DONE bits. This is a must if the irq is setup as
785 static void au1000_tx_ack(struct net_device *dev)
787 struct au1000_private *aup = netdev_priv(dev);
788 volatile struct tx_dma *ptxd;
790 ptxd = aup->tx_dma_ring[aup->tx_tail];
792 while (ptxd->buff_stat & TX_T_DONE) {
793 au1000_update_tx_stats(dev, ptxd->status);
794 ptxd->buff_stat &= ~TX_T_DONE;
798 aup->tx_tail = (aup->tx_tail + 1) & (NUM_TX_DMA - 1);
799 ptxd = aup->tx_dma_ring[aup->tx_tail];
803 netif_wake_queue(dev);
809 * Au1000 interrupt service routine.
811 static irqreturn_t au1000_interrupt(int irq, void *dev_id)
813 struct net_device *dev = dev_id;
815 /* Handle RX interrupts first to minimize chance of overrun */
819 return IRQ_RETVAL(1);
822 static int au1000_open(struct net_device *dev)
825 struct au1000_private *aup = netdev_priv(dev);
827 netif_dbg(aup, drv, dev, "open: dev=%p\n", dev);
829 retval = request_irq(dev->irq, au1000_interrupt, 0,
832 netdev_err(dev, "unable to get IRQ %d\n", dev->irq);
836 retval = au1000_init(dev);
838 netdev_err(dev, "error in au1000_init\n");
839 free_irq(dev->irq, dev);
844 /* cause the PHY state machine to schedule a link state check */
845 aup->phy_dev->state = PHY_CHANGELINK;
846 phy_start(aup->phy_dev);
849 netif_start_queue(dev);
851 netif_dbg(aup, drv, dev, "open: Initialization done.\n");
856 static int au1000_close(struct net_device *dev)
859 struct au1000_private *const aup = netdev_priv(dev);
861 netif_dbg(aup, drv, dev, "close: dev=%p\n", dev);
864 phy_stop(aup->phy_dev);
866 spin_lock_irqsave(&aup->lock, flags);
868 au1000_reset_mac_unlocked(dev);
870 /* stop the device */
871 netif_stop_queue(dev);
873 /* disable the interrupt */
874 free_irq(dev->irq, dev);
875 spin_unlock_irqrestore(&aup->lock, flags);
881 * Au1000 transmit routine.
883 static netdev_tx_t au1000_tx(struct sk_buff *skb, struct net_device *dev)
885 struct au1000_private *aup = netdev_priv(dev);
886 struct net_device_stats *ps = &dev->stats;
887 volatile struct tx_dma *ptxd;
892 netif_dbg(aup, tx_queued, dev, "tx: aup %x len=%d, data=%p, head %d\n",
893 (unsigned)aup, skb->len,
894 skb->data, aup->tx_head);
896 ptxd = aup->tx_dma_ring[aup->tx_head];
897 buff_stat = ptxd->buff_stat;
898 if (buff_stat & TX_DMA_ENABLE) {
899 /* We've wrapped around and the transmitter is still busy */
900 netif_stop_queue(dev);
902 return NETDEV_TX_BUSY;
903 } else if (buff_stat & TX_T_DONE) {
904 au1000_update_tx_stats(dev, ptxd->status);
910 netif_wake_queue(dev);
913 pDB = aup->tx_db_inuse[aup->tx_head];
914 skb_copy_from_linear_data(skb, (void *)pDB->vaddr, skb->len);
915 if (skb->len < ETH_ZLEN) {
916 for (i = skb->len; i < ETH_ZLEN; i++)
917 ((char *)pDB->vaddr)[i] = 0;
919 ptxd->len = ETH_ZLEN;
921 ptxd->len = skb->len;
924 ps->tx_bytes += ptxd->len;
926 ptxd->buff_stat = pDB->dma_addr | TX_DMA_ENABLE;
929 aup->tx_head = (aup->tx_head + 1) & (NUM_TX_DMA - 1);
934 * The Tx ring has been full longer than the watchdog timeout
935 * value. The transmitter must be hung?
937 static void au1000_tx_timeout(struct net_device *dev)
939 netdev_err(dev, "au1000_tx_timeout: dev=%p\n", dev);
940 au1000_reset_mac(dev);
942 dev->trans_start = jiffies; /* prevent tx timeout */
943 netif_wake_queue(dev);
946 static void au1000_multicast_list(struct net_device *dev)
948 struct au1000_private *aup = netdev_priv(dev);
950 netif_dbg(aup, drv, dev, "%s: flags=%x\n", __func__, dev->flags);
951 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */
952 aup->mac->control |= MAC_PROMISCUOUS;
953 } else if ((dev->flags & IFF_ALLMULTI) ||
954 netdev_mc_count(dev) > MULTICAST_FILTER_LIMIT) {
955 aup->mac->control |= MAC_PASS_ALL_MULTI;
956 aup->mac->control &= ~MAC_PROMISCUOUS;
957 netdev_info(dev, "Pass all multicast\n");
959 struct netdev_hw_addr *ha;
960 u32 mc_filter[2]; /* Multicast hash filter */
962 mc_filter[1] = mc_filter[0] = 0;
963 netdev_for_each_mc_addr(ha, dev)
964 set_bit(ether_crc(ETH_ALEN, ha->addr)>>26,
966 aup->mac->multi_hash_high = mc_filter[1];
967 aup->mac->multi_hash_low = mc_filter[0];
968 aup->mac->control &= ~MAC_PROMISCUOUS;
969 aup->mac->control |= MAC_HASH_MODE;
973 static int au1000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
975 struct au1000_private *aup = netdev_priv(dev);
977 if (!netif_running(dev))
981 return -EINVAL; /* PHY not controllable */
983 return phy_mii_ioctl(aup->phy_dev, rq, cmd);
986 static const struct net_device_ops au1000_netdev_ops = {
987 .ndo_open = au1000_open,
988 .ndo_stop = au1000_close,
989 .ndo_start_xmit = au1000_tx,
990 .ndo_set_multicast_list = au1000_multicast_list,
991 .ndo_do_ioctl = au1000_ioctl,
992 .ndo_tx_timeout = au1000_tx_timeout,
993 .ndo_set_mac_address = eth_mac_addr,
994 .ndo_validate_addr = eth_validate_addr,
995 .ndo_change_mtu = eth_change_mtu,
998 static int __devinit au1000_probe(struct platform_device *pdev)
1000 static unsigned version_printed;
1001 struct au1000_private *aup = NULL;
1002 struct au1000_eth_platform_data *pd;
1003 struct net_device *dev = NULL;
1004 struct db_dest *pDB, *pDBfree;
1005 int irq, i, err = 0;
1006 struct resource *base, *macen;
1008 base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1010 dev_err(&pdev->dev, "failed to retrieve base register\n");
1015 macen = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1017 dev_err(&pdev->dev, "failed to retrieve MAC Enable register\n");
1022 irq = platform_get_irq(pdev, 0);
1024 dev_err(&pdev->dev, "failed to retrieve IRQ\n");
1029 if (!request_mem_region(base->start, resource_size(base),
1031 dev_err(&pdev->dev, "failed to request memory region for base registers\n");
1036 if (!request_mem_region(macen->start, resource_size(macen),
1038 dev_err(&pdev->dev, "failed to request memory region for MAC enable register\n");
1043 dev = alloc_etherdev(sizeof(struct au1000_private));
1045 dev_err(&pdev->dev, "alloc_etherdev failed\n");
1050 SET_NETDEV_DEV(dev, &pdev->dev);
1051 platform_set_drvdata(pdev, dev);
1052 aup = netdev_priv(dev);
1054 spin_lock_init(&aup->lock);
1055 aup->msg_enable = (au1000_debug < 4 ?
1056 AU1000_DEF_MSG_ENABLE : au1000_debug);
1058 /* Allocate the data buffers */
1059 /* Snooping works fine with eth on all au1xxx */
1060 aup->vaddr = (u32)dma_alloc_noncoherent(NULL, MAX_BUF_SIZE *
1061 (NUM_TX_BUFFS + NUM_RX_BUFFS),
1064 dev_err(&pdev->dev, "failed to allocate data buffers\n");
1069 /* aup->mac is the base address of the MAC's registers */
1070 aup->mac = (volatile struct mac_reg *)
1071 ioremap_nocache(base->start, resource_size(base));
1073 dev_err(&pdev->dev, "failed to ioremap MAC registers\n");
1078 /* Setup some variables for quick register address access */
1079 aup->enable = (volatile u32 *)ioremap_nocache(macen->start,
1080 resource_size(macen));
1082 dev_err(&pdev->dev, "failed to ioremap MAC enable register\n");
1086 aup->mac_id = pdev->id;
1089 au1000_setup_hw_rings(aup, MAC0_RX_DMA_ADDR, MAC0_TX_DMA_ADDR);
1090 else if (pdev->id == 1)
1091 au1000_setup_hw_rings(aup, MAC1_RX_DMA_ADDR, MAC1_TX_DMA_ADDR);
1093 /* set a random MAC now in case platform_data doesn't provide one */
1094 random_ether_addr(dev->dev_addr);
1097 aup->mac_enabled = 0;
1099 pd = pdev->dev.platform_data;
1101 dev_info(&pdev->dev, "no platform_data passed,"
1102 " PHY search on MAC0\n");
1103 aup->phy1_search_mac0 = 1;
1105 if (is_valid_ether_addr(pd->mac))
1106 memcpy(dev->dev_addr, pd->mac, 6);
1108 aup->phy_static_config = pd->phy_static_config;
1109 aup->phy_search_highest_addr = pd->phy_search_highest_addr;
1110 aup->phy1_search_mac0 = pd->phy1_search_mac0;
1111 aup->phy_addr = pd->phy_addr;
1112 aup->phy_busid = pd->phy_busid;
1113 aup->phy_irq = pd->phy_irq;
1116 if (aup->phy_busid && aup->phy_busid > 0) {
1117 dev_err(&pdev->dev, "MAC0-associated PHY attached 2nd MACs MII bus not supported yet\n");
1119 goto err_mdiobus_alloc;
1122 aup->mii_bus = mdiobus_alloc();
1123 if (aup->mii_bus == NULL) {
1124 dev_err(&pdev->dev, "failed to allocate mdiobus structure\n");
1126 goto err_mdiobus_alloc;
1129 aup->mii_bus->priv = dev;
1130 aup->mii_bus->read = au1000_mdiobus_read;
1131 aup->mii_bus->write = au1000_mdiobus_write;
1132 aup->mii_bus->reset = au1000_mdiobus_reset;
1133 aup->mii_bus->name = "au1000_eth_mii";
1134 snprintf(aup->mii_bus->id, MII_BUS_ID_SIZE, "%x", aup->mac_id);
1135 aup->mii_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
1136 if (aup->mii_bus->irq == NULL)
1139 for (i = 0; i < PHY_MAX_ADDR; ++i)
1140 aup->mii_bus->irq[i] = PHY_POLL;
1141 /* if known, set corresponding PHY IRQs */
1142 if (aup->phy_static_config)
1143 if (aup->phy_irq && aup->phy_busid == aup->mac_id)
1144 aup->mii_bus->irq[aup->phy_addr] = aup->phy_irq;
1146 err = mdiobus_register(aup->mii_bus);
1148 dev_err(&pdev->dev, "failed to register MDIO bus\n");
1149 goto err_mdiobus_reg;
1152 if (au1000_mii_probe(dev) != 0)
1156 /* setup the data buffer descriptors and attach a buffer to each one */
1158 for (i = 0; i < (NUM_TX_BUFFS+NUM_RX_BUFFS); i++) {
1159 pDB->pnext = pDBfree;
1161 pDB->vaddr = (u32 *)((unsigned)aup->vaddr + MAX_BUF_SIZE*i);
1162 pDB->dma_addr = (dma_addr_t)virt_to_bus(pDB->vaddr);
1165 aup->pDBfree = pDBfree;
1167 for (i = 0; i < NUM_RX_DMA; i++) {
1168 pDB = au1000_GetFreeDB(aup);
1172 aup->rx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
1173 aup->rx_db_inuse[i] = pDB;
1175 for (i = 0; i < NUM_TX_DMA; i++) {
1176 pDB = au1000_GetFreeDB(aup);
1180 aup->tx_dma_ring[i]->buff_stat = (unsigned)pDB->dma_addr;
1181 aup->tx_dma_ring[i]->len = 0;
1182 aup->tx_db_inuse[i] = pDB;
1185 dev->base_addr = base->start;
1187 dev->netdev_ops = &au1000_netdev_ops;
1188 SET_ETHTOOL_OPS(dev, &au1000_ethtool_ops);
1189 dev->watchdog_timeo = ETH_TX_TIMEOUT;
1192 * The boot code uses the ethernet controller, so reset it to start
1193 * fresh. au1000_init() expects that the device is in reset state.
1195 au1000_reset_mac(dev);
1197 err = register_netdev(dev);
1199 netdev_err(dev, "Cannot register net device, aborting.\n");
1203 netdev_info(dev, "Au1xx0 Ethernet found at 0x%lx, irq %d\n",
1204 (unsigned long)base->start, irq);
1205 if (version_printed++ == 0)
1206 pr_info("%s version %s %s\n",
1207 DRV_NAME, DRV_VERSION, DRV_AUTHOR);
1212 if (aup->mii_bus != NULL)
1213 mdiobus_unregister(aup->mii_bus);
1215 /* here we should have a valid dev plus aup-> register addresses
1216 * so we can reset the mac properly.*/
1217 au1000_reset_mac(dev);
1219 for (i = 0; i < NUM_RX_DMA; i++) {
1220 if (aup->rx_db_inuse[i])
1221 au1000_ReleaseDB(aup, aup->rx_db_inuse[i]);
1223 for (i = 0; i < NUM_TX_DMA; i++) {
1224 if (aup->tx_db_inuse[i])
1225 au1000_ReleaseDB(aup, aup->tx_db_inuse[i]);
1228 mdiobus_free(aup->mii_bus);
1230 iounmap(aup->enable);
1234 dma_free_noncoherent(NULL, MAX_BUF_SIZE * (NUM_TX_BUFFS + NUM_RX_BUFFS),
1235 (void *)aup->vaddr, aup->dma_addr);
1239 release_mem_region(macen->start, resource_size(macen));
1241 release_mem_region(base->start, resource_size(base));
1246 static int __devexit au1000_remove(struct platform_device *pdev)
1248 struct net_device *dev = platform_get_drvdata(pdev);
1249 struct au1000_private *aup = netdev_priv(dev);
1251 struct resource *base, *macen;
1253 platform_set_drvdata(pdev, NULL);
1255 unregister_netdev(dev);
1256 mdiobus_unregister(aup->mii_bus);
1257 mdiobus_free(aup->mii_bus);
1259 for (i = 0; i < NUM_RX_DMA; i++)
1260 if (aup->rx_db_inuse[i])
1261 au1000_ReleaseDB(aup, aup->rx_db_inuse[i]);
1263 for (i = 0; i < NUM_TX_DMA; i++)
1264 if (aup->tx_db_inuse[i])
1265 au1000_ReleaseDB(aup, aup->tx_db_inuse[i]);
1267 dma_free_noncoherent(NULL, MAX_BUF_SIZE *
1268 (NUM_TX_BUFFS + NUM_RX_BUFFS),
1269 (void *)aup->vaddr, aup->dma_addr);
1272 iounmap(aup->enable);
1274 base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1275 release_mem_region(base->start, resource_size(base));
1277 macen = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1278 release_mem_region(macen->start, resource_size(macen));
1285 static struct platform_driver au1000_eth_driver = {
1286 .probe = au1000_probe,
1287 .remove = __devexit_p(au1000_remove),
1289 .name = "au1000-eth",
1290 .owner = THIS_MODULE,
1293 MODULE_ALIAS("platform:au1000-eth");
1296 static int __init au1000_init_module(void)
1298 return platform_driver_register(&au1000_eth_driver);
1301 static void __exit au1000_exit_module(void)
1303 platform_driver_unregister(&au1000_eth_driver);
1306 module_init(au1000_init_module);
1307 module_exit(au1000_exit_module);