2 * Copyright (C) 2005 - 2010 ServerEngines
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@serverengines.com
14 * 209 N. Fair Oaks Ave
20 #include <asm/div64.h>
22 MODULE_VERSION(DRV_VER);
23 MODULE_DEVICE_TABLE(pci, be_dev_ids);
24 MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
25 MODULE_AUTHOR("ServerEngines Corporation");
26 MODULE_LICENSE("GPL");
28 static unsigned int rx_frag_size = 2048;
29 static unsigned int num_vfs;
30 module_param(rx_frag_size, uint, S_IRUGO);
31 module_param(num_vfs, uint, S_IRUGO);
32 MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
33 MODULE_PARM_DESC(num_vfs, "Number of PCI VFs to initialize");
35 static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
36 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
37 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
38 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
39 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
42 MODULE_DEVICE_TABLE(pci, be_dev_ids);
44 static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
46 struct be_dma_mem *mem = &q->dma_mem;
48 pci_free_consistent(adapter->pdev, mem->size,
52 static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
53 u16 len, u16 entry_size)
55 struct be_dma_mem *mem = &q->dma_mem;
57 memset(q, 0, sizeof(*q));
59 q->entry_size = entry_size;
60 mem->size = len * entry_size;
61 mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
64 memset(mem->va, 0, mem->size);
68 static void be_intr_set(struct be_adapter *adapter, bool enable)
70 u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
71 u32 reg = ioread32(addr);
72 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
77 if (!enabled && enable)
78 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
79 else if (enabled && !enable)
80 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
87 static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
90 val |= qid & DB_RQ_RING_ID_MASK;
91 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
92 iowrite32(val, adapter->db + DB_RQ_OFFSET);
95 static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
98 val |= qid & DB_TXULP_RING_ID_MASK;
99 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
100 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
103 static void be_eq_notify(struct be_adapter *adapter, u16 qid,
104 bool arm, bool clear_int, u16 num_popped)
107 val |= qid & DB_EQ_RING_ID_MASK;
109 if (adapter->eeh_err)
113 val |= 1 << DB_EQ_REARM_SHIFT;
115 val |= 1 << DB_EQ_CLR_SHIFT;
116 val |= 1 << DB_EQ_EVNT_SHIFT;
117 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
118 iowrite32(val, adapter->db + DB_EQ_OFFSET);
121 void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
124 val |= qid & DB_CQ_RING_ID_MASK;
126 if (adapter->eeh_err)
130 val |= 1 << DB_CQ_REARM_SHIFT;
131 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
132 iowrite32(val, adapter->db + DB_CQ_OFFSET);
135 static int be_mac_addr_set(struct net_device *netdev, void *p)
137 struct be_adapter *adapter = netdev_priv(netdev);
138 struct sockaddr *addr = p;
141 if (!is_valid_ether_addr(addr->sa_data))
142 return -EADDRNOTAVAIL;
144 /* MAC addr configuration will be done in hardware for VFs
145 * by their corresponding PFs. Just copy to netdev addr here
147 if (!be_physfn(adapter))
150 status = be_cmd_pmac_del(adapter, adapter->if_handle, adapter->pmac_id);
154 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
155 adapter->if_handle, &adapter->pmac_id);
158 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
163 void netdev_stats_update(struct be_adapter *adapter)
165 struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
166 struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
167 struct be_port_rxf_stats *port_stats =
168 &rxf_stats->port[adapter->port_num];
169 struct net_device_stats *dev_stats = &adapter->netdev->stats;
170 struct be_erx_stats *erx_stats = &hw_stats->erx;
172 dev_stats->rx_packets = drvr_stats(adapter)->be_rx_pkts;
173 dev_stats->tx_packets = drvr_stats(adapter)->be_tx_pkts;
174 dev_stats->rx_bytes = drvr_stats(adapter)->be_rx_bytes;
175 dev_stats->tx_bytes = drvr_stats(adapter)->be_tx_bytes;
177 /* bad pkts received */
178 dev_stats->rx_errors = port_stats->rx_crc_errors +
179 port_stats->rx_alignment_symbol_errors +
180 port_stats->rx_in_range_errors +
181 port_stats->rx_out_range_errors +
182 port_stats->rx_frame_too_long +
183 port_stats->rx_dropped_too_small +
184 port_stats->rx_dropped_too_short +
185 port_stats->rx_dropped_header_too_small +
186 port_stats->rx_dropped_tcp_length +
187 port_stats->rx_dropped_runt +
188 port_stats->rx_tcp_checksum_errs +
189 port_stats->rx_ip_checksum_errs +
190 port_stats->rx_udp_checksum_errs;
192 /* no space in linux buffers: best possible approximation */
193 dev_stats->rx_dropped =
194 erx_stats->rx_drops_no_fragments[adapter->rx_obj.q.id];
196 /* detailed rx errors */
197 dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
198 port_stats->rx_out_range_errors +
199 port_stats->rx_frame_too_long;
201 /* receive ring buffer overflow */
202 dev_stats->rx_over_errors = 0;
204 dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
206 /* frame alignment errors */
207 dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
209 /* receiver fifo overrun */
210 /* drops_no_pbuf is no per i/f, it's per BE card */
211 dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
212 port_stats->rx_input_fifo_overflow +
213 rxf_stats->rx_drops_no_pbuf;
214 /* receiver missed packetd */
215 dev_stats->rx_missed_errors = 0;
217 /* packet transmit problems */
218 dev_stats->tx_errors = 0;
220 /* no space available in linux */
221 dev_stats->tx_dropped = 0;
223 dev_stats->multicast = port_stats->rx_multicast_frames;
224 dev_stats->collisions = 0;
226 /* detailed tx_errors */
227 dev_stats->tx_aborted_errors = 0;
228 dev_stats->tx_carrier_errors = 0;
229 dev_stats->tx_fifo_errors = 0;
230 dev_stats->tx_heartbeat_errors = 0;
231 dev_stats->tx_window_errors = 0;
234 void be_link_status_update(struct be_adapter *adapter, bool link_up)
236 struct net_device *netdev = adapter->netdev;
238 /* If link came up or went down */
239 if (adapter->link_up != link_up) {
240 adapter->link_speed = -1;
242 netif_start_queue(netdev);
243 netif_carrier_on(netdev);
244 printk(KERN_INFO "%s: Link up\n", netdev->name);
246 netif_stop_queue(netdev);
247 netif_carrier_off(netdev);
248 printk(KERN_INFO "%s: Link down\n", netdev->name);
250 adapter->link_up = link_up;
254 /* Update the EQ delay n BE based on the RX frags consumed / sec */
255 static void be_rx_eqd_update(struct be_adapter *adapter)
257 struct be_eq_obj *rx_eq = &adapter->rx_eq;
258 struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
262 if (!rx_eq->enable_aic)
266 if (time_before(now, stats->rx_fps_jiffies)) {
267 stats->rx_fps_jiffies = now;
271 /* Update once a second */
272 if ((now - stats->rx_fps_jiffies) < HZ)
275 stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
276 ((now - stats->rx_fps_jiffies) / HZ);
278 stats->rx_fps_jiffies = now;
279 stats->be_prev_rx_frags = stats->be_rx_frags;
280 eqd = stats->be_rx_fps / 110000;
282 if (eqd > rx_eq->max_eqd)
283 eqd = rx_eq->max_eqd;
284 if (eqd < rx_eq->min_eqd)
285 eqd = rx_eq->min_eqd;
288 if (eqd != rx_eq->cur_eqd)
289 be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
291 rx_eq->cur_eqd = eqd;
294 static struct net_device_stats *be_get_stats(struct net_device *dev)
299 static u32 be_calc_rate(u64 bytes, unsigned long ticks)
303 do_div(rate, ticks / HZ);
304 rate <<= 3; /* bytes/sec -> bits/sec */
305 do_div(rate, 1000000ul); /* MB/Sec */
310 static void be_tx_rate_update(struct be_adapter *adapter)
312 struct be_drvr_stats *stats = drvr_stats(adapter);
315 /* Wrapped around? */
316 if (time_before(now, stats->be_tx_jiffies)) {
317 stats->be_tx_jiffies = now;
321 /* Update tx rate once in two seconds */
322 if ((now - stats->be_tx_jiffies) > 2 * HZ) {
323 stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
324 - stats->be_tx_bytes_prev,
325 now - stats->be_tx_jiffies);
326 stats->be_tx_jiffies = now;
327 stats->be_tx_bytes_prev = stats->be_tx_bytes;
331 static void be_tx_stats_update(struct be_adapter *adapter,
332 u32 wrb_cnt, u32 copied, u32 gso_segs, bool stopped)
334 struct be_drvr_stats *stats = drvr_stats(adapter);
336 stats->be_tx_wrbs += wrb_cnt;
337 stats->be_tx_bytes += copied;
338 stats->be_tx_pkts += (gso_segs ? gso_segs : 1);
340 stats->be_tx_stops++;
343 /* Determine number of WRB entries needed to xmit data in an skb */
344 static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
346 int cnt = (skb->len > skb->data_len);
348 cnt += skb_shinfo(skb)->nr_frags;
350 /* to account for hdr wrb */
353 /* add a dummy to make it an even num */
358 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
362 static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
364 wrb->frag_pa_hi = upper_32_bits(addr);
365 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
366 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
369 static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
370 bool vlan, u32 wrb_cnt, u32 len)
372 memset(hdr, 0, sizeof(*hdr));
374 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
376 if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
377 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
378 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
379 hdr, skb_shinfo(skb)->gso_size);
380 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
382 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
383 else if (is_udp_pkt(skb))
384 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
387 if (vlan && vlan_tx_tag_present(skb)) {
388 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
389 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
390 hdr, vlan_tx_tag_get(skb));
393 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
394 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
395 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
396 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
399 static void unmap_tx_frag(struct pci_dev *pdev, struct be_eth_wrb *wrb,
404 be_dws_le_to_cpu(wrb, sizeof(*wrb));
406 dma = (u64)wrb->frag_pa_hi << 32 | (u64)wrb->frag_pa_lo;
409 pci_unmap_single(pdev, dma, wrb->frag_len,
412 pci_unmap_page(pdev, dma, wrb->frag_len,
417 static int make_tx_wrbs(struct be_adapter *adapter,
418 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
422 struct pci_dev *pdev = adapter->pdev;
423 struct sk_buff *first_skb = skb;
424 struct be_queue_info *txq = &adapter->tx_obj.q;
425 struct be_eth_wrb *wrb;
426 struct be_eth_hdr_wrb *hdr;
427 bool map_single = false;
430 hdr = queue_head_node(txq);
432 map_head = txq->head;
434 if (skb->len > skb->data_len) {
435 int len = skb->len - skb->data_len;
436 busaddr = pci_map_single(pdev, skb->data, len,
438 if (pci_dma_mapping_error(pdev, busaddr))
441 wrb = queue_head_node(txq);
442 wrb_fill(wrb, busaddr, len);
443 be_dws_cpu_to_le(wrb, sizeof(*wrb));
448 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
449 struct skb_frag_struct *frag =
450 &skb_shinfo(skb)->frags[i];
451 busaddr = pci_map_page(pdev, frag->page,
453 frag->size, PCI_DMA_TODEVICE);
454 if (pci_dma_mapping_error(pdev, busaddr))
456 wrb = queue_head_node(txq);
457 wrb_fill(wrb, busaddr, frag->size);
458 be_dws_cpu_to_le(wrb, sizeof(*wrb));
460 copied += frag->size;
464 wrb = queue_head_node(txq);
466 be_dws_cpu_to_le(wrb, sizeof(*wrb));
470 wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
472 be_dws_cpu_to_le(hdr, sizeof(*hdr));
476 txq->head = map_head;
478 wrb = queue_head_node(txq);
479 unmap_tx_frag(pdev, wrb, map_single);
481 copied -= wrb->frag_len;
487 static netdev_tx_t be_xmit(struct sk_buff *skb,
488 struct net_device *netdev)
490 struct be_adapter *adapter = netdev_priv(netdev);
491 struct be_tx_obj *tx_obj = &adapter->tx_obj;
492 struct be_queue_info *txq = &tx_obj->q;
493 u32 wrb_cnt = 0, copied = 0;
494 u32 start = txq->head;
495 bool dummy_wrb, stopped = false;
497 wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
499 copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
501 /* record the sent skb in the sent_skb table */
502 BUG_ON(tx_obj->sent_skb_list[start]);
503 tx_obj->sent_skb_list[start] = skb;
505 /* Ensure txq has space for the next skb; Else stop the queue
506 * *BEFORE* ringing the tx doorbell, so that we serialze the
507 * tx compls of the current transmit which'll wake up the queue
509 atomic_add(wrb_cnt, &txq->used);
510 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
512 netif_stop_queue(netdev);
516 be_txq_notify(adapter, txq->id, wrb_cnt);
518 be_tx_stats_update(adapter, wrb_cnt, copied,
519 skb_shinfo(skb)->gso_segs, stopped);
522 dev_kfree_skb_any(skb);
527 static int be_change_mtu(struct net_device *netdev, int new_mtu)
529 struct be_adapter *adapter = netdev_priv(netdev);
530 if (new_mtu < BE_MIN_MTU ||
531 new_mtu > (BE_MAX_JUMBO_FRAME_SIZE -
532 (ETH_HLEN + ETH_FCS_LEN))) {
533 dev_info(&adapter->pdev->dev,
534 "MTU must be between %d and %d bytes\n",
536 (BE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN)));
539 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
540 netdev->mtu, new_mtu);
541 netdev->mtu = new_mtu;
546 * A max of 64 (BE_NUM_VLANS_SUPPORTED) vlans can be configured in BE.
547 * If the user configures more, place BE in vlan promiscuous mode.
549 static int be_vid_config(struct be_adapter *adapter)
551 u16 vtag[BE_NUM_VLANS_SUPPORTED];
555 if (adapter->vlans_added <= adapter->max_vlans) {
556 /* Construct VLAN Table to give to HW */
557 for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
558 if (adapter->vlan_tag[i]) {
559 vtag[ntags] = cpu_to_le16(i);
563 status = be_cmd_vlan_config(adapter, adapter->if_handle,
566 status = be_cmd_vlan_config(adapter, adapter->if_handle,
572 static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
574 struct be_adapter *adapter = netdev_priv(netdev);
575 struct be_eq_obj *rx_eq = &adapter->rx_eq;
576 struct be_eq_obj *tx_eq = &adapter->tx_eq;
578 be_eq_notify(adapter, rx_eq->q.id, false, false, 0);
579 be_eq_notify(adapter, tx_eq->q.id, false, false, 0);
580 adapter->vlan_grp = grp;
581 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
582 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
585 static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
587 struct be_adapter *adapter = netdev_priv(netdev);
589 if (!be_physfn(adapter))
592 adapter->vlan_tag[vid] = 1;
593 adapter->vlans_added++;
594 if (adapter->vlans_added <= (adapter->max_vlans + 1))
595 be_vid_config(adapter);
598 static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
600 struct be_adapter *adapter = netdev_priv(netdev);
602 if (!be_physfn(adapter))
605 adapter->vlan_tag[vid] = 0;
606 vlan_group_set_device(adapter->vlan_grp, vid, NULL);
607 adapter->vlans_added--;
608 if (adapter->vlans_added <= adapter->max_vlans)
609 be_vid_config(adapter);
612 static void be_set_multicast_list(struct net_device *netdev)
614 struct be_adapter *adapter = netdev_priv(netdev);
616 if (netdev->flags & IFF_PROMISC) {
617 be_cmd_promiscuous_config(adapter, adapter->port_num, 1);
618 adapter->promiscuous = true;
622 /* BE was previously in promiscous mode; disable it */
623 if (adapter->promiscuous) {
624 adapter->promiscuous = false;
625 be_cmd_promiscuous_config(adapter, adapter->port_num, 0);
628 /* Enable multicast promisc if num configured exceeds what we support */
629 if (netdev->flags & IFF_ALLMULTI ||
630 netdev_mc_count(netdev) > BE_MAX_MC) {
631 be_cmd_multicast_set(adapter, adapter->if_handle, NULL,
632 &adapter->mc_cmd_mem);
636 be_cmd_multicast_set(adapter, adapter->if_handle, netdev,
637 &adapter->mc_cmd_mem);
642 static int be_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
644 struct be_adapter *adapter = netdev_priv(netdev);
647 if (!adapter->sriov_enabled)
650 if (!is_valid_ether_addr(mac) || (vf >= num_vfs))
653 status = be_cmd_pmac_del(adapter, adapter->vf_if_handle[vf],
654 adapter->vf_pmac_id[vf]);
656 status = be_cmd_pmac_add(adapter, mac, adapter->vf_if_handle[vf],
657 &adapter->vf_pmac_id[vf]);
659 dev_err(&adapter->pdev->dev, "MAC %pM set on VF %d Failed\n",
664 static void be_rx_rate_update(struct be_adapter *adapter)
666 struct be_drvr_stats *stats = drvr_stats(adapter);
670 if (time_before(now, stats->be_rx_jiffies)) {
671 stats->be_rx_jiffies = now;
675 /* Update the rate once in two seconds */
676 if ((now - stats->be_rx_jiffies) < 2 * HZ)
679 stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
680 - stats->be_rx_bytes_prev,
681 now - stats->be_rx_jiffies);
682 stats->be_rx_jiffies = now;
683 stats->be_rx_bytes_prev = stats->be_rx_bytes;
686 static void be_rx_stats_update(struct be_adapter *adapter,
687 u32 pktsize, u16 numfrags)
689 struct be_drvr_stats *stats = drvr_stats(adapter);
691 stats->be_rx_compl++;
692 stats->be_rx_frags += numfrags;
693 stats->be_rx_bytes += pktsize;
697 static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
699 u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
701 l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
702 ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
703 ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
705 tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
706 udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
708 ipv6_chk = (ip_version && (tcpf || udpf));
710 return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
713 static struct be_rx_page_info *
714 get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
716 struct be_rx_page_info *rx_page_info;
717 struct be_queue_info *rxq = &adapter->rx_obj.q;
719 rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
720 BUG_ON(!rx_page_info->page);
722 if (rx_page_info->last_page_user) {
723 pci_unmap_page(adapter->pdev, dma_unmap_addr(rx_page_info, bus),
724 adapter->big_page_size, PCI_DMA_FROMDEVICE);
725 rx_page_info->last_page_user = false;
728 atomic_dec(&rxq->used);
732 /* Throwaway the data in the Rx completion */
733 static void be_rx_compl_discard(struct be_adapter *adapter,
734 struct be_eth_rx_compl *rxcp)
736 struct be_queue_info *rxq = &adapter->rx_obj.q;
737 struct be_rx_page_info *page_info;
738 u16 rxq_idx, i, num_rcvd;
740 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
741 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
743 for (i = 0; i < num_rcvd; i++) {
744 page_info = get_rx_page_info(adapter, rxq_idx);
745 put_page(page_info->page);
746 memset(page_info, 0, sizeof(*page_info));
747 index_inc(&rxq_idx, rxq->len);
752 * skb_fill_rx_data forms a complete skb for an ether frame
755 static void skb_fill_rx_data(struct be_adapter *adapter,
756 struct sk_buff *skb, struct be_eth_rx_compl *rxcp,
759 struct be_queue_info *rxq = &adapter->rx_obj.q;
760 struct be_rx_page_info *page_info;
762 u32 pktsize, hdr_len, curr_frag_len, size;
765 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
766 pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
768 page_info = get_rx_page_info(adapter, rxq_idx);
770 start = page_address(page_info->page) + page_info->page_offset;
773 /* Copy data in the first descriptor of this completion */
774 curr_frag_len = min(pktsize, rx_frag_size);
776 /* Copy the header portion into skb_data */
777 hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
778 memcpy(skb->data, start, hdr_len);
779 skb->len = curr_frag_len;
780 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
781 /* Complete packet has now been moved to data */
782 put_page(page_info->page);
784 skb->tail += curr_frag_len;
786 skb_shinfo(skb)->nr_frags = 1;
787 skb_shinfo(skb)->frags[0].page = page_info->page;
788 skb_shinfo(skb)->frags[0].page_offset =
789 page_info->page_offset + hdr_len;
790 skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
791 skb->data_len = curr_frag_len - hdr_len;
792 skb->tail += hdr_len;
794 page_info->page = NULL;
796 if (pktsize <= rx_frag_size) {
797 BUG_ON(num_rcvd != 1);
801 /* More frags present for this completion */
803 for (i = 1, j = 0; i < num_rcvd; i++) {
804 size -= curr_frag_len;
805 index_inc(&rxq_idx, rxq->len);
806 page_info = get_rx_page_info(adapter, rxq_idx);
808 curr_frag_len = min(size, rx_frag_size);
810 /* Coalesce all frags from the same physical page in one slot */
811 if (page_info->page_offset == 0) {
814 skb_shinfo(skb)->frags[j].page = page_info->page;
815 skb_shinfo(skb)->frags[j].page_offset =
816 page_info->page_offset;
817 skb_shinfo(skb)->frags[j].size = 0;
818 skb_shinfo(skb)->nr_frags++;
820 put_page(page_info->page);
823 skb_shinfo(skb)->frags[j].size += curr_frag_len;
824 skb->len += curr_frag_len;
825 skb->data_len += curr_frag_len;
827 page_info->page = NULL;
829 BUG_ON(j > MAX_SKB_FRAGS);
832 be_rx_stats_update(adapter, pktsize, num_rcvd);
836 /* Process the RX completion indicated by rxcp when GRO is disabled */
837 static void be_rx_compl_process(struct be_adapter *adapter,
838 struct be_eth_rx_compl *rxcp)
845 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
846 /* Is it a flush compl that has no data */
847 if (unlikely(num_rcvd == 0))
850 skb = netdev_alloc_skb_ip_align(adapter->netdev, BE_HDR_LEN);
851 if (unlikely(!skb)) {
853 dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
854 be_rx_compl_discard(adapter, rxcp);
858 skb_fill_rx_data(adapter, skb, rxcp, num_rcvd);
860 if (do_pkt_csum(rxcp, adapter->rx_csum))
861 skb->ip_summed = CHECKSUM_NONE;
863 skb->ip_summed = CHECKSUM_UNNECESSARY;
865 skb->truesize = skb->len + sizeof(struct sk_buff);
866 skb->protocol = eth_type_trans(skb, adapter->netdev);
868 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
869 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
871 /* vlanf could be wrongly set in some cards.
872 * ignore if vtm is not set */
873 if ((adapter->cap & 0x400) && !vtm)
876 if (unlikely(vlanf)) {
877 if (!adapter->vlan_grp || adapter->vlans_added == 0) {
881 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
883 vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
885 netif_receive_skb(skb);
891 /* Process the RX completion indicated by rxcp when GRO is enabled */
892 static void be_rx_compl_process_gro(struct be_adapter *adapter,
893 struct be_eth_rx_compl *rxcp)
895 struct be_rx_page_info *page_info;
896 struct sk_buff *skb = NULL;
897 struct be_queue_info *rxq = &adapter->rx_obj.q;
898 struct be_eq_obj *eq_obj = &adapter->rx_eq;
899 u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
900 u16 i, rxq_idx = 0, vid, j;
903 num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
904 /* Is it a flush compl that has no data */
905 if (unlikely(num_rcvd == 0))
908 pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
909 vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
910 rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
911 vtm = AMAP_GET_BITS(struct amap_eth_rx_compl, vtm, rxcp);
913 /* vlanf could be wrongly set in some cards.
914 * ignore if vtm is not set */
915 if ((adapter->cap & 0x400) && !vtm)
918 skb = napi_get_frags(&eq_obj->napi);
920 be_rx_compl_discard(adapter, rxcp);
924 remaining = pkt_size;
925 for (i = 0, j = -1; i < num_rcvd; i++) {
926 page_info = get_rx_page_info(adapter, rxq_idx);
928 curr_frag_len = min(remaining, rx_frag_size);
930 /* Coalesce all frags from the same physical page in one slot */
931 if (i == 0 || page_info->page_offset == 0) {
932 /* First frag or Fresh page */
934 skb_shinfo(skb)->frags[j].page = page_info->page;
935 skb_shinfo(skb)->frags[j].page_offset =
936 page_info->page_offset;
937 skb_shinfo(skb)->frags[j].size = 0;
939 put_page(page_info->page);
941 skb_shinfo(skb)->frags[j].size += curr_frag_len;
943 remaining -= curr_frag_len;
944 index_inc(&rxq_idx, rxq->len);
945 memset(page_info, 0, sizeof(*page_info));
947 BUG_ON(j > MAX_SKB_FRAGS);
949 skb_shinfo(skb)->nr_frags = j + 1;
951 skb->data_len = pkt_size;
952 skb->truesize += pkt_size;
953 skb->ip_summed = CHECKSUM_UNNECESSARY;
955 if (likely(!vlanf)) {
956 napi_gro_frags(&eq_obj->napi);
958 vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
961 if (!adapter->vlan_grp || adapter->vlans_added == 0)
964 vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp, vid);
967 be_rx_stats_update(adapter, pkt_size, num_rcvd);
971 static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
973 struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
975 if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
978 be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
980 queue_tail_inc(&adapter->rx_obj.cq);
984 /* To reset the valid bit, we need to reset the whole word as
985 * when walking the queue the valid entries are little-endian
986 * and invalid entries are host endian
988 static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
990 rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
993 static inline struct page *be_alloc_pages(u32 size)
995 gfp_t alloc_flags = GFP_ATOMIC;
996 u32 order = get_order(size);
998 alloc_flags |= __GFP_COMP;
999 return alloc_pages(alloc_flags, order);
1003 * Allocate a page, split it to fragments of size rx_frag_size and post as
1004 * receive buffers to BE
1006 static void be_post_rx_frags(struct be_adapter *adapter)
1008 struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
1009 struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
1010 struct be_queue_info *rxq = &adapter->rx_obj.q;
1011 struct page *pagep = NULL;
1012 struct be_eth_rx_d *rxd;
1013 u64 page_dmaaddr = 0, frag_dmaaddr;
1014 u32 posted, page_offset = 0;
1016 page_info = &page_info_tbl[rxq->head];
1017 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
1019 pagep = be_alloc_pages(adapter->big_page_size);
1020 if (unlikely(!pagep)) {
1021 drvr_stats(adapter)->be_ethrx_post_fail++;
1024 page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
1025 adapter->big_page_size,
1026 PCI_DMA_FROMDEVICE);
1027 page_info->page_offset = 0;
1030 page_info->page_offset = page_offset + rx_frag_size;
1032 page_offset = page_info->page_offset;
1033 page_info->page = pagep;
1034 dma_unmap_addr_set(page_info, bus, page_dmaaddr);
1035 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
1037 rxd = queue_head_node(rxq);
1038 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
1039 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
1041 /* Any space left in the current big page for another frag? */
1042 if ((page_offset + rx_frag_size + rx_frag_size) >
1043 adapter->big_page_size) {
1045 page_info->last_page_user = true;
1048 prev_page_info = page_info;
1049 queue_head_inc(rxq);
1050 page_info = &page_info_tbl[rxq->head];
1053 prev_page_info->last_page_user = true;
1056 atomic_add(posted, &rxq->used);
1057 be_rxq_notify(adapter, rxq->id, posted);
1058 } else if (atomic_read(&rxq->used) == 0) {
1059 /* Let be_worker replenish when memory is available */
1060 adapter->rx_post_starved = true;
1066 static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
1068 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
1070 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
1073 be_dws_le_to_cpu(txcp, sizeof(*txcp));
1075 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
1077 queue_tail_inc(tx_cq);
1081 static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
1083 struct be_queue_info *txq = &adapter->tx_obj.q;
1084 struct be_eth_wrb *wrb;
1085 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
1086 struct sk_buff *sent_skb;
1087 u16 cur_index, num_wrbs = 1; /* account for hdr wrb */
1088 bool unmap_skb_hdr = true;
1090 sent_skb = sent_skbs[txq->tail];
1092 sent_skbs[txq->tail] = NULL;
1094 /* skip header wrb */
1095 queue_tail_inc(txq);
1098 cur_index = txq->tail;
1099 wrb = queue_tail_node(txq);
1100 unmap_tx_frag(adapter->pdev, wrb, (unmap_skb_hdr &&
1101 sent_skb->len > sent_skb->data_len));
1102 unmap_skb_hdr = false;
1105 queue_tail_inc(txq);
1106 } while (cur_index != last_index);
1108 atomic_sub(num_wrbs, &txq->used);
1110 kfree_skb(sent_skb);
1113 static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
1115 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1120 eqe->evt = le32_to_cpu(eqe->evt);
1121 queue_tail_inc(&eq_obj->q);
1125 static int event_handle(struct be_adapter *adapter,
1126 struct be_eq_obj *eq_obj)
1128 struct be_eq_entry *eqe;
1131 while ((eqe = event_get(eq_obj)) != NULL) {
1136 /* Deal with any spurious interrupts that come
1139 be_eq_notify(adapter, eq_obj->q.id, true, true, num);
1141 napi_schedule(&eq_obj->napi);
1146 /* Just read and notify events without processing them.
1147 * Used at the time of destroying event queues */
1148 static void be_eq_clean(struct be_adapter *adapter,
1149 struct be_eq_obj *eq_obj)
1151 struct be_eq_entry *eqe;
1154 while ((eqe = event_get(eq_obj)) != NULL) {
1160 be_eq_notify(adapter, eq_obj->q.id, false, true, num);
1163 static void be_rx_q_clean(struct be_adapter *adapter)
1165 struct be_rx_page_info *page_info;
1166 struct be_queue_info *rxq = &adapter->rx_obj.q;
1167 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1168 struct be_eth_rx_compl *rxcp;
1171 /* First cleanup pending rx completions */
1172 while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
1173 be_rx_compl_discard(adapter, rxcp);
1174 be_rx_compl_reset(rxcp);
1175 be_cq_notify(adapter, rx_cq->id, true, 1);
1178 /* Then free posted rx buffer that were not used */
1179 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
1180 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
1181 page_info = get_rx_page_info(adapter, tail);
1182 put_page(page_info->page);
1183 memset(page_info, 0, sizeof(*page_info));
1185 BUG_ON(atomic_read(&rxq->used));
1188 static void be_tx_compl_clean(struct be_adapter *adapter)
1190 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
1191 struct be_queue_info *txq = &adapter->tx_obj.q;
1192 struct be_eth_tx_compl *txcp;
1193 u16 end_idx, cmpl = 0, timeo = 0;
1194 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
1195 struct sk_buff *sent_skb;
1198 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1200 while ((txcp = be_tx_compl_get(tx_cq))) {
1201 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1203 be_tx_compl_process(adapter, end_idx);
1207 be_cq_notify(adapter, tx_cq->id, false, cmpl);
1211 if (atomic_read(&txq->used) == 0 || ++timeo > 200)
1217 if (atomic_read(&txq->used))
1218 dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
1219 atomic_read(&txq->used));
1221 /* free posted tx for which compls will never arrive */
1222 while (atomic_read(&txq->used)) {
1223 sent_skb = sent_skbs[txq->tail];
1224 end_idx = txq->tail;
1226 wrb_cnt_for_skb(sent_skb, &dummy_wrb) - 1, txq->len);
1227 be_tx_compl_process(adapter, end_idx);
1231 static void be_mcc_queues_destroy(struct be_adapter *adapter)
1233 struct be_queue_info *q;
1235 q = &adapter->mcc_obj.q;
1237 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
1238 be_queue_free(adapter, q);
1240 q = &adapter->mcc_obj.cq;
1242 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1243 be_queue_free(adapter, q);
1246 /* Must be called only after TX qs are created as MCC shares TX EQ */
1247 static int be_mcc_queues_create(struct be_adapter *adapter)
1249 struct be_queue_info *q, *cq;
1251 /* Alloc MCC compl queue */
1252 cq = &adapter->mcc_obj.cq;
1253 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
1254 sizeof(struct be_mcc_compl)))
1257 /* Ask BE to create MCC compl queue; share TX's eq */
1258 if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
1261 /* Alloc MCC queue */
1262 q = &adapter->mcc_obj.q;
1263 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1264 goto mcc_cq_destroy;
1266 /* Ask BE to create MCC queue */
1267 if (be_cmd_mccq_create(adapter, q, cq))
1273 be_queue_free(adapter, q);
1275 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1277 be_queue_free(adapter, cq);
1282 static void be_tx_queues_destroy(struct be_adapter *adapter)
1284 struct be_queue_info *q;
1286 q = &adapter->tx_obj.q;
1288 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
1289 be_queue_free(adapter, q);
1291 q = &adapter->tx_obj.cq;
1293 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1294 be_queue_free(adapter, q);
1296 /* Clear any residual events */
1297 be_eq_clean(adapter, &adapter->tx_eq);
1299 q = &adapter->tx_eq.q;
1301 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
1302 be_queue_free(adapter, q);
1305 static int be_tx_queues_create(struct be_adapter *adapter)
1307 struct be_queue_info *eq, *q, *cq;
1309 adapter->tx_eq.max_eqd = 0;
1310 adapter->tx_eq.min_eqd = 0;
1311 adapter->tx_eq.cur_eqd = 96;
1312 adapter->tx_eq.enable_aic = false;
1313 /* Alloc Tx Event queue */
1314 eq = &adapter->tx_eq.q;
1315 if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
1318 /* Ask BE to create Tx Event queue */
1319 if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
1321 adapter->base_eq_id = adapter->tx_eq.q.id;
1323 /* Alloc TX eth compl queue */
1324 cq = &adapter->tx_obj.cq;
1325 if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
1326 sizeof(struct be_eth_tx_compl)))
1329 /* Ask BE to create Tx eth compl queue */
1330 if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
1333 /* Alloc TX eth queue */
1334 q = &adapter->tx_obj.q;
1335 if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
1338 /* Ask BE to create Tx eth queue */
1339 if (be_cmd_txq_create(adapter, q, cq))
1344 be_queue_free(adapter, q);
1346 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1348 be_queue_free(adapter, cq);
1350 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
1352 be_queue_free(adapter, eq);
1356 static void be_rx_queues_destroy(struct be_adapter *adapter)
1358 struct be_queue_info *q;
1360 q = &adapter->rx_obj.q;
1362 be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
1364 /* After the rxq is invalidated, wait for a grace time
1365 * of 1ms for all dma to end and the flush compl to arrive
1368 be_rx_q_clean(adapter);
1370 be_queue_free(adapter, q);
1372 q = &adapter->rx_obj.cq;
1374 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1375 be_queue_free(adapter, q);
1377 /* Clear any residual events */
1378 be_eq_clean(adapter, &adapter->rx_eq);
1380 q = &adapter->rx_eq.q;
1382 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
1383 be_queue_free(adapter, q);
1386 static int be_rx_queues_create(struct be_adapter *adapter)
1388 struct be_queue_info *eq, *q, *cq;
1391 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1392 adapter->rx_eq.max_eqd = BE_MAX_EQD;
1393 adapter->rx_eq.min_eqd = 0;
1394 adapter->rx_eq.cur_eqd = 0;
1395 adapter->rx_eq.enable_aic = true;
1397 /* Alloc Rx Event queue */
1398 eq = &adapter->rx_eq.q;
1399 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1400 sizeof(struct be_eq_entry));
1404 /* Ask BE to create Rx Event queue */
1405 rc = be_cmd_eq_create(adapter, eq, adapter->rx_eq.cur_eqd);
1409 /* Alloc RX eth compl queue */
1410 cq = &adapter->rx_obj.cq;
1411 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1412 sizeof(struct be_eth_rx_compl));
1416 /* Ask BE to create Rx eth compl queue */
1417 rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
1421 /* Alloc RX eth queue */
1422 q = &adapter->rx_obj.q;
1423 rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
1427 /* Ask BE to create Rx eth queue */
1428 rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
1429 BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
1435 be_queue_free(adapter, q);
1437 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1439 be_queue_free(adapter, cq);
1441 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
1443 be_queue_free(adapter, eq);
1447 /* There are 8 evt ids per func. Retruns the evt id's bit number */
1448 static inline int be_evt_bit_get(struct be_adapter *adapter, u32 eq_id)
1450 return eq_id - adapter->base_eq_id;
1453 static irqreturn_t be_intx(int irq, void *dev)
1455 struct be_adapter *adapter = dev;
1458 isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
1459 (adapter->tx_eq.q.id/ 8) * CEV_ISR_SIZE);
1463 event_handle(adapter, &adapter->tx_eq);
1464 event_handle(adapter, &adapter->rx_eq);
1469 static irqreturn_t be_msix_rx(int irq, void *dev)
1471 struct be_adapter *adapter = dev;
1473 event_handle(adapter, &adapter->rx_eq);
1478 static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
1480 struct be_adapter *adapter = dev;
1482 event_handle(adapter, &adapter->tx_eq);
1487 static inline bool do_gro(struct be_adapter *adapter,
1488 struct be_eth_rx_compl *rxcp)
1490 int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
1491 int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
1494 drvr_stats(adapter)->be_rxcp_err++;
1496 return (tcp_frame && !err) ? true : false;
1499 int be_poll_rx(struct napi_struct *napi, int budget)
1501 struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
1502 struct be_adapter *adapter =
1503 container_of(rx_eq, struct be_adapter, rx_eq);
1504 struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
1505 struct be_eth_rx_compl *rxcp;
1508 adapter->stats.drvr_stats.be_rx_polls++;
1509 for (work_done = 0; work_done < budget; work_done++) {
1510 rxcp = be_rx_compl_get(adapter);
1514 if (do_gro(adapter, rxcp))
1515 be_rx_compl_process_gro(adapter, rxcp);
1517 be_rx_compl_process(adapter, rxcp);
1519 be_rx_compl_reset(rxcp);
1522 /* Refill the queue */
1523 if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
1524 be_post_rx_frags(adapter);
1527 if (work_done < budget) {
1528 napi_complete(napi);
1529 be_cq_notify(adapter, rx_cq->id, true, work_done);
1531 /* More to be consumed; continue with interrupts disabled */
1532 be_cq_notify(adapter, rx_cq->id, false, work_done);
1537 /* As TX and MCC share the same EQ check for both TX and MCC completions.
1538 * For TX/MCC we don't honour budget; consume everything
1540 static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
1542 struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
1543 struct be_adapter *adapter =
1544 container_of(tx_eq, struct be_adapter, tx_eq);
1545 struct be_queue_info *txq = &adapter->tx_obj.q;
1546 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
1547 struct be_eth_tx_compl *txcp;
1548 int tx_compl = 0, mcc_compl, status = 0;
1551 while ((txcp = be_tx_compl_get(tx_cq))) {
1552 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1554 be_tx_compl_process(adapter, end_idx);
1558 mcc_compl = be_process_mcc(adapter, &status);
1560 napi_complete(napi);
1563 struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
1564 be_cq_notify(adapter, mcc_obj->cq.id, true, mcc_compl);
1568 be_cq_notify(adapter, adapter->tx_obj.cq.id, true, tx_compl);
1570 /* As Tx wrbs have been freed up, wake up netdev queue if
1571 * it was stopped due to lack of tx wrbs.
1573 if (netif_queue_stopped(adapter->netdev) &&
1574 atomic_read(&txq->used) < txq->len / 2) {
1575 netif_wake_queue(adapter->netdev);
1578 drvr_stats(adapter)->be_tx_events++;
1579 drvr_stats(adapter)->be_tx_compl += tx_compl;
1585 static void be_worker(struct work_struct *work)
1587 struct be_adapter *adapter =
1588 container_of(work, struct be_adapter, work.work);
1590 be_cmd_get_stats(adapter, &adapter->stats.cmd);
1593 be_rx_eqd_update(adapter);
1595 be_tx_rate_update(adapter);
1596 be_rx_rate_update(adapter);
1598 if (adapter->rx_post_starved) {
1599 adapter->rx_post_starved = false;
1600 be_post_rx_frags(adapter);
1603 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
1606 static void be_msix_disable(struct be_adapter *adapter)
1608 if (adapter->msix_enabled) {
1609 pci_disable_msix(adapter->pdev);
1610 adapter->msix_enabled = false;
1614 static void be_msix_enable(struct be_adapter *adapter)
1618 for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
1619 adapter->msix_entries[i].entry = i;
1621 status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1622 BE_NUM_MSIX_VECTORS);
1624 adapter->msix_enabled = true;
1628 static void be_sriov_enable(struct be_adapter *adapter)
1630 #ifdef CONFIG_PCI_IOV
1632 if (be_physfn(adapter) && num_vfs) {
1633 status = pci_enable_sriov(adapter->pdev, num_vfs);
1634 adapter->sriov_enabled = status ? false : true;
1640 static void be_sriov_disable(struct be_adapter *adapter)
1642 #ifdef CONFIG_PCI_IOV
1643 if (adapter->sriov_enabled) {
1644 pci_disable_sriov(adapter->pdev);
1645 adapter->sriov_enabled = false;
1650 static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
1652 return adapter->msix_entries[
1653 be_evt_bit_get(adapter, eq_id)].vector;
1656 static int be_request_irq(struct be_adapter *adapter,
1657 struct be_eq_obj *eq_obj,
1658 void *handler, char *desc)
1660 struct net_device *netdev = adapter->netdev;
1663 sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
1664 vec = be_msix_vec_get(adapter, eq_obj->q.id);
1665 return request_irq(vec, handler, 0, eq_obj->desc, adapter);
1668 static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj)
1670 int vec = be_msix_vec_get(adapter, eq_obj->q.id);
1671 free_irq(vec, adapter);
1674 static int be_msix_register(struct be_adapter *adapter)
1678 status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx");
1682 status = be_request_irq(adapter, &adapter->rx_eq, be_msix_rx, "rx");
1689 be_free_irq(adapter, &adapter->tx_eq);
1691 dev_warn(&adapter->pdev->dev,
1692 "MSIX Request IRQ failed - err %d\n", status);
1693 pci_disable_msix(adapter->pdev);
1694 adapter->msix_enabled = false;
1698 static int be_irq_register(struct be_adapter *adapter)
1700 struct net_device *netdev = adapter->netdev;
1703 if (adapter->msix_enabled) {
1704 status = be_msix_register(adapter);
1707 /* INTx is not supported for VF */
1708 if (!be_physfn(adapter))
1713 netdev->irq = adapter->pdev->irq;
1714 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
1717 dev_err(&adapter->pdev->dev,
1718 "INTx request IRQ failed - err %d\n", status);
1722 adapter->isr_registered = true;
1726 static void be_irq_unregister(struct be_adapter *adapter)
1728 struct net_device *netdev = adapter->netdev;
1730 if (!adapter->isr_registered)
1734 if (!adapter->msix_enabled) {
1735 free_irq(netdev->irq, adapter);
1740 be_free_irq(adapter, &adapter->tx_eq);
1741 be_free_irq(adapter, &adapter->rx_eq);
1743 adapter->isr_registered = false;
1747 static int be_open(struct net_device *netdev)
1749 struct be_adapter *adapter = netdev_priv(netdev);
1750 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1751 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1757 /* First time posting */
1758 be_post_rx_frags(adapter);
1760 napi_enable(&rx_eq->napi);
1761 napi_enable(&tx_eq->napi);
1763 be_irq_register(adapter);
1765 be_intr_set(adapter, true);
1767 /* The evt queues are created in unarmed state; arm them */
1768 be_eq_notify(adapter, rx_eq->q.id, true, false, 0);
1769 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
1771 /* Rx compl queue may be in unarmed state; rearm it */
1772 be_cq_notify(adapter, adapter->rx_obj.cq.id, true, 0);
1774 /* Now that interrupts are on we can process async mcc */
1775 be_async_mcc_enable(adapter);
1777 status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
1781 be_link_status_update(adapter, link_up);
1783 if (be_physfn(adapter))
1784 status = be_vid_config(adapter);
1788 if (be_physfn(adapter)) {
1789 status = be_cmd_set_flow_control(adapter,
1790 adapter->tx_fc, adapter->rx_fc);
1795 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
1800 static int be_setup_wol(struct be_adapter *adapter, bool enable)
1802 struct be_dma_mem cmd;
1806 memset(mac, 0, ETH_ALEN);
1808 cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
1809 cmd.va = pci_alloc_consistent(adapter->pdev, cmd.size, &cmd.dma);
1812 memset(cmd.va, 0, cmd.size);
1815 status = pci_write_config_dword(adapter->pdev,
1816 PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
1818 dev_err(&adapter->pdev->dev,
1819 "Could not enable Wake-on-lan\n");
1820 pci_free_consistent(adapter->pdev, cmd.size, cmd.va,
1824 status = be_cmd_enable_magic_wol(adapter,
1825 adapter->netdev->dev_addr, &cmd);
1826 pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
1827 pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
1829 status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
1830 pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
1831 pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
1834 pci_free_consistent(adapter->pdev, cmd.size, cmd.va, cmd.dma);
1838 static int be_setup(struct be_adapter *adapter)
1840 struct net_device *netdev = adapter->netdev;
1841 u32 cap_flags, en_flags, vf = 0;
1845 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST;
1847 if (be_physfn(adapter)) {
1848 cap_flags |= BE_IF_FLAGS_MCAST_PROMISCUOUS |
1849 BE_IF_FLAGS_PROMISCUOUS |
1850 BE_IF_FLAGS_PASS_L3L4_ERRORS;
1851 en_flags |= BE_IF_FLAGS_PASS_L3L4_ERRORS;
1854 status = be_cmd_if_create(adapter, cap_flags, en_flags,
1855 netdev->dev_addr, false/* pmac_invalid */,
1856 &adapter->if_handle, &adapter->pmac_id, 0);
1860 if (be_physfn(adapter)) {
1861 while (vf < num_vfs) {
1862 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED
1863 | BE_IF_FLAGS_BROADCAST;
1864 status = be_cmd_if_create(adapter, cap_flags, en_flags,
1865 mac, true, &adapter->vf_if_handle[vf],
1868 dev_err(&adapter->pdev->dev,
1869 "Interface Create failed for VF %d\n", vf);
1873 } while (vf < num_vfs);
1874 } else if (!be_physfn(adapter)) {
1875 status = be_cmd_mac_addr_query(adapter, mac,
1876 MAC_ADDRESS_TYPE_NETWORK, false, adapter->if_handle);
1878 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
1879 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
1883 status = be_tx_queues_create(adapter);
1887 status = be_rx_queues_create(adapter);
1891 status = be_mcc_queues_create(adapter);
1895 adapter->link_speed = -1;
1900 be_rx_queues_destroy(adapter);
1902 be_tx_queues_destroy(adapter);
1904 for (vf = 0; vf < num_vfs; vf++)
1905 if (adapter->vf_if_handle[vf])
1906 be_cmd_if_destroy(adapter, adapter->vf_if_handle[vf]);
1907 be_cmd_if_destroy(adapter, adapter->if_handle);
1912 static int be_clear(struct be_adapter *adapter)
1914 be_mcc_queues_destroy(adapter);
1915 be_rx_queues_destroy(adapter);
1916 be_tx_queues_destroy(adapter);
1918 be_cmd_if_destroy(adapter, adapter->if_handle);
1920 /* tell fw we're done with firing cmds */
1921 be_cmd_fw_clean(adapter);
1925 static int be_close(struct net_device *netdev)
1927 struct be_adapter *adapter = netdev_priv(netdev);
1928 struct be_eq_obj *rx_eq = &adapter->rx_eq;
1929 struct be_eq_obj *tx_eq = &adapter->tx_eq;
1932 cancel_delayed_work_sync(&adapter->work);
1934 be_async_mcc_disable(adapter);
1936 netif_stop_queue(netdev);
1937 netif_carrier_off(netdev);
1938 adapter->link_up = false;
1940 be_intr_set(adapter, false);
1942 if (adapter->msix_enabled) {
1943 vec = be_msix_vec_get(adapter, tx_eq->q.id);
1944 synchronize_irq(vec);
1945 vec = be_msix_vec_get(adapter, rx_eq->q.id);
1946 synchronize_irq(vec);
1948 synchronize_irq(netdev->irq);
1950 be_irq_unregister(adapter);
1952 napi_disable(&rx_eq->napi);
1953 napi_disable(&tx_eq->napi);
1955 /* Wait for all pending tx completions to arrive so that
1956 * all tx skbs are freed.
1958 be_tx_compl_clean(adapter);
1963 #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
1964 char flash_cookie[2][16] = {"*** SE FLAS",
1965 "H DIRECTORY *** "};
1967 static bool be_flash_redboot(struct be_adapter *adapter,
1968 const u8 *p, u32 img_start, int image_size,
1975 crc_offset = hdr_size + img_start + image_size - 4;
1979 status = be_cmd_get_flash_crc(adapter, flashed_crc,
1982 dev_err(&adapter->pdev->dev,
1983 "could not get crc from flash, not flashing redboot\n");
1987 /*update redboot only if crc does not match*/
1988 if (!memcmp(flashed_crc, p, 4))
1994 static int be_flash_data(struct be_adapter *adapter,
1995 const struct firmware *fw,
1996 struct be_dma_mem *flash_cmd, int num_of_images)
1999 int status = 0, i, filehdr_size = 0;
2000 u32 total_bytes = 0, flash_op;
2002 const u8 *p = fw->data;
2003 struct be_cmd_write_flashrom *req = flash_cmd->va;
2004 struct flash_comp *pflashcomp;
2007 struct flash_comp gen3_flash_types[9] = {
2008 { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, IMG_TYPE_ISCSI_ACTIVE,
2009 FLASH_IMAGE_MAX_SIZE_g3},
2010 { FLASH_REDBOOT_START_g3, IMG_TYPE_REDBOOT,
2011 FLASH_REDBOOT_IMAGE_MAX_SIZE_g3},
2012 { FLASH_iSCSI_BIOS_START_g3, IMG_TYPE_BIOS,
2013 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2014 { FLASH_PXE_BIOS_START_g3, IMG_TYPE_PXE_BIOS,
2015 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2016 { FLASH_FCoE_BIOS_START_g3, IMG_TYPE_FCOE_BIOS,
2017 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2018 { FLASH_iSCSI_BACKUP_IMAGE_START_g3, IMG_TYPE_ISCSI_BACKUP,
2019 FLASH_IMAGE_MAX_SIZE_g3},
2020 { FLASH_FCoE_PRIMARY_IMAGE_START_g3, IMG_TYPE_FCOE_FW_ACTIVE,
2021 FLASH_IMAGE_MAX_SIZE_g3},
2022 { FLASH_FCoE_BACKUP_IMAGE_START_g3, IMG_TYPE_FCOE_FW_BACKUP,
2023 FLASH_IMAGE_MAX_SIZE_g3},
2024 { FLASH_NCSI_START_g3, IMG_TYPE_NCSI_FW,
2025 FLASH_NCSI_IMAGE_MAX_SIZE_g3}
2027 struct flash_comp gen2_flash_types[8] = {
2028 { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, IMG_TYPE_ISCSI_ACTIVE,
2029 FLASH_IMAGE_MAX_SIZE_g2},
2030 { FLASH_REDBOOT_START_g2, IMG_TYPE_REDBOOT,
2031 FLASH_REDBOOT_IMAGE_MAX_SIZE_g2},
2032 { FLASH_iSCSI_BIOS_START_g2, IMG_TYPE_BIOS,
2033 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2034 { FLASH_PXE_BIOS_START_g2, IMG_TYPE_PXE_BIOS,
2035 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2036 { FLASH_FCoE_BIOS_START_g2, IMG_TYPE_FCOE_BIOS,
2037 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2038 { FLASH_iSCSI_BACKUP_IMAGE_START_g2, IMG_TYPE_ISCSI_BACKUP,
2039 FLASH_IMAGE_MAX_SIZE_g2},
2040 { FLASH_FCoE_PRIMARY_IMAGE_START_g2, IMG_TYPE_FCOE_FW_ACTIVE,
2041 FLASH_IMAGE_MAX_SIZE_g2},
2042 { FLASH_FCoE_BACKUP_IMAGE_START_g2, IMG_TYPE_FCOE_FW_BACKUP,
2043 FLASH_IMAGE_MAX_SIZE_g2}
2046 if (adapter->generation == BE_GEN3) {
2047 pflashcomp = gen3_flash_types;
2048 filehdr_size = sizeof(struct flash_file_hdr_g3);
2051 pflashcomp = gen2_flash_types;
2052 filehdr_size = sizeof(struct flash_file_hdr_g2);
2055 for (i = 0; i < num_comp; i++) {
2056 if ((pflashcomp[i].optype == IMG_TYPE_NCSI_FW) &&
2057 memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0)
2059 if ((pflashcomp[i].optype == IMG_TYPE_REDBOOT) &&
2060 (!be_flash_redboot(adapter, fw->data,
2061 pflashcomp[i].offset, pflashcomp[i].size,
2065 p += filehdr_size + pflashcomp[i].offset
2066 + (num_of_images * sizeof(struct image_hdr));
2067 if (p + pflashcomp[i].size > fw->data + fw->size)
2069 total_bytes = pflashcomp[i].size;
2070 while (total_bytes) {
2071 if (total_bytes > 32*1024)
2072 num_bytes = 32*1024;
2074 num_bytes = total_bytes;
2075 total_bytes -= num_bytes;
2078 flash_op = FLASHROM_OPER_FLASH;
2080 flash_op = FLASHROM_OPER_SAVE;
2081 memcpy(req->params.data_buf, p, num_bytes);
2083 status = be_cmd_write_flashrom(adapter, flash_cmd,
2084 pflashcomp[i].optype, flash_op, num_bytes);
2086 dev_err(&adapter->pdev->dev,
2087 "cmd to write to flash rom failed.\n");
2096 static int get_ufigen_type(struct flash_file_hdr_g2 *fhdr)
2100 if (fhdr->build[0] == '3')
2102 else if (fhdr->build[0] == '2')
2108 int be_load_fw(struct be_adapter *adapter, u8 *func)
2110 char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
2111 const struct firmware *fw;
2112 struct flash_file_hdr_g2 *fhdr;
2113 struct flash_file_hdr_g3 *fhdr3;
2114 struct image_hdr *img_hdr_ptr = NULL;
2115 struct be_dma_mem flash_cmd;
2116 int status, i = 0, num_imgs = 0;
2119 strcpy(fw_file, func);
2121 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
2126 fhdr = (struct flash_file_hdr_g2 *) p;
2127 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
2129 flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
2130 flash_cmd.va = pci_alloc_consistent(adapter->pdev, flash_cmd.size,
2132 if (!flash_cmd.va) {
2134 dev_err(&adapter->pdev->dev,
2135 "Memory allocation failure while flashing\n");
2139 if ((adapter->generation == BE_GEN3) &&
2140 (get_ufigen_type(fhdr) == BE_GEN3)) {
2141 fhdr3 = (struct flash_file_hdr_g3 *) fw->data;
2142 num_imgs = le32_to_cpu(fhdr3->num_imgs);
2143 for (i = 0; i < num_imgs; i++) {
2144 img_hdr_ptr = (struct image_hdr *) (fw->data +
2145 (sizeof(struct flash_file_hdr_g3) +
2146 i * sizeof(struct image_hdr)));
2147 if (le32_to_cpu(img_hdr_ptr->imageid) == 1)
2148 status = be_flash_data(adapter, fw, &flash_cmd,
2151 } else if ((adapter->generation == BE_GEN2) &&
2152 (get_ufigen_type(fhdr) == BE_GEN2)) {
2153 status = be_flash_data(adapter, fw, &flash_cmd, 0);
2155 dev_err(&adapter->pdev->dev,
2156 "UFI and Interface are not compatible for flashing\n");
2160 pci_free_consistent(adapter->pdev, flash_cmd.size, flash_cmd.va,
2163 dev_err(&adapter->pdev->dev, "Firmware load error\n");
2167 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
2170 release_firmware(fw);
2174 static struct net_device_ops be_netdev_ops = {
2175 .ndo_open = be_open,
2176 .ndo_stop = be_close,
2177 .ndo_start_xmit = be_xmit,
2178 .ndo_get_stats = be_get_stats,
2179 .ndo_set_rx_mode = be_set_multicast_list,
2180 .ndo_set_mac_address = be_mac_addr_set,
2181 .ndo_change_mtu = be_change_mtu,
2182 .ndo_validate_addr = eth_validate_addr,
2183 .ndo_vlan_rx_register = be_vlan_register,
2184 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
2185 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
2186 .ndo_set_vf_mac = be_set_vf_mac
2189 static void be_netdev_init(struct net_device *netdev)
2191 struct be_adapter *adapter = netdev_priv(netdev);
2193 netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
2194 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_HW_CSUM |
2197 netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM;
2199 netdev->flags |= IFF_MULTICAST;
2201 adapter->rx_csum = true;
2203 /* Default settings for Rx and Tx flow control */
2204 adapter->rx_fc = true;
2205 adapter->tx_fc = true;
2207 netif_set_gso_max_size(netdev, 65535);
2209 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
2211 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
2213 netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
2215 netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
2218 netif_carrier_off(netdev);
2219 netif_stop_queue(netdev);
2222 static void be_unmap_pci_bars(struct be_adapter *adapter)
2225 iounmap(adapter->csr);
2227 iounmap(adapter->db);
2228 if (adapter->pcicfg && be_physfn(adapter))
2229 iounmap(adapter->pcicfg);
2232 static int be_map_pci_bars(struct be_adapter *adapter)
2235 int pcicfg_reg, db_reg;
2237 if (be_physfn(adapter)) {
2238 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
2239 pci_resource_len(adapter->pdev, 2));
2242 adapter->csr = addr;
2245 if (adapter->generation == BE_GEN2) {
2250 if (be_physfn(adapter))
2255 addr = ioremap_nocache(pci_resource_start(adapter->pdev, db_reg),
2256 pci_resource_len(adapter->pdev, db_reg));
2261 if (be_physfn(adapter)) {
2262 addr = ioremap_nocache(
2263 pci_resource_start(adapter->pdev, pcicfg_reg),
2264 pci_resource_len(adapter->pdev, pcicfg_reg));
2267 adapter->pcicfg = addr;
2269 adapter->pcicfg = adapter->db + SRIOV_VF_PCICFG_OFFSET;
2273 be_unmap_pci_bars(adapter);
2278 static void be_ctrl_cleanup(struct be_adapter *adapter)
2280 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
2282 be_unmap_pci_bars(adapter);
2285 pci_free_consistent(adapter->pdev, mem->size,
2288 mem = &adapter->mc_cmd_mem;
2290 pci_free_consistent(adapter->pdev, mem->size,
2294 static int be_ctrl_init(struct be_adapter *adapter)
2296 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
2297 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
2298 struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
2301 status = be_map_pci_bars(adapter);
2305 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
2306 mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
2307 mbox_mem_alloc->size, &mbox_mem_alloc->dma);
2308 if (!mbox_mem_alloc->va) {
2310 goto unmap_pci_bars;
2313 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
2314 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
2315 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
2316 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
2318 mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
2319 mc_cmd_mem->va = pci_alloc_consistent(adapter->pdev, mc_cmd_mem->size,
2321 if (mc_cmd_mem->va == NULL) {
2325 memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
2327 spin_lock_init(&adapter->mbox_lock);
2328 spin_lock_init(&adapter->mcc_lock);
2329 spin_lock_init(&adapter->mcc_cq_lock);
2331 pci_save_state(adapter->pdev);
2335 pci_free_consistent(adapter->pdev, mbox_mem_alloc->size,
2336 mbox_mem_alloc->va, mbox_mem_alloc->dma);
2339 be_unmap_pci_bars(adapter);
2345 static void be_stats_cleanup(struct be_adapter *adapter)
2347 struct be_stats_obj *stats = &adapter->stats;
2348 struct be_dma_mem *cmd = &stats->cmd;
2351 pci_free_consistent(adapter->pdev, cmd->size,
2355 static int be_stats_init(struct be_adapter *adapter)
2357 struct be_stats_obj *stats = &adapter->stats;
2358 struct be_dma_mem *cmd = &stats->cmd;
2360 cmd->size = sizeof(struct be_cmd_req_get_stats);
2361 cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
2362 if (cmd->va == NULL)
2364 memset(cmd->va, 0, cmd->size);
2368 static void __devexit be_remove(struct pci_dev *pdev)
2370 struct be_adapter *adapter = pci_get_drvdata(pdev);
2375 unregister_netdev(adapter->netdev);
2379 be_stats_cleanup(adapter);
2381 be_ctrl_cleanup(adapter);
2383 be_sriov_disable(adapter);
2385 be_msix_disable(adapter);
2387 pci_set_drvdata(pdev, NULL);
2388 pci_release_regions(pdev);
2389 pci_disable_device(pdev);
2391 free_netdev(adapter->netdev);
2394 static int be_get_config(struct be_adapter *adapter)
2399 status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
2403 status = be_cmd_query_fw_cfg(adapter,
2404 &adapter->port_num, &adapter->cap);
2408 memset(mac, 0, ETH_ALEN);
2410 if (be_physfn(adapter)) {
2411 status = be_cmd_mac_addr_query(adapter, mac,
2412 MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
2417 if (!is_valid_ether_addr(mac))
2418 return -EADDRNOTAVAIL;
2420 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
2421 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
2424 if (adapter->cap & 0x400)
2425 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED/4;
2427 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED;
2432 static int __devinit be_probe(struct pci_dev *pdev,
2433 const struct pci_device_id *pdev_id)
2436 struct be_adapter *adapter;
2437 struct net_device *netdev;
2440 status = pci_enable_device(pdev);
2444 status = pci_request_regions(pdev, DRV_NAME);
2447 pci_set_master(pdev);
2449 netdev = alloc_etherdev(sizeof(struct be_adapter));
2450 if (netdev == NULL) {
2454 adapter = netdev_priv(netdev);
2456 switch (pdev->device) {
2459 adapter->generation = BE_GEN2;
2463 adapter->generation = BE_GEN3;
2466 adapter->generation = 0;
2469 adapter->pdev = pdev;
2470 pci_set_drvdata(pdev, adapter);
2471 adapter->netdev = netdev;
2472 be_netdev_init(netdev);
2473 SET_NETDEV_DEV(netdev, &pdev->dev);
2475 be_msix_enable(adapter);
2477 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
2479 netdev->features |= NETIF_F_HIGHDMA;
2481 status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
2483 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
2488 be_sriov_enable(adapter);
2490 status = be_ctrl_init(adapter);
2494 /* sync up with fw's ready state */
2495 if (be_physfn(adapter)) {
2496 status = be_cmd_POST(adapter);
2500 status = be_cmd_reset_function(adapter);
2505 /* tell fw we're ready to fire cmds */
2506 status = be_cmd_fw_init(adapter);
2510 status = be_stats_init(adapter);
2514 status = be_get_config(adapter);
2518 INIT_DELAYED_WORK(&adapter->work, be_worker);
2520 status = be_setup(adapter);
2524 status = register_netdev(netdev);
2528 dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
2534 be_stats_cleanup(adapter);
2536 be_ctrl_cleanup(adapter);
2538 be_msix_disable(adapter);
2539 be_sriov_disable(adapter);
2540 free_netdev(adapter->netdev);
2541 pci_set_drvdata(pdev, NULL);
2543 pci_release_regions(pdev);
2545 pci_disable_device(pdev);
2547 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
2551 static int be_suspend(struct pci_dev *pdev, pm_message_t state)
2553 struct be_adapter *adapter = pci_get_drvdata(pdev);
2554 struct net_device *netdev = adapter->netdev;
2557 be_setup_wol(adapter, true);
2559 netif_device_detach(netdev);
2560 if (netif_running(netdev)) {
2565 be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
2568 pci_save_state(pdev);
2569 pci_disable_device(pdev);
2570 pci_set_power_state(pdev, pci_choose_state(pdev, state));
2574 static int be_resume(struct pci_dev *pdev)
2577 struct be_adapter *adapter = pci_get_drvdata(pdev);
2578 struct net_device *netdev = adapter->netdev;
2580 netif_device_detach(netdev);
2582 status = pci_enable_device(pdev);
2586 pci_set_power_state(pdev, 0);
2587 pci_restore_state(pdev);
2589 /* tell fw we're ready to fire cmds */
2590 status = be_cmd_fw_init(adapter);
2595 if (netif_running(netdev)) {
2600 netif_device_attach(netdev);
2603 be_setup_wol(adapter, false);
2608 * An FLR will stop BE from DMAing any data.
2610 static void be_shutdown(struct pci_dev *pdev)
2612 struct be_adapter *adapter = pci_get_drvdata(pdev);
2613 struct net_device *netdev = adapter->netdev;
2615 netif_device_detach(netdev);
2617 be_cmd_reset_function(adapter);
2620 be_setup_wol(adapter, true);
2622 pci_disable_device(pdev);
2627 static pci_ers_result_t be_eeh_err_detected(struct pci_dev *pdev,
2628 pci_channel_state_t state)
2630 struct be_adapter *adapter = pci_get_drvdata(pdev);
2631 struct net_device *netdev = adapter->netdev;
2633 dev_err(&adapter->pdev->dev, "EEH error detected\n");
2635 adapter->eeh_err = true;
2637 netif_device_detach(netdev);
2639 if (netif_running(netdev)) {
2646 if (state == pci_channel_io_perm_failure)
2647 return PCI_ERS_RESULT_DISCONNECT;
2649 pci_disable_device(pdev);
2651 return PCI_ERS_RESULT_NEED_RESET;
2654 static pci_ers_result_t be_eeh_reset(struct pci_dev *pdev)
2656 struct be_adapter *adapter = pci_get_drvdata(pdev);
2659 dev_info(&adapter->pdev->dev, "EEH reset\n");
2660 adapter->eeh_err = false;
2662 status = pci_enable_device(pdev);
2664 return PCI_ERS_RESULT_DISCONNECT;
2666 pci_set_master(pdev);
2667 pci_set_power_state(pdev, 0);
2668 pci_restore_state(pdev);
2670 /* Check if card is ok and fw is ready */
2671 status = be_cmd_POST(adapter);
2673 return PCI_ERS_RESULT_DISCONNECT;
2675 return PCI_ERS_RESULT_RECOVERED;
2678 static void be_eeh_resume(struct pci_dev *pdev)
2681 struct be_adapter *adapter = pci_get_drvdata(pdev);
2682 struct net_device *netdev = adapter->netdev;
2684 dev_info(&adapter->pdev->dev, "EEH resume\n");
2686 pci_save_state(pdev);
2688 /* tell fw we're ready to fire cmds */
2689 status = be_cmd_fw_init(adapter);
2693 status = be_setup(adapter);
2697 if (netif_running(netdev)) {
2698 status = be_open(netdev);
2702 netif_device_attach(netdev);
2705 dev_err(&adapter->pdev->dev, "EEH resume failed\n");
2709 static struct pci_error_handlers be_eeh_handlers = {
2710 .error_detected = be_eeh_err_detected,
2711 .slot_reset = be_eeh_reset,
2712 .resume = be_eeh_resume,
2715 static struct pci_driver be_driver = {
2717 .id_table = be_dev_ids,
2719 .remove = be_remove,
2720 .suspend = be_suspend,
2721 .resume = be_resume,
2722 .shutdown = be_shutdown,
2723 .err_handler = &be_eeh_handlers
2726 static int __init be_init_module(void)
2728 if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
2729 rx_frag_size != 2048) {
2730 printk(KERN_WARNING DRV_NAME
2731 " : Module param rx_frag_size must be 2048/4096/8192."
2733 rx_frag_size = 2048;
2737 printk(KERN_WARNING DRV_NAME
2738 " : Module param num_vfs must not be greater than 32."
2743 return pci_register_driver(&be_driver);
2745 module_init(be_init_module);
2747 static void __exit be_exit_module(void)
2749 pci_unregister_driver(&be_driver);
2751 module_exit(be_exit_module);