2 * Copyright (C) 2005 - 2011 Emulex
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
10 * Contact Information:
11 * linux-drivers@emulex.com
15 * Costa Mesa, CA 92626
20 #include <asm/div64.h>
22 MODULE_VERSION(DRV_VER);
23 MODULE_DEVICE_TABLE(pci, be_dev_ids);
24 MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
25 MODULE_AUTHOR("ServerEngines Corporation");
26 MODULE_LICENSE("GPL");
28 static ushort rx_frag_size = 2048;
29 static unsigned int num_vfs;
30 module_param(rx_frag_size, ushort, S_IRUGO);
31 module_param(num_vfs, uint, S_IRUGO);
32 MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
33 MODULE_PARM_DESC(num_vfs, "Number of PCI VFs to initialize");
35 static bool multi_rxq = true;
36 module_param(multi_rxq, bool, S_IRUGO | S_IWUSR);
37 MODULE_PARM_DESC(multi_rxq, "Multi Rx Queue support. Enabled by default");
39 static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
40 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
41 { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID2) },
42 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
43 { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
44 { PCI_DEVICE(EMULEX_VENDOR_ID, OC_DEVICE_ID3)},
47 MODULE_DEVICE_TABLE(pci, be_dev_ids);
48 /* UE Status Low CSR */
49 static char *ue_status_low_desc[] = {
83 /* UE Status High CSR */
84 static char *ue_status_hi_desc[] = {
119 static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
121 struct be_dma_mem *mem = &q->dma_mem;
123 dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va,
127 static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
128 u16 len, u16 entry_size)
130 struct be_dma_mem *mem = &q->dma_mem;
132 memset(q, 0, sizeof(*q));
134 q->entry_size = entry_size;
135 mem->size = len * entry_size;
136 mem->va = dma_alloc_coherent(&adapter->pdev->dev, mem->size, &mem->dma,
140 memset(mem->va, 0, mem->size);
144 static void be_intr_set(struct be_adapter *adapter, bool enable)
146 u8 __iomem *addr = adapter->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
147 u32 reg = ioread32(addr);
148 u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
150 if (adapter->eeh_err)
153 if (!enabled && enable)
154 reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
155 else if (enabled && !enable)
156 reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
160 iowrite32(reg, addr);
163 static void be_rxq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
166 val |= qid & DB_RQ_RING_ID_MASK;
167 val |= posted << DB_RQ_NUM_POSTED_SHIFT;
170 iowrite32(val, adapter->db + DB_RQ_OFFSET);
173 static void be_txq_notify(struct be_adapter *adapter, u16 qid, u16 posted)
176 val |= qid & DB_TXULP_RING_ID_MASK;
177 val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
180 iowrite32(val, adapter->db + DB_TXULP1_OFFSET);
183 static void be_eq_notify(struct be_adapter *adapter, u16 qid,
184 bool arm, bool clear_int, u16 num_popped)
187 val |= qid & DB_EQ_RING_ID_MASK;
188 val |= ((qid & DB_EQ_RING_ID_EXT_MASK) <<
189 DB_EQ_RING_ID_EXT_MASK_SHIFT);
191 if (adapter->eeh_err)
195 val |= 1 << DB_EQ_REARM_SHIFT;
197 val |= 1 << DB_EQ_CLR_SHIFT;
198 val |= 1 << DB_EQ_EVNT_SHIFT;
199 val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
200 iowrite32(val, adapter->db + DB_EQ_OFFSET);
203 void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm, u16 num_popped)
206 val |= qid & DB_CQ_RING_ID_MASK;
207 val |= ((qid & DB_CQ_RING_ID_EXT_MASK) <<
208 DB_CQ_RING_ID_EXT_MASK_SHIFT);
210 if (adapter->eeh_err)
214 val |= 1 << DB_CQ_REARM_SHIFT;
215 val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
216 iowrite32(val, adapter->db + DB_CQ_OFFSET);
219 static int be_mac_addr_set(struct net_device *netdev, void *p)
221 struct be_adapter *adapter = netdev_priv(netdev);
222 struct sockaddr *addr = p;
225 if (!is_valid_ether_addr(addr->sa_data))
226 return -EADDRNOTAVAIL;
228 /* MAC addr configuration will be done in hardware for VFs
229 * by their corresponding PFs. Just copy to netdev addr here
231 if (!be_physfn(adapter))
234 status = be_cmd_pmac_del(adapter, adapter->if_handle,
235 adapter->pmac_id, 0);
239 status = be_cmd_pmac_add(adapter, (u8 *)addr->sa_data,
240 adapter->if_handle, &adapter->pmac_id, 0);
243 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
248 static void populate_be2_stats(struct be_adapter *adapter)
251 struct be_drv_stats *drvs = &adapter->drv_stats;
252 struct be_pmem_stats *pmem_sts = be_pmem_stats_from_cmd(adapter);
253 struct be_port_rxf_stats_v0 *port_stats =
254 be_port_rxf_stats_from_cmd(adapter);
255 struct be_rxf_stats_v0 *rxf_stats =
256 be_rxf_stats_from_cmd(adapter);
258 drvs->rx_pause_frames = port_stats->rx_pause_frames;
259 drvs->rx_crc_errors = port_stats->rx_crc_errors;
260 drvs->rx_control_frames = port_stats->rx_control_frames;
261 drvs->rx_in_range_errors = port_stats->rx_in_range_errors;
262 drvs->rx_frame_too_long = port_stats->rx_frame_too_long;
263 drvs->rx_dropped_runt = port_stats->rx_dropped_runt;
264 drvs->rx_ip_checksum_errs = port_stats->rx_ip_checksum_errs;
265 drvs->rx_tcp_checksum_errs = port_stats->rx_tcp_checksum_errs;
266 drvs->rx_udp_checksum_errs = port_stats->rx_udp_checksum_errs;
267 drvs->rxpp_fifo_overflow_drop = port_stats->rx_fifo_overflow;
268 drvs->rx_dropped_tcp_length = port_stats->rx_dropped_tcp_length;
269 drvs->rx_dropped_too_small = port_stats->rx_dropped_too_small;
270 drvs->rx_dropped_too_short = port_stats->rx_dropped_too_short;
271 drvs->rx_out_range_errors = port_stats->rx_out_range_errors;
272 drvs->rx_input_fifo_overflow_drop =
273 port_stats->rx_input_fifo_overflow;
274 drvs->rx_dropped_header_too_small =
275 port_stats->rx_dropped_header_too_small;
276 drvs->rx_address_match_errors =
277 port_stats->rx_address_match_errors;
278 drvs->rx_alignment_symbol_errors =
279 port_stats->rx_alignment_symbol_errors;
281 drvs->tx_pauseframes = port_stats->tx_pauseframes;
282 drvs->tx_controlframes = port_stats->tx_controlframes;
284 if (adapter->port_num)
285 drvs->jabber_events =
286 rxf_stats->port1_jabber_events;
288 drvs->jabber_events =
289 rxf_stats->port0_jabber_events;
290 drvs->rx_drops_no_pbuf = rxf_stats->rx_drops_no_pbuf;
291 drvs->rx_drops_no_txpb = rxf_stats->rx_drops_no_txpb;
292 drvs->rx_drops_no_erx_descr = rxf_stats->rx_drops_no_erx_descr;
293 drvs->rx_drops_invalid_ring = rxf_stats->rx_drops_invalid_ring;
294 drvs->forwarded_packets = rxf_stats->forwarded_packets;
295 drvs->rx_drops_mtu = rxf_stats->rx_drops_mtu;
296 drvs->rx_drops_no_tpre_descr =
297 rxf_stats->rx_drops_no_tpre_descr;
298 drvs->rx_drops_too_many_frags =
299 rxf_stats->rx_drops_too_many_frags;
300 adapter->drv_stats.eth_red_drops = pmem_sts->eth_red_drops;
303 static void populate_be3_stats(struct be_adapter *adapter)
305 struct be_drv_stats *drvs = &adapter->drv_stats;
306 struct be_pmem_stats *pmem_sts = be_pmem_stats_from_cmd(adapter);
308 struct be_rxf_stats_v1 *rxf_stats =
309 be_rxf_stats_from_cmd(adapter);
310 struct be_port_rxf_stats_v1 *port_stats =
311 be_port_rxf_stats_from_cmd(adapter);
313 drvs->rx_priority_pause_frames = 0;
314 drvs->pmem_fifo_overflow_drop = 0;
315 drvs->rx_pause_frames = port_stats->rx_pause_frames;
316 drvs->rx_crc_errors = port_stats->rx_crc_errors;
317 drvs->rx_control_frames = port_stats->rx_control_frames;
318 drvs->rx_in_range_errors = port_stats->rx_in_range_errors;
319 drvs->rx_frame_too_long = port_stats->rx_frame_too_long;
320 drvs->rx_dropped_runt = port_stats->rx_dropped_runt;
321 drvs->rx_ip_checksum_errs = port_stats->rx_ip_checksum_errs;
322 drvs->rx_tcp_checksum_errs = port_stats->rx_tcp_checksum_errs;
323 drvs->rx_udp_checksum_errs = port_stats->rx_udp_checksum_errs;
324 drvs->rx_dropped_tcp_length = port_stats->rx_dropped_tcp_length;
325 drvs->rx_dropped_too_small = port_stats->rx_dropped_too_small;
326 drvs->rx_dropped_too_short = port_stats->rx_dropped_too_short;
327 drvs->rx_out_range_errors = port_stats->rx_out_range_errors;
328 drvs->rx_dropped_header_too_small =
329 port_stats->rx_dropped_header_too_small;
330 drvs->rx_input_fifo_overflow_drop =
331 port_stats->rx_input_fifo_overflow_drop;
332 drvs->rx_address_match_errors =
333 port_stats->rx_address_match_errors;
334 drvs->rx_alignment_symbol_errors =
335 port_stats->rx_alignment_symbol_errors;
336 drvs->rxpp_fifo_overflow_drop =
337 port_stats->rxpp_fifo_overflow_drop;
338 drvs->tx_pauseframes = port_stats->tx_pauseframes;
339 drvs->tx_controlframes = port_stats->tx_controlframes;
340 drvs->jabber_events = port_stats->jabber_events;
341 drvs->rx_drops_no_pbuf = rxf_stats->rx_drops_no_pbuf;
342 drvs->rx_drops_no_txpb = rxf_stats->rx_drops_no_txpb;
343 drvs->rx_drops_no_erx_descr = rxf_stats->rx_drops_no_erx_descr;
344 drvs->rx_drops_invalid_ring = rxf_stats->rx_drops_invalid_ring;
345 drvs->forwarded_packets = rxf_stats->forwarded_packets;
346 drvs->rx_drops_mtu = rxf_stats->rx_drops_mtu;
347 drvs->rx_drops_no_tpre_descr =
348 rxf_stats->rx_drops_no_tpre_descr;
349 drvs->rx_drops_too_many_frags =
350 rxf_stats->rx_drops_too_many_frags;
351 adapter->drv_stats.eth_red_drops = pmem_sts->eth_red_drops;
354 static void populate_lancer_stats(struct be_adapter *adapter)
357 struct be_drv_stats *drvs = &adapter->drv_stats;
358 struct lancer_cmd_pport_stats *pport_stats = pport_stats_from_cmd
360 drvs->rx_priority_pause_frames = 0;
361 drvs->pmem_fifo_overflow_drop = 0;
362 drvs->rx_pause_frames =
363 make_64bit_val(pport_stats->rx_pause_frames_lo,
364 pport_stats->rx_pause_frames_hi);
365 drvs->rx_crc_errors = make_64bit_val(pport_stats->rx_crc_errors_hi,
366 pport_stats->rx_crc_errors_lo);
367 drvs->rx_control_frames =
368 make_64bit_val(pport_stats->rx_control_frames_hi,
369 pport_stats->rx_control_frames_lo);
370 drvs->rx_in_range_errors = pport_stats->rx_in_range_errors;
371 drvs->rx_frame_too_long =
372 make_64bit_val(pport_stats->rx_internal_mac_errors_hi,
373 pport_stats->rx_frames_too_long_lo);
374 drvs->rx_dropped_runt = pport_stats->rx_dropped_runt;
375 drvs->rx_ip_checksum_errs = pport_stats->rx_ip_checksum_errors;
376 drvs->rx_tcp_checksum_errs = pport_stats->rx_tcp_checksum_errors;
377 drvs->rx_udp_checksum_errs = pport_stats->rx_udp_checksum_errors;
378 drvs->rx_dropped_tcp_length =
379 pport_stats->rx_dropped_invalid_tcp_length;
380 drvs->rx_dropped_too_small = pport_stats->rx_dropped_too_small;
381 drvs->rx_dropped_too_short = pport_stats->rx_dropped_too_short;
382 drvs->rx_out_range_errors = pport_stats->rx_out_of_range_errors;
383 drvs->rx_dropped_header_too_small =
384 pport_stats->rx_dropped_header_too_small;
385 drvs->rx_input_fifo_overflow_drop = pport_stats->rx_fifo_overflow;
386 drvs->rx_address_match_errors = pport_stats->rx_address_match_errors;
387 drvs->rx_alignment_symbol_errors =
388 make_64bit_val(pport_stats->rx_symbol_errors_hi,
389 pport_stats->rx_symbol_errors_lo);
390 drvs->rxpp_fifo_overflow_drop = pport_stats->rx_fifo_overflow;
391 drvs->tx_pauseframes = make_64bit_val(pport_stats->tx_pause_frames_hi,
392 pport_stats->tx_pause_frames_lo);
393 drvs->tx_controlframes =
394 make_64bit_val(pport_stats->tx_control_frames_hi,
395 pport_stats->tx_control_frames_lo);
396 drvs->jabber_events = pport_stats->rx_jabbers;
397 drvs->rx_drops_no_pbuf = 0;
398 drvs->rx_drops_no_txpb = 0;
399 drvs->rx_drops_no_erx_descr = 0;
400 drvs->rx_drops_invalid_ring = pport_stats->rx_drops_invalid_queue;
401 drvs->forwarded_packets = make_64bit_val(pport_stats->num_forwards_hi,
402 pport_stats->num_forwards_lo);
403 drvs->rx_drops_mtu = make_64bit_val(pport_stats->rx_drops_mtu_hi,
404 pport_stats->rx_drops_mtu_lo);
405 drvs->rx_drops_no_tpre_descr = 0;
406 drvs->rx_drops_too_many_frags =
407 make_64bit_val(pport_stats->rx_drops_too_many_frags_hi,
408 pport_stats->rx_drops_too_many_frags_lo);
411 void be_parse_stats(struct be_adapter *adapter)
413 if (adapter->generation == BE_GEN3) {
414 if (lancer_chip(adapter))
415 populate_lancer_stats(adapter);
417 populate_be3_stats(adapter);
419 populate_be2_stats(adapter);
423 void netdev_stats_update(struct be_adapter *adapter)
425 struct be_drv_stats *drvs = &adapter->drv_stats;
426 struct net_device_stats *dev_stats = &adapter->netdev->stats;
427 struct be_rx_obj *rxo;
430 memset(dev_stats, 0, sizeof(*dev_stats));
431 for_all_rx_queues(adapter, rxo, i) {
432 dev_stats->rx_packets += rx_stats(rxo)->rx_pkts;
433 dev_stats->rx_bytes += rx_stats(rxo)->rx_bytes;
434 dev_stats->multicast += rx_stats(rxo)->rx_mcast_pkts;
435 /* no space in linux buffers: best possible approximation */
436 if (adapter->generation == BE_GEN3) {
437 if (!(lancer_chip(adapter))) {
438 struct be_erx_stats_v1 *erx_stats =
439 be_erx_stats_from_cmd(adapter);
440 dev_stats->rx_dropped +=
441 erx_stats->rx_drops_no_fragments[rxo->q.id];
444 struct be_erx_stats_v0 *erx_stats =
445 be_erx_stats_from_cmd(adapter);
446 dev_stats->rx_dropped +=
447 erx_stats->rx_drops_no_fragments[rxo->q.id];
451 dev_stats->tx_packets = tx_stats(adapter)->be_tx_pkts;
452 dev_stats->tx_bytes = tx_stats(adapter)->be_tx_bytes;
454 /* bad pkts received */
455 dev_stats->rx_errors = drvs->rx_crc_errors +
456 drvs->rx_alignment_symbol_errors +
457 drvs->rx_in_range_errors +
458 drvs->rx_out_range_errors +
459 drvs->rx_frame_too_long +
460 drvs->rx_dropped_too_small +
461 drvs->rx_dropped_too_short +
462 drvs->rx_dropped_header_too_small +
463 drvs->rx_dropped_tcp_length +
464 drvs->rx_dropped_runt +
465 drvs->rx_tcp_checksum_errs +
466 drvs->rx_ip_checksum_errs +
467 drvs->rx_udp_checksum_errs;
469 /* detailed rx errors */
470 dev_stats->rx_length_errors = drvs->rx_in_range_errors +
471 drvs->rx_out_range_errors +
472 drvs->rx_frame_too_long;
474 dev_stats->rx_crc_errors = drvs->rx_crc_errors;
476 /* frame alignment errors */
477 dev_stats->rx_frame_errors = drvs->rx_alignment_symbol_errors;
479 /* receiver fifo overrun */
480 /* drops_no_pbuf is no per i/f, it's per BE card */
481 dev_stats->rx_fifo_errors = drvs->rxpp_fifo_overflow_drop +
482 drvs->rx_input_fifo_overflow_drop +
483 drvs->rx_drops_no_pbuf;
486 void be_link_status_update(struct be_adapter *adapter, bool link_up)
488 struct net_device *netdev = adapter->netdev;
490 /* If link came up or went down */
491 if (adapter->link_up != link_up) {
492 adapter->link_speed = -1;
494 netif_carrier_on(netdev);
495 printk(KERN_INFO "%s: Link up\n", netdev->name);
497 netif_carrier_off(netdev);
498 printk(KERN_INFO "%s: Link down\n", netdev->name);
500 adapter->link_up = link_up;
504 /* Update the EQ delay n BE based on the RX frags consumed / sec */
505 static void be_rx_eqd_update(struct be_adapter *adapter, struct be_rx_obj *rxo)
507 struct be_eq_obj *rx_eq = &rxo->rx_eq;
508 struct be_rx_stats *stats = &rxo->stats;
512 if (!rx_eq->enable_aic)
516 if (time_before(now, stats->rx_fps_jiffies)) {
517 stats->rx_fps_jiffies = now;
521 /* Update once a second */
522 if ((now - stats->rx_fps_jiffies) < HZ)
525 stats->rx_fps = (stats->rx_frags - stats->prev_rx_frags) /
526 ((now - stats->rx_fps_jiffies) / HZ);
528 stats->rx_fps_jiffies = now;
529 stats->prev_rx_frags = stats->rx_frags;
530 eqd = stats->rx_fps / 110000;
532 if (eqd > rx_eq->max_eqd)
533 eqd = rx_eq->max_eqd;
534 if (eqd < rx_eq->min_eqd)
535 eqd = rx_eq->min_eqd;
538 if (eqd != rx_eq->cur_eqd)
539 be_cmd_modify_eqd(adapter, rx_eq->q.id, eqd);
541 rx_eq->cur_eqd = eqd;
544 static u32 be_calc_rate(u64 bytes, unsigned long ticks)
548 do_div(rate, ticks / HZ);
549 rate <<= 3; /* bytes/sec -> bits/sec */
550 do_div(rate, 1000000ul); /* MB/Sec */
555 static void be_tx_rate_update(struct be_adapter *adapter)
557 struct be_tx_stats *stats = tx_stats(adapter);
560 /* Wrapped around? */
561 if (time_before(now, stats->be_tx_jiffies)) {
562 stats->be_tx_jiffies = now;
566 /* Update tx rate once in two seconds */
567 if ((now - stats->be_tx_jiffies) > 2 * HZ) {
568 stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
569 - stats->be_tx_bytes_prev,
570 now - stats->be_tx_jiffies);
571 stats->be_tx_jiffies = now;
572 stats->be_tx_bytes_prev = stats->be_tx_bytes;
576 static void be_tx_stats_update(struct be_adapter *adapter,
577 u32 wrb_cnt, u32 copied, u32 gso_segs, bool stopped)
579 struct be_tx_stats *stats = tx_stats(adapter);
581 stats->be_tx_wrbs += wrb_cnt;
582 stats->be_tx_bytes += copied;
583 stats->be_tx_pkts += (gso_segs ? gso_segs : 1);
585 stats->be_tx_stops++;
588 /* Determine number of WRB entries needed to xmit data in an skb */
589 static u32 wrb_cnt_for_skb(struct be_adapter *adapter, struct sk_buff *skb,
592 int cnt = (skb->len > skb->data_len);
594 cnt += skb_shinfo(skb)->nr_frags;
596 /* to account for hdr wrb */
598 if (lancer_chip(adapter) || !(cnt & 1)) {
601 /* add a dummy to make it an even num */
605 BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
609 static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
611 wrb->frag_pa_hi = upper_32_bits(addr);
612 wrb->frag_pa_lo = addr & 0xFFFFFFFF;
613 wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
616 static void wrb_fill_hdr(struct be_adapter *adapter, struct be_eth_hdr_wrb *hdr,
617 struct sk_buff *skb, u32 wrb_cnt, u32 len)
622 memset(hdr, 0, sizeof(*hdr));
624 AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
626 if (skb_is_gso(skb)) {
627 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
628 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
629 hdr, skb_shinfo(skb)->gso_size);
630 if (skb_is_gso_v6(skb) && !lancer_chip(adapter))
631 AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso6, hdr, 1);
632 if (lancer_chip(adapter) && adapter->sli_family ==
633 LANCER_A0_SLI_FAMILY) {
634 AMAP_SET_BITS(struct amap_eth_hdr_wrb, ipcs, hdr, 1);
636 AMAP_SET_BITS(struct amap_eth_hdr_wrb,
638 else if (is_udp_pkt(skb))
639 AMAP_SET_BITS(struct amap_eth_hdr_wrb,
642 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
644 AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
645 else if (is_udp_pkt(skb))
646 AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
649 if (adapter->vlan_grp && vlan_tx_tag_present(skb)) {
650 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
651 vlan_tag = vlan_tx_tag_get(skb);
652 vlan_prio = (vlan_tag & VLAN_PRIO_MASK) >> VLAN_PRIO_SHIFT;
653 /* If vlan priority provided by OS is NOT in available bmap */
654 if (!(adapter->vlan_prio_bmap & (1 << vlan_prio)))
655 vlan_tag = (vlan_tag & ~VLAN_PRIO_MASK) |
656 adapter->recommended_prio;
657 AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag, hdr, vlan_tag);
660 AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
661 AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
662 AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
663 AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
666 static void unmap_tx_frag(struct device *dev, struct be_eth_wrb *wrb,
671 be_dws_le_to_cpu(wrb, sizeof(*wrb));
673 dma = (u64)wrb->frag_pa_hi << 32 | (u64)wrb->frag_pa_lo;
676 dma_unmap_single(dev, dma, wrb->frag_len,
679 dma_unmap_page(dev, dma, wrb->frag_len, DMA_TO_DEVICE);
683 static int make_tx_wrbs(struct be_adapter *adapter,
684 struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
688 struct device *dev = &adapter->pdev->dev;
689 struct sk_buff *first_skb = skb;
690 struct be_queue_info *txq = &adapter->tx_obj.q;
691 struct be_eth_wrb *wrb;
692 struct be_eth_hdr_wrb *hdr;
693 bool map_single = false;
696 hdr = queue_head_node(txq);
698 map_head = txq->head;
700 if (skb->len > skb->data_len) {
701 int len = skb_headlen(skb);
702 busaddr = dma_map_single(dev, skb->data, len, DMA_TO_DEVICE);
703 if (dma_mapping_error(dev, busaddr))
706 wrb = queue_head_node(txq);
707 wrb_fill(wrb, busaddr, len);
708 be_dws_cpu_to_le(wrb, sizeof(*wrb));
713 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
714 struct skb_frag_struct *frag =
715 &skb_shinfo(skb)->frags[i];
716 busaddr = dma_map_page(dev, frag->page, frag->page_offset,
717 frag->size, DMA_TO_DEVICE);
718 if (dma_mapping_error(dev, busaddr))
720 wrb = queue_head_node(txq);
721 wrb_fill(wrb, busaddr, frag->size);
722 be_dws_cpu_to_le(wrb, sizeof(*wrb));
724 copied += frag->size;
728 wrb = queue_head_node(txq);
730 be_dws_cpu_to_le(wrb, sizeof(*wrb));
734 wrb_fill_hdr(adapter, hdr, first_skb, wrb_cnt, copied);
735 be_dws_cpu_to_le(hdr, sizeof(*hdr));
739 txq->head = map_head;
741 wrb = queue_head_node(txq);
742 unmap_tx_frag(dev, wrb, map_single);
744 copied -= wrb->frag_len;
750 static netdev_tx_t be_xmit(struct sk_buff *skb,
751 struct net_device *netdev)
753 struct be_adapter *adapter = netdev_priv(netdev);
754 struct be_tx_obj *tx_obj = &adapter->tx_obj;
755 struct be_queue_info *txq = &tx_obj->q;
756 u32 wrb_cnt = 0, copied = 0;
757 u32 start = txq->head;
758 bool dummy_wrb, stopped = false;
760 wrb_cnt = wrb_cnt_for_skb(adapter, skb, &dummy_wrb);
762 copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
764 /* record the sent skb in the sent_skb table */
765 BUG_ON(tx_obj->sent_skb_list[start]);
766 tx_obj->sent_skb_list[start] = skb;
768 /* Ensure txq has space for the next skb; Else stop the queue
769 * *BEFORE* ringing the tx doorbell, so that we serialze the
770 * tx compls of the current transmit which'll wake up the queue
772 atomic_add(wrb_cnt, &txq->used);
773 if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >=
775 netif_stop_queue(netdev);
779 be_txq_notify(adapter, txq->id, wrb_cnt);
781 be_tx_stats_update(adapter, wrb_cnt, copied,
782 skb_shinfo(skb)->gso_segs, stopped);
785 dev_kfree_skb_any(skb);
790 static int be_change_mtu(struct net_device *netdev, int new_mtu)
792 struct be_adapter *adapter = netdev_priv(netdev);
793 if (new_mtu < BE_MIN_MTU ||
794 new_mtu > (BE_MAX_JUMBO_FRAME_SIZE -
795 (ETH_HLEN + ETH_FCS_LEN))) {
796 dev_info(&adapter->pdev->dev,
797 "MTU must be between %d and %d bytes\n",
799 (BE_MAX_JUMBO_FRAME_SIZE - (ETH_HLEN + ETH_FCS_LEN)));
802 dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
803 netdev->mtu, new_mtu);
804 netdev->mtu = new_mtu;
809 * A max of 64 (BE_NUM_VLANS_SUPPORTED) vlans can be configured in BE.
810 * If the user configures more, place BE in vlan promiscuous mode.
812 static int be_vid_config(struct be_adapter *adapter, bool vf, u32 vf_num)
814 u16 vtag[BE_NUM_VLANS_SUPPORTED];
820 if_handle = adapter->vf_cfg[vf_num].vf_if_handle;
821 vtag[0] = cpu_to_le16(adapter->vf_cfg[vf_num].vf_vlan_tag);
822 status = be_cmd_vlan_config(adapter, if_handle, vtag, 1, 1, 0);
825 if (adapter->vlans_added <= adapter->max_vlans) {
826 /* Construct VLAN Table to give to HW */
827 for (i = 0; i < VLAN_N_VID; i++) {
828 if (adapter->vlan_tag[i]) {
829 vtag[ntags] = cpu_to_le16(i);
833 status = be_cmd_vlan_config(adapter, adapter->if_handle,
836 status = be_cmd_vlan_config(adapter, adapter->if_handle,
843 static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
845 struct be_adapter *adapter = netdev_priv(netdev);
847 adapter->vlan_grp = grp;
850 static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
852 struct be_adapter *adapter = netdev_priv(netdev);
854 adapter->vlans_added++;
855 if (!be_physfn(adapter))
858 adapter->vlan_tag[vid] = 1;
859 if (adapter->vlans_added <= (adapter->max_vlans + 1))
860 be_vid_config(adapter, false, 0);
863 static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
865 struct be_adapter *adapter = netdev_priv(netdev);
867 adapter->vlans_added--;
868 vlan_group_set_device(adapter->vlan_grp, vid, NULL);
870 if (!be_physfn(adapter))
873 adapter->vlan_tag[vid] = 0;
874 if (adapter->vlans_added <= adapter->max_vlans)
875 be_vid_config(adapter, false, 0);
878 static void be_set_multicast_list(struct net_device *netdev)
880 struct be_adapter *adapter = netdev_priv(netdev);
882 if (netdev->flags & IFF_PROMISC) {
883 be_cmd_promiscuous_config(adapter, true);
884 adapter->promiscuous = true;
888 /* BE was previously in promiscuous mode; disable it */
889 if (adapter->promiscuous) {
890 adapter->promiscuous = false;
891 be_cmd_promiscuous_config(adapter, false);
894 /* Enable multicast promisc if num configured exceeds what we support */
895 if (netdev->flags & IFF_ALLMULTI ||
896 netdev_mc_count(netdev) > BE_MAX_MC) {
897 be_cmd_multicast_set(adapter, adapter->if_handle, NULL,
898 &adapter->mc_cmd_mem);
902 be_cmd_multicast_set(adapter, adapter->if_handle, netdev,
903 &adapter->mc_cmd_mem);
908 static int be_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
910 struct be_adapter *adapter = netdev_priv(netdev);
913 if (!adapter->sriov_enabled)
916 if (!is_valid_ether_addr(mac) || (vf >= num_vfs))
919 if (adapter->vf_cfg[vf].vf_pmac_id != BE_INVALID_PMAC_ID)
920 status = be_cmd_pmac_del(adapter,
921 adapter->vf_cfg[vf].vf_if_handle,
922 adapter->vf_cfg[vf].vf_pmac_id, vf + 1);
924 status = be_cmd_pmac_add(adapter, mac,
925 adapter->vf_cfg[vf].vf_if_handle,
926 &adapter->vf_cfg[vf].vf_pmac_id, vf + 1);
929 dev_err(&adapter->pdev->dev, "MAC %pM set on VF %d Failed\n",
932 memcpy(adapter->vf_cfg[vf].vf_mac_addr, mac, ETH_ALEN);
937 static int be_get_vf_config(struct net_device *netdev, int vf,
938 struct ifla_vf_info *vi)
940 struct be_adapter *adapter = netdev_priv(netdev);
942 if (!adapter->sriov_enabled)
949 vi->tx_rate = adapter->vf_cfg[vf].vf_tx_rate;
950 vi->vlan = adapter->vf_cfg[vf].vf_vlan_tag;
952 memcpy(&vi->mac, adapter->vf_cfg[vf].vf_mac_addr, ETH_ALEN);
957 static int be_set_vf_vlan(struct net_device *netdev,
958 int vf, u16 vlan, u8 qos)
960 struct be_adapter *adapter = netdev_priv(netdev);
963 if (!adapter->sriov_enabled)
966 if ((vf >= num_vfs) || (vlan > 4095))
970 adapter->vf_cfg[vf].vf_vlan_tag = vlan;
971 adapter->vlans_added++;
973 adapter->vf_cfg[vf].vf_vlan_tag = 0;
974 adapter->vlans_added--;
977 status = be_vid_config(adapter, true, vf);
980 dev_info(&adapter->pdev->dev,
981 "VLAN %d config on VF %d failed\n", vlan, vf);
985 static int be_set_vf_tx_rate(struct net_device *netdev,
988 struct be_adapter *adapter = netdev_priv(netdev);
991 if (!adapter->sriov_enabled)
994 if ((vf >= num_vfs) || (rate < 0))
1000 adapter->vf_cfg[vf].vf_tx_rate = rate;
1001 status = be_cmd_set_qos(adapter, rate / 10, vf + 1);
1004 dev_info(&adapter->pdev->dev,
1005 "tx rate %d on VF %d failed\n", rate, vf);
1009 static void be_rx_rate_update(struct be_rx_obj *rxo)
1011 struct be_rx_stats *stats = &rxo->stats;
1012 ulong now = jiffies;
1014 /* Wrapped around */
1015 if (time_before(now, stats->rx_jiffies)) {
1016 stats->rx_jiffies = now;
1020 /* Update the rate once in two seconds */
1021 if ((now - stats->rx_jiffies) < 2 * HZ)
1024 stats->rx_rate = be_calc_rate(stats->rx_bytes - stats->rx_bytes_prev,
1025 now - stats->rx_jiffies);
1026 stats->rx_jiffies = now;
1027 stats->rx_bytes_prev = stats->rx_bytes;
1030 static void be_rx_stats_update(struct be_rx_obj *rxo,
1031 struct be_rx_compl_info *rxcp)
1033 struct be_rx_stats *stats = &rxo->stats;
1036 stats->rx_frags += rxcp->num_rcvd;
1037 stats->rx_bytes += rxcp->pkt_size;
1039 if (rxcp->pkt_type == BE_MULTICAST_PACKET)
1040 stats->rx_mcast_pkts++;
1045 static inline bool csum_passed(struct be_rx_compl_info *rxcp)
1047 /* L4 checksum is not reliable for non TCP/UDP packets.
1048 * Also ignore ipcksm for ipv6 pkts */
1049 return (rxcp->tcpf || rxcp->udpf) && rxcp->l4_csum &&
1050 (rxcp->ip_csum || rxcp->ipv6);
1053 static struct be_rx_page_info *
1054 get_rx_page_info(struct be_adapter *adapter,
1055 struct be_rx_obj *rxo,
1058 struct be_rx_page_info *rx_page_info;
1059 struct be_queue_info *rxq = &rxo->q;
1061 rx_page_info = &rxo->page_info_tbl[frag_idx];
1062 BUG_ON(!rx_page_info->page);
1064 if (rx_page_info->last_page_user) {
1065 dma_unmap_page(&adapter->pdev->dev,
1066 dma_unmap_addr(rx_page_info, bus),
1067 adapter->big_page_size, DMA_FROM_DEVICE);
1068 rx_page_info->last_page_user = false;
1071 atomic_dec(&rxq->used);
1072 return rx_page_info;
1075 /* Throwaway the data in the Rx completion */
1076 static void be_rx_compl_discard(struct be_adapter *adapter,
1077 struct be_rx_obj *rxo,
1078 struct be_rx_compl_info *rxcp)
1080 struct be_queue_info *rxq = &rxo->q;
1081 struct be_rx_page_info *page_info;
1082 u16 i, num_rcvd = rxcp->num_rcvd;
1084 for (i = 0; i < num_rcvd; i++) {
1085 page_info = get_rx_page_info(adapter, rxo, rxcp->rxq_idx);
1086 put_page(page_info->page);
1087 memset(page_info, 0, sizeof(*page_info));
1088 index_inc(&rxcp->rxq_idx, rxq->len);
1093 * skb_fill_rx_data forms a complete skb for an ether frame
1094 * indicated by rxcp.
1096 static void skb_fill_rx_data(struct be_adapter *adapter, struct be_rx_obj *rxo,
1097 struct sk_buff *skb, struct be_rx_compl_info *rxcp)
1099 struct be_queue_info *rxq = &rxo->q;
1100 struct be_rx_page_info *page_info;
1102 u16 hdr_len, curr_frag_len, remaining;
1105 page_info = get_rx_page_info(adapter, rxo, rxcp->rxq_idx);
1106 start = page_address(page_info->page) + page_info->page_offset;
1109 /* Copy data in the first descriptor of this completion */
1110 curr_frag_len = min(rxcp->pkt_size, rx_frag_size);
1112 /* Copy the header portion into skb_data */
1113 hdr_len = min(BE_HDR_LEN, curr_frag_len);
1114 memcpy(skb->data, start, hdr_len);
1115 skb->len = curr_frag_len;
1116 if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
1117 /* Complete packet has now been moved to data */
1118 put_page(page_info->page);
1120 skb->tail += curr_frag_len;
1122 skb_shinfo(skb)->nr_frags = 1;
1123 skb_shinfo(skb)->frags[0].page = page_info->page;
1124 skb_shinfo(skb)->frags[0].page_offset =
1125 page_info->page_offset + hdr_len;
1126 skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
1127 skb->data_len = curr_frag_len - hdr_len;
1128 skb->tail += hdr_len;
1130 page_info->page = NULL;
1132 if (rxcp->pkt_size <= rx_frag_size) {
1133 BUG_ON(rxcp->num_rcvd != 1);
1137 /* More frags present for this completion */
1138 index_inc(&rxcp->rxq_idx, rxq->len);
1139 remaining = rxcp->pkt_size - curr_frag_len;
1140 for (i = 1, j = 0; i < rxcp->num_rcvd; i++) {
1141 page_info = get_rx_page_info(adapter, rxo, rxcp->rxq_idx);
1142 curr_frag_len = min(remaining, rx_frag_size);
1144 /* Coalesce all frags from the same physical page in one slot */
1145 if (page_info->page_offset == 0) {
1148 skb_shinfo(skb)->frags[j].page = page_info->page;
1149 skb_shinfo(skb)->frags[j].page_offset =
1150 page_info->page_offset;
1151 skb_shinfo(skb)->frags[j].size = 0;
1152 skb_shinfo(skb)->nr_frags++;
1154 put_page(page_info->page);
1157 skb_shinfo(skb)->frags[j].size += curr_frag_len;
1158 skb->len += curr_frag_len;
1159 skb->data_len += curr_frag_len;
1161 remaining -= curr_frag_len;
1162 index_inc(&rxcp->rxq_idx, rxq->len);
1163 page_info->page = NULL;
1165 BUG_ON(j > MAX_SKB_FRAGS);
1168 /* Process the RX completion indicated by rxcp when GRO is disabled */
1169 static void be_rx_compl_process(struct be_adapter *adapter,
1170 struct be_rx_obj *rxo,
1171 struct be_rx_compl_info *rxcp)
1173 struct net_device *netdev = adapter->netdev;
1174 struct sk_buff *skb;
1176 skb = netdev_alloc_skb_ip_align(netdev, BE_HDR_LEN);
1177 if (unlikely(!skb)) {
1178 if (net_ratelimit())
1179 dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
1180 be_rx_compl_discard(adapter, rxo, rxcp);
1184 skb_fill_rx_data(adapter, rxo, skb, rxcp);
1186 if (likely((netdev->features & NETIF_F_RXCSUM) && csum_passed(rxcp)))
1187 skb->ip_summed = CHECKSUM_UNNECESSARY;
1189 skb_checksum_none_assert(skb);
1191 skb->truesize = skb->len + sizeof(struct sk_buff);
1192 skb->protocol = eth_type_trans(skb, netdev);
1193 if (adapter->netdev->features & NETIF_F_RXHASH)
1194 skb->rxhash = rxcp->rss_hash;
1197 if (unlikely(rxcp->vlanf)) {
1198 if (!adapter->vlan_grp || adapter->vlans_added == 0) {
1202 vlan_hwaccel_receive_skb(skb, adapter->vlan_grp,
1205 netif_receive_skb(skb);
1209 /* Process the RX completion indicated by rxcp when GRO is enabled */
1210 static void be_rx_compl_process_gro(struct be_adapter *adapter,
1211 struct be_rx_obj *rxo,
1212 struct be_rx_compl_info *rxcp)
1214 struct be_rx_page_info *page_info;
1215 struct sk_buff *skb = NULL;
1216 struct be_queue_info *rxq = &rxo->q;
1217 struct be_eq_obj *eq_obj = &rxo->rx_eq;
1218 u16 remaining, curr_frag_len;
1221 skb = napi_get_frags(&eq_obj->napi);
1223 be_rx_compl_discard(adapter, rxo, rxcp);
1227 remaining = rxcp->pkt_size;
1228 for (i = 0, j = -1; i < rxcp->num_rcvd; i++) {
1229 page_info = get_rx_page_info(adapter, rxo, rxcp->rxq_idx);
1231 curr_frag_len = min(remaining, rx_frag_size);
1233 /* Coalesce all frags from the same physical page in one slot */
1234 if (i == 0 || page_info->page_offset == 0) {
1235 /* First frag or Fresh page */
1237 skb_shinfo(skb)->frags[j].page = page_info->page;
1238 skb_shinfo(skb)->frags[j].page_offset =
1239 page_info->page_offset;
1240 skb_shinfo(skb)->frags[j].size = 0;
1242 put_page(page_info->page);
1244 skb_shinfo(skb)->frags[j].size += curr_frag_len;
1246 remaining -= curr_frag_len;
1247 index_inc(&rxcp->rxq_idx, rxq->len);
1248 memset(page_info, 0, sizeof(*page_info));
1250 BUG_ON(j > MAX_SKB_FRAGS);
1252 skb_shinfo(skb)->nr_frags = j + 1;
1253 skb->len = rxcp->pkt_size;
1254 skb->data_len = rxcp->pkt_size;
1255 skb->truesize += rxcp->pkt_size;
1256 skb->ip_summed = CHECKSUM_UNNECESSARY;
1257 if (adapter->netdev->features & NETIF_F_RXHASH)
1258 skb->rxhash = rxcp->rss_hash;
1260 if (likely(!rxcp->vlanf))
1261 napi_gro_frags(&eq_obj->napi);
1263 vlan_gro_frags(&eq_obj->napi, adapter->vlan_grp,
1267 static void be_parse_rx_compl_v1(struct be_adapter *adapter,
1268 struct be_eth_rx_compl *compl,
1269 struct be_rx_compl_info *rxcp)
1272 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, pktsize, compl);
1273 rxcp->vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, vtp, compl);
1274 rxcp->err = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, err, compl);
1275 rxcp->tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, tcpf, compl);
1276 rxcp->udpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, udpf, compl);
1278 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, ipcksm, compl);
1280 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, l4_cksm, compl);
1282 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, ip_version, compl);
1284 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, fragndx, compl);
1286 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, numfrags, compl);
1288 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, cast_enc, compl);
1290 AMAP_GET_BITS(struct amap_eth_rx_compl_v1, rsshash, rxcp);
1292 rxcp->vtm = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, vtm,
1294 rxcp->vlan_tag = AMAP_GET_BITS(struct amap_eth_rx_compl_v1, vlan_tag,
1299 static void be_parse_rx_compl_v0(struct be_adapter *adapter,
1300 struct be_eth_rx_compl *compl,
1301 struct be_rx_compl_info *rxcp)
1304 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, pktsize, compl);
1305 rxcp->vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, vtp, compl);
1306 rxcp->err = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, err, compl);
1307 rxcp->tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, tcpf, compl);
1308 rxcp->udpf = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, udpf, compl);
1310 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, ipcksm, compl);
1312 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, l4_cksm, compl);
1314 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, ip_version, compl);
1316 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, fragndx, compl);
1318 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, numfrags, compl);
1320 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, cast_enc, compl);
1322 AMAP_GET_BITS(struct amap_eth_rx_compl_v0, rsshash, rxcp);
1324 rxcp->vtm = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, vtm,
1326 rxcp->vlan_tag = AMAP_GET_BITS(struct amap_eth_rx_compl_v0, vlan_tag,
1331 static struct be_rx_compl_info *be_rx_compl_get(struct be_rx_obj *rxo)
1333 struct be_eth_rx_compl *compl = queue_tail_node(&rxo->cq);
1334 struct be_rx_compl_info *rxcp = &rxo->rxcp;
1335 struct be_adapter *adapter = rxo->adapter;
1337 /* For checking the valid bit it is Ok to use either definition as the
1338 * valid bit is at the same position in both v0 and v1 Rx compl */
1339 if (compl->dw[offsetof(struct amap_eth_rx_compl_v1, valid) / 32] == 0)
1343 be_dws_le_to_cpu(compl, sizeof(*compl));
1345 if (adapter->be3_native)
1346 be_parse_rx_compl_v1(adapter, compl, rxcp);
1348 be_parse_rx_compl_v0(adapter, compl, rxcp);
1351 /* vlanf could be wrongly set in some cards.
1352 * ignore if vtm is not set */
1353 if ((adapter->function_mode & 0x400) && !rxcp->vtm)
1356 if (!lancer_chip(adapter))
1357 rxcp->vlan_tag = swab16(rxcp->vlan_tag);
1359 if (((adapter->pvid & VLAN_VID_MASK) ==
1360 (rxcp->vlan_tag & VLAN_VID_MASK)) &&
1361 !adapter->vlan_tag[rxcp->vlan_tag])
1365 /* As the compl has been parsed, reset it; we wont touch it again */
1366 compl->dw[offsetof(struct amap_eth_rx_compl_v1, valid) / 32] = 0;
1368 queue_tail_inc(&rxo->cq);
1372 static inline struct page *be_alloc_pages(u32 size, gfp_t gfp)
1374 u32 order = get_order(size);
1378 return alloc_pages(gfp, order);
1382 * Allocate a page, split it to fragments of size rx_frag_size and post as
1383 * receive buffers to BE
1385 static void be_post_rx_frags(struct be_rx_obj *rxo, gfp_t gfp)
1387 struct be_adapter *adapter = rxo->adapter;
1388 struct be_rx_page_info *page_info_tbl = rxo->page_info_tbl;
1389 struct be_rx_page_info *page_info = NULL, *prev_page_info = NULL;
1390 struct be_queue_info *rxq = &rxo->q;
1391 struct page *pagep = NULL;
1392 struct be_eth_rx_d *rxd;
1393 u64 page_dmaaddr = 0, frag_dmaaddr;
1394 u32 posted, page_offset = 0;
1396 page_info = &rxo->page_info_tbl[rxq->head];
1397 for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
1399 pagep = be_alloc_pages(adapter->big_page_size, gfp);
1400 if (unlikely(!pagep)) {
1401 rxo->stats.rx_post_fail++;
1404 page_dmaaddr = dma_map_page(&adapter->pdev->dev, pagep,
1405 0, adapter->big_page_size,
1407 page_info->page_offset = 0;
1410 page_info->page_offset = page_offset + rx_frag_size;
1412 page_offset = page_info->page_offset;
1413 page_info->page = pagep;
1414 dma_unmap_addr_set(page_info, bus, page_dmaaddr);
1415 frag_dmaaddr = page_dmaaddr + page_info->page_offset;
1417 rxd = queue_head_node(rxq);
1418 rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
1419 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
1421 /* Any space left in the current big page for another frag? */
1422 if ((page_offset + rx_frag_size + rx_frag_size) >
1423 adapter->big_page_size) {
1425 page_info->last_page_user = true;
1428 prev_page_info = page_info;
1429 queue_head_inc(rxq);
1430 page_info = &page_info_tbl[rxq->head];
1433 prev_page_info->last_page_user = true;
1436 atomic_add(posted, &rxq->used);
1437 be_rxq_notify(adapter, rxq->id, posted);
1438 } else if (atomic_read(&rxq->used) == 0) {
1439 /* Let be_worker replenish when memory is available */
1440 rxo->rx_post_starved = true;
1444 static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
1446 struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
1448 if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
1452 be_dws_le_to_cpu(txcp, sizeof(*txcp));
1454 txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
1456 queue_tail_inc(tx_cq);
1460 static u16 be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
1462 struct be_queue_info *txq = &adapter->tx_obj.q;
1463 struct be_eth_wrb *wrb;
1464 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
1465 struct sk_buff *sent_skb;
1466 u16 cur_index, num_wrbs = 1; /* account for hdr wrb */
1467 bool unmap_skb_hdr = true;
1469 sent_skb = sent_skbs[txq->tail];
1471 sent_skbs[txq->tail] = NULL;
1473 /* skip header wrb */
1474 queue_tail_inc(txq);
1477 cur_index = txq->tail;
1478 wrb = queue_tail_node(txq);
1479 unmap_tx_frag(&adapter->pdev->dev, wrb,
1480 (unmap_skb_hdr && skb_headlen(sent_skb)));
1481 unmap_skb_hdr = false;
1484 queue_tail_inc(txq);
1485 } while (cur_index != last_index);
1487 kfree_skb(sent_skb);
1491 static inline struct be_eq_entry *event_get(struct be_eq_obj *eq_obj)
1493 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1499 eqe->evt = le32_to_cpu(eqe->evt);
1500 queue_tail_inc(&eq_obj->q);
1504 static int event_handle(struct be_adapter *adapter,
1505 struct be_eq_obj *eq_obj)
1507 struct be_eq_entry *eqe;
1510 while ((eqe = event_get(eq_obj)) != NULL) {
1515 /* Deal with any spurious interrupts that come
1518 be_eq_notify(adapter, eq_obj->q.id, true, true, num);
1520 napi_schedule(&eq_obj->napi);
1525 /* Just read and notify events without processing them.
1526 * Used at the time of destroying event queues */
1527 static void be_eq_clean(struct be_adapter *adapter,
1528 struct be_eq_obj *eq_obj)
1530 struct be_eq_entry *eqe;
1533 while ((eqe = event_get(eq_obj)) != NULL) {
1539 be_eq_notify(adapter, eq_obj->q.id, false, true, num);
1542 static void be_rx_q_clean(struct be_adapter *adapter, struct be_rx_obj *rxo)
1544 struct be_rx_page_info *page_info;
1545 struct be_queue_info *rxq = &rxo->q;
1546 struct be_queue_info *rx_cq = &rxo->cq;
1547 struct be_rx_compl_info *rxcp;
1550 /* First cleanup pending rx completions */
1551 while ((rxcp = be_rx_compl_get(rxo)) != NULL) {
1552 be_rx_compl_discard(adapter, rxo, rxcp);
1553 be_cq_notify(adapter, rx_cq->id, false, 1);
1556 /* Then free posted rx buffer that were not used */
1557 tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
1558 for (; atomic_read(&rxq->used) > 0; index_inc(&tail, rxq->len)) {
1559 page_info = get_rx_page_info(adapter, rxo, tail);
1560 put_page(page_info->page);
1561 memset(page_info, 0, sizeof(*page_info));
1563 BUG_ON(atomic_read(&rxq->used));
1566 static void be_tx_compl_clean(struct be_adapter *adapter)
1568 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
1569 struct be_queue_info *txq = &adapter->tx_obj.q;
1570 struct be_eth_tx_compl *txcp;
1571 u16 end_idx, cmpl = 0, timeo = 0, num_wrbs = 0;
1572 struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
1573 struct sk_buff *sent_skb;
1576 /* Wait for a max of 200ms for all the tx-completions to arrive. */
1578 while ((txcp = be_tx_compl_get(tx_cq))) {
1579 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1581 num_wrbs += be_tx_compl_process(adapter, end_idx);
1585 be_cq_notify(adapter, tx_cq->id, false, cmpl);
1586 atomic_sub(num_wrbs, &txq->used);
1591 if (atomic_read(&txq->used) == 0 || ++timeo > 200)
1597 if (atomic_read(&txq->used))
1598 dev_err(&adapter->pdev->dev, "%d pending tx-completions\n",
1599 atomic_read(&txq->used));
1601 /* free posted tx for which compls will never arrive */
1602 while (atomic_read(&txq->used)) {
1603 sent_skb = sent_skbs[txq->tail];
1604 end_idx = txq->tail;
1606 wrb_cnt_for_skb(adapter, sent_skb, &dummy_wrb) - 1,
1608 num_wrbs = be_tx_compl_process(adapter, end_idx);
1609 atomic_sub(num_wrbs, &txq->used);
1613 static void be_mcc_queues_destroy(struct be_adapter *adapter)
1615 struct be_queue_info *q;
1617 q = &adapter->mcc_obj.q;
1619 be_cmd_q_destroy(adapter, q, QTYPE_MCCQ);
1620 be_queue_free(adapter, q);
1622 q = &adapter->mcc_obj.cq;
1624 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1625 be_queue_free(adapter, q);
1628 /* Must be called only after TX qs are created as MCC shares TX EQ */
1629 static int be_mcc_queues_create(struct be_adapter *adapter)
1631 struct be_queue_info *q, *cq;
1633 /* Alloc MCC compl queue */
1634 cq = &adapter->mcc_obj.cq;
1635 if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
1636 sizeof(struct be_mcc_compl)))
1639 /* Ask BE to create MCC compl queue; share TX's eq */
1640 if (be_cmd_cq_create(adapter, cq, &adapter->tx_eq.q, false, true, 0))
1643 /* Alloc MCC queue */
1644 q = &adapter->mcc_obj.q;
1645 if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
1646 goto mcc_cq_destroy;
1648 /* Ask BE to create MCC queue */
1649 if (be_cmd_mccq_create(adapter, q, cq))
1655 be_queue_free(adapter, q);
1657 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1659 be_queue_free(adapter, cq);
1664 static void be_tx_queues_destroy(struct be_adapter *adapter)
1666 struct be_queue_info *q;
1668 q = &adapter->tx_obj.q;
1670 be_cmd_q_destroy(adapter, q, QTYPE_TXQ);
1671 be_queue_free(adapter, q);
1673 q = &adapter->tx_obj.cq;
1675 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1676 be_queue_free(adapter, q);
1678 /* Clear any residual events */
1679 be_eq_clean(adapter, &adapter->tx_eq);
1681 q = &adapter->tx_eq.q;
1683 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
1684 be_queue_free(adapter, q);
1687 static int be_tx_queues_create(struct be_adapter *adapter)
1689 struct be_queue_info *eq, *q, *cq;
1691 adapter->tx_eq.max_eqd = 0;
1692 adapter->tx_eq.min_eqd = 0;
1693 adapter->tx_eq.cur_eqd = 96;
1694 adapter->tx_eq.enable_aic = false;
1695 /* Alloc Tx Event queue */
1696 eq = &adapter->tx_eq.q;
1697 if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
1700 /* Ask BE to create Tx Event queue */
1701 if (be_cmd_eq_create(adapter, eq, adapter->tx_eq.cur_eqd))
1704 adapter->tx_eq.eq_idx = adapter->eq_next_idx++;
1707 /* Alloc TX eth compl queue */
1708 cq = &adapter->tx_obj.cq;
1709 if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
1710 sizeof(struct be_eth_tx_compl)))
1713 /* Ask BE to create Tx eth compl queue */
1714 if (be_cmd_cq_create(adapter, cq, eq, false, false, 3))
1717 /* Alloc TX eth queue */
1718 q = &adapter->tx_obj.q;
1719 if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
1722 /* Ask BE to create Tx eth queue */
1723 if (be_cmd_txq_create(adapter, q, cq))
1728 be_queue_free(adapter, q);
1730 be_cmd_q_destroy(adapter, cq, QTYPE_CQ);
1732 be_queue_free(adapter, cq);
1734 be_cmd_q_destroy(adapter, eq, QTYPE_EQ);
1736 be_queue_free(adapter, eq);
1740 static void be_rx_queues_destroy(struct be_adapter *adapter)
1742 struct be_queue_info *q;
1743 struct be_rx_obj *rxo;
1746 for_all_rx_queues(adapter, rxo, i) {
1749 be_cmd_q_destroy(adapter, q, QTYPE_RXQ);
1750 /* After the rxq is invalidated, wait for a grace time
1751 * of 1ms for all dma to end and the flush compl to
1755 be_rx_q_clean(adapter, rxo);
1757 be_queue_free(adapter, q);
1761 be_cmd_q_destroy(adapter, q, QTYPE_CQ);
1762 be_queue_free(adapter, q);
1764 /* Clear any residual events */
1767 be_eq_clean(adapter, &rxo->rx_eq);
1768 be_cmd_q_destroy(adapter, q, QTYPE_EQ);
1770 be_queue_free(adapter, q);
1774 static u32 be_num_rxqs_want(struct be_adapter *adapter)
1776 if (multi_rxq && (adapter->function_caps & BE_FUNCTION_CAPS_RSS) &&
1777 !adapter->sriov_enabled && !(adapter->function_mode & 0x400)) {
1778 return 1 + MAX_RSS_QS; /* one default non-RSS queue */
1780 dev_warn(&adapter->pdev->dev,
1781 "No support for multiple RX queues\n");
1786 static int be_rx_queues_create(struct be_adapter *adapter)
1788 struct be_queue_info *eq, *q, *cq;
1789 struct be_rx_obj *rxo;
1792 adapter->num_rx_qs = min(be_num_rxqs_want(adapter),
1793 msix_enabled(adapter) ?
1794 adapter->num_msix_vec - 1 : 1);
1795 if (adapter->num_rx_qs != MAX_RX_QS)
1796 dev_warn(&adapter->pdev->dev,
1797 "Can create only %d RX queues", adapter->num_rx_qs);
1799 adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
1800 for_all_rx_queues(adapter, rxo, i) {
1801 rxo->adapter = adapter;
1802 rxo->rx_eq.max_eqd = BE_MAX_EQD;
1803 rxo->rx_eq.enable_aic = true;
1807 rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
1808 sizeof(struct be_eq_entry));
1812 rc = be_cmd_eq_create(adapter, eq, rxo->rx_eq.cur_eqd);
1816 rxo->rx_eq.eq_idx = adapter->eq_next_idx++;
1820 rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
1821 sizeof(struct be_eth_rx_compl));
1825 rc = be_cmd_cq_create(adapter, cq, eq, false, false, 3);
1830 rc = be_queue_alloc(adapter, q, RX_Q_LEN,
1831 sizeof(struct be_eth_rx_d));
1835 rc = be_cmd_rxq_create(adapter, q, cq->id, rx_frag_size,
1836 BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle,
1837 (i > 0) ? 1 : 0/* rss enable */, &rxo->rss_id);
1842 if (be_multi_rxq(adapter)) {
1843 u8 rsstable[MAX_RSS_QS];
1845 for_all_rss_queues(adapter, rxo, i)
1846 rsstable[i] = rxo->rss_id;
1848 rc = be_cmd_rss_config(adapter, rsstable,
1849 adapter->num_rx_qs - 1);
1856 be_rx_queues_destroy(adapter);
1860 static bool event_peek(struct be_eq_obj *eq_obj)
1862 struct be_eq_entry *eqe = queue_tail_node(&eq_obj->q);
1869 static irqreturn_t be_intx(int irq, void *dev)
1871 struct be_adapter *adapter = dev;
1872 struct be_rx_obj *rxo;
1873 int isr, i, tx = 0 , rx = 0;
1875 if (lancer_chip(adapter)) {
1876 if (event_peek(&adapter->tx_eq))
1877 tx = event_handle(adapter, &adapter->tx_eq);
1878 for_all_rx_queues(adapter, rxo, i) {
1879 if (event_peek(&rxo->rx_eq))
1880 rx |= event_handle(adapter, &rxo->rx_eq);
1887 isr = ioread32(adapter->csr + CEV_ISR0_OFFSET +
1888 (adapter->tx_eq.q.id / 8) * CEV_ISR_SIZE);
1892 if ((1 << adapter->tx_eq.eq_idx & isr))
1893 event_handle(adapter, &adapter->tx_eq);
1895 for_all_rx_queues(adapter, rxo, i) {
1896 if ((1 << rxo->rx_eq.eq_idx & isr))
1897 event_handle(adapter, &rxo->rx_eq);
1904 static irqreturn_t be_msix_rx(int irq, void *dev)
1906 struct be_rx_obj *rxo = dev;
1907 struct be_adapter *adapter = rxo->adapter;
1909 event_handle(adapter, &rxo->rx_eq);
1914 static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
1916 struct be_adapter *adapter = dev;
1918 event_handle(adapter, &adapter->tx_eq);
1923 static inline bool do_gro(struct be_rx_compl_info *rxcp)
1925 return (rxcp->tcpf && !rxcp->err) ? true : false;
1928 static int be_poll_rx(struct napi_struct *napi, int budget)
1930 struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
1931 struct be_rx_obj *rxo = container_of(rx_eq, struct be_rx_obj, rx_eq);
1932 struct be_adapter *adapter = rxo->adapter;
1933 struct be_queue_info *rx_cq = &rxo->cq;
1934 struct be_rx_compl_info *rxcp;
1937 rxo->stats.rx_polls++;
1938 for (work_done = 0; work_done < budget; work_done++) {
1939 rxcp = be_rx_compl_get(rxo);
1943 /* Ignore flush completions */
1944 if (rxcp->num_rcvd && rxcp->pkt_size) {
1946 be_rx_compl_process_gro(adapter, rxo, rxcp);
1948 be_rx_compl_process(adapter, rxo, rxcp);
1949 } else if (rxcp->pkt_size == 0) {
1950 be_rx_compl_discard(adapter, rxo, rxcp);
1953 be_rx_stats_update(rxo, rxcp);
1956 /* Refill the queue */
1957 if (atomic_read(&rxo->q.used) < RX_FRAGS_REFILL_WM)
1958 be_post_rx_frags(rxo, GFP_ATOMIC);
1961 if (work_done < budget) {
1962 napi_complete(napi);
1963 be_cq_notify(adapter, rx_cq->id, true, work_done);
1965 /* More to be consumed; continue with interrupts disabled */
1966 be_cq_notify(adapter, rx_cq->id, false, work_done);
1971 /* As TX and MCC share the same EQ check for both TX and MCC completions.
1972 * For TX/MCC we don't honour budget; consume everything
1974 static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
1976 struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
1977 struct be_adapter *adapter =
1978 container_of(tx_eq, struct be_adapter, tx_eq);
1979 struct be_queue_info *txq = &adapter->tx_obj.q;
1980 struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
1981 struct be_eth_tx_compl *txcp;
1982 int tx_compl = 0, mcc_compl, status = 0;
1983 u16 end_idx, num_wrbs = 0;
1985 while ((txcp = be_tx_compl_get(tx_cq))) {
1986 end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
1988 num_wrbs += be_tx_compl_process(adapter, end_idx);
1992 mcc_compl = be_process_mcc(adapter, &status);
1994 napi_complete(napi);
1997 struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
1998 be_cq_notify(adapter, mcc_obj->cq.id, true, mcc_compl);
2002 be_cq_notify(adapter, adapter->tx_obj.cq.id, true, tx_compl);
2004 atomic_sub(num_wrbs, &txq->used);
2006 /* As Tx wrbs have been freed up, wake up netdev queue if
2007 * it was stopped due to lack of tx wrbs.
2009 if (netif_queue_stopped(adapter->netdev) &&
2010 atomic_read(&txq->used) < txq->len / 2) {
2011 netif_wake_queue(adapter->netdev);
2014 tx_stats(adapter)->be_tx_events++;
2015 tx_stats(adapter)->be_tx_compl += tx_compl;
2021 void be_detect_dump_ue(struct be_adapter *adapter)
2023 u32 ue_status_lo, ue_status_hi, ue_status_lo_mask, ue_status_hi_mask;
2026 pci_read_config_dword(adapter->pdev,
2027 PCICFG_UE_STATUS_LOW, &ue_status_lo);
2028 pci_read_config_dword(adapter->pdev,
2029 PCICFG_UE_STATUS_HIGH, &ue_status_hi);
2030 pci_read_config_dword(adapter->pdev,
2031 PCICFG_UE_STATUS_LOW_MASK, &ue_status_lo_mask);
2032 pci_read_config_dword(adapter->pdev,
2033 PCICFG_UE_STATUS_HI_MASK, &ue_status_hi_mask);
2035 ue_status_lo = (ue_status_lo & (~ue_status_lo_mask));
2036 ue_status_hi = (ue_status_hi & (~ue_status_hi_mask));
2038 if (ue_status_lo || ue_status_hi) {
2039 adapter->ue_detected = true;
2040 adapter->eeh_err = true;
2041 dev_err(&adapter->pdev->dev, "UE Detected!!\n");
2045 for (i = 0; ue_status_lo; ue_status_lo >>= 1, i++) {
2046 if (ue_status_lo & 1)
2047 dev_err(&adapter->pdev->dev,
2048 "UE: %s bit set\n", ue_status_low_desc[i]);
2052 for (i = 0; ue_status_hi; ue_status_hi >>= 1, i++) {
2053 if (ue_status_hi & 1)
2054 dev_err(&adapter->pdev->dev,
2055 "UE: %s bit set\n", ue_status_hi_desc[i]);
2061 static void be_worker(struct work_struct *work)
2063 struct be_adapter *adapter =
2064 container_of(work, struct be_adapter, work.work);
2065 struct be_rx_obj *rxo;
2068 if (!adapter->ue_detected && !lancer_chip(adapter))
2069 be_detect_dump_ue(adapter);
2071 /* when interrupts are not yet enabled, just reap any pending
2072 * mcc completions */
2073 if (!netif_running(adapter->netdev)) {
2074 int mcc_compl, status = 0;
2076 mcc_compl = be_process_mcc(adapter, &status);
2079 struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
2080 be_cq_notify(adapter, mcc_obj->cq.id, false, mcc_compl);
2086 if (!adapter->stats_cmd_sent) {
2087 if (lancer_chip(adapter))
2088 lancer_cmd_get_pport_stats(adapter,
2089 &adapter->stats_cmd);
2091 be_cmd_get_stats(adapter, &adapter->stats_cmd);
2093 be_tx_rate_update(adapter);
2095 for_all_rx_queues(adapter, rxo, i) {
2096 be_rx_rate_update(rxo);
2097 be_rx_eqd_update(adapter, rxo);
2099 if (rxo->rx_post_starved) {
2100 rxo->rx_post_starved = false;
2101 be_post_rx_frags(rxo, GFP_KERNEL);
2106 adapter->work_counter++;
2107 schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
2110 static void be_msix_disable(struct be_adapter *adapter)
2112 if (msix_enabled(adapter)) {
2113 pci_disable_msix(adapter->pdev);
2114 adapter->num_msix_vec = 0;
2118 static void be_msix_enable(struct be_adapter *adapter)
2120 #define BE_MIN_MSIX_VECTORS (1 + 1) /* Rx + Tx */
2121 int i, status, num_vec;
2123 num_vec = be_num_rxqs_want(adapter) + 1;
2125 for (i = 0; i < num_vec; i++)
2126 adapter->msix_entries[i].entry = i;
2128 status = pci_enable_msix(adapter->pdev, adapter->msix_entries, num_vec);
2131 } else if (status >= BE_MIN_MSIX_VECTORS) {
2133 if (pci_enable_msix(adapter->pdev, adapter->msix_entries,
2139 adapter->num_msix_vec = num_vec;
2143 static void be_sriov_enable(struct be_adapter *adapter)
2145 be_check_sriov_fn_type(adapter);
2146 #ifdef CONFIG_PCI_IOV
2147 if (be_physfn(adapter) && num_vfs) {
2151 pos = pci_find_ext_capability(adapter->pdev,
2152 PCI_EXT_CAP_ID_SRIOV);
2153 pci_read_config_word(adapter->pdev,
2154 pos + PCI_SRIOV_TOTAL_VF, &nvfs);
2156 if (num_vfs > nvfs) {
2157 dev_info(&adapter->pdev->dev,
2158 "Device supports %d VFs and not %d\n",
2163 status = pci_enable_sriov(adapter->pdev, num_vfs);
2164 adapter->sriov_enabled = status ? false : true;
2169 static void be_sriov_disable(struct be_adapter *adapter)
2171 #ifdef CONFIG_PCI_IOV
2172 if (adapter->sriov_enabled) {
2173 pci_disable_sriov(adapter->pdev);
2174 adapter->sriov_enabled = false;
2179 static inline int be_msix_vec_get(struct be_adapter *adapter,
2180 struct be_eq_obj *eq_obj)
2182 return adapter->msix_entries[eq_obj->eq_idx].vector;
2185 static int be_request_irq(struct be_adapter *adapter,
2186 struct be_eq_obj *eq_obj,
2187 void *handler, char *desc, void *context)
2189 struct net_device *netdev = adapter->netdev;
2192 sprintf(eq_obj->desc, "%s-%s", netdev->name, desc);
2193 vec = be_msix_vec_get(adapter, eq_obj);
2194 return request_irq(vec, handler, 0, eq_obj->desc, context);
2197 static void be_free_irq(struct be_adapter *adapter, struct be_eq_obj *eq_obj,
2200 int vec = be_msix_vec_get(adapter, eq_obj);
2201 free_irq(vec, context);
2204 static int be_msix_register(struct be_adapter *adapter)
2206 struct be_rx_obj *rxo;
2210 status = be_request_irq(adapter, &adapter->tx_eq, be_msix_tx_mcc, "tx",
2215 for_all_rx_queues(adapter, rxo, i) {
2216 sprintf(qname, "rxq%d", i);
2217 status = be_request_irq(adapter, &rxo->rx_eq, be_msix_rx,
2226 be_free_irq(adapter, &adapter->tx_eq, adapter);
2228 for (i--, rxo = &adapter->rx_obj[i]; i >= 0; i--, rxo--)
2229 be_free_irq(adapter, &rxo->rx_eq, rxo);
2232 dev_warn(&adapter->pdev->dev,
2233 "MSIX Request IRQ failed - err %d\n", status);
2234 be_msix_disable(adapter);
2238 static int be_irq_register(struct be_adapter *adapter)
2240 struct net_device *netdev = adapter->netdev;
2243 if (msix_enabled(adapter)) {
2244 status = be_msix_register(adapter);
2247 /* INTx is not supported for VF */
2248 if (!be_physfn(adapter))
2253 netdev->irq = adapter->pdev->irq;
2254 status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
2257 dev_err(&adapter->pdev->dev,
2258 "INTx request IRQ failed - err %d\n", status);
2262 adapter->isr_registered = true;
2266 static void be_irq_unregister(struct be_adapter *adapter)
2268 struct net_device *netdev = adapter->netdev;
2269 struct be_rx_obj *rxo;
2272 if (!adapter->isr_registered)
2276 if (!msix_enabled(adapter)) {
2277 free_irq(netdev->irq, adapter);
2282 be_free_irq(adapter, &adapter->tx_eq, adapter);
2284 for_all_rx_queues(adapter, rxo, i)
2285 be_free_irq(adapter, &rxo->rx_eq, rxo);
2288 adapter->isr_registered = false;
2291 static int be_close(struct net_device *netdev)
2293 struct be_adapter *adapter = netdev_priv(netdev);
2294 struct be_rx_obj *rxo;
2295 struct be_eq_obj *tx_eq = &adapter->tx_eq;
2298 be_async_mcc_disable(adapter);
2300 netif_carrier_off(netdev);
2301 adapter->link_up = false;
2303 if (!lancer_chip(adapter))
2304 be_intr_set(adapter, false);
2306 for_all_rx_queues(adapter, rxo, i)
2307 napi_disable(&rxo->rx_eq.napi);
2309 napi_disable(&tx_eq->napi);
2311 if (lancer_chip(adapter)) {
2312 be_cq_notify(adapter, adapter->tx_obj.cq.id, false, 0);
2313 be_cq_notify(adapter, adapter->mcc_obj.cq.id, false, 0);
2314 for_all_rx_queues(adapter, rxo, i)
2315 be_cq_notify(adapter, rxo->cq.id, false, 0);
2318 if (msix_enabled(adapter)) {
2319 vec = be_msix_vec_get(adapter, tx_eq);
2320 synchronize_irq(vec);
2322 for_all_rx_queues(adapter, rxo, i) {
2323 vec = be_msix_vec_get(adapter, &rxo->rx_eq);
2324 synchronize_irq(vec);
2327 synchronize_irq(netdev->irq);
2329 be_irq_unregister(adapter);
2331 /* Wait for all pending tx completions to arrive so that
2332 * all tx skbs are freed.
2334 be_tx_compl_clean(adapter);
2339 static int be_open(struct net_device *netdev)
2341 struct be_adapter *adapter = netdev_priv(netdev);
2342 struct be_eq_obj *tx_eq = &adapter->tx_eq;
2343 struct be_rx_obj *rxo;
2349 for_all_rx_queues(adapter, rxo, i) {
2350 be_post_rx_frags(rxo, GFP_KERNEL);
2351 napi_enable(&rxo->rx_eq.napi);
2353 napi_enable(&tx_eq->napi);
2355 be_irq_register(adapter);
2357 if (!lancer_chip(adapter))
2358 be_intr_set(adapter, true);
2360 /* The evt queues are created in unarmed state; arm them */
2361 for_all_rx_queues(adapter, rxo, i) {
2362 be_eq_notify(adapter, rxo->rx_eq.q.id, true, false, 0);
2363 be_cq_notify(adapter, rxo->cq.id, true, 0);
2365 be_eq_notify(adapter, tx_eq->q.id, true, false, 0);
2367 /* Now that interrupts are on we can process async mcc */
2368 be_async_mcc_enable(adapter);
2370 status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
2374 be_link_status_update(adapter, link_up);
2376 if (be_physfn(adapter)) {
2377 status = be_vid_config(adapter, false, 0);
2381 status = be_cmd_set_flow_control(adapter,
2382 adapter->tx_fc, adapter->rx_fc);
2389 be_close(adapter->netdev);
2393 static int be_setup_wol(struct be_adapter *adapter, bool enable)
2395 struct be_dma_mem cmd;
2399 memset(mac, 0, ETH_ALEN);
2401 cmd.size = sizeof(struct be_cmd_req_acpi_wol_magic_config);
2402 cmd.va = dma_alloc_coherent(&adapter->pdev->dev, cmd.size, &cmd.dma,
2406 memset(cmd.va, 0, cmd.size);
2409 status = pci_write_config_dword(adapter->pdev,
2410 PCICFG_PM_CONTROL_OFFSET, PCICFG_PM_CONTROL_MASK);
2412 dev_err(&adapter->pdev->dev,
2413 "Could not enable Wake-on-lan\n");
2414 dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va,
2418 status = be_cmd_enable_magic_wol(adapter,
2419 adapter->netdev->dev_addr, &cmd);
2420 pci_enable_wake(adapter->pdev, PCI_D3hot, 1);
2421 pci_enable_wake(adapter->pdev, PCI_D3cold, 1);
2423 status = be_cmd_enable_magic_wol(adapter, mac, &cmd);
2424 pci_enable_wake(adapter->pdev, PCI_D3hot, 0);
2425 pci_enable_wake(adapter->pdev, PCI_D3cold, 0);
2428 dma_free_coherent(&adapter->pdev->dev, cmd.size, cmd.va, cmd.dma);
2433 * Generate a seed MAC address from the PF MAC Address using jhash.
2434 * MAC Address for VFs are assigned incrementally starting from the seed.
2435 * These addresses are programmed in the ASIC by the PF and the VF driver
2436 * queries for the MAC address during its probe.
2438 static inline int be_vf_eth_addr_config(struct be_adapter *adapter)
2444 be_vf_eth_addr_generate(adapter, mac);
2446 for (vf = 0; vf < num_vfs; vf++) {
2447 status = be_cmd_pmac_add(adapter, mac,
2448 adapter->vf_cfg[vf].vf_if_handle,
2449 &adapter->vf_cfg[vf].vf_pmac_id,
2452 dev_err(&adapter->pdev->dev,
2453 "Mac address add failed for VF %d\n", vf);
2455 memcpy(adapter->vf_cfg[vf].vf_mac_addr, mac, ETH_ALEN);
2462 static inline void be_vf_eth_addr_rem(struct be_adapter *adapter)
2466 for (vf = 0; vf < num_vfs; vf++) {
2467 if (adapter->vf_cfg[vf].vf_pmac_id != BE_INVALID_PMAC_ID)
2468 be_cmd_pmac_del(adapter,
2469 adapter->vf_cfg[vf].vf_if_handle,
2470 adapter->vf_cfg[vf].vf_pmac_id, vf + 1);
2474 static int be_setup(struct be_adapter *adapter)
2476 struct net_device *netdev = adapter->netdev;
2477 u32 cap_flags, en_flags, vf = 0;
2481 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED |
2482 BE_IF_FLAGS_BROADCAST |
2483 BE_IF_FLAGS_MULTICAST;
2485 if (be_physfn(adapter)) {
2486 cap_flags |= BE_IF_FLAGS_MCAST_PROMISCUOUS |
2487 BE_IF_FLAGS_PROMISCUOUS |
2488 BE_IF_FLAGS_PASS_L3L4_ERRORS;
2489 en_flags |= BE_IF_FLAGS_PASS_L3L4_ERRORS;
2491 if (adapter->function_caps & BE_FUNCTION_CAPS_RSS) {
2492 cap_flags |= BE_IF_FLAGS_RSS;
2493 en_flags |= BE_IF_FLAGS_RSS;
2497 status = be_cmd_if_create(adapter, cap_flags, en_flags,
2498 netdev->dev_addr, false/* pmac_invalid */,
2499 &adapter->if_handle, &adapter->pmac_id, 0);
2503 if (be_physfn(adapter)) {
2504 if (adapter->sriov_enabled) {
2505 while (vf < num_vfs) {
2506 cap_flags = en_flags = BE_IF_FLAGS_UNTAGGED |
2507 BE_IF_FLAGS_BROADCAST;
2508 status = be_cmd_if_create(adapter, cap_flags,
2509 en_flags, mac, true,
2510 &adapter->vf_cfg[vf].vf_if_handle,
2513 dev_err(&adapter->pdev->dev,
2514 "Interface Create failed for VF %d\n",
2518 adapter->vf_cfg[vf].vf_pmac_id =
2524 status = be_cmd_mac_addr_query(adapter, mac,
2525 MAC_ADDRESS_TYPE_NETWORK, false, adapter->if_handle);
2527 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
2528 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
2532 status = be_tx_queues_create(adapter);
2536 status = be_rx_queues_create(adapter);
2540 status = be_mcc_queues_create(adapter);
2544 adapter->link_speed = -1;
2549 be_rx_queues_destroy(adapter);
2551 be_tx_queues_destroy(adapter);
2553 if (be_physfn(adapter) && adapter->sriov_enabled)
2554 for (vf = 0; vf < num_vfs; vf++)
2555 if (adapter->vf_cfg[vf].vf_if_handle)
2556 be_cmd_if_destroy(adapter,
2557 adapter->vf_cfg[vf].vf_if_handle,
2559 be_cmd_if_destroy(adapter, adapter->if_handle, 0);
2564 static int be_clear(struct be_adapter *adapter)
2568 if (be_physfn(adapter) && adapter->sriov_enabled)
2569 be_vf_eth_addr_rem(adapter);
2571 be_mcc_queues_destroy(adapter);
2572 be_rx_queues_destroy(adapter);
2573 be_tx_queues_destroy(adapter);
2574 adapter->eq_next_idx = 0;
2576 if (be_physfn(adapter) && adapter->sriov_enabled)
2577 for (vf = 0; vf < num_vfs; vf++)
2578 if (adapter->vf_cfg[vf].vf_if_handle)
2579 be_cmd_if_destroy(adapter,
2580 adapter->vf_cfg[vf].vf_if_handle,
2583 be_cmd_if_destroy(adapter, adapter->if_handle, 0);
2585 /* tell fw we're done with firing cmds */
2586 be_cmd_fw_clean(adapter);
2591 #define FW_FILE_HDR_SIGN "ServerEngines Corp. "
2592 static bool be_flash_redboot(struct be_adapter *adapter,
2593 const u8 *p, u32 img_start, int image_size,
2600 crc_offset = hdr_size + img_start + image_size - 4;
2604 status = be_cmd_get_flash_crc(adapter, flashed_crc,
2607 dev_err(&adapter->pdev->dev,
2608 "could not get crc from flash, not flashing redboot\n");
2612 /*update redboot only if crc does not match*/
2613 if (!memcmp(flashed_crc, p, 4))
2619 static int be_flash_data(struct be_adapter *adapter,
2620 const struct firmware *fw,
2621 struct be_dma_mem *flash_cmd, int num_of_images)
2624 int status = 0, i, filehdr_size = 0;
2625 u32 total_bytes = 0, flash_op;
2627 const u8 *p = fw->data;
2628 struct be_cmd_write_flashrom *req = flash_cmd->va;
2629 const struct flash_comp *pflashcomp;
2632 static const struct flash_comp gen3_flash_types[9] = {
2633 { FLASH_iSCSI_PRIMARY_IMAGE_START_g3, IMG_TYPE_ISCSI_ACTIVE,
2634 FLASH_IMAGE_MAX_SIZE_g3},
2635 { FLASH_REDBOOT_START_g3, IMG_TYPE_REDBOOT,
2636 FLASH_REDBOOT_IMAGE_MAX_SIZE_g3},
2637 { FLASH_iSCSI_BIOS_START_g3, IMG_TYPE_BIOS,
2638 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2639 { FLASH_PXE_BIOS_START_g3, IMG_TYPE_PXE_BIOS,
2640 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2641 { FLASH_FCoE_BIOS_START_g3, IMG_TYPE_FCOE_BIOS,
2642 FLASH_BIOS_IMAGE_MAX_SIZE_g3},
2643 { FLASH_iSCSI_BACKUP_IMAGE_START_g3, IMG_TYPE_ISCSI_BACKUP,
2644 FLASH_IMAGE_MAX_SIZE_g3},
2645 { FLASH_FCoE_PRIMARY_IMAGE_START_g3, IMG_TYPE_FCOE_FW_ACTIVE,
2646 FLASH_IMAGE_MAX_SIZE_g3},
2647 { FLASH_FCoE_BACKUP_IMAGE_START_g3, IMG_TYPE_FCOE_FW_BACKUP,
2648 FLASH_IMAGE_MAX_SIZE_g3},
2649 { FLASH_NCSI_START_g3, IMG_TYPE_NCSI_FW,
2650 FLASH_NCSI_IMAGE_MAX_SIZE_g3}
2652 static const struct flash_comp gen2_flash_types[8] = {
2653 { FLASH_iSCSI_PRIMARY_IMAGE_START_g2, IMG_TYPE_ISCSI_ACTIVE,
2654 FLASH_IMAGE_MAX_SIZE_g2},
2655 { FLASH_REDBOOT_START_g2, IMG_TYPE_REDBOOT,
2656 FLASH_REDBOOT_IMAGE_MAX_SIZE_g2},
2657 { FLASH_iSCSI_BIOS_START_g2, IMG_TYPE_BIOS,
2658 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2659 { FLASH_PXE_BIOS_START_g2, IMG_TYPE_PXE_BIOS,
2660 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2661 { FLASH_FCoE_BIOS_START_g2, IMG_TYPE_FCOE_BIOS,
2662 FLASH_BIOS_IMAGE_MAX_SIZE_g2},
2663 { FLASH_iSCSI_BACKUP_IMAGE_START_g2, IMG_TYPE_ISCSI_BACKUP,
2664 FLASH_IMAGE_MAX_SIZE_g2},
2665 { FLASH_FCoE_PRIMARY_IMAGE_START_g2, IMG_TYPE_FCOE_FW_ACTIVE,
2666 FLASH_IMAGE_MAX_SIZE_g2},
2667 { FLASH_FCoE_BACKUP_IMAGE_START_g2, IMG_TYPE_FCOE_FW_BACKUP,
2668 FLASH_IMAGE_MAX_SIZE_g2}
2671 if (adapter->generation == BE_GEN3) {
2672 pflashcomp = gen3_flash_types;
2673 filehdr_size = sizeof(struct flash_file_hdr_g3);
2674 num_comp = ARRAY_SIZE(gen3_flash_types);
2676 pflashcomp = gen2_flash_types;
2677 filehdr_size = sizeof(struct flash_file_hdr_g2);
2678 num_comp = ARRAY_SIZE(gen2_flash_types);
2680 for (i = 0; i < num_comp; i++) {
2681 if ((pflashcomp[i].optype == IMG_TYPE_NCSI_FW) &&
2682 memcmp(adapter->fw_ver, "3.102.148.0", 11) < 0)
2684 if ((pflashcomp[i].optype == IMG_TYPE_REDBOOT) &&
2685 (!be_flash_redboot(adapter, fw->data,
2686 pflashcomp[i].offset, pflashcomp[i].size, filehdr_size +
2687 (num_of_images * sizeof(struct image_hdr)))))
2690 p += filehdr_size + pflashcomp[i].offset
2691 + (num_of_images * sizeof(struct image_hdr));
2692 if (p + pflashcomp[i].size > fw->data + fw->size)
2694 total_bytes = pflashcomp[i].size;
2695 while (total_bytes) {
2696 if (total_bytes > 32*1024)
2697 num_bytes = 32*1024;
2699 num_bytes = total_bytes;
2700 total_bytes -= num_bytes;
2703 flash_op = FLASHROM_OPER_FLASH;
2705 flash_op = FLASHROM_OPER_SAVE;
2706 memcpy(req->params.data_buf, p, num_bytes);
2708 status = be_cmd_write_flashrom(adapter, flash_cmd,
2709 pflashcomp[i].optype, flash_op, num_bytes);
2711 dev_err(&adapter->pdev->dev,
2712 "cmd to write to flash rom failed.\n");
2721 static int get_ufigen_type(struct flash_file_hdr_g2 *fhdr)
2725 if (fhdr->build[0] == '3')
2727 else if (fhdr->build[0] == '2')
2733 int be_load_fw(struct be_adapter *adapter, u8 *func)
2735 char fw_file[ETHTOOL_FLASH_MAX_FILENAME];
2736 const struct firmware *fw;
2737 struct flash_file_hdr_g2 *fhdr;
2738 struct flash_file_hdr_g3 *fhdr3;
2739 struct image_hdr *img_hdr_ptr = NULL;
2740 struct be_dma_mem flash_cmd;
2741 int status, i = 0, num_imgs = 0;
2744 if (!netif_running(adapter->netdev)) {
2745 dev_err(&adapter->pdev->dev,
2746 "Firmware load not allowed (interface is down)\n");
2750 strcpy(fw_file, func);
2752 status = request_firmware(&fw, fw_file, &adapter->pdev->dev);
2757 fhdr = (struct flash_file_hdr_g2 *) p;
2758 dev_info(&adapter->pdev->dev, "Flashing firmware file %s\n", fw_file);
2760 flash_cmd.size = sizeof(struct be_cmd_write_flashrom) + 32*1024;
2761 flash_cmd.va = dma_alloc_coherent(&adapter->pdev->dev, flash_cmd.size,
2762 &flash_cmd.dma, GFP_KERNEL);
2763 if (!flash_cmd.va) {
2765 dev_err(&adapter->pdev->dev,
2766 "Memory allocation failure while flashing\n");
2770 if ((adapter->generation == BE_GEN3) &&
2771 (get_ufigen_type(fhdr) == BE_GEN3)) {
2772 fhdr3 = (struct flash_file_hdr_g3 *) fw->data;
2773 num_imgs = le32_to_cpu(fhdr3->num_imgs);
2774 for (i = 0; i < num_imgs; i++) {
2775 img_hdr_ptr = (struct image_hdr *) (fw->data +
2776 (sizeof(struct flash_file_hdr_g3) +
2777 i * sizeof(struct image_hdr)));
2778 if (le32_to_cpu(img_hdr_ptr->imageid) == 1)
2779 status = be_flash_data(adapter, fw, &flash_cmd,
2782 } else if ((adapter->generation == BE_GEN2) &&
2783 (get_ufigen_type(fhdr) == BE_GEN2)) {
2784 status = be_flash_data(adapter, fw, &flash_cmd, 0);
2786 dev_err(&adapter->pdev->dev,
2787 "UFI and Interface are not compatible for flashing\n");
2791 dma_free_coherent(&adapter->pdev->dev, flash_cmd.size, flash_cmd.va,
2794 dev_err(&adapter->pdev->dev, "Firmware load error\n");
2798 dev_info(&adapter->pdev->dev, "Firmware flashed successfully\n");
2801 release_firmware(fw);
2805 static struct net_device_ops be_netdev_ops = {
2806 .ndo_open = be_open,
2807 .ndo_stop = be_close,
2808 .ndo_start_xmit = be_xmit,
2809 .ndo_set_rx_mode = be_set_multicast_list,
2810 .ndo_set_mac_address = be_mac_addr_set,
2811 .ndo_change_mtu = be_change_mtu,
2812 .ndo_validate_addr = eth_validate_addr,
2813 .ndo_vlan_rx_register = be_vlan_register,
2814 .ndo_vlan_rx_add_vid = be_vlan_add_vid,
2815 .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
2816 .ndo_set_vf_mac = be_set_vf_mac,
2817 .ndo_set_vf_vlan = be_set_vf_vlan,
2818 .ndo_set_vf_tx_rate = be_set_vf_tx_rate,
2819 .ndo_get_vf_config = be_get_vf_config
2822 static void be_netdev_init(struct net_device *netdev)
2824 struct be_adapter *adapter = netdev_priv(netdev);
2825 struct be_rx_obj *rxo;
2828 netdev->hw_features |= NETIF_F_SG | NETIF_F_TSO | NETIF_F_TSO6 |
2829 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM |
2831 if (be_multi_rxq(adapter))
2832 netdev->hw_features |= NETIF_F_RXHASH;
2834 netdev->features |= netdev->hw_features |
2835 NETIF_F_HW_VLAN_RX | NETIF_F_HW_VLAN_FILTER;
2837 netdev->vlan_features |= NETIF_F_SG | NETIF_F_TSO |
2838 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2840 if (lancer_chip(adapter))
2841 netdev->vlan_features |= NETIF_F_TSO6;
2843 netdev->flags |= IFF_MULTICAST;
2845 /* Default settings for Rx and Tx flow control */
2846 adapter->rx_fc = true;
2847 adapter->tx_fc = true;
2849 netif_set_gso_max_size(netdev, 65535);
2851 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
2853 SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
2855 for_all_rx_queues(adapter, rxo, i)
2856 netif_napi_add(netdev, &rxo->rx_eq.napi, be_poll_rx,
2859 netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
2863 static void be_unmap_pci_bars(struct be_adapter *adapter)
2866 iounmap(adapter->csr);
2868 iounmap(adapter->db);
2869 if (adapter->pcicfg && be_physfn(adapter))
2870 iounmap(adapter->pcicfg);
2873 static int be_map_pci_bars(struct be_adapter *adapter)
2876 int pcicfg_reg, db_reg;
2878 if (lancer_chip(adapter)) {
2879 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 0),
2880 pci_resource_len(adapter->pdev, 0));
2887 if (be_physfn(adapter)) {
2888 addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
2889 pci_resource_len(adapter->pdev, 2));
2892 adapter->csr = addr;
2895 if (adapter->generation == BE_GEN2) {
2900 if (be_physfn(adapter))
2905 addr = ioremap_nocache(pci_resource_start(adapter->pdev, db_reg),
2906 pci_resource_len(adapter->pdev, db_reg));
2911 if (be_physfn(adapter)) {
2912 addr = ioremap_nocache(
2913 pci_resource_start(adapter->pdev, pcicfg_reg),
2914 pci_resource_len(adapter->pdev, pcicfg_reg));
2917 adapter->pcicfg = addr;
2919 adapter->pcicfg = adapter->db + SRIOV_VF_PCICFG_OFFSET;
2923 be_unmap_pci_bars(adapter);
2928 static void be_ctrl_cleanup(struct be_adapter *adapter)
2930 struct be_dma_mem *mem = &adapter->mbox_mem_alloced;
2932 be_unmap_pci_bars(adapter);
2935 dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va,
2938 mem = &adapter->mc_cmd_mem;
2940 dma_free_coherent(&adapter->pdev->dev, mem->size, mem->va,
2944 static int be_ctrl_init(struct be_adapter *adapter)
2946 struct be_dma_mem *mbox_mem_alloc = &adapter->mbox_mem_alloced;
2947 struct be_dma_mem *mbox_mem_align = &adapter->mbox_mem;
2948 struct be_dma_mem *mc_cmd_mem = &adapter->mc_cmd_mem;
2951 status = be_map_pci_bars(adapter);
2955 mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
2956 mbox_mem_alloc->va = dma_alloc_coherent(&adapter->pdev->dev,
2957 mbox_mem_alloc->size,
2958 &mbox_mem_alloc->dma,
2960 if (!mbox_mem_alloc->va) {
2962 goto unmap_pci_bars;
2965 mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
2966 mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
2967 mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
2968 memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
2970 mc_cmd_mem->size = sizeof(struct be_cmd_req_mcast_mac_config);
2971 mc_cmd_mem->va = dma_alloc_coherent(&adapter->pdev->dev,
2972 mc_cmd_mem->size, &mc_cmd_mem->dma,
2974 if (mc_cmd_mem->va == NULL) {
2978 memset(mc_cmd_mem->va, 0, mc_cmd_mem->size);
2980 mutex_init(&adapter->mbox_lock);
2981 spin_lock_init(&adapter->mcc_lock);
2982 spin_lock_init(&adapter->mcc_cq_lock);
2984 init_completion(&adapter->flash_compl);
2985 pci_save_state(adapter->pdev);
2989 dma_free_coherent(&adapter->pdev->dev, mbox_mem_alloc->size,
2990 mbox_mem_alloc->va, mbox_mem_alloc->dma);
2993 be_unmap_pci_bars(adapter);
2999 static void be_stats_cleanup(struct be_adapter *adapter)
3001 struct be_dma_mem *cmd = &adapter->stats_cmd;
3004 dma_free_coherent(&adapter->pdev->dev, cmd->size,
3008 static int be_stats_init(struct be_adapter *adapter)
3010 struct be_dma_mem *cmd = &adapter->stats_cmd;
3012 if (adapter->generation == BE_GEN2) {
3013 cmd->size = sizeof(struct be_cmd_req_get_stats_v0);
3015 if (lancer_chip(adapter))
3016 cmd->size = sizeof(struct lancer_cmd_req_pport_stats);
3018 cmd->size = sizeof(struct be_cmd_req_get_stats_v1);
3020 cmd->va = dma_alloc_coherent(&adapter->pdev->dev, cmd->size, &cmd->dma,
3022 if (cmd->va == NULL)
3024 memset(cmd->va, 0, cmd->size);
3028 static void __devexit be_remove(struct pci_dev *pdev)
3030 struct be_adapter *adapter = pci_get_drvdata(pdev);
3035 cancel_delayed_work_sync(&adapter->work);
3037 unregister_netdev(adapter->netdev);
3041 be_stats_cleanup(adapter);
3043 be_ctrl_cleanup(adapter);
3045 kfree(adapter->vf_cfg);
3046 be_sriov_disable(adapter);
3048 be_msix_disable(adapter);
3050 pci_set_drvdata(pdev, NULL);
3051 pci_release_regions(pdev);
3052 pci_disable_device(pdev);
3054 free_netdev(adapter->netdev);
3057 static int be_get_config(struct be_adapter *adapter)
3062 status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
3066 status = be_cmd_query_fw_cfg(adapter, &adapter->port_num,
3067 &adapter->function_mode, &adapter->function_caps);
3071 memset(mac, 0, ETH_ALEN);
3073 if (be_physfn(adapter)) {
3074 status = be_cmd_mac_addr_query(adapter, mac,
3075 MAC_ADDRESS_TYPE_NETWORK, true /*permanent */, 0);
3080 if (!is_valid_ether_addr(mac))
3081 return -EADDRNOTAVAIL;
3083 memcpy(adapter->netdev->dev_addr, mac, ETH_ALEN);
3084 memcpy(adapter->netdev->perm_addr, mac, ETH_ALEN);
3087 if (adapter->function_mode & 0x400)
3088 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED/4;
3090 adapter->max_vlans = BE_NUM_VLANS_SUPPORTED;
3092 status = be_cmd_get_cntl_attributes(adapter);
3096 be_cmd_check_native_mode(adapter);
3100 static int be_dev_family_check(struct be_adapter *adapter)
3102 struct pci_dev *pdev = adapter->pdev;
3103 u32 sli_intf = 0, if_type;
3105 switch (pdev->device) {
3108 adapter->generation = BE_GEN2;
3112 adapter->generation = BE_GEN3;
3115 pci_read_config_dword(pdev, SLI_INTF_REG_OFFSET, &sli_intf);
3116 if_type = (sli_intf & SLI_INTF_IF_TYPE_MASK) >>
3117 SLI_INTF_IF_TYPE_SHIFT;
3119 if (((sli_intf & SLI_INTF_VALID_MASK) != SLI_INTF_VALID) ||
3121 dev_err(&pdev->dev, "SLI_INTF reg val is not valid\n");
3125 dev_err(&pdev->dev, "VFs not supported\n");
3128 adapter->sli_family = ((sli_intf & SLI_INTF_FAMILY_MASK) >>
3129 SLI_INTF_FAMILY_SHIFT);
3130 adapter->generation = BE_GEN3;
3133 adapter->generation = 0;
3138 static int lancer_wait_ready(struct be_adapter *adapter)
3140 #define SLIPORT_READY_TIMEOUT 500
3144 for (i = 0; i < SLIPORT_READY_TIMEOUT; i++) {
3145 sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
3146 if (sliport_status & SLIPORT_STATUS_RDY_MASK)
3152 if (i == SLIPORT_READY_TIMEOUT)
3158 static int lancer_test_and_set_rdy_state(struct be_adapter *adapter)
3161 u32 sliport_status, err, reset_needed;
3162 status = lancer_wait_ready(adapter);
3164 sliport_status = ioread32(adapter->db + SLIPORT_STATUS_OFFSET);
3165 err = sliport_status & SLIPORT_STATUS_ERR_MASK;
3166 reset_needed = sliport_status & SLIPORT_STATUS_RN_MASK;
3167 if (err && reset_needed) {
3168 iowrite32(SLI_PORT_CONTROL_IP_MASK,
3169 adapter->db + SLIPORT_CONTROL_OFFSET);
3171 /* check adapter has corrected the error */
3172 status = lancer_wait_ready(adapter);
3173 sliport_status = ioread32(adapter->db +
3174 SLIPORT_STATUS_OFFSET);
3175 sliport_status &= (SLIPORT_STATUS_ERR_MASK |
3176 SLIPORT_STATUS_RN_MASK);
3177 if (status || sliport_status)
3179 } else if (err || reset_needed) {
3186 static int __devinit be_probe(struct pci_dev *pdev,
3187 const struct pci_device_id *pdev_id)
3190 struct be_adapter *adapter;
3191 struct net_device *netdev;
3193 status = pci_enable_device(pdev);
3197 status = pci_request_regions(pdev, DRV_NAME);
3200 pci_set_master(pdev);
3202 netdev = alloc_etherdev(sizeof(struct be_adapter));
3203 if (netdev == NULL) {
3207 adapter = netdev_priv(netdev);
3208 adapter->pdev = pdev;
3209 pci_set_drvdata(pdev, adapter);
3211 status = be_dev_family_check(adapter);
3215 adapter->netdev = netdev;
3216 SET_NETDEV_DEV(netdev, &pdev->dev);
3218 status = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
3220 netdev->features |= NETIF_F_HIGHDMA;
3222 status = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
3224 dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
3229 be_sriov_enable(adapter);
3230 if (adapter->sriov_enabled) {
3231 adapter->vf_cfg = kcalloc(num_vfs,
3232 sizeof(struct be_vf_cfg), GFP_KERNEL);
3234 if (!adapter->vf_cfg)
3238 status = be_ctrl_init(adapter);
3242 if (lancer_chip(adapter)) {
3243 status = lancer_test_and_set_rdy_state(adapter);
3245 dev_err(&pdev->dev, "Adapter in non recoverable error\n");
3250 /* sync up with fw's ready state */
3251 if (be_physfn(adapter)) {
3252 status = be_cmd_POST(adapter);
3257 /* tell fw we're ready to fire cmds */
3258 status = be_cmd_fw_init(adapter);
3262 status = be_cmd_reset_function(adapter);
3266 status = be_stats_init(adapter);
3270 status = be_get_config(adapter);
3274 be_msix_enable(adapter);
3276 INIT_DELAYED_WORK(&adapter->work, be_worker);
3278 status = be_setup(adapter);
3282 be_netdev_init(netdev);
3283 status = register_netdev(netdev);
3286 netif_carrier_off(netdev);
3288 if (be_physfn(adapter) && adapter->sriov_enabled) {
3293 status = be_vf_eth_addr_config(adapter);
3297 for (vf = 0; vf < num_vfs; vf++) {
3298 status = be_cmd_link_status_query(adapter, &link_up,
3299 &mac_speed, &lnk_speed, vf + 1);
3301 adapter->vf_cfg[vf].vf_tx_rate = lnk_speed * 10;
3307 dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
3308 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
3312 unregister_netdev(netdev);
3316 be_msix_disable(adapter);
3318 be_stats_cleanup(adapter);
3320 be_ctrl_cleanup(adapter);
3322 kfree(adapter->vf_cfg);
3324 be_sriov_disable(adapter);
3325 free_netdev(netdev);
3326 pci_set_drvdata(pdev, NULL);
3328 pci_release_regions(pdev);
3330 pci_disable_device(pdev);
3332 dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
3336 static int be_suspend(struct pci_dev *pdev, pm_message_t state)
3338 struct be_adapter *adapter = pci_get_drvdata(pdev);
3339 struct net_device *netdev = adapter->netdev;
3341 cancel_delayed_work_sync(&adapter->work);
3343 be_setup_wol(adapter, true);
3345 netif_device_detach(netdev);
3346 if (netif_running(netdev)) {
3351 be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
3354 be_msix_disable(adapter);
3355 pci_save_state(pdev);
3356 pci_disable_device(pdev);
3357 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3361 static int be_resume(struct pci_dev *pdev)
3364 struct be_adapter *adapter = pci_get_drvdata(pdev);
3365 struct net_device *netdev = adapter->netdev;
3367 netif_device_detach(netdev);
3369 status = pci_enable_device(pdev);
3373 pci_set_power_state(pdev, 0);
3374 pci_restore_state(pdev);
3376 be_msix_enable(adapter);
3377 /* tell fw we're ready to fire cmds */
3378 status = be_cmd_fw_init(adapter);
3383 if (netif_running(netdev)) {
3388 netif_device_attach(netdev);
3391 be_setup_wol(adapter, false);
3393 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
3398 * An FLR will stop BE from DMAing any data.
3400 static void be_shutdown(struct pci_dev *pdev)
3402 struct be_adapter *adapter = pci_get_drvdata(pdev);
3407 cancel_delayed_work_sync(&adapter->work);
3409 netif_device_detach(adapter->netdev);
3412 be_setup_wol(adapter, true);
3414 be_cmd_reset_function(adapter);
3416 pci_disable_device(pdev);
3419 static pci_ers_result_t be_eeh_err_detected(struct pci_dev *pdev,
3420 pci_channel_state_t state)
3422 struct be_adapter *adapter = pci_get_drvdata(pdev);
3423 struct net_device *netdev = adapter->netdev;
3425 dev_err(&adapter->pdev->dev, "EEH error detected\n");
3427 adapter->eeh_err = true;
3429 netif_device_detach(netdev);
3431 if (netif_running(netdev)) {
3438 if (state == pci_channel_io_perm_failure)
3439 return PCI_ERS_RESULT_DISCONNECT;
3441 pci_disable_device(pdev);
3443 return PCI_ERS_RESULT_NEED_RESET;
3446 static pci_ers_result_t be_eeh_reset(struct pci_dev *pdev)
3448 struct be_adapter *adapter = pci_get_drvdata(pdev);
3451 dev_info(&adapter->pdev->dev, "EEH reset\n");
3452 adapter->eeh_err = false;
3454 status = pci_enable_device(pdev);
3456 return PCI_ERS_RESULT_DISCONNECT;
3458 pci_set_master(pdev);
3459 pci_set_power_state(pdev, 0);
3460 pci_restore_state(pdev);
3462 /* Check if card is ok and fw is ready */
3463 status = be_cmd_POST(adapter);
3465 return PCI_ERS_RESULT_DISCONNECT;
3467 return PCI_ERS_RESULT_RECOVERED;
3470 static void be_eeh_resume(struct pci_dev *pdev)
3473 struct be_adapter *adapter = pci_get_drvdata(pdev);
3474 struct net_device *netdev = adapter->netdev;
3476 dev_info(&adapter->pdev->dev, "EEH resume\n");
3478 pci_save_state(pdev);
3480 /* tell fw we're ready to fire cmds */
3481 status = be_cmd_fw_init(adapter);
3485 status = be_setup(adapter);
3489 if (netif_running(netdev)) {
3490 status = be_open(netdev);
3494 netif_device_attach(netdev);
3497 dev_err(&adapter->pdev->dev, "EEH resume failed\n");
3500 static struct pci_error_handlers be_eeh_handlers = {
3501 .error_detected = be_eeh_err_detected,
3502 .slot_reset = be_eeh_reset,
3503 .resume = be_eeh_resume,
3506 static struct pci_driver be_driver = {
3508 .id_table = be_dev_ids,
3510 .remove = be_remove,
3511 .suspend = be_suspend,
3512 .resume = be_resume,
3513 .shutdown = be_shutdown,
3514 .err_handler = &be_eeh_handlers
3517 static int __init be_init_module(void)
3519 if (rx_frag_size != 8192 && rx_frag_size != 4096 &&
3520 rx_frag_size != 2048) {
3521 printk(KERN_WARNING DRV_NAME
3522 " : Module param rx_frag_size must be 2048/4096/8192."
3524 rx_frag_size = 2048;
3527 return pci_register_driver(&be_driver);
3529 module_init(be_init_module);
3531 static void __exit be_exit_module(void)
3533 pci_unregister_driver(&be_driver);
3535 module_exit(be_exit_module);