2 * Blackfin On-Chip MAC Driver
4 * Copyright 2004-2007 Analog Devices Inc.
6 * Enter bugs at http://blackfin.uclinux.org/
8 * Licensed under the GPL-2 or later.
11 #include <linux/init.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/sched.h>
15 #include <linux/slab.h>
16 #include <linux/delay.h>
17 #include <linux/timer.h>
18 #include <linux/errno.h>
19 #include <linux/irq.h>
21 #include <linux/ioport.h>
22 #include <linux/crc32.h>
23 #include <linux/device.h>
24 #include <linux/spinlock.h>
25 #include <linux/mii.h>
26 #include <linux/phy.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/ethtool.h>
30 #include <linux/skbuff.h>
31 #include <linux/platform_device.h>
34 #include <linux/dma-mapping.h>
37 #include <asm/blackfin.h>
38 #include <asm/cacheflush.h>
39 #include <asm/portmux.h>
43 #define DRV_NAME "bfin_mac"
44 #define DRV_VERSION "1.1"
45 #define DRV_AUTHOR "Bryan Wu, Luke Yang"
46 #define DRV_DESC "Blackfin on-chip Ethernet MAC driver"
48 MODULE_AUTHOR(DRV_AUTHOR);
49 MODULE_LICENSE("GPL");
50 MODULE_DESCRIPTION(DRV_DESC);
51 MODULE_ALIAS("platform:bfin_mac");
53 #if defined(CONFIG_BFIN_MAC_USE_L1)
54 # define bfin_mac_alloc(dma_handle, size) l1_data_sram_zalloc(size)
55 # define bfin_mac_free(dma_handle, ptr) l1_data_sram_free(ptr)
57 # define bfin_mac_alloc(dma_handle, size) \
58 dma_alloc_coherent(NULL, size, dma_handle, GFP_KERNEL)
59 # define bfin_mac_free(dma_handle, ptr) \
60 dma_free_coherent(NULL, sizeof(*ptr), ptr, dma_handle)
63 #define PKT_BUF_SZ 1580
65 #define MAX_TIMEOUT_CNT 500
67 /* pointers to maintain transmit list */
68 static struct net_dma_desc_tx *tx_list_head;
69 static struct net_dma_desc_tx *tx_list_tail;
70 static struct net_dma_desc_rx *rx_list_head;
71 static struct net_dma_desc_rx *rx_list_tail;
72 static struct net_dma_desc_rx *current_rx_ptr;
73 static struct net_dma_desc_tx *current_tx_ptr;
74 static struct net_dma_desc_tx *tx_desc;
75 static struct net_dma_desc_rx *rx_desc;
77 #if defined(CONFIG_BFIN_MAC_RMII)
78 static u16 pin_req[] = P_RMII0;
80 static u16 pin_req[] = P_MII0;
83 static void bfin_mac_disable(void);
84 static void bfin_mac_enable(void);
86 static void desc_list_free(void)
88 struct net_dma_desc_rx *r;
89 struct net_dma_desc_tx *t;
91 #if !defined(CONFIG_BFIN_MAC_USE_L1)
92 dma_addr_t dma_handle = 0;
97 for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
100 dev_kfree_skb(t->skb);
106 bfin_mac_free(dma_handle, tx_desc);
111 for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
114 dev_kfree_skb(r->skb);
120 bfin_mac_free(dma_handle, rx_desc);
124 static int desc_list_init(void)
127 struct sk_buff *new_skb;
128 #if !defined(CONFIG_BFIN_MAC_USE_L1)
130 * This dma_handle is useless in Blackfin dma_alloc_coherent().
131 * The real dma handler is the return value of dma_alloc_coherent().
133 dma_addr_t dma_handle;
136 tx_desc = bfin_mac_alloc(&dma_handle,
137 sizeof(struct net_dma_desc_tx) *
138 CONFIG_BFIN_TX_DESC_NUM);
142 rx_desc = bfin_mac_alloc(&dma_handle,
143 sizeof(struct net_dma_desc_rx) *
144 CONFIG_BFIN_RX_DESC_NUM);
149 tx_list_head = tx_list_tail = tx_desc;
151 for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
152 struct net_dma_desc_tx *t = tx_desc + i;
153 struct dma_descriptor *a = &(t->desc_a);
154 struct dma_descriptor *b = &(t->desc_b);
158 * read from memory WNR = 0
159 * wordsize is 32 bits
160 * 6 half words is desc size
163 a->config = WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
164 a->start_addr = (unsigned long)t->packet;
166 a->next_dma_desc = b;
170 * write to memory WNR = 1
171 * wordsize is 32 bits
173 * 6 half words is desc size
176 b->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
177 b->start_addr = (unsigned long)(&(t->status));
181 tx_list_tail->desc_b.next_dma_desc = a;
182 tx_list_tail->next = t;
185 tx_list_tail->next = tx_list_head; /* tx_list is a circle */
186 tx_list_tail->desc_b.next_dma_desc = &(tx_list_head->desc_a);
187 current_tx_ptr = tx_list_head;
190 rx_list_head = rx_list_tail = rx_desc;
192 for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
193 struct net_dma_desc_rx *r = rx_desc + i;
194 struct dma_descriptor *a = &(r->desc_a);
195 struct dma_descriptor *b = &(r->desc_b);
197 /* allocate a new skb for next time receive */
198 new_skb = dev_alloc_skb(PKT_BUF_SZ + NET_IP_ALIGN);
200 printk(KERN_NOTICE DRV_NAME
201 ": init: low on mem - packet dropped\n");
204 skb_reserve(new_skb, NET_IP_ALIGN);
209 * write to memory WNR = 1
210 * wordsize is 32 bits
212 * 6 half words is desc size
215 a->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
216 /* since RXDWA is enabled */
217 a->start_addr = (unsigned long)new_skb->data - 2;
219 a->next_dma_desc = b;
223 * write to memory WNR = 1
224 * wordsize is 32 bits
226 * 6 half words is desc size
229 b->config = DMAEN | WNR | WDSIZE_32 | DI_EN |
230 NDSIZE_6 | DMAFLOW_LARGE;
231 b->start_addr = (unsigned long)(&(r->status));
234 rx_list_tail->desc_b.next_dma_desc = a;
235 rx_list_tail->next = r;
238 rx_list_tail->next = rx_list_head; /* rx_list is a circle */
239 rx_list_tail->desc_b.next_dma_desc = &(rx_list_head->desc_a);
240 current_rx_ptr = rx_list_head;
246 printk(KERN_ERR DRV_NAME ": kmalloc failed\n");
251 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
256 /* Wait until the previous MDC/MDIO transaction has completed */
257 static void bfin_mdio_poll(void)
259 int timeout_cnt = MAX_TIMEOUT_CNT;
261 /* poll the STABUSY bit */
262 while ((bfin_read_EMAC_STAADD()) & STABUSY) {
264 if (timeout_cnt-- < 0) {
265 printk(KERN_ERR DRV_NAME
266 ": wait MDC/MDIO transaction to complete timeout\n");
272 /* Read an off-chip register in a PHY through the MDC/MDIO port */
273 static int bfin_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
278 bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
279 SET_REGAD((u16) regnum) |
284 return (int) bfin_read_EMAC_STADAT();
287 /* Write an off-chip register in a PHY through the MDC/MDIO port */
288 static int bfin_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
293 bfin_write_EMAC_STADAT((u32) value);
296 bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
297 SET_REGAD((u16) regnum) |
306 static int bfin_mdiobus_reset(struct mii_bus *bus)
311 static void bfin_mac_adjust_link(struct net_device *dev)
313 struct bfin_mac_local *lp = netdev_priv(dev);
314 struct phy_device *phydev = lp->phydev;
318 spin_lock_irqsave(&lp->lock, flags);
320 /* Now we make sure that we can be in full duplex mode.
321 * If not, we operate in half-duplex mode. */
322 if (phydev->duplex != lp->old_duplex) {
323 u32 opmode = bfin_read_EMAC_OPMODE();
331 bfin_write_EMAC_OPMODE(opmode);
332 lp->old_duplex = phydev->duplex;
335 if (phydev->speed != lp->old_speed) {
336 #if defined(CONFIG_BFIN_MAC_RMII)
337 u32 opmode = bfin_read_EMAC_OPMODE();
338 switch (phydev->speed) {
343 opmode &= ~(RMII_10);
347 "%s: Ack! Speed (%d) is not 10/100!\n",
348 DRV_NAME, phydev->speed);
351 bfin_write_EMAC_OPMODE(opmode);
355 lp->old_speed = phydev->speed;
362 } else if (lp->old_link) {
370 u32 opmode = bfin_read_EMAC_OPMODE();
371 phy_print_status(phydev);
372 pr_debug("EMAC_OPMODE = 0x%08x\n", opmode);
375 spin_unlock_irqrestore(&lp->lock, flags);
379 #define MDC_CLK 2500000
381 static int mii_probe(struct net_device *dev)
383 struct bfin_mac_local *lp = netdev_priv(dev);
384 struct phy_device *phydev = NULL;
385 unsigned short sysctl;
389 /* Enable PHY output early */
390 if (!(bfin_read_VR_CTL() & CLKBUFOE))
391 bfin_write_VR_CTL(bfin_read_VR_CTL() | CLKBUFOE);
394 mdc_div = ((sclk / MDC_CLK) / 2) - 1;
396 sysctl = bfin_read_EMAC_SYSCTL();
397 sysctl = (sysctl & ~MDCDIV) | SET_MDCDIV(mdc_div);
398 bfin_write_EMAC_SYSCTL(sysctl);
400 /* search for connect PHY device */
401 for (i = 0; i < PHY_MAX_ADDR; i++) {
402 struct phy_device *const tmp_phydev = lp->mii_bus->phy_map[i];
405 continue; /* no PHY here... */
408 break; /* found it */
411 /* now we are supposed to have a proper phydev, to attach to... */
413 printk(KERN_INFO "%s: Don't found any phy device at all\n",
418 #if defined(CONFIG_BFIN_MAC_RMII)
419 phydev = phy_connect(dev, dev_name(&phydev->dev), &bfin_mac_adjust_link,
420 0, PHY_INTERFACE_MODE_RMII);
422 phydev = phy_connect(dev, dev_name(&phydev->dev), &bfin_mac_adjust_link,
423 0, PHY_INTERFACE_MODE_MII);
426 if (IS_ERR(phydev)) {
427 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
428 return PTR_ERR(phydev);
431 /* mask with MAC supported features */
432 phydev->supported &= (SUPPORTED_10baseT_Half
433 | SUPPORTED_10baseT_Full
434 | SUPPORTED_100baseT_Half
435 | SUPPORTED_100baseT_Full
437 | SUPPORTED_Pause | SUPPORTED_Asym_Pause
441 phydev->advertising = phydev->supported;
448 printk(KERN_INFO "%s: attached PHY driver [%s] "
449 "(mii_bus:phy_addr=%s, irq=%d, mdc_clk=%dHz(mdc_div=%d)"
451 DRV_NAME, phydev->drv->name, dev_name(&phydev->dev), phydev->irq,
452 MDC_CLK, mdc_div, sclk/1000000);
462 bfin_mac_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
464 struct bfin_mac_local *lp = netdev_priv(dev);
467 return phy_ethtool_gset(lp->phydev, cmd);
473 bfin_mac_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
475 struct bfin_mac_local *lp = netdev_priv(dev);
477 if (!capable(CAP_NET_ADMIN))
481 return phy_ethtool_sset(lp->phydev, cmd);
486 static void bfin_mac_ethtool_getdrvinfo(struct net_device *dev,
487 struct ethtool_drvinfo *info)
489 strcpy(info->driver, DRV_NAME);
490 strcpy(info->version, DRV_VERSION);
491 strcpy(info->fw_version, "N/A");
492 strcpy(info->bus_info, dev_name(&dev->dev));
495 static const struct ethtool_ops bfin_mac_ethtool_ops = {
496 .get_settings = bfin_mac_ethtool_getsettings,
497 .set_settings = bfin_mac_ethtool_setsettings,
498 .get_link = ethtool_op_get_link,
499 .get_drvinfo = bfin_mac_ethtool_getdrvinfo,
502 /**************************************************************************/
503 void setup_system_regs(struct net_device *dev)
505 unsigned short sysctl;
508 * Odd word alignment for Receive Frame DMA word
509 * Configure checksum support and rcve frame word alignment
511 sysctl = bfin_read_EMAC_SYSCTL();
512 #if defined(BFIN_MAC_CSUM_OFFLOAD)
513 sysctl |= RXDWA | RXCKS;
517 bfin_write_EMAC_SYSCTL(sysctl);
519 bfin_write_EMAC_MMC_CTL(RSTC | CROLL);
521 /* Initialize the TX DMA channel registers */
522 bfin_write_DMA2_X_COUNT(0);
523 bfin_write_DMA2_X_MODIFY(4);
524 bfin_write_DMA2_Y_COUNT(0);
525 bfin_write_DMA2_Y_MODIFY(0);
527 /* Initialize the RX DMA channel registers */
528 bfin_write_DMA1_X_COUNT(0);
529 bfin_write_DMA1_X_MODIFY(4);
530 bfin_write_DMA1_Y_COUNT(0);
531 bfin_write_DMA1_Y_MODIFY(0);
534 static void setup_mac_addr(u8 *mac_addr)
536 u32 addr_low = le32_to_cpu(*(__le32 *) & mac_addr[0]);
537 u16 addr_hi = le16_to_cpu(*(__le16 *) & mac_addr[4]);
539 /* this depends on a little-endian machine */
540 bfin_write_EMAC_ADDRLO(addr_low);
541 bfin_write_EMAC_ADDRHI(addr_hi);
544 static int bfin_mac_set_mac_address(struct net_device *dev, void *p)
546 struct sockaddr *addr = p;
547 if (netif_running(dev))
549 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
550 setup_mac_addr(dev->dev_addr);
554 static void adjust_tx_list(void)
556 int timeout_cnt = MAX_TIMEOUT_CNT;
558 if (tx_list_head->status.status_word != 0 &&
559 current_tx_ptr != tx_list_head) {
560 goto adjust_head; /* released something, just return; */
564 * if nothing released, check wait condition
565 * current's next can not be the head,
566 * otherwise the dma will not stop as we want
568 if (current_tx_ptr->next->next == tx_list_head) {
569 while (tx_list_head->status.status_word == 0) {
571 if (tx_list_head->status.status_word != 0 ||
572 !(bfin_read_DMA2_IRQ_STATUS() & DMA_RUN)) {
575 if (timeout_cnt-- < 0) {
576 printk(KERN_ERR DRV_NAME
577 ": wait for adjust tx list head timeout\n");
581 if (tx_list_head->status.status_word != 0) {
590 tx_list_head->desc_a.config &= ~DMAEN;
591 tx_list_head->status.status_word = 0;
592 if (tx_list_head->skb) {
593 dev_kfree_skb(tx_list_head->skb);
594 tx_list_head->skb = NULL;
596 printk(KERN_ERR DRV_NAME
597 ": no sk_buff in a transmitted frame!\n");
599 tx_list_head = tx_list_head->next;
600 } while (tx_list_head->status.status_word != 0 &&
601 current_tx_ptr != tx_list_head);
606 static int bfin_mac_hard_start_xmit(struct sk_buff *skb,
607 struct net_device *dev)
610 u32 data_align = (unsigned long)(skb->data) & 0x3;
611 current_tx_ptr->skb = skb;
613 if (data_align == 0x2) {
614 /* move skb->data to current_tx_ptr payload */
615 data = (u16 *)(skb->data) - 1;
616 *data = (u16)(skb->len);
617 current_tx_ptr->desc_a.start_addr = (u32)data;
618 /* this is important! */
619 blackfin_dcache_flush_range((u32)data,
620 (u32)((u8 *)data + skb->len + 4));
622 *((u16 *)(current_tx_ptr->packet)) = (u16)(skb->len);
623 memcpy((u8 *)(current_tx_ptr->packet + 2), skb->data,
625 current_tx_ptr->desc_a.start_addr =
626 (u32)current_tx_ptr->packet;
627 if (current_tx_ptr->status.status_word != 0)
628 current_tx_ptr->status.status_word = 0;
629 blackfin_dcache_flush_range(
630 (u32)current_tx_ptr->packet,
631 (u32)(current_tx_ptr->packet + skb->len + 2));
634 /* make sure the internal data buffers in the core are drained
635 * so that the DMA descriptors are completely written when the
636 * DMA engine goes to fetch them below
640 /* enable this packet's dma */
641 current_tx_ptr->desc_a.config |= DMAEN;
643 /* tx dma is running, just return */
644 if (bfin_read_DMA2_IRQ_STATUS() & DMA_RUN)
647 /* tx dma is not running */
648 bfin_write_DMA2_NEXT_DESC_PTR(&(current_tx_ptr->desc_a));
649 /* dma enabled, read from memory, size is 6 */
650 bfin_write_DMA2_CONFIG(current_tx_ptr->desc_a.config);
651 /* Turn on the EMAC tx */
652 bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE);
656 current_tx_ptr = current_tx_ptr->next;
657 dev->stats.tx_packets++;
658 dev->stats.tx_bytes += (skb->len);
662 static void bfin_mac_rx(struct net_device *dev)
664 struct sk_buff *skb, *new_skb;
667 /* allocate a new skb for next time receive */
668 skb = current_rx_ptr->skb;
669 new_skb = dev_alloc_skb(PKT_BUF_SZ + NET_IP_ALIGN);
671 printk(KERN_NOTICE DRV_NAME
672 ": rx: low on mem - packet dropped\n");
673 dev->stats.rx_dropped++;
676 /* reserve 2 bytes for RXDWA padding */
677 skb_reserve(new_skb, NET_IP_ALIGN);
678 current_rx_ptr->skb = new_skb;
679 current_rx_ptr->desc_a.start_addr = (unsigned long)new_skb->data - 2;
681 /* Invidate the data cache of skb->data range when it is write back
682 * cache. It will prevent overwritting the new data from DMA
684 blackfin_dcache_invalidate_range((unsigned long)new_skb->head,
685 (unsigned long)new_skb->end);
687 len = (unsigned short)((current_rx_ptr->status.status_word) & RX_FRLEN);
689 blackfin_dcache_invalidate_range((unsigned long)skb->head,
690 (unsigned long)skb->tail);
692 skb->protocol = eth_type_trans(skb, dev);
693 #if defined(BFIN_MAC_CSUM_OFFLOAD)
694 skb->csum = current_rx_ptr->status.ip_payload_csum;
695 skb->ip_summed = CHECKSUM_COMPLETE;
699 dev->stats.rx_packets++;
700 dev->stats.rx_bytes += len;
701 current_rx_ptr->status.status_word = 0x00000000;
702 current_rx_ptr = current_rx_ptr->next;
708 /* interrupt routine to handle rx and error signal */
709 static irqreturn_t bfin_mac_interrupt(int irq, void *dev_id)
711 struct net_device *dev = dev_id;
715 if (current_rx_ptr->status.status_word == 0) {
716 /* no more new packet received */
718 if (current_rx_ptr->next->status.status_word != 0) {
719 current_rx_ptr = current_rx_ptr->next;
723 bfin_write_DMA1_IRQ_STATUS(bfin_read_DMA1_IRQ_STATUS() |
734 #ifdef CONFIG_NET_POLL_CONTROLLER
735 static void bfin_mac_poll(struct net_device *dev)
737 disable_irq(IRQ_MAC_RX);
738 bfin_mac_interrupt(IRQ_MAC_RX, dev);
739 enable_irq(IRQ_MAC_RX);
741 #endif /* CONFIG_NET_POLL_CONTROLLER */
743 static void bfin_mac_disable(void)
747 opmode = bfin_read_EMAC_OPMODE();
750 /* Turn off the EMAC */
751 bfin_write_EMAC_OPMODE(opmode);
755 * Enable Interrupts, Receive, and Transmit
757 static void bfin_mac_enable(void)
761 pr_debug("%s: %s\n", DRV_NAME, __func__);
764 bfin_write_DMA1_NEXT_DESC_PTR(&(rx_list_head->desc_a));
765 bfin_write_DMA1_CONFIG(rx_list_head->desc_a.config);
770 /* We enable only RX here */
771 /* ASTP : Enable Automatic Pad Stripping
772 PR : Promiscuous Mode for test
773 PSF : Receive frames with total length less than 64 bytes.
774 FDMODE : Full Duplex Mode
775 LB : Internal Loopback for test
776 RE : Receiver Enable */
777 opmode = bfin_read_EMAC_OPMODE();
781 opmode |= DRO | DC | PSF;
784 #if defined(CONFIG_BFIN_MAC_RMII)
785 opmode |= RMII; /* For Now only 100MBit are supported */
786 #if (defined(CONFIG_BF537) || defined(CONFIG_BF536)) && CONFIG_BF_REV_0_2
790 /* Turn on the EMAC rx */
791 bfin_write_EMAC_OPMODE(opmode);
794 /* Our watchdog timed out. Called by the networking layer */
795 static void bfin_mac_timeout(struct net_device *dev)
797 pr_debug("%s: %s\n", dev->name, __func__);
802 tx_list_tail = tx_list_head->next;
806 /* We can accept TX packets again */
807 dev->trans_start = jiffies; /* prevent tx timeout */
808 netif_wake_queue(dev);
811 static void bfin_mac_multicast_hash(struct net_device *dev)
813 u32 emac_hashhi, emac_hashlo;
814 struct netdev_hw_addr *ha;
818 emac_hashhi = emac_hashlo = 0;
820 netdev_for_each_mc_addr(ha, dev) {
823 /* skip non-multicast addresses */
827 crc = ether_crc(ETH_ALEN, addrs);
831 emac_hashhi |= 1 << (crc & 0x1f);
833 emac_hashlo |= 1 << (crc & 0x1f);
836 bfin_write_EMAC_HASHHI(emac_hashhi);
837 bfin_write_EMAC_HASHLO(emac_hashlo);
843 * This routine will, depending on the values passed to it,
844 * either make it accept multicast packets, go into
845 * promiscuous mode (for TCPDUMP and cousins) or accept
846 * a select set of multicast packets
848 static void bfin_mac_set_multicast_list(struct net_device *dev)
852 if (dev->flags & IFF_PROMISC) {
853 printk(KERN_INFO "%s: set to promisc mode\n", dev->name);
854 sysctl = bfin_read_EMAC_OPMODE();
856 bfin_write_EMAC_OPMODE(sysctl);
857 } else if (dev->flags & IFF_ALLMULTI) {
858 /* accept all multicast */
859 sysctl = bfin_read_EMAC_OPMODE();
861 bfin_write_EMAC_OPMODE(sysctl);
862 } else if (!netdev_mc_empty(dev)) {
863 /* set up multicast hash table */
864 sysctl = bfin_read_EMAC_OPMODE();
866 bfin_write_EMAC_OPMODE(sysctl);
867 bfin_mac_multicast_hash(dev);
869 /* clear promisc or multicast mode */
870 sysctl = bfin_read_EMAC_OPMODE();
871 sysctl &= ~(RAF | PAM);
872 bfin_write_EMAC_OPMODE(sysctl);
877 * this puts the device in an inactive state
879 static void bfin_mac_shutdown(struct net_device *dev)
881 /* Turn off the EMAC */
882 bfin_write_EMAC_OPMODE(0x00000000);
883 /* Turn off the EMAC RX DMA */
884 bfin_write_DMA1_CONFIG(0x0000);
885 bfin_write_DMA2_CONFIG(0x0000);
889 * Open and Initialize the interface
891 * Set up everything, reset the card, etc..
893 static int bfin_mac_open(struct net_device *dev)
895 struct bfin_mac_local *lp = netdev_priv(dev);
897 pr_debug("%s: %s\n", dev->name, __func__);
900 * Check that the address is valid. If its not, refuse
901 * to bring the device up. The user must specify an
902 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
904 if (!is_valid_ether_addr(dev->dev_addr)) {
905 printk(KERN_WARNING DRV_NAME ": no valid ethernet hw addr\n");
909 /* initial rx and tx list */
910 retval = desc_list_init();
915 phy_start(lp->phydev);
916 phy_write(lp->phydev, MII_BMCR, BMCR_RESET);
917 setup_system_regs(dev);
918 setup_mac_addr(dev->dev_addr);
921 pr_debug("hardware init finished\n");
922 netif_start_queue(dev);
923 netif_carrier_on(dev);
929 * this makes the board clean up everything that it can
930 * and not talk to the outside world. Caused by
931 * an 'ifconfig ethX down'
933 static int bfin_mac_close(struct net_device *dev)
935 struct bfin_mac_local *lp = netdev_priv(dev);
936 pr_debug("%s: %s\n", dev->name, __func__);
938 netif_stop_queue(dev);
939 netif_carrier_off(dev);
941 phy_stop(lp->phydev);
942 phy_write(lp->phydev, MII_BMCR, BMCR_PDOWN);
944 /* clear everything */
945 bfin_mac_shutdown(dev);
947 /* free the rx/tx buffers */
953 static const struct net_device_ops bfin_mac_netdev_ops = {
954 .ndo_open = bfin_mac_open,
955 .ndo_stop = bfin_mac_close,
956 .ndo_start_xmit = bfin_mac_hard_start_xmit,
957 .ndo_set_mac_address = bfin_mac_set_mac_address,
958 .ndo_tx_timeout = bfin_mac_timeout,
959 .ndo_set_multicast_list = bfin_mac_set_multicast_list,
960 .ndo_validate_addr = eth_validate_addr,
961 .ndo_change_mtu = eth_change_mtu,
962 #ifdef CONFIG_NET_POLL_CONTROLLER
963 .ndo_poll_controller = bfin_mac_poll,
967 static int __devinit bfin_mac_probe(struct platform_device *pdev)
969 struct net_device *ndev;
970 struct bfin_mac_local *lp;
971 struct platform_device *pd;
974 ndev = alloc_etherdev(sizeof(struct bfin_mac_local));
976 dev_err(&pdev->dev, "Cannot allocate net device!\n");
980 SET_NETDEV_DEV(ndev, &pdev->dev);
981 platform_set_drvdata(pdev, ndev);
982 lp = netdev_priv(ndev);
984 /* Grab the MAC address in the MAC */
985 *(__le32 *) (&(ndev->dev_addr[0])) = cpu_to_le32(bfin_read_EMAC_ADDRLO());
986 *(__le16 *) (&(ndev->dev_addr[4])) = cpu_to_le16((u16) bfin_read_EMAC_ADDRHI());
989 /*todo: how to proble? which is revision_register */
990 bfin_write_EMAC_ADDRLO(0x12345678);
991 if (bfin_read_EMAC_ADDRLO() != 0x12345678) {
992 dev_err(&pdev->dev, "Cannot detect Blackfin on-chip ethernet MAC controller!\n");
994 goto out_err_probe_mac;
999 * Is it valid? (Did bootloader initialize it?)
1000 * Grab the MAC from the board somehow
1001 * this is done in the arch/blackfin/mach-bfxxx/boards/eth_mac.c
1003 if (!is_valid_ether_addr(ndev->dev_addr))
1004 bfin_get_ether_addr(ndev->dev_addr);
1006 /* If still not valid, get a random one */
1007 if (!is_valid_ether_addr(ndev->dev_addr))
1008 random_ether_addr(ndev->dev_addr);
1010 setup_mac_addr(ndev->dev_addr);
1012 if (!pdev->dev.platform_data) {
1013 dev_err(&pdev->dev, "Cannot get platform device bfin_mii_bus!\n");
1015 goto out_err_probe_mac;
1017 pd = pdev->dev.platform_data;
1018 lp->mii_bus = platform_get_drvdata(pd);
1019 lp->mii_bus->priv = ndev;
1021 rc = mii_probe(ndev);
1023 dev_err(&pdev->dev, "MII Probe failed!\n");
1024 goto out_err_mii_probe;
1027 /* Fill in the fields of the device structure with ethernet values. */
1030 ndev->netdev_ops = &bfin_mac_netdev_ops;
1031 ndev->ethtool_ops = &bfin_mac_ethtool_ops;
1033 spin_lock_init(&lp->lock);
1035 /* now, enable interrupts */
1036 /* register irq handler */
1037 rc = request_irq(IRQ_MAC_RX, bfin_mac_interrupt,
1038 IRQF_DISABLED, "EMAC_RX", ndev);
1040 dev_err(&pdev->dev, "Cannot request Blackfin MAC RX IRQ!\n");
1042 goto out_err_request_irq;
1045 rc = register_netdev(ndev);
1047 dev_err(&pdev->dev, "Cannot register net device!\n");
1048 goto out_err_reg_ndev;
1051 /* now, print out the card info, in a short format.. */
1052 dev_info(&pdev->dev, "%s, Version %s\n", DRV_DESC, DRV_VERSION);
1057 free_irq(IRQ_MAC_RX, ndev);
1058 out_err_request_irq:
1060 mdiobus_unregister(lp->mii_bus);
1061 mdiobus_free(lp->mii_bus);
1062 peripheral_free_list(pin_req);
1064 platform_set_drvdata(pdev, NULL);
1070 static int __devexit bfin_mac_remove(struct platform_device *pdev)
1072 struct net_device *ndev = platform_get_drvdata(pdev);
1073 struct bfin_mac_local *lp = netdev_priv(ndev);
1075 platform_set_drvdata(pdev, NULL);
1077 lp->mii_bus->priv = NULL;
1079 unregister_netdev(ndev);
1081 free_irq(IRQ_MAC_RX, ndev);
1085 peripheral_free_list(pin_req);
1091 static int bfin_mac_suspend(struct platform_device *pdev, pm_message_t mesg)
1093 struct net_device *net_dev = platform_get_drvdata(pdev);
1095 if (netif_running(net_dev))
1096 bfin_mac_close(net_dev);
1101 static int bfin_mac_resume(struct platform_device *pdev)
1103 struct net_device *net_dev = platform_get_drvdata(pdev);
1105 if (netif_running(net_dev))
1106 bfin_mac_open(net_dev);
1111 #define bfin_mac_suspend NULL
1112 #define bfin_mac_resume NULL
1113 #endif /* CONFIG_PM */
1115 static int __devinit bfin_mii_bus_probe(struct platform_device *pdev)
1117 struct mii_bus *miibus;
1121 * We are setting up a network card,
1122 * so set the GPIO pins to Ethernet mode
1124 rc = peripheral_request_list(pin_req, DRV_NAME);
1126 dev_err(&pdev->dev, "Requesting peripherals failed!\n");
1131 miibus = mdiobus_alloc();
1134 miibus->read = bfin_mdiobus_read;
1135 miibus->write = bfin_mdiobus_write;
1136 miibus->reset = bfin_mdiobus_reset;
1138 miibus->parent = &pdev->dev;
1139 miibus->name = "bfin_mii_bus";
1140 snprintf(miibus->id, MII_BUS_ID_SIZE, "0");
1141 miibus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
1142 if (miibus->irq == NULL)
1144 for (i = 0; i < PHY_MAX_ADDR; ++i)
1145 miibus->irq[i] = PHY_POLL;
1147 rc = mdiobus_register(miibus);
1149 dev_err(&pdev->dev, "Cannot register MDIO bus!\n");
1150 goto out_err_mdiobus_register;
1153 platform_set_drvdata(pdev, miibus);
1156 out_err_mdiobus_register:
1157 mdiobus_free(miibus);
1159 peripheral_free_list(pin_req);
1164 static int __devexit bfin_mii_bus_remove(struct platform_device *pdev)
1166 struct mii_bus *miibus = platform_get_drvdata(pdev);
1167 platform_set_drvdata(pdev, NULL);
1168 mdiobus_unregister(miibus);
1169 mdiobus_free(miibus);
1170 peripheral_free_list(pin_req);
1174 static struct platform_driver bfin_mii_bus_driver = {
1175 .probe = bfin_mii_bus_probe,
1176 .remove = __devexit_p(bfin_mii_bus_remove),
1178 .name = "bfin_mii_bus",
1179 .owner = THIS_MODULE,
1183 static struct platform_driver bfin_mac_driver = {
1184 .probe = bfin_mac_probe,
1185 .remove = __devexit_p(bfin_mac_remove),
1186 .resume = bfin_mac_resume,
1187 .suspend = bfin_mac_suspend,
1190 .owner = THIS_MODULE,
1194 static int __init bfin_mac_init(void)
1197 ret = platform_driver_register(&bfin_mii_bus_driver);
1199 return platform_driver_register(&bfin_mac_driver);
1203 module_init(bfin_mac_init);
1205 static void __exit bfin_mac_cleanup(void)
1207 platform_driver_unregister(&bfin_mac_driver);
1208 platform_driver_unregister(&bfin_mii_bus_driver);
1211 module_exit(bfin_mac_cleanup);