2 * Linux network driver for Brocade Converged Network Adapter.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License (GPL) Version 2 as
6 * published by the Free Software Foundation
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
11 * General Public License for more details.
14 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
18 #include <linux/netdevice.h>
19 #include <linux/skbuff.h>
20 #include <linux/etherdevice.h>
22 #include <linux/ethtool.h>
23 #include <linux/if_vlan.h>
24 #include <linux/if_ether.h>
31 static DEFINE_MUTEX(bnad_fwimg_mutex);
36 static uint bnad_msix_disable;
37 module_param(bnad_msix_disable, uint, 0444);
38 MODULE_PARM_DESC(bnad_msix_disable, "Disable MSIX mode");
40 static uint bnad_ioc_auto_recover = 1;
41 module_param(bnad_ioc_auto_recover, uint, 0444);
42 MODULE_PARM_DESC(bnad_ioc_auto_recover, "Enable / Disable auto recovery");
47 u32 bnad_rxqs_per_cq = 2;
49 static const u8 bnad_bcast_addr[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
54 #define BNAD_TX_UNMAPQ_DEPTH (bnad->txq_depth * 2)
56 #define BNAD_RX_UNMAPQ_DEPTH (bnad->rxq_depth)
58 #define BNAD_GET_MBOX_IRQ(_bnad) \
59 (((_bnad)->cfg_flags & BNAD_CF_MSIX) ? \
60 ((_bnad)->msix_table[(_bnad)->msix_num - 1].vector) : \
61 ((_bnad)->pcidev->irq))
63 #define BNAD_FILL_UNMAPQ_MEM_REQ(_res_info, _num, _depth) \
65 (_res_info)->res_type = BNA_RES_T_MEM; \
66 (_res_info)->res_u.mem_info.mem_type = BNA_MEM_T_KVA; \
67 (_res_info)->res_u.mem_info.num = (_num); \
68 (_res_info)->res_u.mem_info.len = \
69 sizeof(struct bnad_unmap_q) + \
70 (sizeof(struct bnad_skb_unmap) * ((_depth) - 1)); \
73 #define BNAD_TXRX_SYNC_MDELAY 250 /* 250 msecs */
76 * Reinitialize completions in CQ, once Rx is taken down
79 bnad_cq_cmpl_init(struct bnad *bnad, struct bna_ccb *ccb)
81 struct bna_cq_entry *cmpl, *next_cmpl;
82 unsigned int wi_range, wis = 0, ccb_prod = 0;
85 BNA_CQ_QPGE_PTR_GET(ccb_prod, ccb->sw_qpt, cmpl,
88 for (i = 0; i < ccb->q_depth; i++) {
90 if (likely(--wi_range))
93 BNA_QE_INDX_ADD(ccb_prod, wis, ccb->q_depth);
95 BNA_CQ_QPGE_PTR_GET(ccb_prod, ccb->sw_qpt,
104 * Frees all pending Tx Bufs
105 * At this point no activity is expected on the Q,
106 * so DMA unmap & freeing is fine.
109 bnad_free_all_txbufs(struct bnad *bnad,
113 struct bnad_unmap_q *unmap_q = tcb->unmap_q;
114 struct bnad_skb_unmap *unmap_array;
115 struct sk_buff *skb = NULL;
118 unmap_array = unmap_q->unmap_array;
121 while (unmap_cons < unmap_q->q_depth) {
122 skb = unmap_array[unmap_cons].skb;
127 unmap_array[unmap_cons].skb = NULL;
129 dma_unmap_single(&bnad->pcidev->dev,
130 dma_unmap_addr(&unmap_array[unmap_cons],
131 dma_addr), skb_headlen(skb),
134 dma_unmap_addr_set(&unmap_array[unmap_cons], dma_addr, 0);
135 if (++unmap_cons >= unmap_q->q_depth)
138 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
139 dma_unmap_page(&bnad->pcidev->dev,
140 dma_unmap_addr(&unmap_array[unmap_cons],
142 skb_shinfo(skb)->frags[i].size,
144 dma_unmap_addr_set(&unmap_array[unmap_cons], dma_addr,
146 if (++unmap_cons >= unmap_q->q_depth)
149 dev_kfree_skb_any(skb);
153 /* Data Path Handlers */
156 * bnad_free_txbufs : Frees the Tx bufs on Tx completion
157 * Can be called in a) Interrupt context
162 bnad_free_txbufs(struct bnad *bnad,
165 u32 sent_packets = 0, sent_bytes = 0;
166 u16 wis, unmap_cons, updated_hw_cons;
167 struct bnad_unmap_q *unmap_q = tcb->unmap_q;
168 struct bnad_skb_unmap *unmap_array;
173 * Just return if TX is stopped. This check is useful
174 * when bnad_free_txbufs() runs out of a tasklet scheduled
175 * before bnad_cb_tx_cleanup() cleared BNAD_TXQ_TX_STARTED bit
176 * but this routine runs actually after the cleanup has been
179 if (!test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags))
182 updated_hw_cons = *(tcb->hw_consumer_index);
184 wis = BNA_Q_INDEX_CHANGE(tcb->consumer_index,
185 updated_hw_cons, tcb->q_depth);
187 BUG_ON(!(wis <= BNA_QE_IN_USE_CNT(tcb, tcb->q_depth)));
189 unmap_array = unmap_q->unmap_array;
190 unmap_cons = unmap_q->consumer_index;
192 prefetch(&unmap_array[unmap_cons + 1]);
194 skb = unmap_array[unmap_cons].skb;
196 unmap_array[unmap_cons].skb = NULL;
199 sent_bytes += skb->len;
200 wis -= BNA_TXQ_WI_NEEDED(1 + skb_shinfo(skb)->nr_frags);
202 dma_unmap_single(&bnad->pcidev->dev,
203 dma_unmap_addr(&unmap_array[unmap_cons],
204 dma_addr), skb_headlen(skb),
206 dma_unmap_addr_set(&unmap_array[unmap_cons], dma_addr, 0);
207 BNA_QE_INDX_ADD(unmap_cons, 1, unmap_q->q_depth);
209 prefetch(&unmap_array[unmap_cons + 1]);
210 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
211 prefetch(&unmap_array[unmap_cons + 1]);
213 dma_unmap_page(&bnad->pcidev->dev,
214 dma_unmap_addr(&unmap_array[unmap_cons],
216 skb_shinfo(skb)->frags[i].size,
218 dma_unmap_addr_set(&unmap_array[unmap_cons], dma_addr,
220 BNA_QE_INDX_ADD(unmap_cons, 1, unmap_q->q_depth);
222 dev_kfree_skb_any(skb);
225 /* Update consumer pointers. */
226 tcb->consumer_index = updated_hw_cons;
227 unmap_q->consumer_index = unmap_cons;
229 tcb->txq->tx_packets += sent_packets;
230 tcb->txq->tx_bytes += sent_bytes;
235 /* Tx Free Tasklet function */
236 /* Frees for all the tcb's in all the Tx's */
238 * Scheduled from sending context, so that
239 * the fat Tx lock is not held for too long
240 * in the sending context.
243 bnad_tx_free_tasklet(unsigned long bnad_ptr)
245 struct bnad *bnad = (struct bnad *)bnad_ptr;
250 for (i = 0; i < bnad->num_tx; i++) {
251 for (j = 0; j < bnad->num_txq_per_tx; j++) {
252 tcb = bnad->tx_info[i].tcb[j];
255 if (((u16) (*tcb->hw_consumer_index) !=
256 tcb->consumer_index) &&
257 (!test_and_set_bit(BNAD_TXQ_FREE_SENT,
259 acked = bnad_free_txbufs(bnad, tcb);
260 if (likely(test_bit(BNAD_TXQ_TX_STARTED,
262 bna_ib_ack(tcb->i_dbell, acked);
263 smp_mb__before_clear_bit();
264 clear_bit(BNAD_TXQ_FREE_SENT, &tcb->flags);
266 if (unlikely(!test_bit(BNAD_TXQ_TX_STARTED,
269 if (netif_queue_stopped(bnad->netdev)) {
270 if (acked && netif_carrier_ok(bnad->netdev) &&
271 BNA_QE_FREE_CNT(tcb, tcb->q_depth) >=
272 BNAD_NETIF_WAKE_THRESHOLD) {
273 netif_wake_queue(bnad->netdev);
275 /* Counters for individual TxQs? */
276 BNAD_UPDATE_CTR(bnad,
285 bnad_tx(struct bnad *bnad, struct bna_tcb *tcb)
287 struct net_device *netdev = bnad->netdev;
290 if (test_and_set_bit(BNAD_TXQ_FREE_SENT, &tcb->flags))
293 sent = bnad_free_txbufs(bnad, tcb);
295 if (netif_queue_stopped(netdev) &&
296 netif_carrier_ok(netdev) &&
297 BNA_QE_FREE_CNT(tcb, tcb->q_depth) >=
298 BNAD_NETIF_WAKE_THRESHOLD) {
299 if (test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags)) {
300 netif_wake_queue(netdev);
301 BNAD_UPDATE_CTR(bnad, netif_queue_wakeup);
306 if (likely(test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags)))
307 bna_ib_ack(tcb->i_dbell, sent);
309 smp_mb__before_clear_bit();
310 clear_bit(BNAD_TXQ_FREE_SENT, &tcb->flags);
315 /* MSIX Tx Completion Handler */
317 bnad_msix_tx(int irq, void *data)
319 struct bna_tcb *tcb = (struct bna_tcb *)data;
320 struct bnad *bnad = tcb->bnad;
328 bnad_reset_rcb(struct bnad *bnad, struct bna_rcb *rcb)
330 struct bnad_unmap_q *unmap_q = rcb->unmap_q;
332 rcb->producer_index = 0;
333 rcb->consumer_index = 0;
335 unmap_q->producer_index = 0;
336 unmap_q->consumer_index = 0;
340 bnad_free_all_rxbufs(struct bnad *bnad, struct bna_rcb *rcb)
342 struct bnad_unmap_q *unmap_q;
343 struct bnad_skb_unmap *unmap_array;
347 unmap_q = rcb->unmap_q;
348 unmap_array = unmap_q->unmap_array;
349 for (unmap_cons = 0; unmap_cons < unmap_q->q_depth; unmap_cons++) {
350 skb = unmap_array[unmap_cons].skb;
353 unmap_array[unmap_cons].skb = NULL;
354 dma_unmap_single(&bnad->pcidev->dev,
355 dma_unmap_addr(&unmap_array[unmap_cons],
357 rcb->rxq->buffer_size,
361 bnad_reset_rcb(bnad, rcb);
365 bnad_alloc_n_post_rxbufs(struct bnad *bnad, struct bna_rcb *rcb)
367 u16 to_alloc, alloced, unmap_prod, wi_range;
368 struct bnad_unmap_q *unmap_q = rcb->unmap_q;
369 struct bnad_skb_unmap *unmap_array;
370 struct bna_rxq_entry *rxent;
376 BNA_QE_FREE_CNT(unmap_q, unmap_q->q_depth);
378 unmap_array = unmap_q->unmap_array;
379 unmap_prod = unmap_q->producer_index;
381 BNA_RXQ_QPGE_PTR_GET(unmap_prod, rcb->sw_qpt, rxent, wi_range);
385 BNA_RXQ_QPGE_PTR_GET(unmap_prod, rcb->sw_qpt, rxent,
388 skb = alloc_skb(rcb->rxq->buffer_size + NET_IP_ALIGN,
390 if (unlikely(!skb)) {
391 BNAD_UPDATE_CTR(bnad, rxbuf_alloc_failed);
394 skb->dev = bnad->netdev;
395 skb_reserve(skb, NET_IP_ALIGN);
396 unmap_array[unmap_prod].skb = skb;
397 dma_addr = dma_map_single(&bnad->pcidev->dev, skb->data,
398 rcb->rxq->buffer_size,
400 dma_unmap_addr_set(&unmap_array[unmap_prod], dma_addr,
402 BNA_SET_DMA_ADDR(dma_addr, &rxent->host_addr);
403 BNA_QE_INDX_ADD(unmap_prod, 1, unmap_q->q_depth);
411 if (likely(alloced)) {
412 unmap_q->producer_index = unmap_prod;
413 rcb->producer_index = unmap_prod;
415 if (likely(test_bit(BNAD_RXQ_STARTED, &rcb->flags)))
416 bna_rxq_prod_indx_doorbell(rcb);
421 bnad_refill_rxq(struct bnad *bnad, struct bna_rcb *rcb)
423 struct bnad_unmap_q *unmap_q = rcb->unmap_q;
425 if (!test_and_set_bit(BNAD_RXQ_REFILL, &rcb->flags)) {
426 if (BNA_QE_FREE_CNT(unmap_q, unmap_q->q_depth)
427 >> BNAD_RXQ_REFILL_THRESHOLD_SHIFT)
428 bnad_alloc_n_post_rxbufs(bnad, rcb);
429 smp_mb__before_clear_bit();
430 clear_bit(BNAD_RXQ_REFILL, &rcb->flags);
435 bnad_poll_cq(struct bnad *bnad, struct bna_ccb *ccb, int budget)
437 struct bna_cq_entry *cmpl, *next_cmpl;
438 struct bna_rcb *rcb = NULL;
439 unsigned int wi_range, packets = 0, wis = 0;
440 struct bnad_unmap_q *unmap_q;
441 struct bnad_skb_unmap *unmap_array;
443 u32 flags, unmap_cons;
444 u32 qid0 = ccb->rcb[0]->rxq->rxq_id;
445 struct bna_pkt_rate *pkt_rt = &ccb->pkt_rate;
447 if (!test_bit(BNAD_RXQ_STARTED, &ccb->rcb[0]->flags))
450 prefetch(bnad->netdev);
451 BNA_CQ_QPGE_PTR_GET(ccb->producer_index, ccb->sw_qpt, cmpl,
453 BUG_ON(!(wi_range <= ccb->q_depth));
454 while (cmpl->valid && packets < budget) {
456 BNA_UPDATE_PKT_CNT(pkt_rt, ntohs(cmpl->length));
458 if (qid0 == cmpl->rxq_id)
463 unmap_q = rcb->unmap_q;
464 unmap_array = unmap_q->unmap_array;
465 unmap_cons = unmap_q->consumer_index;
467 skb = unmap_array[unmap_cons].skb;
469 unmap_array[unmap_cons].skb = NULL;
470 dma_unmap_single(&bnad->pcidev->dev,
471 dma_unmap_addr(&unmap_array[unmap_cons],
473 rcb->rxq->buffer_size,
475 BNA_QE_INDX_ADD(unmap_q->consumer_index, 1, unmap_q->q_depth);
477 /* Should be more efficient ? Performance ? */
478 BNA_QE_INDX_ADD(rcb->consumer_index, 1, rcb->q_depth);
481 if (likely(--wi_range))
482 next_cmpl = cmpl + 1;
484 BNA_QE_INDX_ADD(ccb->producer_index, wis, ccb->q_depth);
486 BNA_CQ_QPGE_PTR_GET(ccb->producer_index, ccb->sw_qpt,
487 next_cmpl, wi_range);
488 BUG_ON(!(wi_range <= ccb->q_depth));
492 flags = ntohl(cmpl->flags);
495 (BNA_CQ_EF_MAC_ERROR | BNA_CQ_EF_FCS_ERROR |
496 BNA_CQ_EF_TOO_LONG))) {
497 dev_kfree_skb_any(skb);
498 rcb->rxq->rx_packets_with_error++;
502 skb_put(skb, ntohs(cmpl->length));
505 (((flags & BNA_CQ_EF_IPV4) &&
506 (flags & BNA_CQ_EF_L3_CKSUM_OK)) ||
507 (flags & BNA_CQ_EF_IPV6)) &&
508 (flags & (BNA_CQ_EF_TCP | BNA_CQ_EF_UDP)) &&
509 (flags & BNA_CQ_EF_L4_CKSUM_OK)))
510 skb->ip_summed = CHECKSUM_UNNECESSARY;
512 skb_checksum_none_assert(skb);
514 rcb->rxq->rx_packets++;
515 rcb->rxq->rx_bytes += skb->len;
516 skb->protocol = eth_type_trans(skb, bnad->netdev);
518 if (bnad->vlan_grp && (flags & BNA_CQ_EF_VLAN)) {
519 struct bnad_rx_ctrl *rx_ctrl =
520 (struct bnad_rx_ctrl *)ccb->ctrl;
521 if (skb->ip_summed == CHECKSUM_UNNECESSARY)
522 vlan_gro_receive(&rx_ctrl->napi, bnad->vlan_grp,
523 ntohs(cmpl->vlan_tag), skb);
525 vlan_hwaccel_receive_skb(skb,
527 ntohs(cmpl->vlan_tag));
529 } else { /* Not VLAN tagged/stripped */
530 struct bnad_rx_ctrl *rx_ctrl =
531 (struct bnad_rx_ctrl *)ccb->ctrl;
532 if (skb->ip_summed == CHECKSUM_UNNECESSARY)
533 napi_gro_receive(&rx_ctrl->napi, skb);
535 netif_receive_skb(skb);
543 BNA_QE_INDX_ADD(ccb->producer_index, wis, ccb->q_depth);
546 if (likely(test_bit(BNAD_RXQ_STARTED, &ccb->rcb[0]->flags)))
547 bna_ib_ack(ccb->i_dbell, packets);
548 bnad_refill_rxq(bnad, ccb->rcb[0]);
550 bnad_refill_rxq(bnad, ccb->rcb[1]);
552 if (likely(test_bit(BNAD_RXQ_STARTED, &ccb->rcb[0]->flags)))
553 bna_ib_ack(ccb->i_dbell, 0);
560 bnad_disable_rx_irq(struct bnad *bnad, struct bna_ccb *ccb)
562 if (unlikely(!test_bit(BNAD_RXQ_STARTED, &ccb->rcb[0]->flags)))
565 bna_ib_coalescing_timer_set(ccb->i_dbell, 0);
566 bna_ib_ack(ccb->i_dbell, 0);
570 bnad_enable_rx_irq(struct bnad *bnad, struct bna_ccb *ccb)
574 /* Because of polling context */
575 spin_lock_irqsave(&bnad->bna_lock, flags);
576 bnad_enable_rx_irq_unsafe(ccb);
577 spin_unlock_irqrestore(&bnad->bna_lock, flags);
581 bnad_netif_rx_schedule_poll(struct bnad *bnad, struct bna_ccb *ccb)
583 struct bnad_rx_ctrl *rx_ctrl = (struct bnad_rx_ctrl *)(ccb->ctrl);
584 struct napi_struct *napi = &rx_ctrl->napi;
586 if (likely(napi_schedule_prep(napi))) {
587 bnad_disable_rx_irq(bnad, ccb);
588 __napi_schedule(napi);
590 BNAD_UPDATE_CTR(bnad, netif_rx_schedule);
593 /* MSIX Rx Path Handler */
595 bnad_msix_rx(int irq, void *data)
597 struct bna_ccb *ccb = (struct bna_ccb *)data;
598 struct bnad *bnad = ccb->bnad;
600 bnad_netif_rx_schedule_poll(bnad, ccb);
605 /* Interrupt handlers */
607 /* Mbox Interrupt Handlers */
609 bnad_msix_mbox_handler(int irq, void *data)
613 struct bnad *bnad = (struct bnad *)data;
615 if (unlikely(test_bit(BNAD_RF_MBOX_IRQ_DISABLED, &bnad->run_flags)))
618 spin_lock_irqsave(&bnad->bna_lock, flags);
620 bna_intr_status_get(&bnad->bna, intr_status);
622 if (BNA_IS_MBOX_ERR_INTR(intr_status))
623 bna_mbox_handler(&bnad->bna, intr_status);
625 spin_unlock_irqrestore(&bnad->bna_lock, flags);
631 bnad_isr(int irq, void *data)
636 struct bnad *bnad = (struct bnad *)data;
637 struct bnad_rx_info *rx_info;
638 struct bnad_rx_ctrl *rx_ctrl;
640 if (unlikely(test_bit(BNAD_RF_MBOX_IRQ_DISABLED, &bnad->run_flags)))
643 bna_intr_status_get(&bnad->bna, intr_status);
645 if (unlikely(!intr_status))
648 spin_lock_irqsave(&bnad->bna_lock, flags);
650 if (BNA_IS_MBOX_ERR_INTR(intr_status))
651 bna_mbox_handler(&bnad->bna, intr_status);
653 spin_unlock_irqrestore(&bnad->bna_lock, flags);
655 if (!BNA_IS_INTX_DATA_INTR(intr_status))
658 /* Process data interrupts */
660 for (i = 0; i < bnad->num_tx; i++) {
661 for (j = 0; j < bnad->num_txq_per_tx; j++)
662 bnad_tx(bnad, bnad->tx_info[i].tcb[j]);
665 for (i = 0; i < bnad->num_rx; i++) {
666 rx_info = &bnad->rx_info[i];
669 for (j = 0; j < bnad->num_rxp_per_rx; j++) {
670 rx_ctrl = &rx_info->rx_ctrl[j];
672 bnad_netif_rx_schedule_poll(bnad,
680 * Called in interrupt / callback context
681 * with bna_lock held, so cfg_flags access is OK
684 bnad_enable_mbox_irq(struct bnad *bnad)
686 clear_bit(BNAD_RF_MBOX_IRQ_DISABLED, &bnad->run_flags);
688 BNAD_UPDATE_CTR(bnad, mbox_intr_enabled);
692 * Called with bnad->bna_lock held b'cos of
693 * bnad->cfg_flags access.
696 bnad_disable_mbox_irq(struct bnad *bnad)
698 set_bit(BNAD_RF_MBOX_IRQ_DISABLED, &bnad->run_flags);
700 BNAD_UPDATE_CTR(bnad, mbox_intr_disabled);
704 bnad_set_netdev_perm_addr(struct bnad *bnad)
706 struct net_device *netdev = bnad->netdev;
708 memcpy(netdev->perm_addr, &bnad->perm_addr, netdev->addr_len);
709 if (is_zero_ether_addr(netdev->dev_addr))
710 memcpy(netdev->dev_addr, &bnad->perm_addr, netdev->addr_len);
713 /* Control Path Handlers */
717 bnad_cb_device_enable_mbox_intr(struct bnad *bnad)
719 bnad_enable_mbox_irq(bnad);
723 bnad_cb_device_disable_mbox_intr(struct bnad *bnad)
725 bnad_disable_mbox_irq(bnad);
729 bnad_cb_device_enabled(struct bnad *bnad, enum bna_cb_status status)
731 complete(&bnad->bnad_completions.ioc_comp);
732 bnad->bnad_completions.ioc_comp_status = status;
736 bnad_cb_device_disabled(struct bnad *bnad, enum bna_cb_status status)
738 complete(&bnad->bnad_completions.ioc_comp);
739 bnad->bnad_completions.ioc_comp_status = status;
743 bnad_cb_port_disabled(void *arg, enum bna_cb_status status)
745 struct bnad *bnad = (struct bnad *)arg;
747 complete(&bnad->bnad_completions.port_comp);
749 netif_carrier_off(bnad->netdev);
753 bnad_cb_port_link_status(struct bnad *bnad,
754 enum bna_link_status link_status)
758 link_up = (link_status == BNA_LINK_UP) || (link_status == BNA_CEE_UP);
760 if (link_status == BNA_CEE_UP) {
761 set_bit(BNAD_RF_CEE_RUNNING, &bnad->run_flags);
762 BNAD_UPDATE_CTR(bnad, cee_up);
764 clear_bit(BNAD_RF_CEE_RUNNING, &bnad->run_flags);
767 if (!netif_carrier_ok(bnad->netdev)) {
768 struct bna_tcb *tcb = bnad->tx_info[0].tcb[0];
771 pr_warn("bna: %s link up\n",
773 netif_carrier_on(bnad->netdev);
774 BNAD_UPDATE_CTR(bnad, link_toggle);
775 if (test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags)) {
776 /* Force an immediate Transmit Schedule */
777 pr_info("bna: %s TX_STARTED\n",
779 netif_wake_queue(bnad->netdev);
780 BNAD_UPDATE_CTR(bnad, netif_queue_wakeup);
782 netif_stop_queue(bnad->netdev);
783 BNAD_UPDATE_CTR(bnad, netif_queue_stop);
787 if (netif_carrier_ok(bnad->netdev)) {
788 pr_warn("bna: %s link down\n",
790 netif_carrier_off(bnad->netdev);
791 BNAD_UPDATE_CTR(bnad, link_toggle);
797 bnad_cb_tx_disabled(void *arg, struct bna_tx *tx,
798 enum bna_cb_status status)
800 struct bnad *bnad = (struct bnad *)arg;
802 complete(&bnad->bnad_completions.tx_comp);
806 bnad_cb_tcb_setup(struct bnad *bnad, struct bna_tcb *tcb)
808 struct bnad_tx_info *tx_info =
809 (struct bnad_tx_info *)tcb->txq->tx->priv;
810 struct bnad_unmap_q *unmap_q = tcb->unmap_q;
812 tx_info->tcb[tcb->id] = tcb;
813 unmap_q->producer_index = 0;
814 unmap_q->consumer_index = 0;
815 unmap_q->q_depth = BNAD_TX_UNMAPQ_DEPTH;
819 bnad_cb_tcb_destroy(struct bnad *bnad, struct bna_tcb *tcb)
821 struct bnad_tx_info *tx_info =
822 (struct bnad_tx_info *)tcb->txq->tx->priv;
823 struct bnad_unmap_q *unmap_q = tcb->unmap_q;
825 while (test_and_set_bit(BNAD_TXQ_FREE_SENT, &tcb->flags))
828 bnad_free_all_txbufs(bnad, tcb);
830 unmap_q->producer_index = 0;
831 unmap_q->consumer_index = 0;
833 smp_mb__before_clear_bit();
834 clear_bit(BNAD_TXQ_FREE_SENT, &tcb->flags);
836 tx_info->tcb[tcb->id] = NULL;
840 bnad_cb_rcb_setup(struct bnad *bnad, struct bna_rcb *rcb)
842 struct bnad_unmap_q *unmap_q = rcb->unmap_q;
844 unmap_q->producer_index = 0;
845 unmap_q->consumer_index = 0;
846 unmap_q->q_depth = BNAD_RX_UNMAPQ_DEPTH;
850 bnad_cb_rcb_destroy(struct bnad *bnad, struct bna_rcb *rcb)
852 bnad_free_all_rxbufs(bnad, rcb);
856 bnad_cb_ccb_setup(struct bnad *bnad, struct bna_ccb *ccb)
858 struct bnad_rx_info *rx_info =
859 (struct bnad_rx_info *)ccb->cq->rx->priv;
861 rx_info->rx_ctrl[ccb->id].ccb = ccb;
862 ccb->ctrl = &rx_info->rx_ctrl[ccb->id];
866 bnad_cb_ccb_destroy(struct bnad *bnad, struct bna_ccb *ccb)
868 struct bnad_rx_info *rx_info =
869 (struct bnad_rx_info *)ccb->cq->rx->priv;
871 rx_info->rx_ctrl[ccb->id].ccb = NULL;
875 bnad_cb_tx_stall(struct bnad *bnad, struct bna_tcb *tcb)
877 struct bnad_tx_info *tx_info =
878 (struct bnad_tx_info *)tcb->txq->tx->priv;
880 if (tx_info != &bnad->tx_info[0])
883 clear_bit(BNAD_TXQ_TX_STARTED, &tcb->flags);
884 netif_stop_queue(bnad->netdev);
885 pr_info("bna: %s TX_STOPPED\n", bnad->netdev->name);
889 bnad_cb_tx_resume(struct bnad *bnad, struct bna_tcb *tcb)
891 struct bnad_unmap_q *unmap_q = tcb->unmap_q;
893 if (test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags))
896 clear_bit(BNAD_RF_TX_SHUTDOWN_DELAYED, &bnad->run_flags);
898 while (test_and_set_bit(BNAD_TXQ_FREE_SENT, &tcb->flags))
901 bnad_free_all_txbufs(bnad, tcb);
903 unmap_q->producer_index = 0;
904 unmap_q->consumer_index = 0;
906 smp_mb__before_clear_bit();
907 clear_bit(BNAD_TXQ_FREE_SENT, &tcb->flags);
910 * Workaround for first device enable failure & we
911 * get a 0 MAC address. We try to get the MAC address
914 if (is_zero_ether_addr(&bnad->perm_addr.mac[0])) {
915 bna_port_mac_get(&bnad->bna.port, &bnad->perm_addr);
916 bnad_set_netdev_perm_addr(bnad);
919 set_bit(BNAD_TXQ_TX_STARTED, &tcb->flags);
921 if (netif_carrier_ok(bnad->netdev)) {
922 pr_info("bna: %s TX_STARTED\n", bnad->netdev->name);
923 netif_wake_queue(bnad->netdev);
924 BNAD_UPDATE_CTR(bnad, netif_queue_wakeup);
929 bnad_cb_tx_cleanup(struct bnad *bnad, struct bna_tcb *tcb)
931 /* Delay only once for the whole Tx Path Shutdown */
932 if (!test_and_set_bit(BNAD_RF_TX_SHUTDOWN_DELAYED, &bnad->run_flags))
933 mdelay(BNAD_TXRX_SYNC_MDELAY);
937 bnad_cb_rx_cleanup(struct bnad *bnad,
940 clear_bit(BNAD_RXQ_STARTED, &ccb->rcb[0]->flags);
943 clear_bit(BNAD_RXQ_STARTED, &ccb->rcb[1]->flags);
945 if (!test_and_set_bit(BNAD_RF_RX_SHUTDOWN_DELAYED, &bnad->run_flags))
946 mdelay(BNAD_TXRX_SYNC_MDELAY);
950 bnad_cb_rx_post(struct bnad *bnad, struct bna_rcb *rcb)
952 struct bnad_unmap_q *unmap_q = rcb->unmap_q;
954 clear_bit(BNAD_RF_RX_SHUTDOWN_DELAYED, &bnad->run_flags);
956 if (rcb == rcb->cq->ccb->rcb[0])
957 bnad_cq_cmpl_init(bnad, rcb->cq->ccb);
959 bnad_free_all_rxbufs(bnad, rcb);
961 set_bit(BNAD_RXQ_STARTED, &rcb->flags);
963 /* Now allocate & post buffers for this RCB */
964 /* !!Allocation in callback context */
965 if (!test_and_set_bit(BNAD_RXQ_REFILL, &rcb->flags)) {
966 if (BNA_QE_FREE_CNT(unmap_q, unmap_q->q_depth)
967 >> BNAD_RXQ_REFILL_THRESHOLD_SHIFT)
968 bnad_alloc_n_post_rxbufs(bnad, rcb);
969 smp_mb__before_clear_bit();
970 clear_bit(BNAD_RXQ_REFILL, &rcb->flags);
975 bnad_cb_rx_disabled(void *arg, struct bna_rx *rx,
976 enum bna_cb_status status)
978 struct bnad *bnad = (struct bnad *)arg;
980 complete(&bnad->bnad_completions.rx_comp);
984 bnad_cb_rx_mcast_add(struct bnad *bnad, struct bna_rx *rx,
985 enum bna_cb_status status)
987 bnad->bnad_completions.mcast_comp_status = status;
988 complete(&bnad->bnad_completions.mcast_comp);
992 bnad_cb_stats_get(struct bnad *bnad, enum bna_cb_status status,
993 struct bna_stats *stats)
995 if (status == BNA_CB_SUCCESS)
996 BNAD_UPDATE_CTR(bnad, hw_stats_updates);
998 if (!netif_running(bnad->netdev) ||
999 !test_bit(BNAD_RF_STATS_TIMER_RUNNING, &bnad->run_flags))
1002 mod_timer(&bnad->stats_timer,
1003 jiffies + msecs_to_jiffies(BNAD_STATS_TIMER_FREQ));
1006 /* Resource allocation, free functions */
1009 bnad_mem_free(struct bnad *bnad,
1010 struct bna_mem_info *mem_info)
1015 if (mem_info->mdl == NULL)
1018 for (i = 0; i < mem_info->num; i++) {
1019 if (mem_info->mdl[i].kva != NULL) {
1020 if (mem_info->mem_type == BNA_MEM_T_DMA) {
1021 BNA_GET_DMA_ADDR(&(mem_info->mdl[i].dma),
1023 dma_free_coherent(&bnad->pcidev->dev,
1024 mem_info->mdl[i].len,
1025 mem_info->mdl[i].kva, dma_pa);
1027 kfree(mem_info->mdl[i].kva);
1030 kfree(mem_info->mdl);
1031 mem_info->mdl = NULL;
1035 bnad_mem_alloc(struct bnad *bnad,
1036 struct bna_mem_info *mem_info)
1041 if ((mem_info->num == 0) || (mem_info->len == 0)) {
1042 mem_info->mdl = NULL;
1046 mem_info->mdl = kcalloc(mem_info->num, sizeof(struct bna_mem_descr),
1048 if (mem_info->mdl == NULL)
1051 if (mem_info->mem_type == BNA_MEM_T_DMA) {
1052 for (i = 0; i < mem_info->num; i++) {
1053 mem_info->mdl[i].len = mem_info->len;
1054 mem_info->mdl[i].kva =
1055 dma_alloc_coherent(&bnad->pcidev->dev,
1056 mem_info->len, &dma_pa,
1059 if (mem_info->mdl[i].kva == NULL)
1062 BNA_SET_DMA_ADDR(dma_pa,
1063 &(mem_info->mdl[i].dma));
1066 for (i = 0; i < mem_info->num; i++) {
1067 mem_info->mdl[i].len = mem_info->len;
1068 mem_info->mdl[i].kva = kzalloc(mem_info->len,
1070 if (mem_info->mdl[i].kva == NULL)
1078 bnad_mem_free(bnad, mem_info);
1082 /* Free IRQ for Mailbox */
1084 bnad_mbox_irq_free(struct bnad *bnad,
1085 struct bna_intr_info *intr_info)
1088 unsigned long flags;
1090 if (intr_info->idl == NULL)
1093 spin_lock_irqsave(&bnad->bna_lock, flags);
1094 bnad_disable_mbox_irq(bnad);
1095 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1097 irq = BNAD_GET_MBOX_IRQ(bnad);
1098 free_irq(irq, bnad);
1100 kfree(intr_info->idl);
1104 * Allocates IRQ for Mailbox, but keep it disabled
1105 * This will be enabled once we get the mbox enable callback
1109 bnad_mbox_irq_alloc(struct bnad *bnad,
1110 struct bna_intr_info *intr_info)
1113 unsigned long flags;
1115 irq_handler_t irq_handler;
1117 /* Mbox should use only 1 vector */
1119 intr_info->idl = kzalloc(sizeof(*(intr_info->idl)), GFP_KERNEL);
1120 if (!intr_info->idl)
1123 spin_lock_irqsave(&bnad->bna_lock, flags);
1124 if (bnad->cfg_flags & BNAD_CF_MSIX) {
1125 irq_handler = (irq_handler_t)bnad_msix_mbox_handler;
1126 irq = bnad->msix_table[bnad->msix_num - 1].vector;
1128 intr_info->intr_type = BNA_INTR_T_MSIX;
1129 intr_info->idl[0].vector = bnad->msix_num - 1;
1131 irq_handler = (irq_handler_t)bnad_isr;
1132 irq = bnad->pcidev->irq;
1133 flags = IRQF_SHARED;
1134 intr_info->intr_type = BNA_INTR_T_INTX;
1135 /* intr_info->idl.vector = 0 ? */
1137 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1139 sprintf(bnad->mbox_irq_name, "%s", BNAD_NAME);
1142 * Set the Mbox IRQ disable flag, so that the IRQ handler
1143 * called from request_irq() for SHARED IRQs do not execute
1145 set_bit(BNAD_RF_MBOX_IRQ_DISABLED, &bnad->run_flags);
1147 BNAD_UPDATE_CTR(bnad, mbox_intr_disabled);
1149 err = request_irq(irq, irq_handler, flags,
1150 bnad->mbox_irq_name, bnad);
1153 kfree(intr_info->idl);
1154 intr_info->idl = NULL;
1161 bnad_txrx_irq_free(struct bnad *bnad, struct bna_intr_info *intr_info)
1163 kfree(intr_info->idl);
1164 intr_info->idl = NULL;
1167 /* Allocates Interrupt Descriptor List for MSIX/INT-X vectors */
1169 bnad_txrx_irq_alloc(struct bnad *bnad, enum bnad_intr_source src,
1170 uint txrx_id, struct bna_intr_info *intr_info)
1172 int i, vector_start = 0;
1174 unsigned long flags;
1176 spin_lock_irqsave(&bnad->bna_lock, flags);
1177 cfg_flags = bnad->cfg_flags;
1178 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1180 if (cfg_flags & BNAD_CF_MSIX) {
1181 intr_info->intr_type = BNA_INTR_T_MSIX;
1182 intr_info->idl = kcalloc(intr_info->num,
1183 sizeof(struct bna_intr_descr),
1185 if (!intr_info->idl)
1190 vector_start = txrx_id;
1194 vector_start = bnad->num_tx * bnad->num_txq_per_tx +
1202 for (i = 0; i < intr_info->num; i++)
1203 intr_info->idl[i].vector = vector_start + i;
1205 intr_info->intr_type = BNA_INTR_T_INTX;
1207 intr_info->idl = kcalloc(intr_info->num,
1208 sizeof(struct bna_intr_descr),
1210 if (!intr_info->idl)
1215 intr_info->idl[0].vector = 0x1; /* Bit mask : Tx IB */
1219 intr_info->idl[0].vector = 0x2; /* Bit mask : Rx IB */
1227 * NOTE: Should be called for MSIX only
1228 * Unregisters Tx MSIX vector(s) from the kernel
1231 bnad_tx_msix_unregister(struct bnad *bnad, struct bnad_tx_info *tx_info,
1237 for (i = 0; i < num_txqs; i++) {
1238 if (tx_info->tcb[i] == NULL)
1241 vector_num = tx_info->tcb[i]->intr_vector;
1242 free_irq(bnad->msix_table[vector_num].vector, tx_info->tcb[i]);
1247 * NOTE: Should be called for MSIX only
1248 * Registers Tx MSIX vector(s) and ISR(s), cookie with the kernel
1251 bnad_tx_msix_register(struct bnad *bnad, struct bnad_tx_info *tx_info,
1252 uint tx_id, int num_txqs)
1258 for (i = 0; i < num_txqs; i++) {
1259 vector_num = tx_info->tcb[i]->intr_vector;
1260 sprintf(tx_info->tcb[i]->name, "%s TXQ %d", bnad->netdev->name,
1261 tx_id + tx_info->tcb[i]->id);
1262 err = request_irq(bnad->msix_table[vector_num].vector,
1263 (irq_handler_t)bnad_msix_tx, 0,
1264 tx_info->tcb[i]->name,
1274 bnad_tx_msix_unregister(bnad, tx_info, (i - 1));
1279 * NOTE: Should be called for MSIX only
1280 * Unregisters Rx MSIX vector(s) from the kernel
1283 bnad_rx_msix_unregister(struct bnad *bnad, struct bnad_rx_info *rx_info,
1289 for (i = 0; i < num_rxps; i++) {
1290 if (rx_info->rx_ctrl[i].ccb == NULL)
1293 vector_num = rx_info->rx_ctrl[i].ccb->intr_vector;
1294 free_irq(bnad->msix_table[vector_num].vector,
1295 rx_info->rx_ctrl[i].ccb);
1300 * NOTE: Should be called for MSIX only
1301 * Registers Tx MSIX vector(s) and ISR(s), cookie with the kernel
1304 bnad_rx_msix_register(struct bnad *bnad, struct bnad_rx_info *rx_info,
1305 uint rx_id, int num_rxps)
1311 for (i = 0; i < num_rxps; i++) {
1312 vector_num = rx_info->rx_ctrl[i].ccb->intr_vector;
1313 sprintf(rx_info->rx_ctrl[i].ccb->name, "%s CQ %d",
1315 rx_id + rx_info->rx_ctrl[i].ccb->id);
1316 err = request_irq(bnad->msix_table[vector_num].vector,
1317 (irq_handler_t)bnad_msix_rx, 0,
1318 rx_info->rx_ctrl[i].ccb->name,
1319 rx_info->rx_ctrl[i].ccb);
1328 bnad_rx_msix_unregister(bnad, rx_info, (i - 1));
1332 /* Free Tx object Resources */
1334 bnad_tx_res_free(struct bnad *bnad, struct bna_res_info *res_info)
1338 for (i = 0; i < BNA_TX_RES_T_MAX; i++) {
1339 if (res_info[i].res_type == BNA_RES_T_MEM)
1340 bnad_mem_free(bnad, &res_info[i].res_u.mem_info);
1341 else if (res_info[i].res_type == BNA_RES_T_INTR)
1342 bnad_txrx_irq_free(bnad, &res_info[i].res_u.intr_info);
1346 /* Allocates memory and interrupt resources for Tx object */
1348 bnad_tx_res_alloc(struct bnad *bnad, struct bna_res_info *res_info,
1353 for (i = 0; i < BNA_TX_RES_T_MAX; i++) {
1354 if (res_info[i].res_type == BNA_RES_T_MEM)
1355 err = bnad_mem_alloc(bnad,
1356 &res_info[i].res_u.mem_info);
1357 else if (res_info[i].res_type == BNA_RES_T_INTR)
1358 err = bnad_txrx_irq_alloc(bnad, BNAD_INTR_TX, tx_id,
1359 &res_info[i].res_u.intr_info);
1366 bnad_tx_res_free(bnad, res_info);
1370 /* Free Rx object Resources */
1372 bnad_rx_res_free(struct bnad *bnad, struct bna_res_info *res_info)
1376 for (i = 0; i < BNA_RX_RES_T_MAX; i++) {
1377 if (res_info[i].res_type == BNA_RES_T_MEM)
1378 bnad_mem_free(bnad, &res_info[i].res_u.mem_info);
1379 else if (res_info[i].res_type == BNA_RES_T_INTR)
1380 bnad_txrx_irq_free(bnad, &res_info[i].res_u.intr_info);
1384 /* Allocates memory and interrupt resources for Rx object */
1386 bnad_rx_res_alloc(struct bnad *bnad, struct bna_res_info *res_info,
1391 /* All memory needs to be allocated before setup_ccbs */
1392 for (i = 0; i < BNA_RX_RES_T_MAX; i++) {
1393 if (res_info[i].res_type == BNA_RES_T_MEM)
1394 err = bnad_mem_alloc(bnad,
1395 &res_info[i].res_u.mem_info);
1396 else if (res_info[i].res_type == BNA_RES_T_INTR)
1397 err = bnad_txrx_irq_alloc(bnad, BNAD_INTR_RX, rx_id,
1398 &res_info[i].res_u.intr_info);
1405 bnad_rx_res_free(bnad, res_info);
1409 /* Timer callbacks */
1412 bnad_ioc_timeout(unsigned long data)
1414 struct bnad *bnad = (struct bnad *)data;
1415 unsigned long flags;
1417 spin_lock_irqsave(&bnad->bna_lock, flags);
1418 bfa_nw_ioc_timeout((void *) &bnad->bna.device.ioc);
1419 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1423 bnad_ioc_hb_check(unsigned long data)
1425 struct bnad *bnad = (struct bnad *)data;
1426 unsigned long flags;
1428 spin_lock_irqsave(&bnad->bna_lock, flags);
1429 bfa_nw_ioc_hb_check((void *) &bnad->bna.device.ioc);
1430 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1434 bnad_iocpf_timeout(unsigned long data)
1436 struct bnad *bnad = (struct bnad *)data;
1437 unsigned long flags;
1439 spin_lock_irqsave(&bnad->bna_lock, flags);
1440 bfa_nw_iocpf_timeout((void *) &bnad->bna.device.ioc);
1441 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1445 bnad_iocpf_sem_timeout(unsigned long data)
1447 struct bnad *bnad = (struct bnad *)data;
1448 unsigned long flags;
1450 spin_lock_irqsave(&bnad->bna_lock, flags);
1451 bfa_nw_iocpf_sem_timeout((void *) &bnad->bna.device.ioc);
1452 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1456 * All timer routines use bnad->bna_lock to protect against
1457 * the following race, which may occur in case of no locking:
1465 /* b) Dynamic Interrupt Moderation Timer */
1467 bnad_dim_timeout(unsigned long data)
1469 struct bnad *bnad = (struct bnad *)data;
1470 struct bnad_rx_info *rx_info;
1471 struct bnad_rx_ctrl *rx_ctrl;
1473 unsigned long flags;
1475 if (!netif_carrier_ok(bnad->netdev))
1478 spin_lock_irqsave(&bnad->bna_lock, flags);
1479 for (i = 0; i < bnad->num_rx; i++) {
1480 rx_info = &bnad->rx_info[i];
1483 for (j = 0; j < bnad->num_rxp_per_rx; j++) {
1484 rx_ctrl = &rx_info->rx_ctrl[j];
1487 bna_rx_dim_update(rx_ctrl->ccb);
1491 /* Check for BNAD_CF_DIM_ENABLED, does not eleminate a race */
1492 if (test_bit(BNAD_RF_DIM_TIMER_RUNNING, &bnad->run_flags))
1493 mod_timer(&bnad->dim_timer,
1494 jiffies + msecs_to_jiffies(BNAD_DIM_TIMER_FREQ));
1495 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1498 /* c) Statistics Timer */
1500 bnad_stats_timeout(unsigned long data)
1502 struct bnad *bnad = (struct bnad *)data;
1503 unsigned long flags;
1505 if (!netif_running(bnad->netdev) ||
1506 !test_bit(BNAD_RF_STATS_TIMER_RUNNING, &bnad->run_flags))
1509 spin_lock_irqsave(&bnad->bna_lock, flags);
1510 bna_stats_get(&bnad->bna);
1511 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1515 * Set up timer for DIM
1516 * Called with bnad->bna_lock held
1519 bnad_dim_timer_start(struct bnad *bnad)
1521 if (bnad->cfg_flags & BNAD_CF_DIM_ENABLED &&
1522 !test_bit(BNAD_RF_DIM_TIMER_RUNNING, &bnad->run_flags)) {
1523 setup_timer(&bnad->dim_timer, bnad_dim_timeout,
1524 (unsigned long)bnad);
1525 set_bit(BNAD_RF_DIM_TIMER_RUNNING, &bnad->run_flags);
1526 mod_timer(&bnad->dim_timer,
1527 jiffies + msecs_to_jiffies(BNAD_DIM_TIMER_FREQ));
1532 * Set up timer for statistics
1533 * Called with mutex_lock(&bnad->conf_mutex) held
1536 bnad_stats_timer_start(struct bnad *bnad)
1538 unsigned long flags;
1540 spin_lock_irqsave(&bnad->bna_lock, flags);
1541 if (!test_and_set_bit(BNAD_RF_STATS_TIMER_RUNNING, &bnad->run_flags)) {
1542 setup_timer(&bnad->stats_timer, bnad_stats_timeout,
1543 (unsigned long)bnad);
1544 mod_timer(&bnad->stats_timer,
1545 jiffies + msecs_to_jiffies(BNAD_STATS_TIMER_FREQ));
1547 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1551 * Stops the stats timer
1552 * Called with mutex_lock(&bnad->conf_mutex) held
1555 bnad_stats_timer_stop(struct bnad *bnad)
1558 unsigned long flags;
1560 spin_lock_irqsave(&bnad->bna_lock, flags);
1561 if (test_and_clear_bit(BNAD_RF_STATS_TIMER_RUNNING, &bnad->run_flags))
1563 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1565 del_timer_sync(&bnad->stats_timer);
1571 bnad_netdev_mc_list_get(struct net_device *netdev, u8 *mc_list)
1573 int i = 1; /* Index 0 has broadcast address */
1574 struct netdev_hw_addr *mc_addr;
1576 netdev_for_each_mc_addr(mc_addr, netdev) {
1577 memcpy(&mc_list[i * ETH_ALEN], &mc_addr->addr[0],
1584 bnad_napi_poll_rx(struct napi_struct *napi, int budget)
1586 struct bnad_rx_ctrl *rx_ctrl =
1587 container_of(napi, struct bnad_rx_ctrl, napi);
1588 struct bna_ccb *ccb;
1596 if (!netif_carrier_ok(bnad->netdev))
1599 rcvd = bnad_poll_cq(bnad, ccb, budget);
1604 napi_complete((napi));
1606 BNAD_UPDATE_CTR(bnad, netif_rx_complete);
1608 bnad_enable_rx_irq(bnad, ccb);
1613 bnad_napi_enable(struct bnad *bnad, u32 rx_id)
1615 struct bnad_rx_ctrl *rx_ctrl;
1618 /* Initialize & enable NAPI */
1619 for (i = 0; i < bnad->num_rxp_per_rx; i++) {
1620 rx_ctrl = &bnad->rx_info[rx_id].rx_ctrl[i];
1622 netif_napi_add(bnad->netdev, &rx_ctrl->napi,
1623 bnad_napi_poll_rx, 64);
1625 napi_enable(&rx_ctrl->napi);
1630 bnad_napi_disable(struct bnad *bnad, u32 rx_id)
1634 /* First disable and then clean up */
1635 for (i = 0; i < bnad->num_rxp_per_rx; i++) {
1636 napi_disable(&bnad->rx_info[rx_id].rx_ctrl[i].napi);
1637 netif_napi_del(&bnad->rx_info[rx_id].rx_ctrl[i].napi);
1641 /* Should be held with conf_lock held */
1643 bnad_cleanup_tx(struct bnad *bnad, uint tx_id)
1645 struct bnad_tx_info *tx_info = &bnad->tx_info[tx_id];
1646 struct bna_res_info *res_info = &bnad->tx_res_info[tx_id].res_info[0];
1647 unsigned long flags;
1652 init_completion(&bnad->bnad_completions.tx_comp);
1653 spin_lock_irqsave(&bnad->bna_lock, flags);
1654 bna_tx_disable(tx_info->tx, BNA_HARD_CLEANUP, bnad_cb_tx_disabled);
1655 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1656 wait_for_completion(&bnad->bnad_completions.tx_comp);
1658 if (tx_info->tcb[0]->intr_type == BNA_INTR_T_MSIX)
1659 bnad_tx_msix_unregister(bnad, tx_info,
1660 bnad->num_txq_per_tx);
1662 spin_lock_irqsave(&bnad->bna_lock, flags);
1663 bna_tx_destroy(tx_info->tx);
1664 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1669 tasklet_kill(&bnad->tx_free_tasklet);
1671 bnad_tx_res_free(bnad, res_info);
1674 /* Should be held with conf_lock held */
1676 bnad_setup_tx(struct bnad *bnad, uint tx_id)
1679 struct bnad_tx_info *tx_info = &bnad->tx_info[tx_id];
1680 struct bna_res_info *res_info = &bnad->tx_res_info[tx_id].res_info[0];
1681 struct bna_intr_info *intr_info =
1682 &res_info[BNA_TX_RES_INTR_T_TXCMPL].res_u.intr_info;
1683 struct bna_tx_config *tx_config = &bnad->tx_config[tx_id];
1684 struct bna_tx_event_cbfn tx_cbfn;
1686 unsigned long flags;
1688 /* Initialize the Tx object configuration */
1689 tx_config->num_txq = bnad->num_txq_per_tx;
1690 tx_config->txq_depth = bnad->txq_depth;
1691 tx_config->tx_type = BNA_TX_T_REGULAR;
1693 /* Initialize the tx event handlers */
1694 tx_cbfn.tcb_setup_cbfn = bnad_cb_tcb_setup;
1695 tx_cbfn.tcb_destroy_cbfn = bnad_cb_tcb_destroy;
1696 tx_cbfn.tx_stall_cbfn = bnad_cb_tx_stall;
1697 tx_cbfn.tx_resume_cbfn = bnad_cb_tx_resume;
1698 tx_cbfn.tx_cleanup_cbfn = bnad_cb_tx_cleanup;
1700 /* Get BNA's resource requirement for one tx object */
1701 spin_lock_irqsave(&bnad->bna_lock, flags);
1702 bna_tx_res_req(bnad->num_txq_per_tx,
1703 bnad->txq_depth, res_info);
1704 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1706 /* Fill Unmap Q memory requirements */
1707 BNAD_FILL_UNMAPQ_MEM_REQ(
1708 &res_info[BNA_TX_RES_MEM_T_UNMAPQ],
1709 bnad->num_txq_per_tx,
1710 BNAD_TX_UNMAPQ_DEPTH);
1712 /* Allocate resources */
1713 err = bnad_tx_res_alloc(bnad, res_info, tx_id);
1717 /* Ask BNA to create one Tx object, supplying required resources */
1718 spin_lock_irqsave(&bnad->bna_lock, flags);
1719 tx = bna_tx_create(&bnad->bna, bnad, tx_config, &tx_cbfn, res_info,
1721 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1726 /* Register ISR for the Tx object */
1727 if (intr_info->intr_type == BNA_INTR_T_MSIX) {
1728 err = bnad_tx_msix_register(bnad, tx_info,
1729 tx_id, bnad->num_txq_per_tx);
1734 spin_lock_irqsave(&bnad->bna_lock, flags);
1736 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1741 bnad_tx_res_free(bnad, res_info);
1745 /* Setup the rx config for bna_rx_create */
1746 /* bnad decides the configuration */
1748 bnad_init_rx_config(struct bnad *bnad, struct bna_rx_config *rx_config)
1750 rx_config->rx_type = BNA_RX_T_REGULAR;
1751 rx_config->num_paths = bnad->num_rxp_per_rx;
1753 if (bnad->num_rxp_per_rx > 1) {
1754 rx_config->rss_status = BNA_STATUS_T_ENABLED;
1755 rx_config->rss_config.hash_type =
1760 rx_config->rss_config.hash_mask =
1761 bnad->num_rxp_per_rx - 1;
1762 get_random_bytes(rx_config->rss_config.toeplitz_hash_key,
1763 sizeof(rx_config->rss_config.toeplitz_hash_key));
1765 rx_config->rss_status = BNA_STATUS_T_DISABLED;
1766 memset(&rx_config->rss_config, 0,
1767 sizeof(rx_config->rss_config));
1769 rx_config->rxp_type = BNA_RXP_SLR;
1770 rx_config->q_depth = bnad->rxq_depth;
1772 rx_config->small_buff_size = BFI_SMALL_RXBUF_SIZE;
1774 rx_config->vlan_strip_status = BNA_STATUS_T_ENABLED;
1777 /* Called with mutex_lock(&bnad->conf_mutex) held */
1779 bnad_cleanup_rx(struct bnad *bnad, uint rx_id)
1781 struct bnad_rx_info *rx_info = &bnad->rx_info[rx_id];
1782 struct bna_rx_config *rx_config = &bnad->rx_config[rx_id];
1783 struct bna_res_info *res_info = &bnad->rx_res_info[rx_id].res_info[0];
1784 unsigned long flags;
1785 int dim_timer_del = 0;
1791 spin_lock_irqsave(&bnad->bna_lock, flags);
1792 dim_timer_del = bnad_dim_timer_running(bnad);
1794 clear_bit(BNAD_RF_DIM_TIMER_RUNNING, &bnad->run_flags);
1795 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1797 del_timer_sync(&bnad->dim_timer);
1800 bnad_napi_disable(bnad, rx_id);
1802 init_completion(&bnad->bnad_completions.rx_comp);
1803 spin_lock_irqsave(&bnad->bna_lock, flags);
1804 bna_rx_disable(rx_info->rx, BNA_HARD_CLEANUP, bnad_cb_rx_disabled);
1805 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1806 wait_for_completion(&bnad->bnad_completions.rx_comp);
1808 if (rx_info->rx_ctrl[0].ccb->intr_type == BNA_INTR_T_MSIX)
1809 bnad_rx_msix_unregister(bnad, rx_info, rx_config->num_paths);
1811 spin_lock_irqsave(&bnad->bna_lock, flags);
1812 bna_rx_destroy(rx_info->rx);
1813 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1817 bnad_rx_res_free(bnad, res_info);
1820 /* Called with mutex_lock(&bnad->conf_mutex) held */
1822 bnad_setup_rx(struct bnad *bnad, uint rx_id)
1825 struct bnad_rx_info *rx_info = &bnad->rx_info[rx_id];
1826 struct bna_res_info *res_info = &bnad->rx_res_info[rx_id].res_info[0];
1827 struct bna_intr_info *intr_info =
1828 &res_info[BNA_RX_RES_T_INTR].res_u.intr_info;
1829 struct bna_rx_config *rx_config = &bnad->rx_config[rx_id];
1830 struct bna_rx_event_cbfn rx_cbfn;
1832 unsigned long flags;
1834 /* Initialize the Rx object configuration */
1835 bnad_init_rx_config(bnad, rx_config);
1837 /* Initialize the Rx event handlers */
1838 rx_cbfn.rcb_setup_cbfn = bnad_cb_rcb_setup;
1839 rx_cbfn.rcb_destroy_cbfn = bnad_cb_rcb_destroy;
1840 rx_cbfn.rcb_destroy_cbfn = NULL;
1841 rx_cbfn.ccb_setup_cbfn = bnad_cb_ccb_setup;
1842 rx_cbfn.ccb_destroy_cbfn = bnad_cb_ccb_destroy;
1843 rx_cbfn.rx_cleanup_cbfn = bnad_cb_rx_cleanup;
1844 rx_cbfn.rx_post_cbfn = bnad_cb_rx_post;
1846 /* Get BNA's resource requirement for one Rx object */
1847 spin_lock_irqsave(&bnad->bna_lock, flags);
1848 bna_rx_res_req(rx_config, res_info);
1849 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1851 /* Fill Unmap Q memory requirements */
1852 BNAD_FILL_UNMAPQ_MEM_REQ(
1853 &res_info[BNA_RX_RES_MEM_T_UNMAPQ],
1854 rx_config->num_paths +
1855 ((rx_config->rxp_type == BNA_RXP_SINGLE) ? 0 :
1856 rx_config->num_paths), BNAD_RX_UNMAPQ_DEPTH);
1858 /* Allocate resource */
1859 err = bnad_rx_res_alloc(bnad, res_info, rx_id);
1863 /* Ask BNA to create one Rx object, supplying required resources */
1864 spin_lock_irqsave(&bnad->bna_lock, flags);
1865 rx = bna_rx_create(&bnad->bna, bnad, rx_config, &rx_cbfn, res_info,
1867 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1872 /* Register ISR for the Rx object */
1873 if (intr_info->intr_type == BNA_INTR_T_MSIX) {
1874 err = bnad_rx_msix_register(bnad, rx_info, rx_id,
1875 rx_config->num_paths);
1881 bnad_napi_enable(bnad, rx_id);
1883 spin_lock_irqsave(&bnad->bna_lock, flags);
1885 /* Set up Dynamic Interrupt Moderation Vector */
1886 if (bnad->cfg_flags & BNAD_CF_DIM_ENABLED)
1887 bna_rx_dim_reconfig(&bnad->bna, bna_napi_dim_vector);
1889 /* Enable VLAN filtering only on the default Rx */
1890 bna_rx_vlanfilter_enable(rx);
1892 /* Start the DIM timer */
1893 bnad_dim_timer_start(bnad);
1897 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1902 bnad_cleanup_rx(bnad, rx_id);
1906 /* Called with conf_lock & bnad->bna_lock held */
1908 bnad_tx_coalescing_timeo_set(struct bnad *bnad)
1910 struct bnad_tx_info *tx_info;
1912 tx_info = &bnad->tx_info[0];
1916 bna_tx_coalescing_timeo_set(tx_info->tx, bnad->tx_coalescing_timeo);
1919 /* Called with conf_lock & bnad->bna_lock held */
1921 bnad_rx_coalescing_timeo_set(struct bnad *bnad)
1923 struct bnad_rx_info *rx_info;
1926 for (i = 0; i < bnad->num_rx; i++) {
1927 rx_info = &bnad->rx_info[i];
1930 bna_rx_coalescing_timeo_set(rx_info->rx,
1931 bnad->rx_coalescing_timeo);
1936 * Called with bnad->bna_lock held
1939 bnad_mac_addr_set_locked(struct bnad *bnad, u8 *mac_addr)
1943 if (!is_valid_ether_addr(mac_addr))
1944 return -EADDRNOTAVAIL;
1946 /* If datapath is down, pretend everything went through */
1947 if (!bnad->rx_info[0].rx)
1950 ret = bna_rx_ucast_set(bnad->rx_info[0].rx, mac_addr, NULL);
1951 if (ret != BNA_CB_SUCCESS)
1952 return -EADDRNOTAVAIL;
1957 /* Should be called with conf_lock held */
1959 bnad_enable_default_bcast(struct bnad *bnad)
1961 struct bnad_rx_info *rx_info = &bnad->rx_info[0];
1963 unsigned long flags;
1965 init_completion(&bnad->bnad_completions.mcast_comp);
1967 spin_lock_irqsave(&bnad->bna_lock, flags);
1968 ret = bna_rx_mcast_add(rx_info->rx, (u8 *)bnad_bcast_addr,
1969 bnad_cb_rx_mcast_add);
1970 spin_unlock_irqrestore(&bnad->bna_lock, flags);
1972 if (ret == BNA_CB_SUCCESS)
1973 wait_for_completion(&bnad->bnad_completions.mcast_comp);
1977 if (bnad->bnad_completions.mcast_comp_status != BNA_CB_SUCCESS)
1983 /* Called with bnad_conf_lock() held */
1985 bnad_restore_vlans(struct bnad *bnad, u32 rx_id)
1988 unsigned long flags;
1990 if (!bnad->vlan_grp)
1993 BUG_ON(!(VLAN_N_VID == (BFI_MAX_VLAN + 1)));
1995 for (vlan_id = 0; vlan_id < VLAN_N_VID; vlan_id++) {
1996 if (!vlan_group_get_device(bnad->vlan_grp, vlan_id))
1998 spin_lock_irqsave(&bnad->bna_lock, flags);
1999 bna_rx_vlan_add(bnad->rx_info[rx_id].rx, vlan_id);
2000 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2004 /* Statistics utilities */
2006 bnad_netdev_qstats_fill(struct bnad *bnad, struct rtnl_link_stats64 *stats)
2010 for (i = 0; i < bnad->num_rx; i++) {
2011 for (j = 0; j < bnad->num_rxp_per_rx; j++) {
2012 if (bnad->rx_info[i].rx_ctrl[j].ccb) {
2013 stats->rx_packets += bnad->rx_info[i].
2014 rx_ctrl[j].ccb->rcb[0]->rxq->rx_packets;
2015 stats->rx_bytes += bnad->rx_info[i].
2016 rx_ctrl[j].ccb->rcb[0]->rxq->rx_bytes;
2017 if (bnad->rx_info[i].rx_ctrl[j].ccb->rcb[1] &&
2018 bnad->rx_info[i].rx_ctrl[j].ccb->
2020 stats->rx_packets +=
2021 bnad->rx_info[i].rx_ctrl[j].
2022 ccb->rcb[1]->rxq->rx_packets;
2024 bnad->rx_info[i].rx_ctrl[j].
2025 ccb->rcb[1]->rxq->rx_bytes;
2030 for (i = 0; i < bnad->num_tx; i++) {
2031 for (j = 0; j < bnad->num_txq_per_tx; j++) {
2032 if (bnad->tx_info[i].tcb[j]) {
2033 stats->tx_packets +=
2034 bnad->tx_info[i].tcb[j]->txq->tx_packets;
2036 bnad->tx_info[i].tcb[j]->txq->tx_bytes;
2043 * Must be called with the bna_lock held.
2046 bnad_netdev_hwstats_fill(struct bnad *bnad, struct rtnl_link_stats64 *stats)
2048 struct bfi_ll_stats_mac *mac_stats;
2052 mac_stats = &bnad->stats.bna_stats->hw_stats->mac_stats;
2054 mac_stats->rx_fcs_error + mac_stats->rx_alignment_error +
2055 mac_stats->rx_frame_length_error + mac_stats->rx_code_error +
2056 mac_stats->rx_undersize;
2057 stats->tx_errors = mac_stats->tx_fcs_error +
2058 mac_stats->tx_undersize;
2059 stats->rx_dropped = mac_stats->rx_drop;
2060 stats->tx_dropped = mac_stats->tx_drop;
2061 stats->multicast = mac_stats->rx_multicast;
2062 stats->collisions = mac_stats->tx_total_collision;
2064 stats->rx_length_errors = mac_stats->rx_frame_length_error;
2066 /* receive ring buffer overflow ?? */
2068 stats->rx_crc_errors = mac_stats->rx_fcs_error;
2069 stats->rx_frame_errors = mac_stats->rx_alignment_error;
2070 /* recv'r fifo overrun */
2071 bmap = (u64)bnad->stats.bna_stats->rxf_bmap[0] |
2072 ((u64)bnad->stats.bna_stats->rxf_bmap[1] << 32);
2073 for (i = 0; bmap && (i < BFI_LL_RXF_ID_MAX); i++) {
2075 stats->rx_fifo_errors +=
2076 bnad->stats.bna_stats->
2077 hw_stats->rxf_stats[i].frame_drops;
2085 bnad_mbox_irq_sync(struct bnad *bnad)
2088 unsigned long flags;
2090 spin_lock_irqsave(&bnad->bna_lock, flags);
2091 if (bnad->cfg_flags & BNAD_CF_MSIX)
2092 irq = bnad->msix_table[bnad->msix_num - 1].vector;
2094 irq = bnad->pcidev->irq;
2095 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2097 synchronize_irq(irq);
2100 /* Utility used by bnad_start_xmit, for doing TSO */
2102 bnad_tso_prepare(struct bnad *bnad, struct sk_buff *skb)
2106 /* SKB_GSO_TCPV4 and SKB_GSO_TCPV6 is defined since 2.6.18. */
2107 BUG_ON(!(skb_shinfo(skb)->gso_type == SKB_GSO_TCPV4 ||
2108 skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6));
2109 if (skb_header_cloned(skb)) {
2110 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2112 BNAD_UPDATE_CTR(bnad, tso_err);
2118 * For TSO, the TCP checksum field is seeded with pseudo-header sum
2119 * excluding the length field.
2121 if (skb->protocol == htons(ETH_P_IP)) {
2122 struct iphdr *iph = ip_hdr(skb);
2124 /* Do we really need these? */
2128 tcp_hdr(skb)->check =
2129 ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0,
2131 BNAD_UPDATE_CTR(bnad, tso4);
2133 struct ipv6hdr *ipv6h = ipv6_hdr(skb);
2135 BUG_ON(!(skb->protocol == htons(ETH_P_IPV6)));
2136 ipv6h->payload_len = 0;
2137 tcp_hdr(skb)->check =
2138 ~csum_ipv6_magic(&ipv6h->saddr, &ipv6h->daddr, 0,
2140 BNAD_UPDATE_CTR(bnad, tso6);
2147 * Initialize Q numbers depending on Rx Paths
2148 * Called with bnad->bna_lock held, because of cfg_flags
2152 bnad_q_num_init(struct bnad *bnad)
2156 rxps = min((uint)num_online_cpus(),
2157 (uint)(BNAD_MAX_RXS * BNAD_MAX_RXPS_PER_RX));
2159 if (!(bnad->cfg_flags & BNAD_CF_MSIX))
2160 rxps = 1; /* INTx */
2164 bnad->num_rxp_per_rx = rxps;
2165 bnad->num_txq_per_tx = BNAD_TXQ_NUM;
2169 * Adjusts the Q numbers, given a number of msix vectors
2170 * Give preference to RSS as opposed to Tx priority Queues,
2171 * in such a case, just use 1 Tx Q
2172 * Called with bnad->bna_lock held b'cos of cfg_flags access
2175 bnad_q_num_adjust(struct bnad *bnad, int msix_vectors)
2177 bnad->num_txq_per_tx = 1;
2178 if ((msix_vectors >= (bnad->num_tx * bnad->num_txq_per_tx) +
2179 bnad_rxqs_per_cq + BNAD_MAILBOX_MSIX_VECTORS) &&
2180 (bnad->cfg_flags & BNAD_CF_MSIX)) {
2181 bnad->num_rxp_per_rx = msix_vectors -
2182 (bnad->num_tx * bnad->num_txq_per_tx) -
2183 BNAD_MAILBOX_MSIX_VECTORS;
2185 bnad->num_rxp_per_rx = 1;
2188 /* Enable / disable device */
2190 bnad_device_disable(struct bnad *bnad)
2192 unsigned long flags;
2194 init_completion(&bnad->bnad_completions.ioc_comp);
2196 spin_lock_irqsave(&bnad->bna_lock, flags);
2197 bna_device_disable(&bnad->bna.device, BNA_HARD_CLEANUP);
2198 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2200 wait_for_completion(&bnad->bnad_completions.ioc_comp);
2204 bnad_device_enable(struct bnad *bnad)
2207 unsigned long flags;
2209 init_completion(&bnad->bnad_completions.ioc_comp);
2211 spin_lock_irqsave(&bnad->bna_lock, flags);
2212 bna_device_enable(&bnad->bna.device);
2213 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2215 wait_for_completion(&bnad->bnad_completions.ioc_comp);
2217 if (bnad->bnad_completions.ioc_comp_status)
2218 err = bnad->bnad_completions.ioc_comp_status;
2223 /* Free BNA resources */
2225 bnad_res_free(struct bnad *bnad)
2228 struct bna_res_info *res_info = &bnad->res_info[0];
2230 for (i = 0; i < BNA_RES_T_MAX; i++) {
2231 if (res_info[i].res_type == BNA_RES_T_MEM)
2232 bnad_mem_free(bnad, &res_info[i].res_u.mem_info);
2234 bnad_mbox_irq_free(bnad, &res_info[i].res_u.intr_info);
2238 /* Allocates memory and interrupt resources for BNA */
2240 bnad_res_alloc(struct bnad *bnad)
2243 struct bna_res_info *res_info = &bnad->res_info[0];
2245 for (i = 0; i < BNA_RES_T_MAX; i++) {
2246 if (res_info[i].res_type == BNA_RES_T_MEM)
2247 err = bnad_mem_alloc(bnad, &res_info[i].res_u.mem_info);
2249 err = bnad_mbox_irq_alloc(bnad,
2250 &res_info[i].res_u.intr_info);
2257 bnad_res_free(bnad);
2261 /* Interrupt enable / disable */
2263 bnad_enable_msix(struct bnad *bnad)
2266 unsigned long flags;
2268 spin_lock_irqsave(&bnad->bna_lock, flags);
2269 if (!(bnad->cfg_flags & BNAD_CF_MSIX)) {
2270 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2273 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2275 if (bnad->msix_table)
2279 kcalloc(bnad->msix_num, sizeof(struct msix_entry), GFP_KERNEL);
2281 if (!bnad->msix_table)
2284 for (i = 0; i < bnad->msix_num; i++)
2285 bnad->msix_table[i].entry = i;
2287 ret = pci_enable_msix(bnad->pcidev, bnad->msix_table, bnad->msix_num);
2289 /* Not enough MSI-X vectors. */
2291 spin_lock_irqsave(&bnad->bna_lock, flags);
2292 /* ret = #of vectors that we got */
2293 bnad_q_num_adjust(bnad, ret);
2294 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2296 bnad->msix_num = (bnad->num_tx * bnad->num_txq_per_tx)
2298 * bnad->num_rxp_per_rx) +
2299 BNAD_MAILBOX_MSIX_VECTORS;
2301 /* Try once more with adjusted numbers */
2302 /* If this fails, fall back to INTx */
2303 ret = pci_enable_msix(bnad->pcidev, bnad->msix_table,
2314 kfree(bnad->msix_table);
2315 bnad->msix_table = NULL;
2317 spin_lock_irqsave(&bnad->bna_lock, flags);
2318 bnad->cfg_flags &= ~BNAD_CF_MSIX;
2319 bnad_q_num_init(bnad);
2320 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2324 bnad_disable_msix(struct bnad *bnad)
2327 unsigned long flags;
2329 spin_lock_irqsave(&bnad->bna_lock, flags);
2330 cfg_flags = bnad->cfg_flags;
2331 if (bnad->cfg_flags & BNAD_CF_MSIX)
2332 bnad->cfg_flags &= ~BNAD_CF_MSIX;
2333 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2335 if (cfg_flags & BNAD_CF_MSIX) {
2336 pci_disable_msix(bnad->pcidev);
2337 kfree(bnad->msix_table);
2338 bnad->msix_table = NULL;
2342 /* Netdev entry points */
2344 bnad_open(struct net_device *netdev)
2347 struct bnad *bnad = netdev_priv(netdev);
2348 struct bna_pause_config pause_config;
2350 unsigned long flags;
2352 mutex_lock(&bnad->conf_mutex);
2355 err = bnad_setup_tx(bnad, 0);
2360 err = bnad_setup_rx(bnad, 0);
2365 pause_config.tx_pause = 0;
2366 pause_config.rx_pause = 0;
2368 mtu = ETH_HLEN + bnad->netdev->mtu + ETH_FCS_LEN;
2370 spin_lock_irqsave(&bnad->bna_lock, flags);
2371 bna_port_mtu_set(&bnad->bna.port, mtu, NULL);
2372 bna_port_pause_config(&bnad->bna.port, &pause_config, NULL);
2373 bna_port_enable(&bnad->bna.port);
2374 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2376 /* Enable broadcast */
2377 bnad_enable_default_bcast(bnad);
2379 /* Restore VLANs, if any */
2380 bnad_restore_vlans(bnad, 0);
2382 /* Set the UCAST address */
2383 spin_lock_irqsave(&bnad->bna_lock, flags);
2384 bnad_mac_addr_set_locked(bnad, netdev->dev_addr);
2385 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2387 /* Start the stats timer */
2388 bnad_stats_timer_start(bnad);
2390 mutex_unlock(&bnad->conf_mutex);
2395 bnad_cleanup_tx(bnad, 0);
2398 mutex_unlock(&bnad->conf_mutex);
2403 bnad_stop(struct net_device *netdev)
2405 struct bnad *bnad = netdev_priv(netdev);
2406 unsigned long flags;
2408 mutex_lock(&bnad->conf_mutex);
2410 /* Stop the stats timer */
2411 bnad_stats_timer_stop(bnad);
2413 init_completion(&bnad->bnad_completions.port_comp);
2415 spin_lock_irqsave(&bnad->bna_lock, flags);
2416 bna_port_disable(&bnad->bna.port, BNA_HARD_CLEANUP,
2417 bnad_cb_port_disabled);
2418 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2420 wait_for_completion(&bnad->bnad_completions.port_comp);
2422 bnad_cleanup_tx(bnad, 0);
2423 bnad_cleanup_rx(bnad, 0);
2425 /* Synchronize mailbox IRQ */
2426 bnad_mbox_irq_sync(bnad);
2428 mutex_unlock(&bnad->conf_mutex);
2435 * bnad_start_xmit : Netdev entry point for Transmit
2436 * Called under lock held by net_device
2439 bnad_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2441 struct bnad *bnad = netdev_priv(netdev);
2443 u16 txq_prod, vlan_tag = 0;
2444 u32 unmap_prod, wis, wis_used, wi_range;
2445 u32 vectors, vect_id, i, acked;
2449 struct bnad_tx_info *tx_info;
2450 struct bna_tcb *tcb;
2451 struct bnad_unmap_q *unmap_q;
2452 dma_addr_t dma_addr;
2453 struct bna_txq_entry *txqent;
2454 bna_txq_wi_ctrl_flag_t flags;
2457 (skb->len <= ETH_HLEN || skb->len > BFI_TX_MAX_DATA_PER_PKT)) {
2459 return NETDEV_TX_OK;
2464 tx_info = &bnad->tx_info[tx_id];
2465 tcb = tx_info->tcb[tx_id];
2466 unmap_q = tcb->unmap_q;
2469 * Takes care of the Tx that is scheduled between clearing the flag
2470 * and the netif_stop_queue() call.
2472 if (unlikely(!test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags))) {
2474 return NETDEV_TX_OK;
2477 vectors = 1 + skb_shinfo(skb)->nr_frags;
2478 if (vectors > BFI_TX_MAX_VECTORS_PER_PKT) {
2480 return NETDEV_TX_OK;
2482 wis = BNA_TXQ_WI_NEEDED(vectors); /* 4 vectors per work item */
2485 (wis > BNA_QE_FREE_CNT(tcb, tcb->q_depth) ||
2486 vectors > BNA_QE_FREE_CNT(unmap_q, unmap_q->q_depth))) {
2487 if ((u16) (*tcb->hw_consumer_index) !=
2488 tcb->consumer_index &&
2489 !test_and_set_bit(BNAD_TXQ_FREE_SENT, &tcb->flags)) {
2490 acked = bnad_free_txbufs(bnad, tcb);
2491 if (likely(test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags)))
2492 bna_ib_ack(tcb->i_dbell, acked);
2493 smp_mb__before_clear_bit();
2494 clear_bit(BNAD_TXQ_FREE_SENT, &tcb->flags);
2496 netif_stop_queue(netdev);
2497 BNAD_UPDATE_CTR(bnad, netif_queue_stop);
2502 * Check again to deal with race condition between
2503 * netif_stop_queue here, and netif_wake_queue in
2504 * interrupt handler which is not inside netif tx lock.
2507 (wis > BNA_QE_FREE_CNT(tcb, tcb->q_depth) ||
2508 vectors > BNA_QE_FREE_CNT(unmap_q, unmap_q->q_depth))) {
2509 BNAD_UPDATE_CTR(bnad, netif_queue_stop);
2510 return NETDEV_TX_BUSY;
2512 netif_wake_queue(netdev);
2513 BNAD_UPDATE_CTR(bnad, netif_queue_wakeup);
2517 unmap_prod = unmap_q->producer_index;
2522 txq_prod = tcb->producer_index;
2523 BNA_TXQ_QPGE_PTR_GET(txq_prod, tcb->sw_qpt, txqent, wi_range);
2524 BUG_ON(!(wi_range <= tcb->q_depth));
2525 txqent->hdr.wi.reserved = 0;
2526 txqent->hdr.wi.num_vectors = vectors;
2527 txqent->hdr.wi.opcode =
2528 htons((skb_is_gso(skb) ? BNA_TXQ_WI_SEND_LSO :
2531 if (vlan_tx_tag_present(skb)) {
2532 vlan_tag = (u16) vlan_tx_tag_get(skb);
2533 flags |= (BNA_TXQ_WI_CF_INS_PRIO | BNA_TXQ_WI_CF_INS_VLAN);
2535 if (test_bit(BNAD_RF_CEE_RUNNING, &bnad->run_flags)) {
2537 (tcb->priority & 0x7) << 13 | (vlan_tag & 0x1fff);
2538 flags |= (BNA_TXQ_WI_CF_INS_PRIO | BNA_TXQ_WI_CF_INS_VLAN);
2541 txqent->hdr.wi.vlan_tag = htons(vlan_tag);
2543 if (skb_is_gso(skb)) {
2544 err = bnad_tso_prepare(bnad, skb);
2547 return NETDEV_TX_OK;
2549 txqent->hdr.wi.lso_mss = htons(skb_is_gso(skb));
2550 flags |= (BNA_TXQ_WI_CF_IP_CKSUM | BNA_TXQ_WI_CF_TCP_CKSUM);
2551 txqent->hdr.wi.l4_hdr_size_n_offset =
2552 htons(BNA_TXQ_WI_L4_HDR_N_OFFSET
2553 (tcp_hdrlen(skb) >> 2,
2554 skb_transport_offset(skb)));
2555 } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
2558 txqent->hdr.wi.lso_mss = 0;
2560 if (skb->protocol == htons(ETH_P_IP))
2561 proto = ip_hdr(skb)->protocol;
2562 else if (skb->protocol == htons(ETH_P_IPV6)) {
2563 /* nexthdr may not be TCP immediately. */
2564 proto = ipv6_hdr(skb)->nexthdr;
2566 if (proto == IPPROTO_TCP) {
2567 flags |= BNA_TXQ_WI_CF_TCP_CKSUM;
2568 txqent->hdr.wi.l4_hdr_size_n_offset =
2569 htons(BNA_TXQ_WI_L4_HDR_N_OFFSET
2570 (0, skb_transport_offset(skb)));
2572 BNAD_UPDATE_CTR(bnad, tcpcsum_offload);
2574 BUG_ON(!(skb_headlen(skb) >=
2575 skb_transport_offset(skb) + tcp_hdrlen(skb)));
2577 } else if (proto == IPPROTO_UDP) {
2578 flags |= BNA_TXQ_WI_CF_UDP_CKSUM;
2579 txqent->hdr.wi.l4_hdr_size_n_offset =
2580 htons(BNA_TXQ_WI_L4_HDR_N_OFFSET
2581 (0, skb_transport_offset(skb)));
2583 BNAD_UPDATE_CTR(bnad, udpcsum_offload);
2585 BUG_ON(!(skb_headlen(skb) >=
2586 skb_transport_offset(skb) +
2587 sizeof(struct udphdr)));
2589 err = skb_checksum_help(skb);
2590 BNAD_UPDATE_CTR(bnad, csum_help);
2593 BNAD_UPDATE_CTR(bnad, csum_help_err);
2594 return NETDEV_TX_OK;
2598 txqent->hdr.wi.lso_mss = 0;
2599 txqent->hdr.wi.l4_hdr_size_n_offset = 0;
2602 txqent->hdr.wi.flags = htons(flags);
2604 txqent->hdr.wi.frame_length = htonl(skb->len);
2606 unmap_q->unmap_array[unmap_prod].skb = skb;
2607 BUG_ON(!(skb_headlen(skb) <= BFI_TX_MAX_DATA_PER_VECTOR));
2608 txqent->vector[vect_id].length = htons(skb_headlen(skb));
2609 dma_addr = dma_map_single(&bnad->pcidev->dev, skb->data,
2610 skb_headlen(skb), DMA_TO_DEVICE);
2611 dma_unmap_addr_set(&unmap_q->unmap_array[unmap_prod], dma_addr,
2614 BNA_SET_DMA_ADDR(dma_addr, &txqent->vector[vect_id].host_addr);
2615 BNA_QE_INDX_ADD(unmap_prod, 1, unmap_q->q_depth);
2617 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
2618 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
2619 u32 size = frag->size;
2621 if (++vect_id == BFI_TX_MAX_VECTORS_PER_WI) {
2626 BNA_QE_INDX_ADD(txq_prod, wis_used,
2629 BNA_TXQ_QPGE_PTR_GET(txq_prod, tcb->sw_qpt,
2631 BUG_ON(!(wi_range <= tcb->q_depth));
2634 txqent->hdr.wi_ext.opcode = htons(BNA_TXQ_WI_EXTENSION);
2637 BUG_ON(!(size <= BFI_TX_MAX_DATA_PER_VECTOR));
2638 txqent->vector[vect_id].length = htons(size);
2639 dma_addr = dma_map_page(&bnad->pcidev->dev, frag->page,
2640 frag->page_offset, size, DMA_TO_DEVICE);
2641 dma_unmap_addr_set(&unmap_q->unmap_array[unmap_prod], dma_addr,
2643 BNA_SET_DMA_ADDR(dma_addr, &txqent->vector[vect_id].host_addr);
2644 BNA_QE_INDX_ADD(unmap_prod, 1, unmap_q->q_depth);
2647 unmap_q->producer_index = unmap_prod;
2648 BNA_QE_INDX_ADD(txq_prod, wis_used, tcb->q_depth);
2649 tcb->producer_index = txq_prod;
2653 if (unlikely(!test_bit(BNAD_TXQ_TX_STARTED, &tcb->flags)))
2654 return NETDEV_TX_OK;
2656 bna_txq_prod_indx_doorbell(tcb);
2658 if ((u16) (*tcb->hw_consumer_index) != tcb->consumer_index)
2659 tasklet_schedule(&bnad->tx_free_tasklet);
2661 return NETDEV_TX_OK;
2665 * Used spin_lock to synchronize reading of stats structures, which
2666 * is written by BNA under the same lock.
2668 static struct rtnl_link_stats64 *
2669 bnad_get_stats64(struct net_device *netdev, struct rtnl_link_stats64 *stats)
2671 struct bnad *bnad = netdev_priv(netdev);
2672 unsigned long flags;
2674 spin_lock_irqsave(&bnad->bna_lock, flags);
2676 bnad_netdev_qstats_fill(bnad, stats);
2677 bnad_netdev_hwstats_fill(bnad, stats);
2679 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2685 bnad_set_rx_mode(struct net_device *netdev)
2687 struct bnad *bnad = netdev_priv(netdev);
2688 u32 new_mask, valid_mask;
2689 unsigned long flags;
2691 spin_lock_irqsave(&bnad->bna_lock, flags);
2693 new_mask = valid_mask = 0;
2695 if (netdev->flags & IFF_PROMISC) {
2696 if (!(bnad->cfg_flags & BNAD_CF_PROMISC)) {
2697 new_mask = BNAD_RXMODE_PROMISC_DEFAULT;
2698 valid_mask = BNAD_RXMODE_PROMISC_DEFAULT;
2699 bnad->cfg_flags |= BNAD_CF_PROMISC;
2702 if (bnad->cfg_flags & BNAD_CF_PROMISC) {
2703 new_mask = ~BNAD_RXMODE_PROMISC_DEFAULT;
2704 valid_mask = BNAD_RXMODE_PROMISC_DEFAULT;
2705 bnad->cfg_flags &= ~BNAD_CF_PROMISC;
2709 if (netdev->flags & IFF_ALLMULTI) {
2710 if (!(bnad->cfg_flags & BNAD_CF_ALLMULTI)) {
2711 new_mask |= BNA_RXMODE_ALLMULTI;
2712 valid_mask |= BNA_RXMODE_ALLMULTI;
2713 bnad->cfg_flags |= BNAD_CF_ALLMULTI;
2716 if (bnad->cfg_flags & BNAD_CF_ALLMULTI) {
2717 new_mask &= ~BNA_RXMODE_ALLMULTI;
2718 valid_mask |= BNA_RXMODE_ALLMULTI;
2719 bnad->cfg_flags &= ~BNAD_CF_ALLMULTI;
2723 bna_rx_mode_set(bnad->rx_info[0].rx, new_mask, valid_mask, NULL);
2725 if (!netdev_mc_empty(netdev)) {
2727 int mc_count = netdev_mc_count(netdev);
2729 /* Index 0 holds the broadcast address */
2731 kzalloc((mc_count + 1) * ETH_ALEN,
2736 memcpy(&mcaddr_list[0], &bnad_bcast_addr[0], ETH_ALEN);
2738 /* Copy rest of the MC addresses */
2739 bnad_netdev_mc_list_get(netdev, mcaddr_list);
2741 bna_rx_mcast_listset(bnad->rx_info[0].rx, mc_count + 1,
2744 /* Should we enable BNAD_CF_ALLMULTI for err != 0 ? */
2748 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2752 * bna_lock is used to sync writes to netdev->addr
2753 * conf_lock cannot be used since this call may be made
2754 * in a non-blocking context.
2757 bnad_set_mac_address(struct net_device *netdev, void *mac_addr)
2760 struct bnad *bnad = netdev_priv(netdev);
2761 struct sockaddr *sa = (struct sockaddr *)mac_addr;
2762 unsigned long flags;
2764 spin_lock_irqsave(&bnad->bna_lock, flags);
2766 err = bnad_mac_addr_set_locked(bnad, sa->sa_data);
2769 memcpy(netdev->dev_addr, sa->sa_data, netdev->addr_len);
2771 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2777 bnad_change_mtu(struct net_device *netdev, int new_mtu)
2780 unsigned long flags;
2782 struct bnad *bnad = netdev_priv(netdev);
2784 if (new_mtu + ETH_HLEN < ETH_ZLEN || new_mtu > BNAD_JUMBO_MTU)
2787 mutex_lock(&bnad->conf_mutex);
2789 netdev->mtu = new_mtu;
2791 mtu = ETH_HLEN + new_mtu + ETH_FCS_LEN;
2793 spin_lock_irqsave(&bnad->bna_lock, flags);
2794 bna_port_mtu_set(&bnad->bna.port, mtu, NULL);
2795 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2797 mutex_unlock(&bnad->conf_mutex);
2802 bnad_vlan_rx_register(struct net_device *netdev,
2803 struct vlan_group *vlan_grp)
2805 struct bnad *bnad = netdev_priv(netdev);
2807 mutex_lock(&bnad->conf_mutex);
2808 bnad->vlan_grp = vlan_grp;
2809 mutex_unlock(&bnad->conf_mutex);
2813 bnad_vlan_rx_add_vid(struct net_device *netdev,
2816 struct bnad *bnad = netdev_priv(netdev);
2817 unsigned long flags;
2819 if (!bnad->rx_info[0].rx)
2822 mutex_lock(&bnad->conf_mutex);
2824 spin_lock_irqsave(&bnad->bna_lock, flags);
2825 bna_rx_vlan_add(bnad->rx_info[0].rx, vid);
2826 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2828 mutex_unlock(&bnad->conf_mutex);
2832 bnad_vlan_rx_kill_vid(struct net_device *netdev,
2835 struct bnad *bnad = netdev_priv(netdev);
2836 unsigned long flags;
2838 if (!bnad->rx_info[0].rx)
2841 mutex_lock(&bnad->conf_mutex);
2843 spin_lock_irqsave(&bnad->bna_lock, flags);
2844 bna_rx_vlan_del(bnad->rx_info[0].rx, vid);
2845 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2847 mutex_unlock(&bnad->conf_mutex);
2850 #ifdef CONFIG_NET_POLL_CONTROLLER
2852 bnad_netpoll(struct net_device *netdev)
2854 struct bnad *bnad = netdev_priv(netdev);
2855 struct bnad_rx_info *rx_info;
2856 struct bnad_rx_ctrl *rx_ctrl;
2860 if (!(bnad->cfg_flags & BNAD_CF_MSIX)) {
2861 bna_intx_disable(&bnad->bna, curr_mask);
2862 bnad_isr(bnad->pcidev->irq, netdev);
2863 bna_intx_enable(&bnad->bna, curr_mask);
2865 for (i = 0; i < bnad->num_rx; i++) {
2866 rx_info = &bnad->rx_info[i];
2869 for (j = 0; j < bnad->num_rxp_per_rx; j++) {
2870 rx_ctrl = &rx_info->rx_ctrl[j];
2872 bnad_disable_rx_irq(bnad,
2874 bnad_netif_rx_schedule_poll(bnad,
2883 static const struct net_device_ops bnad_netdev_ops = {
2884 .ndo_open = bnad_open,
2885 .ndo_stop = bnad_stop,
2886 .ndo_start_xmit = bnad_start_xmit,
2887 .ndo_get_stats64 = bnad_get_stats64,
2888 .ndo_set_rx_mode = bnad_set_rx_mode,
2889 .ndo_set_multicast_list = bnad_set_rx_mode,
2890 .ndo_validate_addr = eth_validate_addr,
2891 .ndo_set_mac_address = bnad_set_mac_address,
2892 .ndo_change_mtu = bnad_change_mtu,
2893 .ndo_vlan_rx_register = bnad_vlan_rx_register,
2894 .ndo_vlan_rx_add_vid = bnad_vlan_rx_add_vid,
2895 .ndo_vlan_rx_kill_vid = bnad_vlan_rx_kill_vid,
2896 #ifdef CONFIG_NET_POLL_CONTROLLER
2897 .ndo_poll_controller = bnad_netpoll
2902 bnad_netdev_init(struct bnad *bnad, bool using_dac)
2904 struct net_device *netdev = bnad->netdev;
2906 netdev->features |= NETIF_F_IPV6_CSUM;
2907 netdev->features |= NETIF_F_TSO;
2908 netdev->features |= NETIF_F_TSO6;
2910 netdev->features |= NETIF_F_GRO;
2911 pr_warn("bna: GRO enabled, using kernel stack GRO\n");
2913 netdev->features |= NETIF_F_SG | NETIF_F_IP_CSUM;
2916 netdev->features |= NETIF_F_HIGHDMA;
2919 NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX |
2920 NETIF_F_HW_VLAN_FILTER;
2922 netdev->vlan_features = netdev->features;
2923 netdev->mem_start = bnad->mmio_start;
2924 netdev->mem_end = bnad->mmio_start + bnad->mmio_len - 1;
2926 netdev->netdev_ops = &bnad_netdev_ops;
2927 bnad_set_ethtool_ops(netdev);
2931 * 1. Initialize the bnad structure
2932 * 2. Setup netdev pointer in pci_dev
2933 * 3. Initialze Tx free tasklet
2934 * 4. Initialize no. of TxQ & CQs & MSIX vectors
2937 bnad_init(struct bnad *bnad,
2938 struct pci_dev *pdev, struct net_device *netdev)
2940 unsigned long flags;
2942 SET_NETDEV_DEV(netdev, &pdev->dev);
2943 pci_set_drvdata(pdev, netdev);
2945 bnad->netdev = netdev;
2946 bnad->pcidev = pdev;
2947 bnad->mmio_start = pci_resource_start(pdev, 0);
2948 bnad->mmio_len = pci_resource_len(pdev, 0);
2949 bnad->bar0 = ioremap_nocache(bnad->mmio_start, bnad->mmio_len);
2951 dev_err(&pdev->dev, "ioremap for bar0 failed\n");
2952 pci_set_drvdata(pdev, NULL);
2955 pr_info("bar0 mapped to %p, len %llu\n", bnad->bar0,
2956 (unsigned long long) bnad->mmio_len);
2958 spin_lock_irqsave(&bnad->bna_lock, flags);
2959 if (!bnad_msix_disable)
2960 bnad->cfg_flags = BNAD_CF_MSIX;
2962 bnad->cfg_flags |= BNAD_CF_DIM_ENABLED;
2964 bnad_q_num_init(bnad);
2965 spin_unlock_irqrestore(&bnad->bna_lock, flags);
2967 bnad->msix_num = (bnad->num_tx * bnad->num_txq_per_tx) +
2968 (bnad->num_rx * bnad->num_rxp_per_rx) +
2969 BNAD_MAILBOX_MSIX_VECTORS;
2971 bnad->txq_depth = BNAD_TXQ_DEPTH;
2972 bnad->rxq_depth = BNAD_RXQ_DEPTH;
2973 bnad->rx_csum = true;
2975 bnad->tx_coalescing_timeo = BFI_TX_COALESCING_TIMEO;
2976 bnad->rx_coalescing_timeo = BFI_RX_COALESCING_TIMEO;
2978 tasklet_init(&bnad->tx_free_tasklet, bnad_tx_free_tasklet,
2979 (unsigned long)bnad);
2985 * Must be called after bnad_pci_uninit()
2986 * so that iounmap() and pci_set_drvdata(NULL)
2987 * happens only after PCI uninitialization.
2990 bnad_uninit(struct bnad *bnad)
2993 iounmap(bnad->bar0);
2994 pci_set_drvdata(bnad->pcidev, NULL);
2999 a) Per device mutes used for serializing configuration
3000 changes from OS interface
3001 b) spin lock used to protect bna state machine
3004 bnad_lock_init(struct bnad *bnad)
3006 spin_lock_init(&bnad->bna_lock);
3007 mutex_init(&bnad->conf_mutex);
3011 bnad_lock_uninit(struct bnad *bnad)
3013 mutex_destroy(&bnad->conf_mutex);
3016 /* PCI Initialization */
3018 bnad_pci_init(struct bnad *bnad,
3019 struct pci_dev *pdev, bool *using_dac)
3023 err = pci_enable_device(pdev);
3026 err = pci_request_regions(pdev, BNAD_NAME);
3028 goto disable_device;
3029 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
3030 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
3033 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
3035 err = dma_set_coherent_mask(&pdev->dev,
3038 goto release_regions;
3042 pci_set_master(pdev);
3046 pci_release_regions(pdev);
3048 pci_disable_device(pdev);
3054 bnad_pci_uninit(struct pci_dev *pdev)
3056 pci_release_regions(pdev);
3057 pci_disable_device(pdev);
3060 static int __devinit
3061 bnad_pci_probe(struct pci_dev *pdev,
3062 const struct pci_device_id *pcidev_id)
3064 bool using_dac = false;
3068 struct net_device *netdev;
3069 struct bfa_pcidev pcidev_info;
3070 unsigned long flags;
3072 pr_info("bnad_pci_probe : (0x%p, 0x%p) PCI Func : (%d)\n",
3073 pdev, pcidev_id, PCI_FUNC(pdev->devfn));
3075 mutex_lock(&bnad_fwimg_mutex);
3076 if (!cna_get_firmware_buf(pdev)) {
3077 mutex_unlock(&bnad_fwimg_mutex);
3078 pr_warn("Failed to load Firmware Image!\n");
3081 mutex_unlock(&bnad_fwimg_mutex);
3084 * Allocates sizeof(struct net_device + struct bnad)
3085 * bnad = netdev->priv
3087 netdev = alloc_etherdev(sizeof(struct bnad));
3089 dev_err(&pdev->dev, "alloc_etherdev failed\n");
3093 bnad = netdev_priv(netdev);
3096 * PCI initialization
3097 * Output : using_dac = 1 for 64 bit DMA
3098 * = 0 for 32 bit DMA
3100 err = bnad_pci_init(bnad, pdev, &using_dac);
3104 bnad_lock_init(bnad);
3106 * Initialize bnad structure
3107 * Setup relation between pci_dev & netdev
3108 * Init Tx free tasklet
3110 err = bnad_init(bnad, pdev, netdev);
3113 /* Initialize netdev structure, set up ethtool ops */
3114 bnad_netdev_init(bnad, using_dac);
3116 /* Set link to down state */
3117 netif_carrier_off(netdev);
3119 bnad_enable_msix(bnad);
3121 /* Get resource requirement form bna */
3122 bna_res_req(&bnad->res_info[0]);
3124 /* Allocate resources from bna */
3125 err = bnad_res_alloc(bnad);
3131 /* Setup pcidev_info for bna_init() */
3132 pcidev_info.pci_slot = PCI_SLOT(bnad->pcidev->devfn);
3133 pcidev_info.pci_func = PCI_FUNC(bnad->pcidev->devfn);
3134 pcidev_info.device_id = bnad->pcidev->device;
3135 pcidev_info.pci_bar_kva = bnad->bar0;
3137 mutex_lock(&bnad->conf_mutex);
3139 spin_lock_irqsave(&bnad->bna_lock, flags);
3140 bna_init(bna, bnad, &pcidev_info, &bnad->res_info[0]);
3141 spin_unlock_irqrestore(&bnad->bna_lock, flags);
3143 bnad->stats.bna_stats = &bna->stats;
3146 setup_timer(&bnad->bna.device.ioc.ioc_timer, bnad_ioc_timeout,
3147 ((unsigned long)bnad));
3148 setup_timer(&bnad->bna.device.ioc.hb_timer, bnad_ioc_hb_check,
3149 ((unsigned long)bnad));
3150 setup_timer(&bnad->bna.device.ioc.iocpf_timer, bnad_iocpf_timeout,
3151 ((unsigned long)bnad));
3152 setup_timer(&bnad->bna.device.ioc.sem_timer, bnad_iocpf_sem_timeout,
3153 ((unsigned long)bnad));
3155 /* Now start the timer before calling IOC */
3156 mod_timer(&bnad->bna.device.ioc.iocpf_timer,
3157 jiffies + msecs_to_jiffies(BNA_IOC_TIMER_FREQ));
3161 * Don't care even if err != 0, bna state machine will
3164 err = bnad_device_enable(bnad);
3166 /* Get the burnt-in mac */
3167 spin_lock_irqsave(&bnad->bna_lock, flags);
3168 bna_port_mac_get(&bna->port, &bnad->perm_addr);
3169 bnad_set_netdev_perm_addr(bnad);
3170 spin_unlock_irqrestore(&bnad->bna_lock, flags);
3172 mutex_unlock(&bnad->conf_mutex);
3174 /* Finally, reguister with net_device layer */
3175 err = register_netdev(netdev);
3177 pr_err("BNA : Registering with netdev failed\n");
3178 goto disable_device;
3184 mutex_lock(&bnad->conf_mutex);
3185 bnad_device_disable(bnad);
3186 del_timer_sync(&bnad->bna.device.ioc.ioc_timer);
3187 del_timer_sync(&bnad->bna.device.ioc.sem_timer);
3188 del_timer_sync(&bnad->bna.device.ioc.hb_timer);
3189 spin_lock_irqsave(&bnad->bna_lock, flags);
3191 spin_unlock_irqrestore(&bnad->bna_lock, flags);
3192 mutex_unlock(&bnad->conf_mutex);
3194 bnad_res_free(bnad);
3195 bnad_disable_msix(bnad);
3197 bnad_pci_uninit(pdev);
3198 bnad_lock_uninit(bnad);
3201 free_netdev(netdev);
3205 static void __devexit
3206 bnad_pci_remove(struct pci_dev *pdev)
3208 struct net_device *netdev = pci_get_drvdata(pdev);
3211 unsigned long flags;
3216 pr_info("%s bnad_pci_remove\n", netdev->name);
3217 bnad = netdev_priv(netdev);
3220 unregister_netdev(netdev);
3222 mutex_lock(&bnad->conf_mutex);
3223 bnad_device_disable(bnad);
3224 del_timer_sync(&bnad->bna.device.ioc.ioc_timer);
3225 del_timer_sync(&bnad->bna.device.ioc.sem_timer);
3226 del_timer_sync(&bnad->bna.device.ioc.hb_timer);
3227 spin_lock_irqsave(&bnad->bna_lock, flags);
3229 spin_unlock_irqrestore(&bnad->bna_lock, flags);
3230 mutex_unlock(&bnad->conf_mutex);
3232 bnad_res_free(bnad);
3233 bnad_disable_msix(bnad);
3234 bnad_pci_uninit(pdev);
3235 bnad_lock_uninit(bnad);
3237 free_netdev(netdev);
3240 static const struct pci_device_id bnad_pci_id_table[] = {
3242 PCI_DEVICE(PCI_VENDOR_ID_BROCADE,
3243 PCI_DEVICE_ID_BROCADE_CT),
3244 .class = PCI_CLASS_NETWORK_ETHERNET << 8,
3245 .class_mask = 0xffff00
3249 MODULE_DEVICE_TABLE(pci, bnad_pci_id_table);
3251 static struct pci_driver bnad_pci_driver = {
3253 .id_table = bnad_pci_id_table,
3254 .probe = bnad_pci_probe,
3255 .remove = __devexit_p(bnad_pci_remove),
3259 bnad_module_init(void)
3263 pr_info("Brocade 10G Ethernet driver\n");
3265 bfa_nw_ioc_auto_recover(bnad_ioc_auto_recover);
3267 err = pci_register_driver(&bnad_pci_driver);
3269 pr_err("bna : PCI registration failed in module init "
3278 bnad_module_exit(void)
3280 pci_unregister_driver(&bnad_pci_driver);
3283 release_firmware(bfi_fw);
3286 module_init(bnad_module_init);
3287 module_exit(bnad_module_exit);
3289 MODULE_AUTHOR("Brocade");
3290 MODULE_LICENSE("GPL");
3291 MODULE_DESCRIPTION("Brocade 10G PCIe Ethernet driver");
3292 MODULE_VERSION(BNAD_VERSION);
3293 MODULE_FIRMWARE(CNA_FW_FILE_CT);