2 * Copyright (C) ST-Ericsson AB 2010
3 * Contact: Sjur Brendeland / sjur.brandeland@stericsson.com
4 * Author: Daniel Martensson / Daniel.Martensson@stericsson.com
5 * License terms: GNU General Public License (GPL) version 2.
7 #include <linux/version.h>
8 #include <linux/init.h>
9 #include <linux/module.h>
10 #include <linux/device.h>
11 #include <linux/platform_device.h>
12 #include <linux/string.h>
13 #include <linux/semaphore.h>
14 #include <linux/workqueue.h>
15 #include <linux/completion.h>
16 #include <linux/list.h>
17 #include <linux/interrupt.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/delay.h>
20 #include <linux/sched.h>
21 #include <linux/debugfs.h>
22 #include <net/caif/caif_spi.h>
24 #ifndef CONFIG_CAIF_SPI_SYNC
25 #define SPI_DATA_POS 0
26 static inline int forward_to_spi_cmd(struct cfspi *cfspi)
28 return cfspi->rx_cpck_len;
31 #define SPI_DATA_POS SPI_CMD_SZ
32 static inline int forward_to_spi_cmd(struct cfspi *cfspi)
38 int spi_frm_align = 2;
39 int spi_up_head_align = 1;
40 int spi_up_tail_align;
41 int spi_down_head_align = 3;
42 int spi_down_tail_align = 1;
44 #ifdef CONFIG_DEBUG_FS
45 static inline void debugfs_store_prev(struct cfspi *cfspi)
47 /* Store previous command for debugging reasons.*/
48 cfspi->pcmd = cfspi->cmd;
49 /* Store previous transfer. */
50 cfspi->tx_ppck_len = cfspi->tx_cpck_len;
51 cfspi->rx_ppck_len = cfspi->rx_cpck_len;
54 static inline void debugfs_store_prev(struct cfspi *cfspi)
59 void cfspi_xfer(struct work_struct *work)
65 cfspi = container_of(work, struct cfspi, work);
67 /* Initialize state. */
68 cfspi->cmd = SPI_CMD_EOT;
72 cfspi_dbg_state(cfspi, CFSPI_STATE_WAITING);
74 /* Wait for master talk or transmit event. */
75 wait_event_interruptible(cfspi->wait,
76 test_bit(SPI_XFER, &cfspi->state) ||
77 test_bit(SPI_TERMINATE, &cfspi->state));
79 if (test_bit(SPI_TERMINATE, &cfspi->state))
83 /* Prefill buffers for easier debugging. */
84 memset(cfspi->xfer.va_tx, 0xFF, SPI_DMA_BUF_LEN);
85 memset(cfspi->xfer.va_rx, 0xFF, SPI_DMA_BUF_LEN);
86 #endif /* CFSPI_DBG_PREFILL */
88 cfspi_dbg_state(cfspi, CFSPI_STATE_AWAKE);
90 /* Check whether we have a committed frame. */
91 if (cfspi->tx_cpck_len) {
94 cfspi_dbg_state(cfspi, CFSPI_STATE_FETCH_PKT);
96 /* Copy commited SPI frames after the SPI indication. */
97 ptr = (u8 *) cfspi->xfer.va_tx;
99 len = cfspi_xmitfrm(cfspi, ptr, cfspi->tx_cpck_len);
100 WARN_ON(len != cfspi->tx_cpck_len);
103 cfspi_dbg_state(cfspi, CFSPI_STATE_GET_NEXT);
105 /* Get length of next frame to commit. */
106 cfspi->tx_npck_len = cfspi_xmitlen(cfspi);
108 WARN_ON(cfspi->tx_npck_len > SPI_DMA_BUF_LEN);
111 * Add indication and length at the beginning of the frame,
112 * using little endian.
114 ptr = (u8 *) cfspi->xfer.va_tx;
115 *ptr++ = SPI_CMD_IND;
116 *ptr++ = (SPI_CMD_IND & 0xFF00) >> 8;
117 *ptr++ = cfspi->tx_npck_len & 0x00FF;
118 *ptr++ = (cfspi->tx_npck_len & 0xFF00) >> 8;
120 /* Calculate length of DMAs. */
121 cfspi->xfer.tx_dma_len = cfspi->tx_cpck_len + SPI_IND_SZ;
122 cfspi->xfer.rx_dma_len = cfspi->rx_cpck_len + SPI_CMD_SZ;
124 /* Add SPI TX frame alignment padding, if necessary. */
125 if (cfspi->tx_cpck_len &&
126 (cfspi->xfer.tx_dma_len % spi_frm_align)) {
128 cfspi->xfer.tx_dma_len += spi_frm_align -
129 (cfspi->xfer.tx_dma_len % spi_frm_align);
132 /* Add SPI RX frame alignment padding, if necessary. */
133 if (cfspi->rx_cpck_len &&
134 (cfspi->xfer.rx_dma_len % spi_frm_align)) {
136 cfspi->xfer.rx_dma_len += spi_frm_align -
137 (cfspi->xfer.rx_dma_len % spi_frm_align);
140 cfspi_dbg_state(cfspi, CFSPI_STATE_INIT_XFER);
142 /* Start transfer. */
143 ret = cfspi->dev->init_xfer(&cfspi->xfer, cfspi->dev);
146 cfspi_dbg_state(cfspi, CFSPI_STATE_WAIT_ACTIVE);
149 * TODO: We might be able to make an assumption if this is the
150 * first loop. Make sure that minimum toggle time is respected.
152 udelay(MIN_TRANSITION_TIME_USEC);
154 cfspi_dbg_state(cfspi, CFSPI_STATE_SIG_ACTIVE);
156 /* Signal that we are ready to recieve data. */
157 cfspi->dev->sig_xfer(true, cfspi->dev);
159 cfspi_dbg_state(cfspi, CFSPI_STATE_WAIT_XFER_DONE);
161 /* Wait for transfer completion. */
162 wait_for_completion(&cfspi->comp);
164 cfspi_dbg_state(cfspi, CFSPI_STATE_XFER_DONE);
166 if (cfspi->cmd == SPI_CMD_EOT) {
168 * Clear the master talk bit. A xfer is always at
171 clear_bit(SPI_SS_ON, &cfspi->state);
174 cfspi_dbg_state(cfspi, CFSPI_STATE_WAIT_INACTIVE);
176 /* Make sure that the minimum toggle time is respected. */
177 if (SPI_XFER_TIME_USEC(cfspi->xfer.tx_dma_len,
178 cfspi->dev->clk_mhz) <
179 MIN_TRANSITION_TIME_USEC) {
181 udelay(MIN_TRANSITION_TIME_USEC -
183 (cfspi->xfer.tx_dma_len, cfspi->dev->clk_mhz));
186 cfspi_dbg_state(cfspi, CFSPI_STATE_SIG_INACTIVE);
188 /* De-assert transfer signal. */
189 cfspi->dev->sig_xfer(false, cfspi->dev);
191 /* Check whether we received a CAIF packet. */
192 if (cfspi->rx_cpck_len) {
195 cfspi_dbg_state(cfspi, CFSPI_STATE_DELIVER_PKT);
197 /* Parse SPI frame. */
198 ptr = ((u8 *)(cfspi->xfer.va_rx + SPI_DATA_POS));
200 len = cfspi_rxfrm(cfspi, ptr, cfspi->rx_cpck_len);
201 WARN_ON(len != cfspi->rx_cpck_len);
204 /* Check the next SPI command and length. */
205 ptr = (u8 *) cfspi->xfer.va_rx;
207 ptr += forward_to_spi_cmd(cfspi);
210 cfspi->cmd |= ((*ptr++) << 8) & 0xFF00;
211 cfspi->rx_npck_len = *ptr++;
212 cfspi->rx_npck_len |= ((*ptr++) << 8) & 0xFF00;
214 WARN_ON(cfspi->rx_npck_len > SPI_DMA_BUF_LEN);
215 WARN_ON(cfspi->cmd > SPI_CMD_EOT);
217 debugfs_store_prev(cfspi);
219 /* Check whether the master issued an EOT command. */
220 if (cfspi->cmd == SPI_CMD_EOT) {
222 cfspi->tx_cpck_len = 0;
223 cfspi->rx_cpck_len = 0;
226 cfspi->tx_cpck_len = cfspi->tx_npck_len;
227 cfspi->rx_cpck_len = cfspi->rx_npck_len;
231 * Check whether we need to clear the xfer bit.
232 * Spin lock needed for packet insertion.
233 * Test and clear of different bits
236 spin_lock_irqsave(&cfspi->lock, flags);
237 if (cfspi->cmd == SPI_CMD_EOT && !cfspi_xmitlen(cfspi)
238 && !test_bit(SPI_SS_ON, &cfspi->state))
239 clear_bit(SPI_XFER, &cfspi->state);
241 spin_unlock_irqrestore(&cfspi->lock, flags);
245 struct platform_driver cfspi_spi_driver = {
246 .probe = cfspi_spi_probe,
247 .remove = cfspi_spi_remove,
249 .name = "cfspi_sspi",
250 .owner = THIS_MODULE,