2 * PCI bus driver for Bosch C_CAN/D_CAN controller
4 * Copyright (C) 2012 Federico Vaga <federico.vaga@gmail.com>
6 * Borrowed from c_can_platform.c
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/netdevice.h>
16 #include <linux/pci.h>
18 #include <linux/can/dev.h>
22 enum c_can_pci_reg_align {
27 struct c_can_pci_data {
28 /* Specify if is C_CAN or D_CAN */
29 enum c_can_dev_id type;
30 /* Set the register alignment in the memory */
31 enum c_can_pci_reg_align reg_align;
32 /* Set the frequency */
37 * 16-bit c_can registers can be arranged differently in the memory
38 * architecture of different implementations. For example: 16-bit
39 * registers can be aligned to a 16-bit boundary or 32-bit boundary etc.
40 * Handle the same by providing a common read/write interface.
42 static u16 c_can_pci_read_reg_aligned_to_16bit(struct c_can_priv *priv,
45 return readw(priv->base + priv->regs[index]);
48 static void c_can_pci_write_reg_aligned_to_16bit(struct c_can_priv *priv,
49 enum reg index, u16 val)
51 writew(val, priv->base + priv->regs[index]);
54 static u16 c_can_pci_read_reg_aligned_to_32bit(struct c_can_priv *priv,
57 return readw(priv->base + 2 * priv->regs[index]);
60 static void c_can_pci_write_reg_aligned_to_32bit(struct c_can_priv *priv,
61 enum reg index, u16 val)
63 writew(val, priv->base + 2 * priv->regs[index]);
66 static int c_can_pci_probe(struct pci_dev *pdev,
67 const struct pci_device_id *ent)
69 struct c_can_pci_data *c_can_pci_data = (void *)ent->driver_data;
70 struct c_can_priv *priv;
71 struct net_device *dev;
75 ret = pci_enable_device(pdev);
77 dev_err(&pdev->dev, "pci_enable_device FAILED\n");
81 ret = pci_request_regions(pdev, KBUILD_MODNAME);
83 dev_err(&pdev->dev, "pci_request_regions FAILED\n");
84 goto out_disable_device;
87 ret = pci_enable_msi(pdev);
89 dev_info(&pdev->dev, "MSI enabled\n");
93 addr = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
96 "device has no PCI memory resources, "
99 goto out_release_regions;
102 /* allocate the c_can device */
103 dev = alloc_c_can_dev();
109 priv = netdev_priv(dev);
110 pci_set_drvdata(pdev, dev);
111 SET_NETDEV_DEV(dev, &pdev->dev);
113 dev->irq = pdev->irq;
116 if (!c_can_pci_data->freq) {
117 dev_err(&pdev->dev, "no clock frequency defined\n");
121 priv->can.clock.freq = c_can_pci_data->freq;
124 /* Configure CAN type */
125 switch (c_can_pci_data->type) {
127 priv->regs = reg_map_c_can;
130 priv->regs = reg_map_d_can;
131 priv->can.ctrlmode_supported |= CAN_CTRLMODE_3_SAMPLES;
138 priv->type = c_can_pci_data->type;
140 /* Configure access to registers */
141 switch (c_can_pci_data->reg_align) {
142 case C_CAN_REG_ALIGN_32:
143 priv->read_reg = c_can_pci_read_reg_aligned_to_32bit;
144 priv->write_reg = c_can_pci_write_reg_aligned_to_32bit;
146 case C_CAN_REG_ALIGN_16:
147 priv->read_reg = c_can_pci_read_reg_aligned_to_16bit;
148 priv->write_reg = c_can_pci_write_reg_aligned_to_16bit;
155 ret = register_c_can_dev(dev);
157 dev_err(&pdev->dev, "registering %s failed (err=%d)\n",
158 KBUILD_MODNAME, ret);
162 dev_dbg(&pdev->dev, "%s device registered (regs=%p, irq=%d)\n",
163 KBUILD_MODNAME, priv->regs, dev->irq);
170 pci_iounmap(pdev, addr);
172 pci_disable_msi(pdev);
173 pci_clear_master(pdev);
174 pci_release_regions(pdev);
176 pci_disable_device(pdev);
181 static void c_can_pci_remove(struct pci_dev *pdev)
183 struct net_device *dev = pci_get_drvdata(pdev);
184 struct c_can_priv *priv = netdev_priv(dev);
186 unregister_c_can_dev(dev);
190 pci_iounmap(pdev, priv->base);
191 pci_disable_msi(pdev);
192 pci_clear_master(pdev);
193 pci_release_regions(pdev);
194 pci_disable_device(pdev);
197 static struct c_can_pci_data c_can_sta2x11= {
199 .reg_align = C_CAN_REG_ALIGN_32,
200 .freq = 52000000, /* 52 Mhz */
203 #define C_CAN_ID(_vend, _dev, _driverdata) { \
204 PCI_DEVICE(_vend, _dev), \
205 .driver_data = (unsigned long)&_driverdata, \
207 static DEFINE_PCI_DEVICE_TABLE(c_can_pci_tbl) = {
208 C_CAN_ID(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_CAN,
212 static struct pci_driver c_can_pci_driver = {
213 .name = KBUILD_MODNAME,
214 .id_table = c_can_pci_tbl,
215 .probe = c_can_pci_probe,
216 .remove = c_can_pci_remove,
219 module_pci_driver(c_can_pci_driver);
221 MODULE_AUTHOR("Federico Vaga <federico.vaga@gmail.com>");
222 MODULE_LICENSE("GPL v2");
223 MODULE_DESCRIPTION("PCI CAN bus driver for Bosch C_CAN/D_CAN controller");
224 MODULE_DEVICE_TABLE(pci, c_can_pci_tbl);