1 /* cnic.c: Broadcom CNIC core network driver.
3 * Copyright (c) 2006-2010 Broadcom Corporation
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
9 * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
10 * Modified and maintained by: Michael Chan <mchan@broadcom.com>
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 #include <linux/module.h>
17 #include <linux/kernel.h>
18 #include <linux/errno.h>
19 #include <linux/list.h>
20 #include <linux/slab.h>
21 #include <linux/pci.h>
22 #include <linux/init.h>
23 #include <linux/netdevice.h>
24 #include <linux/uio_driver.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/delay.h>
28 #include <linux/ethtool.h>
29 #include <linux/if_vlan.h>
30 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
35 #include <net/route.h>
37 #include <net/ip6_route.h>
38 #include <net/ip6_checksum.h>
39 #include <scsi/iscsi_if.h>
43 #include "bnx2x_reg.h"
44 #include "bnx2x_fw_defs.h"
45 #include "bnx2x_hsi.h"
46 #include "../scsi/bnx2i/57xx_iscsi_constants.h"
47 #include "../scsi/bnx2i/57xx_iscsi_hsi.h"
49 #include "cnic_defs.h"
51 #define DRV_MODULE_NAME "cnic"
53 static char version[] __devinitdata =
54 "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
56 MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
57 "Chen (zongxi@broadcom.com");
58 MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
59 MODULE_LICENSE("GPL");
60 MODULE_VERSION(CNIC_MODULE_VERSION);
62 static LIST_HEAD(cnic_dev_list);
63 static DEFINE_RWLOCK(cnic_dev_lock);
64 static DEFINE_MUTEX(cnic_lock);
66 static struct cnic_ulp_ops *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
68 static int cnic_service_bnx2(void *, void *);
69 static int cnic_service_bnx2x(void *, void *);
70 static int cnic_ctl(void *, struct cnic_ctl_info *);
72 static struct cnic_ops cnic_bnx2_ops = {
73 .cnic_owner = THIS_MODULE,
74 .cnic_handler = cnic_service_bnx2,
78 static struct cnic_ops cnic_bnx2x_ops = {
79 .cnic_owner = THIS_MODULE,
80 .cnic_handler = cnic_service_bnx2x,
84 static void cnic_shutdown_rings(struct cnic_dev *);
85 static void cnic_init_rings(struct cnic_dev *);
86 static int cnic_cm_set_pg(struct cnic_sock *);
88 static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
90 struct cnic_dev *dev = uinfo->priv;
91 struct cnic_local *cp = dev->cnic_priv;
93 if (!capable(CAP_NET_ADMIN))
96 if (cp->uio_dev != -1)
100 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
105 cp->uio_dev = iminor(inode);
107 cnic_init_rings(dev);
113 static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
115 struct cnic_dev *dev = uinfo->priv;
116 struct cnic_local *cp = dev->cnic_priv;
118 cnic_shutdown_rings(dev);
124 static inline void cnic_hold(struct cnic_dev *dev)
126 atomic_inc(&dev->ref_count);
129 static inline void cnic_put(struct cnic_dev *dev)
131 atomic_dec(&dev->ref_count);
134 static inline void csk_hold(struct cnic_sock *csk)
136 atomic_inc(&csk->ref_count);
139 static inline void csk_put(struct cnic_sock *csk)
141 atomic_dec(&csk->ref_count);
144 static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
146 struct cnic_dev *cdev;
148 read_lock(&cnic_dev_lock);
149 list_for_each_entry(cdev, &cnic_dev_list, list) {
150 if (netdev == cdev->netdev) {
152 read_unlock(&cnic_dev_lock);
156 read_unlock(&cnic_dev_lock);
160 static inline void ulp_get(struct cnic_ulp_ops *ulp_ops)
162 atomic_inc(&ulp_ops->ref_count);
165 static inline void ulp_put(struct cnic_ulp_ops *ulp_ops)
167 atomic_dec(&ulp_ops->ref_count);
170 static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
172 struct cnic_local *cp = dev->cnic_priv;
173 struct cnic_eth_dev *ethdev = cp->ethdev;
174 struct drv_ctl_info info;
175 struct drv_ctl_io *io = &info.data.io;
177 info.cmd = DRV_CTL_CTX_WR_CMD;
178 io->cid_addr = cid_addr;
181 ethdev->drv_ctl(dev->netdev, &info);
184 static void cnic_ctx_tbl_wr(struct cnic_dev *dev, u32 off, dma_addr_t addr)
186 struct cnic_local *cp = dev->cnic_priv;
187 struct cnic_eth_dev *ethdev = cp->ethdev;
188 struct drv_ctl_info info;
189 struct drv_ctl_io *io = &info.data.io;
191 info.cmd = DRV_CTL_CTXTBL_WR_CMD;
194 ethdev->drv_ctl(dev->netdev, &info);
197 static void cnic_ring_ctl(struct cnic_dev *dev, u32 cid, u32 cl_id, int start)
199 struct cnic_local *cp = dev->cnic_priv;
200 struct cnic_eth_dev *ethdev = cp->ethdev;
201 struct drv_ctl_info info;
202 struct drv_ctl_l2_ring *ring = &info.data.ring;
205 info.cmd = DRV_CTL_START_L2_CMD;
207 info.cmd = DRV_CTL_STOP_L2_CMD;
210 ring->client_id = cl_id;
211 ethdev->drv_ctl(dev->netdev, &info);
214 static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
216 struct cnic_local *cp = dev->cnic_priv;
217 struct cnic_eth_dev *ethdev = cp->ethdev;
218 struct drv_ctl_info info;
219 struct drv_ctl_io *io = &info.data.io;
221 info.cmd = DRV_CTL_IO_WR_CMD;
224 ethdev->drv_ctl(dev->netdev, &info);
227 static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
229 struct cnic_local *cp = dev->cnic_priv;
230 struct cnic_eth_dev *ethdev = cp->ethdev;
231 struct drv_ctl_info info;
232 struct drv_ctl_io *io = &info.data.io;
234 info.cmd = DRV_CTL_IO_RD_CMD;
236 ethdev->drv_ctl(dev->netdev, &info);
240 static int cnic_in_use(struct cnic_sock *csk)
242 return test_bit(SK_F_INUSE, &csk->flags);
245 static void cnic_kwq_completion(struct cnic_dev *dev, u32 count)
247 struct cnic_local *cp = dev->cnic_priv;
248 struct cnic_eth_dev *ethdev = cp->ethdev;
249 struct drv_ctl_info info;
251 info.cmd = DRV_CTL_COMPLETION_CMD;
252 info.data.comp.comp_count = count;
253 ethdev->drv_ctl(dev->netdev, &info);
256 static int cnic_get_l5_cid(struct cnic_local *cp, u32 cid, u32 *l5_cid)
260 for (i = 0; i < cp->max_cid_space; i++) {
261 if (cp->ctx_tbl[i].cid == cid) {
269 static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
270 struct cnic_sock *csk)
272 struct iscsi_path path_req;
275 u32 msg_type = ISCSI_KEVENT_IF_DOWN;
276 struct cnic_ulp_ops *ulp_ops;
278 if (cp->uio_dev == -1)
282 len = sizeof(path_req);
283 buf = (char *) &path_req;
284 memset(&path_req, 0, len);
286 msg_type = ISCSI_KEVENT_PATH_REQ;
287 path_req.handle = (u64) csk->l5_cid;
288 if (test_bit(SK_F_IPV6, &csk->flags)) {
289 memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
290 sizeof(struct in6_addr));
291 path_req.ip_addr_len = 16;
293 memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
294 sizeof(struct in_addr));
295 path_req.ip_addr_len = 4;
297 path_req.vlan_id = csk->vlan_id;
298 path_req.pmtu = csk->mtu;
302 ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]);
304 ulp_ops->iscsi_nl_send_msg(cp->dev, msg_type, buf, len);
309 static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
315 case ISCSI_UEVENT_PATH_UPDATE: {
316 struct cnic_local *cp;
318 struct cnic_sock *csk;
319 struct iscsi_path *path_resp;
321 if (len < sizeof(*path_resp))
324 path_resp = (struct iscsi_path *) buf;
326 l5_cid = (u32) path_resp->handle;
327 if (l5_cid >= MAX_CM_SK_TBL_SZ)
331 if (!rcu_dereference(cp->ulp_ops[CNIC_ULP_L4])) {
336 csk = &cp->csk_tbl[l5_cid];
338 if (cnic_in_use(csk)) {
339 memcpy(csk->ha, path_resp->mac_addr, 6);
340 if (test_bit(SK_F_IPV6, &csk->flags))
341 memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
342 sizeof(struct in6_addr));
344 memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
345 sizeof(struct in_addr));
346 if (is_valid_ether_addr(csk->ha))
358 static int cnic_offld_prep(struct cnic_sock *csk)
360 if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
363 if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
364 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
371 static int cnic_close_prep(struct cnic_sock *csk)
373 clear_bit(SK_F_CONNECT_START, &csk->flags);
374 smp_mb__after_clear_bit();
376 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
377 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
385 static int cnic_abort_prep(struct cnic_sock *csk)
387 clear_bit(SK_F_CONNECT_START, &csk->flags);
388 smp_mb__after_clear_bit();
390 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
393 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
394 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
401 static void cnic_uio_stop(void)
403 struct cnic_dev *dev;
405 read_lock(&cnic_dev_lock);
406 list_for_each_entry(dev, &cnic_dev_list, list) {
407 struct cnic_local *cp = dev->cnic_priv;
410 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
412 read_unlock(&cnic_dev_lock);
415 int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
417 struct cnic_dev *dev;
419 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
420 pr_err("%s: Bad type %d\n", __func__, ulp_type);
423 mutex_lock(&cnic_lock);
424 if (cnic_ulp_tbl[ulp_type]) {
425 pr_err("%s: Type %d has already been registered\n",
427 mutex_unlock(&cnic_lock);
431 read_lock(&cnic_dev_lock);
432 list_for_each_entry(dev, &cnic_dev_list, list) {
433 struct cnic_local *cp = dev->cnic_priv;
435 clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
437 read_unlock(&cnic_dev_lock);
439 atomic_set(&ulp_ops->ref_count, 0);
440 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
441 mutex_unlock(&cnic_lock);
443 /* Prevent race conditions with netdev_event */
445 read_lock(&cnic_dev_lock);
446 list_for_each_entry(dev, &cnic_dev_list, list) {
447 struct cnic_local *cp = dev->cnic_priv;
449 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
450 ulp_ops->cnic_init(dev);
452 read_unlock(&cnic_dev_lock);
458 int cnic_unregister_driver(int ulp_type)
460 struct cnic_dev *dev;
461 struct cnic_ulp_ops *ulp_ops;
464 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
465 pr_err("%s: Bad type %d\n", __func__, ulp_type);
468 mutex_lock(&cnic_lock);
469 ulp_ops = cnic_ulp_tbl[ulp_type];
471 pr_err("%s: Type %d has not been registered\n",
475 read_lock(&cnic_dev_lock);
476 list_for_each_entry(dev, &cnic_dev_list, list) {
477 struct cnic_local *cp = dev->cnic_priv;
479 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
480 pr_err("%s: Type %d still has devices registered\n",
482 read_unlock(&cnic_dev_lock);
486 read_unlock(&cnic_dev_lock);
488 if (ulp_type == CNIC_ULP_ISCSI)
491 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], NULL);
493 mutex_unlock(&cnic_lock);
495 while ((atomic_read(&ulp_ops->ref_count) != 0) && (i < 20)) {
500 if (atomic_read(&ulp_ops->ref_count) != 0)
501 netdev_warn(dev->netdev, "Failed waiting for ref count to go to zero\n");
505 mutex_unlock(&cnic_lock);
509 static int cnic_start_hw(struct cnic_dev *);
510 static void cnic_stop_hw(struct cnic_dev *);
512 static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
515 struct cnic_local *cp = dev->cnic_priv;
516 struct cnic_ulp_ops *ulp_ops;
518 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
519 pr_err("%s: Bad type %d\n", __func__, ulp_type);
522 mutex_lock(&cnic_lock);
523 if (cnic_ulp_tbl[ulp_type] == NULL) {
524 pr_err("%s: Driver with type %d has not been registered\n",
526 mutex_unlock(&cnic_lock);
529 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
530 pr_err("%s: Type %d has already been registered to this device\n",
532 mutex_unlock(&cnic_lock);
536 clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
537 cp->ulp_handle[ulp_type] = ulp_ctx;
538 ulp_ops = cnic_ulp_tbl[ulp_type];
539 rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
542 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
543 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
544 ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
546 mutex_unlock(&cnic_lock);
551 EXPORT_SYMBOL(cnic_register_driver);
553 static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
555 struct cnic_local *cp = dev->cnic_priv;
558 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
559 pr_err("%s: Bad type %d\n", __func__, ulp_type);
562 mutex_lock(&cnic_lock);
563 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
564 rcu_assign_pointer(cp->ulp_ops[ulp_type], NULL);
567 pr_err("%s: device not registered to this ulp type %d\n",
569 mutex_unlock(&cnic_lock);
572 mutex_unlock(&cnic_lock);
576 while (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]) &&
581 if (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]))
582 netdev_warn(dev->netdev, "Failed waiting for ULP up call to complete\n");
586 EXPORT_SYMBOL(cnic_unregister_driver);
588 static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id)
590 id_tbl->start = start_id;
593 spin_lock_init(&id_tbl->lock);
594 id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
601 static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
603 kfree(id_tbl->table);
604 id_tbl->table = NULL;
607 static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
612 if (id >= id_tbl->max)
615 spin_lock(&id_tbl->lock);
616 if (!test_bit(id, id_tbl->table)) {
617 set_bit(id, id_tbl->table);
620 spin_unlock(&id_tbl->lock);
624 /* Returns -1 if not successful */
625 static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
629 spin_lock(&id_tbl->lock);
630 id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
631 if (id >= id_tbl->max) {
633 if (id_tbl->next != 0) {
634 id = find_first_zero_bit(id_tbl->table, id_tbl->next);
635 if (id >= id_tbl->next)
640 if (id < id_tbl->max) {
641 set_bit(id, id_tbl->table);
642 id_tbl->next = (id + 1) & (id_tbl->max - 1);
646 spin_unlock(&id_tbl->lock);
651 static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
657 if (id >= id_tbl->max)
660 clear_bit(id, id_tbl->table);
663 static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
670 for (i = 0; i < dma->num_pages; i++) {
671 if (dma->pg_arr[i]) {
672 dma_free_coherent(&dev->pcidev->dev, BCM_PAGE_SIZE,
673 dma->pg_arr[i], dma->pg_map_arr[i]);
674 dma->pg_arr[i] = NULL;
678 dma_free_coherent(&dev->pcidev->dev, dma->pgtbl_size,
679 dma->pgtbl, dma->pgtbl_map);
687 static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
690 u32 *page_table = dma->pgtbl;
692 for (i = 0; i < dma->num_pages; i++) {
693 /* Each entry needs to be in big endian format. */
694 *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
696 *page_table = (u32) dma->pg_map_arr[i];
701 static void cnic_setup_page_tbl_le(struct cnic_dev *dev, struct cnic_dma *dma)
704 u32 *page_table = dma->pgtbl;
706 for (i = 0; i < dma->num_pages; i++) {
707 /* Each entry needs to be in little endian format. */
708 *page_table = dma->pg_map_arr[i] & 0xffffffff;
710 *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
715 static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
716 int pages, int use_pg_tbl)
719 struct cnic_local *cp = dev->cnic_priv;
721 size = pages * (sizeof(void *) + sizeof(dma_addr_t));
722 dma->pg_arr = kzalloc(size, GFP_ATOMIC);
723 if (dma->pg_arr == NULL)
726 dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
727 dma->num_pages = pages;
729 for (i = 0; i < pages; i++) {
730 dma->pg_arr[i] = dma_alloc_coherent(&dev->pcidev->dev,
734 if (dma->pg_arr[i] == NULL)
740 dma->pgtbl_size = ((pages * 8) + BCM_PAGE_SIZE - 1) &
741 ~(BCM_PAGE_SIZE - 1);
742 dma->pgtbl = dma_alloc_coherent(&dev->pcidev->dev, dma->pgtbl_size,
743 &dma->pgtbl_map, GFP_ATOMIC);
744 if (dma->pgtbl == NULL)
747 cp->setup_pgtbl(dev, dma);
752 cnic_free_dma(dev, dma);
756 static void cnic_free_context(struct cnic_dev *dev)
758 struct cnic_local *cp = dev->cnic_priv;
761 for (i = 0; i < cp->ctx_blks; i++) {
762 if (cp->ctx_arr[i].ctx) {
763 dma_free_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
765 cp->ctx_arr[i].mapping);
766 cp->ctx_arr[i].ctx = NULL;
771 static void cnic_free_resc(struct cnic_dev *dev)
773 struct cnic_local *cp = dev->cnic_priv;
776 if (cp->cnic_uinfo) {
777 while (cp->uio_dev != -1 && i < 15) {
781 uio_unregister_device(cp->cnic_uinfo);
782 kfree(cp->cnic_uinfo);
783 cp->cnic_uinfo = NULL;
787 dma_free_coherent(&dev->pcidev->dev, cp->l2_buf_size,
788 cp->l2_buf, cp->l2_buf_map);
793 dma_free_coherent(&dev->pcidev->dev, cp->l2_ring_size,
794 cp->l2_ring, cp->l2_ring_map);
798 cnic_free_context(dev);
803 cnic_free_dma(dev, &cp->gbl_buf_info);
804 cnic_free_dma(dev, &cp->conn_buf_info);
805 cnic_free_dma(dev, &cp->kwq_info);
806 cnic_free_dma(dev, &cp->kwq_16_data_info);
807 cnic_free_dma(dev, &cp->kcq_info);
808 kfree(cp->iscsi_tbl);
809 cp->iscsi_tbl = NULL;
813 cnic_free_id_tbl(&cp->cid_tbl);
816 static int cnic_alloc_context(struct cnic_dev *dev)
818 struct cnic_local *cp = dev->cnic_priv;
820 if (CHIP_NUM(cp) == CHIP_NUM_5709) {
823 cp->ctx_blk_size = BCM_PAGE_SIZE;
824 cp->cids_per_blk = BCM_PAGE_SIZE / 128;
825 arr_size = BNX2_MAX_CID / cp->cids_per_blk *
826 sizeof(struct cnic_ctx);
827 cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
828 if (cp->ctx_arr == NULL)
832 for (i = 0; i < 2; i++) {
833 u32 j, reg, off, lo, hi;
836 off = BNX2_PG_CTX_MAP;
838 off = BNX2_ISCSI_CTX_MAP;
840 reg = cnic_reg_rd_ind(dev, off);
843 for (j = lo; j < hi; j += cp->cids_per_blk, k++)
844 cp->ctx_arr[k].cid = j;
848 if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
853 for (i = 0; i < cp->ctx_blks; i++) {
855 dma_alloc_coherent(&dev->pcidev->dev,
857 &cp->ctx_arr[i].mapping,
859 if (cp->ctx_arr[i].ctx == NULL)
866 static int cnic_alloc_l2_rings(struct cnic_dev *dev, int pages)
868 struct cnic_local *cp = dev->cnic_priv;
870 cp->l2_ring_size = pages * BCM_PAGE_SIZE;
871 cp->l2_ring = dma_alloc_coherent(&dev->pcidev->dev, cp->l2_ring_size,
873 GFP_KERNEL | __GFP_COMP);
877 cp->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
878 cp->l2_buf_size = PAGE_ALIGN(cp->l2_buf_size);
879 cp->l2_buf = dma_alloc_coherent(&dev->pcidev->dev, cp->l2_buf_size,
881 GFP_KERNEL | __GFP_COMP);
888 static int cnic_alloc_uio(struct cnic_dev *dev) {
889 struct cnic_local *cp = dev->cnic_priv;
890 struct uio_info *uinfo;
893 uinfo = kzalloc(sizeof(*uinfo), GFP_ATOMIC);
897 uinfo->mem[0].addr = dev->netdev->base_addr;
898 uinfo->mem[0].internal_addr = dev->regview;
899 uinfo->mem[0].size = dev->netdev->mem_end - dev->netdev->mem_start;
900 uinfo->mem[0].memtype = UIO_MEM_PHYS;
902 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
903 uinfo->mem[1].addr = (unsigned long) cp->status_blk.gen &
905 if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
906 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
908 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
910 uinfo->name = "bnx2_cnic";
911 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
912 uinfo->mem[1].addr = (unsigned long) cp->bnx2x_def_status_blk &
914 uinfo->mem[1].size = sizeof(struct host_def_status_block);
916 uinfo->name = "bnx2x_cnic";
919 uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
921 uinfo->mem[2].addr = (unsigned long) cp->l2_ring;
922 uinfo->mem[2].size = cp->l2_ring_size;
923 uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
925 uinfo->mem[3].addr = (unsigned long) cp->l2_buf;
926 uinfo->mem[3].size = cp->l2_buf_size;
927 uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
929 uinfo->version = CNIC_MODULE_VERSION;
930 uinfo->irq = UIO_IRQ_CUSTOM;
932 uinfo->open = cnic_uio_open;
933 uinfo->release = cnic_uio_close;
937 ret = uio_register_device(&dev->pcidev->dev, uinfo);
943 cp->cnic_uinfo = uinfo;
947 static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
949 struct cnic_local *cp = dev->cnic_priv;
952 ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
955 cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
957 ret = cnic_alloc_dma(dev, &cp->kcq_info, KCQ_PAGE_CNT, 1);
960 cp->kcq = (struct kcqe **) cp->kcq_info.pg_arr;
962 ret = cnic_alloc_context(dev);
966 ret = cnic_alloc_l2_rings(dev, 2);
970 ret = cnic_alloc_uio(dev);
981 static int cnic_alloc_bnx2x_context(struct cnic_dev *dev)
983 struct cnic_local *cp = dev->cnic_priv;
984 int ctx_blk_size = cp->ethdev->ctx_blk_size;
985 int total_mem, blks, i;
987 total_mem = BNX2X_CONTEXT_MEM_SIZE * cp->max_cid_space;
988 blks = total_mem / ctx_blk_size;
989 if (total_mem % ctx_blk_size)
992 if (blks > cp->ethdev->ctx_tbl_len)
995 cp->ctx_arr = kzalloc(blks * sizeof(struct cnic_ctx), GFP_KERNEL);
996 if (cp->ctx_arr == NULL)
1000 cp->ctx_blk_size = ctx_blk_size;
1001 if (BNX2X_CHIP_IS_E1H(cp->chip_id))
1004 cp->ctx_align = ctx_blk_size;
1006 cp->cids_per_blk = ctx_blk_size / BNX2X_CONTEXT_MEM_SIZE;
1008 for (i = 0; i < blks; i++) {
1009 cp->ctx_arr[i].ctx =
1010 dma_alloc_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
1011 &cp->ctx_arr[i].mapping,
1013 if (cp->ctx_arr[i].ctx == NULL)
1016 if (cp->ctx_align && cp->ctx_blk_size == ctx_blk_size) {
1017 if (cp->ctx_arr[i].mapping & (cp->ctx_align - 1)) {
1018 cnic_free_context(dev);
1019 cp->ctx_blk_size += cp->ctx_align;
1028 static int cnic_alloc_bnx2x_resc(struct cnic_dev *dev)
1030 struct cnic_local *cp = dev->cnic_priv;
1031 struct cnic_eth_dev *ethdev = cp->ethdev;
1032 u32 start_cid = ethdev->starting_cid;
1033 int i, j, n, ret, pages;
1034 struct cnic_dma *kwq_16_dma = &cp->kwq_16_data_info;
1036 cp->max_cid_space = MAX_ISCSI_TBL_SZ;
1037 cp->iscsi_start_cid = start_cid;
1038 if (start_cid < BNX2X_ISCSI_START_CID) {
1039 u32 delta = BNX2X_ISCSI_START_CID - start_cid;
1041 cp->iscsi_start_cid = BNX2X_ISCSI_START_CID;
1042 cp->max_cid_space += delta;
1045 cp->iscsi_tbl = kzalloc(sizeof(struct cnic_iscsi) * MAX_ISCSI_TBL_SZ,
1050 cp->ctx_tbl = kzalloc(sizeof(struct cnic_context) *
1051 cp->max_cid_space, GFP_KERNEL);
1055 for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) {
1056 cp->ctx_tbl[i].proto.iscsi = &cp->iscsi_tbl[i];
1057 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_ISCSI;
1060 pages = PAGE_ALIGN(cp->max_cid_space * CNIC_KWQ16_DATA_SIZE) /
1063 ret = cnic_alloc_dma(dev, kwq_16_dma, pages, 0);
1067 n = PAGE_SIZE / CNIC_KWQ16_DATA_SIZE;
1068 for (i = 0, j = 0; i < cp->max_cid_space; i++) {
1069 long off = CNIC_KWQ16_DATA_SIZE * (i % n);
1071 cp->ctx_tbl[i].kwqe_data = kwq_16_dma->pg_arr[j] + off;
1072 cp->ctx_tbl[i].kwqe_data_mapping = kwq_16_dma->pg_map_arr[j] +
1075 if ((i % n) == (n - 1))
1079 ret = cnic_alloc_dma(dev, &cp->kcq_info, KCQ_PAGE_CNT, 0);
1082 cp->kcq = (struct kcqe **) cp->kcq_info.pg_arr;
1084 for (i = 0; i < KCQ_PAGE_CNT; i++) {
1085 struct bnx2x_bd_chain_next *next =
1086 (struct bnx2x_bd_chain_next *)
1087 &cp->kcq[i][MAX_KCQE_CNT];
1090 if (j >= KCQ_PAGE_CNT)
1092 next->addr_hi = (u64) cp->kcq_info.pg_map_arr[j] >> 32;
1093 next->addr_lo = cp->kcq_info.pg_map_arr[j] & 0xffffffff;
1096 pages = PAGE_ALIGN(BNX2X_ISCSI_NUM_CONNECTIONS *
1097 BNX2X_ISCSI_CONN_BUF_SIZE) / PAGE_SIZE;
1098 ret = cnic_alloc_dma(dev, &cp->conn_buf_info, pages, 1);
1102 pages = PAGE_ALIGN(BNX2X_ISCSI_GLB_BUF_SIZE) / PAGE_SIZE;
1103 ret = cnic_alloc_dma(dev, &cp->gbl_buf_info, pages, 0);
1107 ret = cnic_alloc_bnx2x_context(dev);
1111 cp->bnx2x_def_status_blk = cp->ethdev->irq_arr[1].status_blk;
1113 memset(cp->status_blk.bnx2x, 0, sizeof(*cp->status_blk.bnx2x));
1115 cp->l2_rx_ring_size = 15;
1117 ret = cnic_alloc_l2_rings(dev, 4);
1121 ret = cnic_alloc_uio(dev);
1128 cnic_free_resc(dev);
1132 static inline u32 cnic_kwq_avail(struct cnic_local *cp)
1134 return cp->max_kwq_idx -
1135 ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
1138 static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1141 struct cnic_local *cp = dev->cnic_priv;
1142 struct kwqe *prod_qe;
1143 u16 prod, sw_prod, i;
1145 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
1146 return -EAGAIN; /* bnx2 is down */
1148 spin_lock_bh(&cp->cnic_ulp_lock);
1149 if (num_wqes > cnic_kwq_avail(cp) &&
1150 !test_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags)) {
1151 spin_unlock_bh(&cp->cnic_ulp_lock);
1155 clear_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
1157 prod = cp->kwq_prod_idx;
1158 sw_prod = prod & MAX_KWQ_IDX;
1159 for (i = 0; i < num_wqes; i++) {
1160 prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
1161 memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
1163 sw_prod = prod & MAX_KWQ_IDX;
1165 cp->kwq_prod_idx = prod;
1167 CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
1169 spin_unlock_bh(&cp->cnic_ulp_lock);
1173 static void *cnic_get_kwqe_16_data(struct cnic_local *cp, u32 l5_cid,
1174 union l5cm_specific_data *l5_data)
1176 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1179 map = ctx->kwqe_data_mapping;
1180 l5_data->phy_address.lo = (u64) map & 0xffffffff;
1181 l5_data->phy_address.hi = (u64) map >> 32;
1182 return ctx->kwqe_data;
1185 static int cnic_submit_kwqe_16(struct cnic_dev *dev, u32 cmd, u32 cid,
1186 u32 type, union l5cm_specific_data *l5_data)
1188 struct cnic_local *cp = dev->cnic_priv;
1189 struct l5cm_spe kwqe;
1190 struct kwqe_16 *kwq[1];
1193 kwqe.hdr.conn_and_cmd_data =
1194 cpu_to_le32(((cmd << SPE_HDR_CMD_ID_SHIFT) |
1195 BNX2X_HW_CID(cid, cp->func)));
1196 kwqe.hdr.type = cpu_to_le16(type);
1197 kwqe.hdr.reserved = 0;
1198 kwqe.data.phy_address.lo = cpu_to_le32(l5_data->phy_address.lo);
1199 kwqe.data.phy_address.hi = cpu_to_le32(l5_data->phy_address.hi);
1201 kwq[0] = (struct kwqe_16 *) &kwqe;
1203 spin_lock_bh(&cp->cnic_ulp_lock);
1204 ret = cp->ethdev->drv_submit_kwqes_16(dev->netdev, kwq, 1);
1205 spin_unlock_bh(&cp->cnic_ulp_lock);
1213 static void cnic_reply_bnx2x_kcqes(struct cnic_dev *dev, int ulp_type,
1214 struct kcqe *cqes[], u32 num_cqes)
1216 struct cnic_local *cp = dev->cnic_priv;
1217 struct cnic_ulp_ops *ulp_ops;
1220 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
1221 if (likely(ulp_ops)) {
1222 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
1228 static int cnic_bnx2x_iscsi_init1(struct cnic_dev *dev, struct kwqe *kwqe)
1230 struct cnic_local *cp = dev->cnic_priv;
1231 struct iscsi_kwqe_init1 *req1 = (struct iscsi_kwqe_init1 *) kwqe;
1232 int func = cp->func, pages;
1235 cp->num_iscsi_tasks = req1->num_tasks_per_conn;
1236 cp->num_ccells = req1->num_ccells_per_conn;
1237 cp->task_array_size = BNX2X_ISCSI_TASK_CONTEXT_SIZE *
1238 cp->num_iscsi_tasks;
1239 cp->r2tq_size = cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS *
1240 BNX2X_ISCSI_R2TQE_SIZE;
1241 cp->hq_size = cp->num_ccells * BNX2X_ISCSI_HQ_BD_SIZE;
1242 pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1243 hq_bds = pages * (PAGE_SIZE / BNX2X_ISCSI_HQ_BD_SIZE);
1244 cp->num_cqs = req1->num_cqs;
1246 if (!dev->max_iscsi_conn)
1249 /* init Tstorm RAM */
1250 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_RQ_SIZE_OFFSET(func),
1252 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1254 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1255 TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1256 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1257 TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1258 req1->num_tasks_per_conn);
1260 /* init Ustorm RAM */
1261 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1262 USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(func),
1263 req1->rq_buffer_size);
1264 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1266 CNIC_WR8(dev, BAR_USTRORM_INTMEM +
1267 USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1268 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1269 USTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1270 req1->num_tasks_per_conn);
1271 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_RQ_SIZE_OFFSET(func),
1273 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_CQ_SIZE_OFFSET(func),
1275 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_R2TQ_SIZE_OFFSET(func),
1276 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1278 /* init Xstorm RAM */
1279 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1281 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1282 XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1283 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1284 XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1285 req1->num_tasks_per_conn);
1286 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_HQ_SIZE_OFFSET(func),
1288 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_SQ_SIZE_OFFSET(func),
1289 req1->num_tasks_per_conn);
1290 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_R2TQ_SIZE_OFFSET(func),
1291 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1293 /* init Cstorm RAM */
1294 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1296 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
1297 CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1298 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1299 CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1300 req1->num_tasks_per_conn);
1301 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_CQ_SIZE_OFFSET(func),
1303 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_HQ_SIZE_OFFSET(func),
1309 static int cnic_bnx2x_iscsi_init2(struct cnic_dev *dev, struct kwqe *kwqe)
1311 struct iscsi_kwqe_init2 *req2 = (struct iscsi_kwqe_init2 *) kwqe;
1312 struct cnic_local *cp = dev->cnic_priv;
1313 int func = cp->func;
1314 struct iscsi_kcqe kcqe;
1315 struct kcqe *cqes[1];
1317 memset(&kcqe, 0, sizeof(kcqe));
1318 if (!dev->max_iscsi_conn) {
1319 kcqe.completion_status =
1320 ISCSI_KCQE_COMPLETION_STATUS_ISCSI_NOT_SUPPORTED;
1324 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1325 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(func), req2->error_bit_map[0]);
1326 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1327 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(func) + 4,
1328 req2->error_bit_map[1]);
1330 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1331 USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(func), req2->max_cq_sqn);
1332 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1333 USTORM_ISCSI_ERROR_BITMAP_OFFSET(func), req2->error_bit_map[0]);
1334 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1335 USTORM_ISCSI_ERROR_BITMAP_OFFSET(func) + 4,
1336 req2->error_bit_map[1]);
1338 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1339 CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(func), req2->max_cq_sqn);
1341 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1344 kcqe.op_code = ISCSI_KCQE_OPCODE_INIT;
1345 cqes[0] = (struct kcqe *) &kcqe;
1346 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1351 static void cnic_free_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1353 struct cnic_local *cp = dev->cnic_priv;
1354 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1356 if (ctx->ulp_proto_id == CNIC_ULP_ISCSI) {
1357 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1359 cnic_free_dma(dev, &iscsi->hq_info);
1360 cnic_free_dma(dev, &iscsi->r2tq_info);
1361 cnic_free_dma(dev, &iscsi->task_array_info);
1363 cnic_free_id(&cp->cid_tbl, ctx->cid);
1367 static int cnic_alloc_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1371 struct cnic_local *cp = dev->cnic_priv;
1372 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1373 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1375 cid = cnic_alloc_new_id(&cp->cid_tbl);
1382 pages = PAGE_ALIGN(cp->task_array_size) / PAGE_SIZE;
1384 ret = cnic_alloc_dma(dev, &iscsi->task_array_info, pages, 1);
1388 pages = PAGE_ALIGN(cp->r2tq_size) / PAGE_SIZE;
1389 ret = cnic_alloc_dma(dev, &iscsi->r2tq_info, pages, 1);
1393 pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1394 ret = cnic_alloc_dma(dev, &iscsi->hq_info, pages, 1);
1401 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1405 static void *cnic_get_bnx2x_ctx(struct cnic_dev *dev, u32 cid, int init,
1406 struct regpair *ctx_addr)
1408 struct cnic_local *cp = dev->cnic_priv;
1409 struct cnic_eth_dev *ethdev = cp->ethdev;
1410 int blk = (cid - ethdev->starting_cid) / cp->cids_per_blk;
1411 int off = (cid - ethdev->starting_cid) % cp->cids_per_blk;
1412 unsigned long align_off = 0;
1416 if (cp->ctx_align) {
1417 unsigned long mask = cp->ctx_align - 1;
1419 if (cp->ctx_arr[blk].mapping & mask)
1420 align_off = cp->ctx_align -
1421 (cp->ctx_arr[blk].mapping & mask);
1423 ctx_map = cp->ctx_arr[blk].mapping + align_off +
1424 (off * BNX2X_CONTEXT_MEM_SIZE);
1425 ctx = cp->ctx_arr[blk].ctx + align_off +
1426 (off * BNX2X_CONTEXT_MEM_SIZE);
1428 memset(ctx, 0, BNX2X_CONTEXT_MEM_SIZE);
1430 ctx_addr->lo = ctx_map & 0xffffffff;
1431 ctx_addr->hi = (u64) ctx_map >> 32;
1435 static int cnic_setup_bnx2x_ctx(struct cnic_dev *dev, struct kwqe *wqes[],
1438 struct cnic_local *cp = dev->cnic_priv;
1439 struct iscsi_kwqe_conn_offload1 *req1 =
1440 (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1441 struct iscsi_kwqe_conn_offload2 *req2 =
1442 (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1443 struct iscsi_kwqe_conn_offload3 *req3;
1444 struct cnic_context *ctx = &cp->ctx_tbl[req1->iscsi_conn_id];
1445 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1447 u32 hw_cid = BNX2X_HW_CID(cid, cp->func);
1448 struct iscsi_context *ictx;
1449 struct regpair context_addr;
1450 int i, j, n = 2, n_max;
1453 if (!req2->num_additional_wqes)
1456 n_max = req2->num_additional_wqes + 2;
1458 ictx = cnic_get_bnx2x_ctx(dev, cid, 1, &context_addr);
1462 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1464 ictx->xstorm_ag_context.hq_prod = 1;
1466 ictx->xstorm_st_context.iscsi.first_burst_length =
1467 ISCSI_DEF_FIRST_BURST_LEN;
1468 ictx->xstorm_st_context.iscsi.max_send_pdu_length =
1469 ISCSI_DEF_MAX_RECV_SEG_LEN;
1470 ictx->xstorm_st_context.iscsi.sq_pbl_base.lo =
1471 req1->sq_page_table_addr_lo;
1472 ictx->xstorm_st_context.iscsi.sq_pbl_base.hi =
1473 req1->sq_page_table_addr_hi;
1474 ictx->xstorm_st_context.iscsi.sq_curr_pbe.lo = req2->sq_first_pte.hi;
1475 ictx->xstorm_st_context.iscsi.sq_curr_pbe.hi = req2->sq_first_pte.lo;
1476 ictx->xstorm_st_context.iscsi.hq_pbl_base.lo =
1477 iscsi->hq_info.pgtbl_map & 0xffffffff;
1478 ictx->xstorm_st_context.iscsi.hq_pbl_base.hi =
1479 (u64) iscsi->hq_info.pgtbl_map >> 32;
1480 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.lo =
1481 iscsi->hq_info.pgtbl[0];
1482 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.hi =
1483 iscsi->hq_info.pgtbl[1];
1484 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.lo =
1485 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1486 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.hi =
1487 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1488 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.lo =
1489 iscsi->r2tq_info.pgtbl[0];
1490 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.hi =
1491 iscsi->r2tq_info.pgtbl[1];
1492 ictx->xstorm_st_context.iscsi.task_pbl_base.lo =
1493 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1494 ictx->xstorm_st_context.iscsi.task_pbl_base.hi =
1495 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1496 ictx->xstorm_st_context.iscsi.task_pbl_cache_idx =
1497 BNX2X_ISCSI_PBL_NOT_CACHED;
1498 ictx->xstorm_st_context.iscsi.flags.flags |=
1499 XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA;
1500 ictx->xstorm_st_context.iscsi.flags.flags |=
1501 XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T;
1503 ictx->tstorm_st_context.iscsi.hdr_bytes_2_fetch = ISCSI_HEADER_SIZE;
1504 /* TSTORM requires the base address of RQ DB & not PTE */
1505 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.lo =
1506 req2->rq_page_table_addr_lo & PAGE_MASK;
1507 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.hi =
1508 req2->rq_page_table_addr_hi;
1509 ictx->tstorm_st_context.iscsi.iscsi_conn_id = req1->iscsi_conn_id;
1510 ictx->tstorm_st_context.tcp.cwnd = 0x5A8;
1511 ictx->tstorm_st_context.tcp.flags2 |=
1512 TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN;
1514 ictx->timers_context.flags |= ISCSI_TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG;
1516 ictx->ustorm_st_context.ring.rq.pbl_base.lo =
1517 req2->rq_page_table_addr_lo;
1518 ictx->ustorm_st_context.ring.rq.pbl_base.hi =
1519 req2->rq_page_table_addr_hi;
1520 ictx->ustorm_st_context.ring.rq.curr_pbe.lo = req3->qp_first_pte[0].hi;
1521 ictx->ustorm_st_context.ring.rq.curr_pbe.hi = req3->qp_first_pte[0].lo;
1522 ictx->ustorm_st_context.ring.r2tq.pbl_base.lo =
1523 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1524 ictx->ustorm_st_context.ring.r2tq.pbl_base.hi =
1525 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1526 ictx->ustorm_st_context.ring.r2tq.curr_pbe.lo =
1527 iscsi->r2tq_info.pgtbl[0];
1528 ictx->ustorm_st_context.ring.r2tq.curr_pbe.hi =
1529 iscsi->r2tq_info.pgtbl[1];
1530 ictx->ustorm_st_context.ring.cq_pbl_base.lo =
1531 req1->cq_page_table_addr_lo;
1532 ictx->ustorm_st_context.ring.cq_pbl_base.hi =
1533 req1->cq_page_table_addr_hi;
1534 ictx->ustorm_st_context.ring.cq[0].cq_sn = ISCSI_INITIAL_SN;
1535 ictx->ustorm_st_context.ring.cq[0].curr_pbe.lo = req2->cq_first_pte.hi;
1536 ictx->ustorm_st_context.ring.cq[0].curr_pbe.hi = req2->cq_first_pte.lo;
1537 ictx->ustorm_st_context.task_pbe_cache_index =
1538 BNX2X_ISCSI_PBL_NOT_CACHED;
1539 ictx->ustorm_st_context.task_pdu_cache_index =
1540 BNX2X_ISCSI_PDU_HEADER_NOT_CACHED;
1542 for (i = 1, j = 1; i < cp->num_cqs; i++, j++) {
1546 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1549 ictx->ustorm_st_context.ring.cq[i].cq_sn = ISCSI_INITIAL_SN;
1550 ictx->ustorm_st_context.ring.cq[i].curr_pbe.lo =
1551 req3->qp_first_pte[j].hi;
1552 ictx->ustorm_st_context.ring.cq[i].curr_pbe.hi =
1553 req3->qp_first_pte[j].lo;
1556 ictx->ustorm_st_context.task_pbl_base.lo =
1557 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1558 ictx->ustorm_st_context.task_pbl_base.hi =
1559 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1560 ictx->ustorm_st_context.tce_phy_addr.lo =
1561 iscsi->task_array_info.pgtbl[0];
1562 ictx->ustorm_st_context.tce_phy_addr.hi =
1563 iscsi->task_array_info.pgtbl[1];
1564 ictx->ustorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1565 ictx->ustorm_st_context.num_cqs = cp->num_cqs;
1566 ictx->ustorm_st_context.negotiated_rx |= ISCSI_DEF_MAX_RECV_SEG_LEN;
1567 ictx->ustorm_st_context.negotiated_rx_and_flags |=
1568 ISCSI_DEF_MAX_BURST_LEN;
1569 ictx->ustorm_st_context.negotiated_rx |=
1570 ISCSI_DEFAULT_MAX_OUTSTANDING_R2T <<
1571 USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT;
1573 ictx->cstorm_st_context.hq_pbl_base.lo =
1574 iscsi->hq_info.pgtbl_map & 0xffffffff;
1575 ictx->cstorm_st_context.hq_pbl_base.hi =
1576 (u64) iscsi->hq_info.pgtbl_map >> 32;
1577 ictx->cstorm_st_context.hq_curr_pbe.lo = iscsi->hq_info.pgtbl[0];
1578 ictx->cstorm_st_context.hq_curr_pbe.hi = iscsi->hq_info.pgtbl[1];
1579 ictx->cstorm_st_context.task_pbl_base.lo =
1580 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1581 ictx->cstorm_st_context.task_pbl_base.hi =
1582 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1583 /* CSTORM and USTORM initialization is different, CSTORM requires
1584 * CQ DB base & not PTE addr */
1585 ictx->cstorm_st_context.cq_db_base.lo =
1586 req1->cq_page_table_addr_lo & PAGE_MASK;
1587 ictx->cstorm_st_context.cq_db_base.hi = req1->cq_page_table_addr_hi;
1588 ictx->cstorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1589 ictx->cstorm_st_context.cq_proc_en_bit_map = (1 << cp->num_cqs) - 1;
1590 for (i = 0; i < cp->num_cqs; i++) {
1591 ictx->cstorm_st_context.cq_c_prod_sqn_arr.sqn[i] =
1593 ictx->cstorm_st_context.cq_c_sqn_2_notify_arr.sqn[i] =
1597 ictx->xstorm_ag_context.cdu_reserved =
1598 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
1599 ISCSI_CONNECTION_TYPE);
1600 ictx->ustorm_ag_context.cdu_usage =
1601 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
1602 ISCSI_CONNECTION_TYPE);
1607 static int cnic_bnx2x_iscsi_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
1610 struct iscsi_kwqe_conn_offload1 *req1;
1611 struct iscsi_kwqe_conn_offload2 *req2;
1612 struct cnic_local *cp = dev->cnic_priv;
1613 struct iscsi_kcqe kcqe;
1614 struct kcqe *cqes[1];
1623 req1 = (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1624 req2 = (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1625 if ((num - 2) < req2->num_additional_wqes) {
1629 *work = 2 + req2->num_additional_wqes;;
1631 l5_cid = req1->iscsi_conn_id;
1632 if (l5_cid >= MAX_ISCSI_TBL_SZ)
1635 memset(&kcqe, 0, sizeof(kcqe));
1636 kcqe.op_code = ISCSI_KCQE_OPCODE_OFFLOAD_CONN;
1637 kcqe.iscsi_conn_id = l5_cid;
1638 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
1640 if (atomic_inc_return(&cp->iscsi_conn) > dev->max_iscsi_conn) {
1641 atomic_dec(&cp->iscsi_conn);
1645 ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
1647 atomic_dec(&cp->iscsi_conn);
1651 ret = cnic_setup_bnx2x_ctx(dev, wqes, num);
1653 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1654 atomic_dec(&cp->iscsi_conn);
1658 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1659 kcqe.iscsi_conn_context_id = BNX2X_HW_CID(cp->ctx_tbl[l5_cid].cid,
1663 cqes[0] = (struct kcqe *) &kcqe;
1664 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1669 static int cnic_bnx2x_iscsi_update(struct cnic_dev *dev, struct kwqe *kwqe)
1671 struct cnic_local *cp = dev->cnic_priv;
1672 struct iscsi_kwqe_conn_update *req =
1673 (struct iscsi_kwqe_conn_update *) kwqe;
1675 union l5cm_specific_data l5_data;
1676 u32 l5_cid, cid = BNX2X_SW_CID(req->context_id);
1679 if (cnic_get_l5_cid(cp, cid, &l5_cid) != 0)
1682 data = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1686 memcpy(data, kwqe, sizeof(struct kwqe));
1688 ret = cnic_submit_kwqe_16(dev, ISCSI_RAMROD_CMD_ID_UPDATE_CONN,
1689 req->context_id, ISCSI_CONNECTION_TYPE, &l5_data);
1693 static int cnic_bnx2x_iscsi_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
1695 struct cnic_local *cp = dev->cnic_priv;
1696 struct iscsi_kwqe_conn_destroy *req =
1697 (struct iscsi_kwqe_conn_destroy *) kwqe;
1698 union l5cm_specific_data l5_data;
1699 u32 l5_cid = req->reserved0;
1700 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1702 struct iscsi_kcqe kcqe;
1703 struct kcqe *cqes[1];
1705 if (!(ctx->ctx_flags & CTX_FL_OFFLD_START))
1706 goto skip_cfc_delete;
1708 while (!time_after(jiffies, ctx->timestamp + (2 * HZ)))
1711 init_waitqueue_head(&ctx->waitq);
1713 memset(&l5_data, 0, sizeof(l5_data));
1714 ret = cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CFC_DEL,
1716 ETH_CONNECTION_TYPE |
1717 (1 << SPE_HDR_COMMON_RAMROD_SHIFT),
1720 wait_event(ctx->waitq, ctx->wait_cond);
1723 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1725 atomic_dec(&cp->iscsi_conn);
1727 memset(&kcqe, 0, sizeof(kcqe));
1728 kcqe.op_code = ISCSI_KCQE_OPCODE_DESTROY_CONN;
1729 kcqe.iscsi_conn_id = l5_cid;
1730 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1731 kcqe.iscsi_conn_context_id = req->context_id;
1733 cqes[0] = (struct kcqe *) &kcqe;
1734 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1739 static void cnic_init_storm_conn_bufs(struct cnic_dev *dev,
1740 struct l4_kwq_connect_req1 *kwqe1,
1741 struct l4_kwq_connect_req3 *kwqe3,
1742 struct l5cm_active_conn_buffer *conn_buf)
1744 struct l5cm_conn_addr_params *conn_addr = &conn_buf->conn_addr_buf;
1745 struct l5cm_xstorm_conn_buffer *xstorm_buf =
1746 &conn_buf->xstorm_conn_buffer;
1747 struct l5cm_tstorm_conn_buffer *tstorm_buf =
1748 &conn_buf->tstorm_conn_buffer;
1749 struct regpair context_addr;
1750 u32 cid = BNX2X_SW_CID(kwqe1->cid);
1751 struct in6_addr src_ip, dst_ip;
1755 addrp = (u32 *) &conn_addr->local_ip_addr;
1756 for (i = 0; i < 4; i++, addrp++)
1757 src_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1759 addrp = (u32 *) &conn_addr->remote_ip_addr;
1760 for (i = 0; i < 4; i++, addrp++)
1761 dst_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1763 cnic_get_bnx2x_ctx(dev, cid, 0, &context_addr);
1765 xstorm_buf->context_addr.hi = context_addr.hi;
1766 xstorm_buf->context_addr.lo = context_addr.lo;
1767 xstorm_buf->mss = 0xffff;
1768 xstorm_buf->rcv_buf = kwqe3->rcv_buf;
1769 if (kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE)
1770 xstorm_buf->params |= L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE;
1771 xstorm_buf->pseudo_header_checksum =
1772 swab16(~csum_ipv6_magic(&src_ip, &dst_ip, 0, IPPROTO_TCP, 0));
1774 if (!(kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK))
1775 tstorm_buf->params |=
1776 L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE;
1777 if (kwqe3->ka_timeout) {
1778 tstorm_buf->ka_enable = 1;
1779 tstorm_buf->ka_timeout = kwqe3->ka_timeout;
1780 tstorm_buf->ka_interval = kwqe3->ka_interval;
1781 tstorm_buf->ka_max_probe_count = kwqe3->ka_max_probe_count;
1783 tstorm_buf->rcv_buf = kwqe3->rcv_buf;
1784 tstorm_buf->snd_buf = kwqe3->snd_buf;
1785 tstorm_buf->max_rt_time = 0xffffffff;
1788 static void cnic_init_bnx2x_mac(struct cnic_dev *dev)
1790 struct cnic_local *cp = dev->cnic_priv;
1791 int func = CNIC_FUNC(cp);
1792 u8 *mac = dev->mac_addr;
1794 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1795 XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(func), mac[0]);
1796 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1797 XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(func), mac[1]);
1798 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1799 XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(func), mac[2]);
1800 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1801 XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(func), mac[3]);
1802 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1803 XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(func), mac[4]);
1804 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1805 XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(func), mac[5]);
1807 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1808 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(func), mac[5]);
1809 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1810 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(func) + 1,
1812 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1813 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func), mac[3]);
1814 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1815 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func) + 1,
1817 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1818 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func) + 2,
1820 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1821 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func) + 3,
1825 static void cnic_bnx2x_set_tcp_timestamp(struct cnic_dev *dev, int tcp_ts)
1827 struct cnic_local *cp = dev->cnic_priv;
1828 u8 xstorm_flags = XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN;
1829 u16 tstorm_flags = 0;
1832 xstorm_flags |= XSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1833 tstorm_flags |= TSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1836 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1837 XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->func), xstorm_flags);
1839 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1840 TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->func), tstorm_flags);
1843 static int cnic_bnx2x_connect(struct cnic_dev *dev, struct kwqe *wqes[],
1846 struct cnic_local *cp = dev->cnic_priv;
1847 struct l4_kwq_connect_req1 *kwqe1 =
1848 (struct l4_kwq_connect_req1 *) wqes[0];
1849 struct l4_kwq_connect_req3 *kwqe3;
1850 struct l5cm_active_conn_buffer *conn_buf;
1851 struct l5cm_conn_addr_params *conn_addr;
1852 union l5cm_specific_data l5_data;
1853 u32 l5_cid = kwqe1->pg_cid;
1854 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
1855 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1863 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6)
1873 if (sizeof(*conn_buf) > CNIC_KWQ16_DATA_SIZE) {
1874 netdev_err(dev->netdev, "conn_buf size too big\n");
1877 conn_buf = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1881 memset(conn_buf, 0, sizeof(*conn_buf));
1883 conn_addr = &conn_buf->conn_addr_buf;
1884 conn_addr->remote_addr_0 = csk->ha[0];
1885 conn_addr->remote_addr_1 = csk->ha[1];
1886 conn_addr->remote_addr_2 = csk->ha[2];
1887 conn_addr->remote_addr_3 = csk->ha[3];
1888 conn_addr->remote_addr_4 = csk->ha[4];
1889 conn_addr->remote_addr_5 = csk->ha[5];
1891 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6) {
1892 struct l4_kwq_connect_req2 *kwqe2 =
1893 (struct l4_kwq_connect_req2 *) wqes[1];
1895 conn_addr->local_ip_addr.ip_addr_hi_hi = kwqe2->src_ip_v6_4;
1896 conn_addr->local_ip_addr.ip_addr_hi_lo = kwqe2->src_ip_v6_3;
1897 conn_addr->local_ip_addr.ip_addr_lo_hi = kwqe2->src_ip_v6_2;
1899 conn_addr->remote_ip_addr.ip_addr_hi_hi = kwqe2->dst_ip_v6_4;
1900 conn_addr->remote_ip_addr.ip_addr_hi_lo = kwqe2->dst_ip_v6_3;
1901 conn_addr->remote_ip_addr.ip_addr_lo_hi = kwqe2->dst_ip_v6_2;
1902 conn_addr->params |= L5CM_CONN_ADDR_PARAMS_IP_VERSION;
1904 kwqe3 = (struct l4_kwq_connect_req3 *) wqes[*work - 1];
1906 conn_addr->local_ip_addr.ip_addr_lo_lo = kwqe1->src_ip;
1907 conn_addr->remote_ip_addr.ip_addr_lo_lo = kwqe1->dst_ip;
1908 conn_addr->local_tcp_port = kwqe1->src_port;
1909 conn_addr->remote_tcp_port = kwqe1->dst_port;
1911 conn_addr->pmtu = kwqe3->pmtu;
1912 cnic_init_storm_conn_bufs(dev, kwqe1, kwqe3, conn_buf);
1914 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1915 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(cp->func), csk->vlan_id);
1917 cnic_bnx2x_set_tcp_timestamp(dev,
1918 kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_TIME_STAMP);
1920 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_TCP_CONNECT,
1921 kwqe1->cid, ISCSI_CONNECTION_TYPE, &l5_data);
1923 ctx->ctx_flags |= CTX_FL_OFFLD_START;
1928 static int cnic_bnx2x_close(struct cnic_dev *dev, struct kwqe *kwqe)
1930 struct l4_kwq_close_req *req = (struct l4_kwq_close_req *) kwqe;
1931 union l5cm_specific_data l5_data;
1934 memset(&l5_data, 0, sizeof(l5_data));
1935 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_CLOSE,
1936 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
1940 static int cnic_bnx2x_reset(struct cnic_dev *dev, struct kwqe *kwqe)
1942 struct l4_kwq_reset_req *req = (struct l4_kwq_reset_req *) kwqe;
1943 union l5cm_specific_data l5_data;
1946 memset(&l5_data, 0, sizeof(l5_data));
1947 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_ABORT,
1948 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
1951 static int cnic_bnx2x_offload_pg(struct cnic_dev *dev, struct kwqe *kwqe)
1953 struct l4_kwq_offload_pg *req = (struct l4_kwq_offload_pg *) kwqe;
1955 struct kcqe *cqes[1];
1957 memset(&kcqe, 0, sizeof(kcqe));
1958 kcqe.pg_host_opaque = req->host_opaque;
1959 kcqe.pg_cid = req->host_opaque;
1960 kcqe.op_code = L4_KCQE_OPCODE_VALUE_OFFLOAD_PG;
1961 cqes[0] = (struct kcqe *) &kcqe;
1962 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
1966 static int cnic_bnx2x_update_pg(struct cnic_dev *dev, struct kwqe *kwqe)
1968 struct l4_kwq_update_pg *req = (struct l4_kwq_update_pg *) kwqe;
1970 struct kcqe *cqes[1];
1972 memset(&kcqe, 0, sizeof(kcqe));
1973 kcqe.pg_host_opaque = req->pg_host_opaque;
1974 kcqe.pg_cid = req->pg_cid;
1975 kcqe.op_code = L4_KCQE_OPCODE_VALUE_UPDATE_PG;
1976 cqes[0] = (struct kcqe *) &kcqe;
1977 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
1981 static int cnic_submit_bnx2x_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1988 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
1989 return -EAGAIN; /* bnx2 is down */
1991 for (i = 0; i < num_wqes; ) {
1993 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
1997 case ISCSI_KWQE_OPCODE_INIT1:
1998 ret = cnic_bnx2x_iscsi_init1(dev, kwqe);
2000 case ISCSI_KWQE_OPCODE_INIT2:
2001 ret = cnic_bnx2x_iscsi_init2(dev, kwqe);
2003 case ISCSI_KWQE_OPCODE_OFFLOAD_CONN1:
2004 ret = cnic_bnx2x_iscsi_ofld1(dev, &wqes[i],
2005 num_wqes - i, &work);
2007 case ISCSI_KWQE_OPCODE_UPDATE_CONN:
2008 ret = cnic_bnx2x_iscsi_update(dev, kwqe);
2010 case ISCSI_KWQE_OPCODE_DESTROY_CONN:
2011 ret = cnic_bnx2x_iscsi_destroy(dev, kwqe);
2013 case L4_KWQE_OPCODE_VALUE_CONNECT1:
2014 ret = cnic_bnx2x_connect(dev, &wqes[i], num_wqes - i,
2017 case L4_KWQE_OPCODE_VALUE_CLOSE:
2018 ret = cnic_bnx2x_close(dev, kwqe);
2020 case L4_KWQE_OPCODE_VALUE_RESET:
2021 ret = cnic_bnx2x_reset(dev, kwqe);
2023 case L4_KWQE_OPCODE_VALUE_OFFLOAD_PG:
2024 ret = cnic_bnx2x_offload_pg(dev, kwqe);
2026 case L4_KWQE_OPCODE_VALUE_UPDATE_PG:
2027 ret = cnic_bnx2x_update_pg(dev, kwqe);
2029 case L4_KWQE_OPCODE_VALUE_UPLOAD_PG:
2034 netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2039 netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2046 static void service_kcqes(struct cnic_dev *dev, int num_cqes)
2048 struct cnic_local *cp = dev->cnic_priv;
2054 struct cnic_ulp_ops *ulp_ops;
2056 u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
2057 u32 kcqe_layer = kcqe_op_flag & KCQE_FLAGS_LAYER_MASK;
2059 if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
2060 cnic_kwq_completion(dev, 1);
2062 while (j < num_cqes) {
2063 u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
2065 if ((next_op & KCQE_FLAGS_LAYER_MASK) != kcqe_layer)
2068 if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
2069 cnic_kwq_completion(dev, 1);
2073 if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
2074 ulp_type = CNIC_ULP_RDMA;
2075 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
2076 ulp_type = CNIC_ULP_ISCSI;
2077 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
2078 ulp_type = CNIC_ULP_L4;
2079 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
2082 netdev_err(dev->netdev, "Unknown type of KCQE(0x%x)\n",
2088 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
2089 if (likely(ulp_ops)) {
2090 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
2091 cp->completed_kcq + i, j);
2101 static u16 cnic_bnx2_next_idx(u16 idx)
2106 static u16 cnic_bnx2_hw_idx(u16 idx)
2111 static u16 cnic_bnx2x_next_idx(u16 idx)
2114 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
2120 static u16 cnic_bnx2x_hw_idx(u16 idx)
2122 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
2127 static int cnic_get_kcqes(struct cnic_dev *dev, u16 hw_prod, u16 *sw_prod)
2129 struct cnic_local *cp = dev->cnic_priv;
2132 int kcqe_cnt = 0, last_cnt = 0;
2134 i = ri = last = *sw_prod;
2137 while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
2138 kcqe = &cp->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
2139 cp->completed_kcq[kcqe_cnt++] = kcqe;
2140 i = cp->next_idx(i);
2141 ri = i & MAX_KCQ_IDX;
2142 if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
2143 last_cnt = kcqe_cnt;
2152 static int cnic_l2_completion(struct cnic_local *cp)
2154 u16 hw_cons, sw_cons;
2155 union eth_rx_cqe *cqe, *cqe_ring = (union eth_rx_cqe *)
2156 (cp->l2_ring + (2 * BCM_PAGE_SIZE));
2160 if (!test_bit(CNIC_F_BNX2X_CLASS, &cp->dev->flags))
2163 hw_cons = *cp->rx_cons_ptr;
2164 if ((hw_cons & BNX2X_MAX_RCQ_DESC_CNT) == BNX2X_MAX_RCQ_DESC_CNT)
2167 sw_cons = cp->rx_cons;
2168 while (sw_cons != hw_cons) {
2171 cqe = &cqe_ring[sw_cons & BNX2X_MAX_RCQ_DESC_CNT];
2172 cqe_fp_flags = cqe->fast_path_cqe.type_error_flags;
2173 if (cqe_fp_flags & ETH_FAST_PATH_RX_CQE_TYPE) {
2174 cmd = le32_to_cpu(cqe->ramrod_cqe.conn_and_cmd_data);
2175 cmd >>= COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT;
2176 if (cmd == RAMROD_CMD_ID_ETH_CLIENT_SETUP ||
2177 cmd == RAMROD_CMD_ID_ETH_HALT)
2180 sw_cons = BNX2X_NEXT_RCQE(sw_cons);
2185 static void cnic_chk_pkt_rings(struct cnic_local *cp)
2187 u16 rx_cons = *cp->rx_cons_ptr;
2188 u16 tx_cons = *cp->tx_cons_ptr;
2191 if (!test_bit(CNIC_F_CNIC_UP, &cp->dev->flags))
2194 if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
2195 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
2196 comp = cnic_l2_completion(cp);
2198 cp->tx_cons = tx_cons;
2199 cp->rx_cons = rx_cons;
2201 uio_event_notify(cp->cnic_uinfo);
2204 clear_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
2207 static int cnic_service_bnx2(void *data, void *status_blk)
2209 struct cnic_dev *dev = data;
2210 struct status_block *sblk = status_blk;
2211 struct cnic_local *cp = dev->cnic_priv;
2212 u32 status_idx = sblk->status_idx;
2213 u16 hw_prod, sw_prod;
2216 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2219 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2221 hw_prod = sblk->status_completion_producer_index;
2222 sw_prod = cp->kcq_prod_idx;
2223 while (sw_prod != hw_prod) {
2224 kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
2228 service_kcqes(dev, kcqe_cnt);
2230 /* Tell compiler that status_blk fields can change. */
2232 if (status_idx != sblk->status_idx) {
2233 status_idx = sblk->status_idx;
2234 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2235 hw_prod = sblk->status_completion_producer_index;
2241 CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
2243 cp->kcq_prod_idx = sw_prod;
2245 cnic_chk_pkt_rings(cp);
2249 static void cnic_service_bnx2_msix(unsigned long data)
2251 struct cnic_dev *dev = (struct cnic_dev *) data;
2252 struct cnic_local *cp = dev->cnic_priv;
2253 struct status_block_msix *status_blk = cp->status_blk.bnx2;
2254 u32 status_idx = status_blk->status_idx;
2255 u16 hw_prod, sw_prod;
2258 cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
2260 hw_prod = status_blk->status_completion_producer_index;
2261 sw_prod = cp->kcq_prod_idx;
2262 while (sw_prod != hw_prod) {
2263 kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
2267 service_kcqes(dev, kcqe_cnt);
2269 /* Tell compiler that status_blk fields can change. */
2271 if (status_idx != status_blk->status_idx) {
2272 status_idx = status_blk->status_idx;
2273 cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
2274 hw_prod = status_blk->status_completion_producer_index;
2280 CNIC_WR16(dev, cp->kcq_io_addr, sw_prod);
2281 cp->kcq_prod_idx = sw_prod;
2283 cnic_chk_pkt_rings(cp);
2285 cp->last_status_idx = status_idx;
2286 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
2287 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
2290 static void cnic_doirq(struct cnic_dev *dev)
2292 struct cnic_local *cp = dev->cnic_priv;
2293 u16 prod = cp->kcq_prod_idx & MAX_KCQ_IDX;
2295 if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
2296 prefetch(cp->status_blk.gen);
2297 prefetch(&cp->kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
2299 tasklet_schedule(&cp->cnic_irq_task);
2303 static irqreturn_t cnic_irq(int irq, void *dev_instance)
2305 struct cnic_dev *dev = dev_instance;
2306 struct cnic_local *cp = dev->cnic_priv;
2316 static inline void cnic_ack_bnx2x_int(struct cnic_dev *dev, u8 id, u8 storm,
2317 u16 index, u8 op, u8 update)
2319 struct cnic_local *cp = dev->cnic_priv;
2320 u32 hc_addr = (HC_REG_COMMAND_REG + CNIC_PORT(cp) * 32 +
2321 COMMAND_REG_INT_ACK);
2322 struct igu_ack_register igu_ack;
2324 igu_ack.status_block_index = index;
2325 igu_ack.sb_id_and_flags =
2326 ((id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) |
2327 (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) |
2328 (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) |
2329 (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT));
2331 CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack));
2334 static void cnic_ack_bnx2x_msix(struct cnic_dev *dev)
2336 struct cnic_local *cp = dev->cnic_priv;
2338 cnic_ack_bnx2x_int(dev, cp->status_blk_num, CSTORM_ID, 0,
2339 IGU_INT_DISABLE, 0);
2342 static void cnic_service_bnx2x_bh(unsigned long data)
2344 struct cnic_dev *dev = (struct cnic_dev *) data;
2345 struct cnic_local *cp = dev->cnic_priv;
2346 u16 hw_prod, sw_prod;
2347 struct cstorm_status_block_c *sblk =
2348 &cp->status_blk.bnx2x->c_status_block;
2349 u32 status_idx = sblk->status_block_index;
2352 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2355 hw_prod = sblk->index_values[HC_INDEX_C_ISCSI_EQ_CONS];
2356 hw_prod = cp->hw_idx(hw_prod);
2357 sw_prod = cp->kcq_prod_idx;
2358 while (sw_prod != hw_prod) {
2359 kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
2363 service_kcqes(dev, kcqe_cnt);
2365 /* Tell compiler that sblk fields can change. */
2367 if (status_idx == sblk->status_block_index)
2370 status_idx = sblk->status_block_index;
2371 hw_prod = sblk->index_values[HC_INDEX_C_ISCSI_EQ_CONS];
2372 hw_prod = cp->hw_idx(hw_prod);
2376 CNIC_WR16(dev, cp->kcq_io_addr, sw_prod + MAX_KCQ_IDX);
2377 cnic_ack_bnx2x_int(dev, cp->status_blk_num, CSTORM_ID,
2378 status_idx, IGU_INT_ENABLE, 1);
2380 cp->kcq_prod_idx = sw_prod;
2383 static int cnic_service_bnx2x(void *data, void *status_blk)
2385 struct cnic_dev *dev = data;
2386 struct cnic_local *cp = dev->cnic_priv;
2388 if (!(cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
2391 cnic_chk_pkt_rings(cp);
2396 static void cnic_ulp_stop(struct cnic_dev *dev)
2398 struct cnic_local *cp = dev->cnic_priv;
2402 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
2404 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
2405 struct cnic_ulp_ops *ulp_ops;
2407 mutex_lock(&cnic_lock);
2408 ulp_ops = cp->ulp_ops[if_type];
2410 mutex_unlock(&cnic_lock);
2413 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2414 mutex_unlock(&cnic_lock);
2416 if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
2417 ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
2419 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2423 static void cnic_ulp_start(struct cnic_dev *dev)
2425 struct cnic_local *cp = dev->cnic_priv;
2428 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
2429 struct cnic_ulp_ops *ulp_ops;
2431 mutex_lock(&cnic_lock);
2432 ulp_ops = cp->ulp_ops[if_type];
2433 if (!ulp_ops || !ulp_ops->cnic_start) {
2434 mutex_unlock(&cnic_lock);
2437 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2438 mutex_unlock(&cnic_lock);
2440 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
2441 ulp_ops->cnic_start(cp->ulp_handle[if_type]);
2443 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2447 static int cnic_ctl(void *data, struct cnic_ctl_info *info)
2449 struct cnic_dev *dev = data;
2451 switch (info->cmd) {
2452 case CNIC_CTL_STOP_CMD:
2460 case CNIC_CTL_START_CMD:
2463 if (!cnic_start_hw(dev))
2464 cnic_ulp_start(dev);
2468 case CNIC_CTL_COMPLETION_CMD: {
2469 u32 cid = BNX2X_SW_CID(info->data.comp.cid);
2471 struct cnic_local *cp = dev->cnic_priv;
2473 if (cnic_get_l5_cid(cp, cid, &l5_cid) == 0) {
2474 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
2477 wake_up(&ctx->waitq);
2487 static void cnic_ulp_init(struct cnic_dev *dev)
2490 struct cnic_local *cp = dev->cnic_priv;
2492 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
2493 struct cnic_ulp_ops *ulp_ops;
2495 mutex_lock(&cnic_lock);
2496 ulp_ops = cnic_ulp_tbl[i];
2497 if (!ulp_ops || !ulp_ops->cnic_init) {
2498 mutex_unlock(&cnic_lock);
2502 mutex_unlock(&cnic_lock);
2504 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
2505 ulp_ops->cnic_init(dev);
2511 static void cnic_ulp_exit(struct cnic_dev *dev)
2514 struct cnic_local *cp = dev->cnic_priv;
2516 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
2517 struct cnic_ulp_ops *ulp_ops;
2519 mutex_lock(&cnic_lock);
2520 ulp_ops = cnic_ulp_tbl[i];
2521 if (!ulp_ops || !ulp_ops->cnic_exit) {
2522 mutex_unlock(&cnic_lock);
2526 mutex_unlock(&cnic_lock);
2528 if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
2529 ulp_ops->cnic_exit(dev);
2535 static int cnic_cm_offload_pg(struct cnic_sock *csk)
2537 struct cnic_dev *dev = csk->dev;
2538 struct l4_kwq_offload_pg *l4kwqe;
2539 struct kwqe *wqes[1];
2541 l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
2542 memset(l4kwqe, 0, sizeof(*l4kwqe));
2543 wqes[0] = (struct kwqe *) l4kwqe;
2545 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
2547 L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
2548 l4kwqe->l2hdr_nbytes = ETH_HLEN;
2550 l4kwqe->da0 = csk->ha[0];
2551 l4kwqe->da1 = csk->ha[1];
2552 l4kwqe->da2 = csk->ha[2];
2553 l4kwqe->da3 = csk->ha[3];
2554 l4kwqe->da4 = csk->ha[4];
2555 l4kwqe->da5 = csk->ha[5];
2557 l4kwqe->sa0 = dev->mac_addr[0];
2558 l4kwqe->sa1 = dev->mac_addr[1];
2559 l4kwqe->sa2 = dev->mac_addr[2];
2560 l4kwqe->sa3 = dev->mac_addr[3];
2561 l4kwqe->sa4 = dev->mac_addr[4];
2562 l4kwqe->sa5 = dev->mac_addr[5];
2564 l4kwqe->etype = ETH_P_IP;
2565 l4kwqe->ipid_start = DEF_IPID_START;
2566 l4kwqe->host_opaque = csk->l5_cid;
2569 l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
2570 l4kwqe->vlan_tag = csk->vlan_id;
2571 l4kwqe->l2hdr_nbytes += 4;
2574 return dev->submit_kwqes(dev, wqes, 1);
2577 static int cnic_cm_update_pg(struct cnic_sock *csk)
2579 struct cnic_dev *dev = csk->dev;
2580 struct l4_kwq_update_pg *l4kwqe;
2581 struct kwqe *wqes[1];
2583 l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
2584 memset(l4kwqe, 0, sizeof(*l4kwqe));
2585 wqes[0] = (struct kwqe *) l4kwqe;
2587 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
2589 L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
2590 l4kwqe->pg_cid = csk->pg_cid;
2592 l4kwqe->da0 = csk->ha[0];
2593 l4kwqe->da1 = csk->ha[1];
2594 l4kwqe->da2 = csk->ha[2];
2595 l4kwqe->da3 = csk->ha[3];
2596 l4kwqe->da4 = csk->ha[4];
2597 l4kwqe->da5 = csk->ha[5];
2599 l4kwqe->pg_host_opaque = csk->l5_cid;
2600 l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
2602 return dev->submit_kwqes(dev, wqes, 1);
2605 static int cnic_cm_upload_pg(struct cnic_sock *csk)
2607 struct cnic_dev *dev = csk->dev;
2608 struct l4_kwq_upload *l4kwqe;
2609 struct kwqe *wqes[1];
2611 l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
2612 memset(l4kwqe, 0, sizeof(*l4kwqe));
2613 wqes[0] = (struct kwqe *) l4kwqe;
2615 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
2617 L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
2618 l4kwqe->cid = csk->pg_cid;
2620 return dev->submit_kwqes(dev, wqes, 1);
2623 static int cnic_cm_conn_req(struct cnic_sock *csk)
2625 struct cnic_dev *dev = csk->dev;
2626 struct l4_kwq_connect_req1 *l4kwqe1;
2627 struct l4_kwq_connect_req2 *l4kwqe2;
2628 struct l4_kwq_connect_req3 *l4kwqe3;
2629 struct kwqe *wqes[3];
2633 l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
2634 l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
2635 l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
2636 memset(l4kwqe1, 0, sizeof(*l4kwqe1));
2637 memset(l4kwqe2, 0, sizeof(*l4kwqe2));
2638 memset(l4kwqe3, 0, sizeof(*l4kwqe3));
2640 l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
2642 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
2643 l4kwqe3->ka_timeout = csk->ka_timeout;
2644 l4kwqe3->ka_interval = csk->ka_interval;
2645 l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
2646 l4kwqe3->tos = csk->tos;
2647 l4kwqe3->ttl = csk->ttl;
2648 l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
2649 l4kwqe3->pmtu = csk->mtu;
2650 l4kwqe3->rcv_buf = csk->rcv_buf;
2651 l4kwqe3->snd_buf = csk->snd_buf;
2652 l4kwqe3->seed = csk->seed;
2654 wqes[0] = (struct kwqe *) l4kwqe1;
2655 if (test_bit(SK_F_IPV6, &csk->flags)) {
2656 wqes[1] = (struct kwqe *) l4kwqe2;
2657 wqes[2] = (struct kwqe *) l4kwqe3;
2660 l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
2661 l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
2663 L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
2664 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
2665 l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
2666 l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
2667 l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
2668 l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
2669 l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
2670 l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
2671 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
2672 sizeof(struct tcphdr);
2674 wqes[1] = (struct kwqe *) l4kwqe3;
2675 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
2676 sizeof(struct tcphdr);
2679 l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
2681 (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
2682 L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
2683 l4kwqe1->cid = csk->cid;
2684 l4kwqe1->pg_cid = csk->pg_cid;
2685 l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
2686 l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
2687 l4kwqe1->src_port = be16_to_cpu(csk->src_port);
2688 l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
2689 if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
2690 tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
2691 if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
2692 tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
2693 if (csk->tcp_flags & SK_TCP_NAGLE)
2694 tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
2695 if (csk->tcp_flags & SK_TCP_TIMESTAMP)
2696 tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
2697 if (csk->tcp_flags & SK_TCP_SACK)
2698 tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
2699 if (csk->tcp_flags & SK_TCP_SEG_SCALING)
2700 tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
2702 l4kwqe1->tcp_flags = tcp_flags;
2704 return dev->submit_kwqes(dev, wqes, num_wqes);
2707 static int cnic_cm_close_req(struct cnic_sock *csk)
2709 struct cnic_dev *dev = csk->dev;
2710 struct l4_kwq_close_req *l4kwqe;
2711 struct kwqe *wqes[1];
2713 l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
2714 memset(l4kwqe, 0, sizeof(*l4kwqe));
2715 wqes[0] = (struct kwqe *) l4kwqe;
2717 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
2718 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
2719 l4kwqe->cid = csk->cid;
2721 return dev->submit_kwqes(dev, wqes, 1);
2724 static int cnic_cm_abort_req(struct cnic_sock *csk)
2726 struct cnic_dev *dev = csk->dev;
2727 struct l4_kwq_reset_req *l4kwqe;
2728 struct kwqe *wqes[1];
2730 l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
2731 memset(l4kwqe, 0, sizeof(*l4kwqe));
2732 wqes[0] = (struct kwqe *) l4kwqe;
2734 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
2735 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
2736 l4kwqe->cid = csk->cid;
2738 return dev->submit_kwqes(dev, wqes, 1);
2741 static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
2742 u32 l5_cid, struct cnic_sock **csk, void *context)
2744 struct cnic_local *cp = dev->cnic_priv;
2745 struct cnic_sock *csk1;
2747 if (l5_cid >= MAX_CM_SK_TBL_SZ)
2750 csk1 = &cp->csk_tbl[l5_cid];
2751 if (atomic_read(&csk1->ref_count))
2754 if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
2759 csk1->l5_cid = l5_cid;
2760 csk1->ulp_type = ulp_type;
2761 csk1->context = context;
2763 csk1->ka_timeout = DEF_KA_TIMEOUT;
2764 csk1->ka_interval = DEF_KA_INTERVAL;
2765 csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
2766 csk1->tos = DEF_TOS;
2767 csk1->ttl = DEF_TTL;
2768 csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
2769 csk1->rcv_buf = DEF_RCV_BUF;
2770 csk1->snd_buf = DEF_SND_BUF;
2771 csk1->seed = DEF_SEED;
2777 static void cnic_cm_cleanup(struct cnic_sock *csk)
2779 if (csk->src_port) {
2780 struct cnic_dev *dev = csk->dev;
2781 struct cnic_local *cp = dev->cnic_priv;
2783 cnic_free_id(&cp->csk_port_tbl, csk->src_port);
2788 static void cnic_close_conn(struct cnic_sock *csk)
2790 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
2791 cnic_cm_upload_pg(csk);
2792 clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
2794 cnic_cm_cleanup(csk);
2797 static int cnic_cm_destroy(struct cnic_sock *csk)
2799 if (!cnic_in_use(csk))
2803 clear_bit(SK_F_INUSE, &csk->flags);
2804 smp_mb__after_clear_bit();
2805 while (atomic_read(&csk->ref_count) != 1)
2807 cnic_cm_cleanup(csk);
2814 static inline u16 cnic_get_vlan(struct net_device *dev,
2815 struct net_device **vlan_dev)
2817 if (dev->priv_flags & IFF_802_1Q_VLAN) {
2818 *vlan_dev = vlan_dev_real_dev(dev);
2819 return vlan_dev_vlan_id(dev);
2825 static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
2826 struct dst_entry **dst)
2828 #if defined(CONFIG_INET)
2833 memset(&fl, 0, sizeof(fl));
2834 fl.nl_u.ip4_u.daddr = dst_addr->sin_addr.s_addr;
2836 err = ip_route_output_key(&init_net, &rt, &fl);
2841 return -ENETUNREACH;
2845 static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
2846 struct dst_entry **dst)
2848 #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
2851 memset(&fl, 0, sizeof(fl));
2852 ipv6_addr_copy(&fl.fl6_dst, &dst_addr->sin6_addr);
2853 if (ipv6_addr_type(&fl.fl6_dst) & IPV6_ADDR_LINKLOCAL)
2854 fl.oif = dst_addr->sin6_scope_id;
2856 *dst = ip6_route_output(&init_net, NULL, &fl);
2861 return -ENETUNREACH;
2864 static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
2867 struct cnic_dev *dev = NULL;
2868 struct dst_entry *dst;
2869 struct net_device *netdev = NULL;
2870 int err = -ENETUNREACH;
2872 if (dst_addr->sin_family == AF_INET)
2873 err = cnic_get_v4_route(dst_addr, &dst);
2874 else if (dst_addr->sin_family == AF_INET6) {
2875 struct sockaddr_in6 *dst_addr6 =
2876 (struct sockaddr_in6 *) dst_addr;
2878 err = cnic_get_v6_route(dst_addr6, &dst);
2888 cnic_get_vlan(dst->dev, &netdev);
2890 dev = cnic_from_netdev(netdev);
2899 static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
2901 struct cnic_dev *dev = csk->dev;
2902 struct cnic_local *cp = dev->cnic_priv;
2904 return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
2907 static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
2909 struct cnic_dev *dev = csk->dev;
2910 struct cnic_local *cp = dev->cnic_priv;
2912 struct dst_entry *dst = NULL;
2913 struct net_device *realdev;
2916 if (saddr->local.v6.sin6_family == AF_INET6 &&
2917 saddr->remote.v6.sin6_family == AF_INET6)
2919 else if (saddr->local.v4.sin_family == AF_INET &&
2920 saddr->remote.v4.sin_family == AF_INET)
2925 clear_bit(SK_F_IPV6, &csk->flags);
2928 set_bit(SK_F_IPV6, &csk->flags);
2929 cnic_get_v6_route(&saddr->remote.v6, &dst);
2931 memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
2932 sizeof(struct in6_addr));
2933 csk->dst_port = saddr->remote.v6.sin6_port;
2934 local_port = saddr->local.v6.sin6_port;
2937 cnic_get_v4_route(&saddr->remote.v4, &dst);
2939 csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
2940 csk->dst_port = saddr->remote.v4.sin_port;
2941 local_port = saddr->local.v4.sin_port;
2945 csk->mtu = dev->netdev->mtu;
2946 if (dst && dst->dev) {
2947 u16 vlan = cnic_get_vlan(dst->dev, &realdev);
2948 if (realdev == dev->netdev) {
2949 csk->vlan_id = vlan;
2950 csk->mtu = dst_mtu(dst);
2954 if (local_port >= CNIC_LOCAL_PORT_MIN &&
2955 local_port < CNIC_LOCAL_PORT_MAX) {
2956 if (cnic_alloc_id(&cp->csk_port_tbl, local_port))
2962 local_port = cnic_alloc_new_id(&cp->csk_port_tbl);
2963 if (local_port == -1) {
2968 csk->src_port = local_port;
2975 static void cnic_init_csk_state(struct cnic_sock *csk)
2978 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
2979 clear_bit(SK_F_CLOSING, &csk->flags);
2982 static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
2986 if (!cnic_in_use(csk))
2989 if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
2992 cnic_init_csk_state(csk);
2994 err = cnic_get_route(csk, saddr);
2998 err = cnic_resolve_addr(csk, saddr);
3003 clear_bit(SK_F_CONNECT_START, &csk->flags);
3007 static int cnic_cm_abort(struct cnic_sock *csk)
3009 struct cnic_local *cp = csk->dev->cnic_priv;
3010 u32 opcode = L4_KCQE_OPCODE_VALUE_RESET_COMP;
3012 if (!cnic_in_use(csk))
3015 if (cnic_abort_prep(csk))
3016 return cnic_cm_abort_req(csk);
3018 /* Getting here means that we haven't started connect, or
3019 * connect was not successful.
3022 cp->close_conn(csk, opcode);
3023 if (csk->state != opcode)
3029 static int cnic_cm_close(struct cnic_sock *csk)
3031 if (!cnic_in_use(csk))
3034 if (cnic_close_prep(csk)) {
3035 csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
3036 return cnic_cm_close_req(csk);
3043 static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
3046 struct cnic_ulp_ops *ulp_ops;
3047 int ulp_type = csk->ulp_type;
3050 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
3052 if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
3053 ulp_ops->cm_connect_complete(csk);
3054 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
3055 ulp_ops->cm_close_complete(csk);
3056 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
3057 ulp_ops->cm_remote_abort(csk);
3058 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
3059 ulp_ops->cm_abort_complete(csk);
3060 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
3061 ulp_ops->cm_remote_close(csk);
3066 static int cnic_cm_set_pg(struct cnic_sock *csk)
3068 if (cnic_offld_prep(csk)) {
3069 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3070 cnic_cm_update_pg(csk);
3072 cnic_cm_offload_pg(csk);
3077 static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
3079 struct cnic_local *cp = dev->cnic_priv;
3080 u32 l5_cid = kcqe->pg_host_opaque;
3081 u8 opcode = kcqe->op_code;
3082 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
3085 if (!cnic_in_use(csk))
3088 if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3089 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3092 /* Possible PG kcqe status: SUCCESS, OFFLOADED_PG, or CTX_ALLOC_FAIL */
3093 if (kcqe->status == L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL) {
3094 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3095 cnic_cm_upcall(cp, csk,
3096 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3100 csk->pg_cid = kcqe->pg_cid;
3101 set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3102 cnic_cm_conn_req(csk);
3108 static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
3110 struct cnic_local *cp = dev->cnic_priv;
3111 struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
3112 u8 opcode = l4kcqe->op_code;
3114 struct cnic_sock *csk;
3116 if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
3117 opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3118 cnic_cm_process_offld_pg(dev, l4kcqe);
3122 l5_cid = l4kcqe->conn_id;
3124 l5_cid = l4kcqe->cid;
3125 if (l5_cid >= MAX_CM_SK_TBL_SZ)
3128 csk = &cp->csk_tbl[l5_cid];
3131 if (!cnic_in_use(csk)) {
3137 case L5CM_RAMROD_CMD_ID_TCP_CONNECT:
3138 if (l4kcqe->status != 0) {
3139 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3140 cnic_cm_upcall(cp, csk,
3141 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3144 case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
3145 if (l4kcqe->status == 0)
3146 set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
3148 smp_mb__before_clear_bit();
3149 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3150 cnic_cm_upcall(cp, csk, opcode);
3153 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
3154 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
3155 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
3156 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
3157 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
3158 cp->close_conn(csk, opcode);
3161 case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
3162 cnic_cm_upcall(cp, csk, opcode);
3168 static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
3170 struct cnic_dev *dev = data;
3173 for (i = 0; i < num; i++)
3174 cnic_cm_process_kcqe(dev, kcqe[i]);
3177 static struct cnic_ulp_ops cm_ulp_ops = {
3178 .indicate_kcqes = cnic_cm_indicate_kcqe,
3181 static void cnic_cm_free_mem(struct cnic_dev *dev)
3183 struct cnic_local *cp = dev->cnic_priv;
3187 cnic_free_id_tbl(&cp->csk_port_tbl);
3190 static int cnic_cm_alloc_mem(struct cnic_dev *dev)
3192 struct cnic_local *cp = dev->cnic_priv;
3194 cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
3199 if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
3200 CNIC_LOCAL_PORT_MIN)) {
3201 cnic_cm_free_mem(dev);
3207 static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
3209 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
3210 /* Unsolicited RESET_COMP or RESET_RECEIVED */
3211 opcode = L4_KCQE_OPCODE_VALUE_RESET_RECEIVED;
3212 csk->state = opcode;
3215 /* 1. If event opcode matches the expected event in csk->state
3216 * 2. If the expected event is CLOSE_COMP, we accept any event
3217 * 3. If the expected event is 0, meaning the connection was never
3218 * never established, we accept the opcode from cm_abort.
3220 if (opcode == csk->state || csk->state == 0 ||
3221 csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP) {
3222 if (!test_and_set_bit(SK_F_CLOSING, &csk->flags)) {
3223 if (csk->state == 0)
3224 csk->state = opcode;
3231 static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
3233 struct cnic_dev *dev = csk->dev;
3234 struct cnic_local *cp = dev->cnic_priv;
3236 if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED) {
3237 cnic_cm_upcall(cp, csk, opcode);
3241 clear_bit(SK_F_CONNECT_START, &csk->flags);
3242 cnic_close_conn(csk);
3243 csk->state = opcode;
3244 cnic_cm_upcall(cp, csk, opcode);
3247 static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
3251 static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
3255 get_random_bytes(&seed, 4);
3256 cnic_ctx_wr(dev, 45, 0, seed);
3260 static void cnic_close_bnx2x_conn(struct cnic_sock *csk, u32 opcode)
3262 struct cnic_dev *dev = csk->dev;
3263 struct cnic_local *cp = dev->cnic_priv;
3264 struct cnic_context *ctx = &cp->ctx_tbl[csk->l5_cid];
3265 union l5cm_specific_data l5_data;
3267 int close_complete = 0;
3270 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
3271 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
3272 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
3273 if (cnic_ready_to_close(csk, opcode)) {
3274 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3275 cmd = L5CM_RAMROD_CMD_ID_SEARCHER_DELETE;
3280 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
3281 cmd = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
3283 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
3288 memset(&l5_data, 0, sizeof(l5_data));
3290 cnic_submit_kwqe_16(dev, cmd, csk->cid, ISCSI_CONNECTION_TYPE,
3292 } else if (close_complete) {
3293 ctx->timestamp = jiffies;
3294 cnic_close_conn(csk);
3295 cnic_cm_upcall(cp, csk, csk->state);
3299 static void cnic_cm_stop_bnx2x_hw(struct cnic_dev *dev)
3303 static int cnic_cm_init_bnx2x_hw(struct cnic_dev *dev)
3305 struct cnic_local *cp = dev->cnic_priv;
3306 int func = CNIC_FUNC(cp);
3308 cnic_init_bnx2x_mac(dev);
3309 cnic_bnx2x_set_tcp_timestamp(dev, 1);
3311 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
3312 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(func), 0);
3314 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3315 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(func), 1);
3316 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3317 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(func),
3320 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3321 XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(func), DEF_TTL);
3322 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3323 XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(func), DEF_TOS);
3324 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3325 XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(func), 2);
3326 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3327 XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(func), DEF_SWS_TIMER);
3329 CNIC_WR(dev, BAR_TSTRORM_INTMEM + TSTORM_TCP_MAX_CWND_OFFSET(func),
3334 static int cnic_cm_open(struct cnic_dev *dev)
3336 struct cnic_local *cp = dev->cnic_priv;
3339 err = cnic_cm_alloc_mem(dev);
3343 err = cp->start_cm(dev);
3348 dev->cm_create = cnic_cm_create;
3349 dev->cm_destroy = cnic_cm_destroy;
3350 dev->cm_connect = cnic_cm_connect;
3351 dev->cm_abort = cnic_cm_abort;
3352 dev->cm_close = cnic_cm_close;
3353 dev->cm_select_dev = cnic_cm_select_dev;
3355 cp->ulp_handle[CNIC_ULP_L4] = dev;
3356 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
3360 cnic_cm_free_mem(dev);
3364 static int cnic_cm_shutdown(struct cnic_dev *dev)
3366 struct cnic_local *cp = dev->cnic_priv;
3374 for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
3375 struct cnic_sock *csk = &cp->csk_tbl[i];
3377 clear_bit(SK_F_INUSE, &csk->flags);
3378 cnic_cm_cleanup(csk);
3380 cnic_cm_free_mem(dev);
3385 static void cnic_init_context(struct cnic_dev *dev, u32 cid)
3390 cid_addr = GET_CID_ADDR(cid);
3392 for (i = 0; i < CTX_SIZE; i += 4)
3393 cnic_ctx_wr(dev, cid_addr, i, 0);
3396 static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
3398 struct cnic_local *cp = dev->cnic_priv;
3400 u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
3402 if (CHIP_NUM(cp) != CHIP_NUM_5709)
3405 for (i = 0; i < cp->ctx_blks; i++) {
3407 u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
3410 memset(cp->ctx_arr[i].ctx, 0, BCM_PAGE_SIZE);
3412 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
3413 (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
3414 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
3415 (u64) cp->ctx_arr[i].mapping >> 32);
3416 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
3417 BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
3418 for (j = 0; j < 10; j++) {
3420 val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
3421 if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
3425 if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
3433 static void cnic_free_irq(struct cnic_dev *dev)
3435 struct cnic_local *cp = dev->cnic_priv;
3436 struct cnic_eth_dev *ethdev = cp->ethdev;
3438 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3439 cp->disable_int_sync(dev);
3440 tasklet_disable(&cp->cnic_irq_task);
3441 free_irq(ethdev->irq_arr[0].vector, dev);
3445 static int cnic_init_bnx2_irq(struct cnic_dev *dev)
3447 struct cnic_local *cp = dev->cnic_priv;
3448 struct cnic_eth_dev *ethdev = cp->ethdev;
3450 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3452 int sblk_num = cp->status_blk_num;
3453 u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
3454 BNX2_HC_SB_CONFIG_1;
3456 CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
3458 CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
3459 CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
3460 CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
3462 cp->last_status_idx = cp->status_blk.bnx2->status_idx;
3463 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2_msix,
3464 (unsigned long) dev);
3465 err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0,
3468 tasklet_disable(&cp->cnic_irq_task);
3471 while (cp->status_blk.bnx2->status_completion_producer_index &&
3473 CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
3474 1 << (11 + sblk_num));
3479 if (cp->status_blk.bnx2->status_completion_producer_index) {
3485 struct status_block *sblk = cp->status_blk.gen;
3486 u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
3489 while (sblk->status_completion_producer_index && i < 10) {
3490 CNIC_WR(dev, BNX2_HC_COMMAND,
3491 hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
3496 if (sblk->status_completion_producer_index)
3503 netdev_err(dev->netdev, "KCQ index not resetting to 0\n");
3507 static void cnic_enable_bnx2_int(struct cnic_dev *dev)
3509 struct cnic_local *cp = dev->cnic_priv;
3510 struct cnic_eth_dev *ethdev = cp->ethdev;
3512 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3515 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
3516 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
3519 static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
3521 struct cnic_local *cp = dev->cnic_priv;
3522 struct cnic_eth_dev *ethdev = cp->ethdev;
3524 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3527 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
3528 BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
3529 CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
3530 synchronize_irq(ethdev->irq_arr[0].vector);
3533 static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
3535 struct cnic_local *cp = dev->cnic_priv;
3536 struct cnic_eth_dev *ethdev = cp->ethdev;
3537 u32 cid_addr, tx_cid, sb_id;
3538 u32 val, offset0, offset1, offset2, offset3;
3542 struct status_block *s_blk = cp->status_blk.gen;
3544 sb_id = cp->status_blk_num;
3546 cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
3547 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3548 struct status_block_msix *sblk = cp->status_blk.bnx2;
3550 tx_cid = TX_TSS_CID + sb_id - 1;
3551 CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
3553 cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
3555 cp->tx_cons = *cp->tx_cons_ptr;
3557 cid_addr = GET_CID_ADDR(tx_cid);
3558 if (CHIP_NUM(cp) == CHIP_NUM_5709) {
3559 u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
3561 for (i = 0; i < PHY_CTX_SIZE; i += 4)
3562 cnic_ctx_wr(dev, cid_addr2, i, 0);
3564 offset0 = BNX2_L2CTX_TYPE_XI;
3565 offset1 = BNX2_L2CTX_CMD_TYPE_XI;
3566 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
3567 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
3569 cnic_init_context(dev, tx_cid);
3570 cnic_init_context(dev, tx_cid + 1);
3572 offset0 = BNX2_L2CTX_TYPE;
3573 offset1 = BNX2_L2CTX_CMD_TYPE;
3574 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
3575 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
3577 val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
3578 cnic_ctx_wr(dev, cid_addr, offset0, val);
3580 val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
3581 cnic_ctx_wr(dev, cid_addr, offset1, val);
3583 txbd = (struct tx_bd *) cp->l2_ring;
3585 buf_map = cp->l2_buf_map;
3586 for (i = 0; i < MAX_TX_DESC_CNT; i++, txbd++) {
3587 txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
3588 txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
3590 val = (u64) cp->l2_ring_map >> 32;
3591 cnic_ctx_wr(dev, cid_addr, offset2, val);
3592 txbd->tx_bd_haddr_hi = val;
3594 val = (u64) cp->l2_ring_map & 0xffffffff;
3595 cnic_ctx_wr(dev, cid_addr, offset3, val);
3596 txbd->tx_bd_haddr_lo = val;
3599 static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
3601 struct cnic_local *cp = dev->cnic_priv;
3602 struct cnic_eth_dev *ethdev = cp->ethdev;
3603 u32 cid_addr, sb_id, val, coal_reg, coal_val;
3606 struct status_block *s_blk = cp->status_blk.gen;
3608 sb_id = cp->status_blk_num;
3609 cnic_init_context(dev, 2);
3610 cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
3611 coal_reg = BNX2_HC_COMMAND;
3612 coal_val = CNIC_RD(dev, coal_reg);
3613 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3614 struct status_block_msix *sblk = cp->status_blk.bnx2;
3616 cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
3617 coal_reg = BNX2_HC_COALESCE_NOW;
3618 coal_val = 1 << (11 + sb_id);
3621 while (!(*cp->rx_cons_ptr != 0) && i < 10) {
3622 CNIC_WR(dev, coal_reg, coal_val);
3627 cp->rx_cons = *cp->rx_cons_ptr;
3629 cid_addr = GET_CID_ADDR(2);
3630 val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
3631 BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
3632 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
3635 val = 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT;
3637 val = BNX2_L2CTX_L2_STATUSB_NUM(sb_id);
3638 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
3640 rxbd = (struct rx_bd *) (cp->l2_ring + BCM_PAGE_SIZE);
3641 for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
3643 int n = (i % cp->l2_rx_ring_size) + 1;
3645 buf_map = cp->l2_buf_map + (n * cp->l2_single_buf_size);
3646 rxbd->rx_bd_len = cp->l2_single_buf_size;
3647 rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
3648 rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
3649 rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
3651 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) >> 32;
3652 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
3653 rxbd->rx_bd_haddr_hi = val;
3655 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) & 0xffffffff;
3656 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
3657 rxbd->rx_bd_haddr_lo = val;
3659 val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
3660 cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
3663 static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
3665 struct kwqe *wqes[1], l2kwqe;
3667 memset(&l2kwqe, 0, sizeof(l2kwqe));
3669 l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_FLAGS_LAYER_SHIFT) |
3670 (L2_KWQE_OPCODE_VALUE_FLUSH <<
3671 KWQE_OPCODE_SHIFT) | 2;
3672 dev->submit_kwqes(dev, wqes, 1);
3675 static void cnic_set_bnx2_mac(struct cnic_dev *dev)
3677 struct cnic_local *cp = dev->cnic_priv;
3680 val = cp->func << 2;
3682 cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
3684 val = cnic_reg_rd_ind(dev, cp->shmem_base +
3685 BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
3686 dev->mac_addr[0] = (u8) (val >> 8);
3687 dev->mac_addr[1] = (u8) val;
3689 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
3691 val = cnic_reg_rd_ind(dev, cp->shmem_base +
3692 BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
3693 dev->mac_addr[2] = (u8) (val >> 24);
3694 dev->mac_addr[3] = (u8) (val >> 16);
3695 dev->mac_addr[4] = (u8) (val >> 8);
3696 dev->mac_addr[5] = (u8) val;
3698 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
3700 val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
3701 if (CHIP_NUM(cp) != CHIP_NUM_5709)
3702 val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
3704 CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
3705 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
3706 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
3709 static int cnic_start_bnx2_hw(struct cnic_dev *dev)
3711 struct cnic_local *cp = dev->cnic_priv;
3712 struct cnic_eth_dev *ethdev = cp->ethdev;
3713 struct status_block *sblk = cp->status_blk.gen;
3717 cnic_set_bnx2_mac(dev);
3719 val = CNIC_RD(dev, BNX2_MQ_CONFIG);
3720 val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
3721 if (BCM_PAGE_BITS > 12)
3722 val |= (12 - 8) << 4;
3724 val |= (BCM_PAGE_BITS - 8) << 4;
3726 CNIC_WR(dev, BNX2_MQ_CONFIG, val);
3728 CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
3729 CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
3730 CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
3732 err = cnic_setup_5709_context(dev, 1);
3736 cnic_init_context(dev, KWQ_CID);
3737 cnic_init_context(dev, KCQ_CID);
3739 cp->kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
3740 cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
3742 cp->max_kwq_idx = MAX_KWQ_IDX;
3743 cp->kwq_prod_idx = 0;
3744 cp->kwq_con_idx = 0;
3745 set_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
3747 if (CHIP_NUM(cp) == CHIP_NUM_5706 || CHIP_NUM(cp) == CHIP_NUM_5708)
3748 cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
3750 cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
3752 /* Initialize the kernel work queue context. */
3753 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
3754 (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
3755 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_TYPE, val);
3757 val = (BCM_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
3758 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
3760 val = ((BCM_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
3761 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
3763 val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
3764 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
3766 val = (u32) cp->kwq_info.pgtbl_map;
3767 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
3769 cp->kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
3770 cp->kcq_io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
3772 cp->kcq_prod_idx = 0;
3774 /* Initialize the kernel complete queue context. */
3775 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
3776 (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
3777 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_TYPE, val);
3779 val = (BCM_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
3780 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
3782 val = ((BCM_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
3783 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
3785 val = (u32) ((u64) cp->kcq_info.pgtbl_map >> 32);
3786 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
3788 val = (u32) cp->kcq_info.pgtbl_map;
3789 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
3792 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3793 u32 sb_id = cp->status_blk_num;
3794 u32 sb = BNX2_L2CTX_L5_STATUSB_NUM(sb_id);
3796 cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
3797 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
3798 cnic_ctx_wr(dev, cp->kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
3801 /* Enable Commnad Scheduler notification when we write to the
3802 * host producer index of the kernel contexts. */
3803 CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
3805 /* Enable Command Scheduler notification when we write to either
3806 * the Send Queue or Receive Queue producer indexes of the kernel
3807 * bypass contexts. */
3808 CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
3809 CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
3811 /* Notify COM when the driver post an application buffer. */
3812 CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
3814 /* Set the CP and COM doorbells. These two processors polls the
3815 * doorbell for a non zero value before running. This must be done
3816 * after setting up the kernel queue contexts. */
3817 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
3818 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
3820 cnic_init_bnx2_tx_ring(dev);
3821 cnic_init_bnx2_rx_ring(dev);
3823 err = cnic_init_bnx2_irq(dev);
3825 netdev_err(dev->netdev, "cnic_init_irq failed\n");
3826 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
3827 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
3834 static void cnic_setup_bnx2x_context(struct cnic_dev *dev)
3836 struct cnic_local *cp = dev->cnic_priv;
3837 struct cnic_eth_dev *ethdev = cp->ethdev;
3838 u32 start_offset = ethdev->ctx_tbl_offset;
3841 for (i = 0; i < cp->ctx_blks; i++) {
3842 struct cnic_ctx *ctx = &cp->ctx_arr[i];
3843 dma_addr_t map = ctx->mapping;
3845 if (cp->ctx_align) {
3846 unsigned long mask = cp->ctx_align - 1;
3848 map = (map + mask) & ~mask;
3851 cnic_ctx_tbl_wr(dev, start_offset + i, map);
3855 static int cnic_init_bnx2x_irq(struct cnic_dev *dev)
3857 struct cnic_local *cp = dev->cnic_priv;
3858 struct cnic_eth_dev *ethdev = cp->ethdev;
3861 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2x_bh,
3862 (unsigned long) dev);
3863 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3864 err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0,
3867 tasklet_disable(&cp->cnic_irq_task);
3872 static void cnic_enable_bnx2x_int(struct cnic_dev *dev)
3874 struct cnic_local *cp = dev->cnic_priv;
3875 u8 sb_id = cp->status_blk_num;
3876 int port = CNIC_PORT(cp);
3878 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
3879 CSTORM_SB_HC_TIMEOUT_C_OFFSET(port, sb_id,
3880 HC_INDEX_C_ISCSI_EQ_CONS),
3882 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
3883 CSTORM_SB_HC_DISABLE_C_OFFSET(port, sb_id,
3884 HC_INDEX_C_ISCSI_EQ_CONS), 0);
3887 static void cnic_disable_bnx2x_int_sync(struct cnic_dev *dev)
3891 static void cnic_init_bnx2x_tx_ring(struct cnic_dev *dev)
3893 struct cnic_local *cp = dev->cnic_priv;
3894 union eth_tx_bd_types *txbd = (union eth_tx_bd_types *) cp->l2_ring;
3895 struct eth_context *context;
3896 struct regpair context_addr;
3898 int func = CNIC_FUNC(cp);
3899 int port = CNIC_PORT(cp);
3901 int cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
3904 memset(txbd, 0, BCM_PAGE_SIZE);
3906 buf_map = cp->l2_buf_map;
3907 for (i = 0; i < MAX_TX_DESC_CNT; i += 3, txbd += 3) {
3908 struct eth_tx_start_bd *start_bd = &txbd->start_bd;
3909 struct eth_tx_bd *reg_bd = &((txbd + 2)->reg_bd);
3911 start_bd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
3912 start_bd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
3913 reg_bd->addr_hi = start_bd->addr_hi;
3914 reg_bd->addr_lo = start_bd->addr_lo + 0x10;
3915 start_bd->nbytes = cpu_to_le16(0x10);
3916 start_bd->nbd = cpu_to_le16(3);
3917 start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
3918 start_bd->general_data = (UNICAST_ADDRESS <<
3919 ETH_TX_START_BD_ETH_ADDR_TYPE_SHIFT);
3920 start_bd->general_data |= (1 << ETH_TX_START_BD_HDR_NBDS_SHIFT);
3923 context = cnic_get_bnx2x_ctx(dev, BNX2X_ISCSI_L2_CID, 1, &context_addr);
3925 val = (u64) cp->l2_ring_map >> 32;
3926 txbd->next_bd.addr_hi = cpu_to_le32(val);
3928 context->xstorm_st_context.tx_bd_page_base_hi = val;
3930 val = (u64) cp->l2_ring_map & 0xffffffff;
3931 txbd->next_bd.addr_lo = cpu_to_le32(val);
3933 context->xstorm_st_context.tx_bd_page_base_lo = val;
3935 context->cstorm_st_context.sb_index_number =
3936 HC_INDEX_DEF_C_ETH_ISCSI_CQ_CONS;
3937 context->cstorm_st_context.status_block_id = BNX2X_DEF_SB_ID;
3939 if (cli < MAX_X_STAT_COUNTER_ID)
3940 context->xstorm_st_context.statistics_data = cli |
3941 XSTORM_ETH_ST_CONTEXT_STATISTICS_ENABLE;
3943 context->xstorm_ag_context.cdu_reserved =
3944 CDU_RSRVD_VALUE_TYPE_A(BNX2X_HW_CID(BNX2X_ISCSI_L2_CID, func),
3945 CDU_REGION_NUMBER_XCM_AG,
3946 ETH_CONNECTION_TYPE);
3948 /* reset xstorm per client statistics */
3949 if (cli < MAX_X_STAT_COUNTER_ID) {
3950 val = BAR_XSTRORM_INTMEM +
3951 XSTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
3952 for (i = 0; i < sizeof(struct xstorm_per_client_stats) / 4; i++)
3953 CNIC_WR(dev, val + i * 4, 0);
3957 &cp->bnx2x_def_status_blk->c_def_status_block.index_values[
3958 HC_INDEX_DEF_C_ETH_ISCSI_CQ_CONS];
3961 static void cnic_init_bnx2x_rx_ring(struct cnic_dev *dev)
3963 struct cnic_local *cp = dev->cnic_priv;
3964 struct eth_rx_bd *rxbd = (struct eth_rx_bd *) (cp->l2_ring +
3966 struct eth_rx_cqe_next_page *rxcqe = (struct eth_rx_cqe_next_page *)
3967 (cp->l2_ring + (2 * BCM_PAGE_SIZE));
3968 struct eth_context *context;
3969 struct regpair context_addr;
3971 int port = CNIC_PORT(cp);
3972 int func = CNIC_FUNC(cp);
3973 int cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
3975 struct tstorm_eth_client_config tstorm_client = {0};
3977 for (i = 0; i < BNX2X_MAX_RX_DESC_CNT; i++, rxbd++) {
3979 int n = (i % cp->l2_rx_ring_size) + 1;
3981 buf_map = cp->l2_buf_map + (n * cp->l2_single_buf_size);
3982 rxbd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
3983 rxbd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
3985 context = cnic_get_bnx2x_ctx(dev, BNX2X_ISCSI_L2_CID, 0, &context_addr);
3987 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) >> 32;
3988 rxbd->addr_hi = cpu_to_le32(val);
3990 context->ustorm_st_context.common.bd_page_base_hi = val;
3992 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) & 0xffffffff;
3993 rxbd->addr_lo = cpu_to_le32(val);
3995 context->ustorm_st_context.common.bd_page_base_lo = val;
3997 context->ustorm_st_context.common.sb_index_numbers =
3998 BNX2X_ISCSI_RX_SB_INDEX_NUM;
3999 context->ustorm_st_context.common.clientId = cli;
4000 context->ustorm_st_context.common.status_block_id = BNX2X_DEF_SB_ID;
4001 if (cli < MAX_U_STAT_COUNTER_ID) {
4002 context->ustorm_st_context.common.flags =
4003 USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_STATISTICS;
4004 context->ustorm_st_context.common.statistics_counter_id = cli;
4006 context->ustorm_st_context.common.mc_alignment_log_size = 0;
4007 context->ustorm_st_context.common.bd_buff_size =
4008 cp->l2_single_buf_size;
4010 context->ustorm_ag_context.cdu_usage =
4011 CDU_RSRVD_VALUE_TYPE_A(BNX2X_HW_CID(BNX2X_ISCSI_L2_CID, func),
4012 CDU_REGION_NUMBER_UCM_AG,
4013 ETH_CONNECTION_TYPE);
4015 rxcqe += BNX2X_MAX_RCQ_DESC_CNT;
4016 val = (u64) (cp->l2_ring_map + (2 * BCM_PAGE_SIZE)) >> 32;
4017 rxcqe->addr_hi = cpu_to_le32(val);
4019 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4020 USTORM_CQE_PAGE_BASE_OFFSET(port, cli) + 4, val);
4022 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4023 USTORM_CQE_PAGE_NEXT_OFFSET(port, cli) + 4, val);
4025 val = (u64) (cp->l2_ring_map + (2 * BCM_PAGE_SIZE)) & 0xffffffff;
4026 rxcqe->addr_lo = cpu_to_le32(val);
4028 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4029 USTORM_CQE_PAGE_BASE_OFFSET(port, cli), val);
4031 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4032 USTORM_CQE_PAGE_NEXT_OFFSET(port, cli), val);
4034 /* client tstorm info */
4035 tstorm_client.mtu = cp->l2_single_buf_size - 14;
4036 tstorm_client.config_flags = TSTORM_ETH_CLIENT_CONFIG_E1HOV_REM_ENABLE;
4038 if (cli < MAX_T_STAT_COUNTER_ID) {
4039 tstorm_client.config_flags |=
4040 TSTORM_ETH_CLIENT_CONFIG_STATSITICS_ENABLE;
4041 tstorm_client.statistics_counter_id = cli;
4044 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4045 TSTORM_CLIENT_CONFIG_OFFSET(port, cli),
4046 ((u32 *)&tstorm_client)[0]);
4047 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4048 TSTORM_CLIENT_CONFIG_OFFSET(port, cli) + 4,
4049 ((u32 *)&tstorm_client)[1]);
4051 /* reset tstorm per client statistics */
4052 if (cli < MAX_T_STAT_COUNTER_ID) {
4054 val = BAR_TSTRORM_INTMEM +
4055 TSTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
4056 for (i = 0; i < sizeof(struct tstorm_per_client_stats) / 4; i++)
4057 CNIC_WR(dev, val + i * 4, 0);
4060 /* reset ustorm per client statistics */
4061 if (cli < MAX_U_STAT_COUNTER_ID) {
4062 val = BAR_USTRORM_INTMEM +
4063 USTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
4064 for (i = 0; i < sizeof(struct ustorm_per_client_stats) / 4; i++)
4065 CNIC_WR(dev, val + i * 4, 0);
4069 &cp->bnx2x_def_status_blk->u_def_status_block.index_values[
4070 HC_INDEX_DEF_U_ETH_ISCSI_RX_CQ_CONS];
4073 static void cnic_get_bnx2x_iscsi_info(struct cnic_dev *dev)
4075 struct cnic_local *cp = dev->cnic_priv;
4076 u32 base, addr, val;
4077 int port = CNIC_PORT(cp);
4079 dev->max_iscsi_conn = 0;
4080 base = CNIC_RD(dev, MISC_REG_SHARED_MEM_ADDR);
4081 if (base < 0xa0000 || base >= 0xc0000)
4084 addr = BNX2X_SHMEM_ADDR(base,
4085 dev_info.port_hw_config[port].iscsi_mac_upper);
4087 val = CNIC_RD(dev, addr);
4089 dev->mac_addr[0] = (u8) (val >> 8);
4090 dev->mac_addr[1] = (u8) val;
4092 addr = BNX2X_SHMEM_ADDR(base,
4093 dev_info.port_hw_config[port].iscsi_mac_lower);
4095 val = CNIC_RD(dev, addr);
4097 dev->mac_addr[2] = (u8) (val >> 24);
4098 dev->mac_addr[3] = (u8) (val >> 16);
4099 dev->mac_addr[4] = (u8) (val >> 8);
4100 dev->mac_addr[5] = (u8) val;
4102 addr = BNX2X_SHMEM_ADDR(base, validity_map[port]);
4103 val = CNIC_RD(dev, addr);
4105 if (!(val & SHR_MEM_VALIDITY_LIC_NO_KEY_IN_EFFECT)) {
4108 addr = BNX2X_SHMEM_ADDR(base,
4109 drv_lic_key[port].max_iscsi_init_conn);
4110 val16 = CNIC_RD16(dev, addr);
4114 dev->max_iscsi_conn = val16;
4116 if (BNX2X_CHIP_IS_E1H(cp->chip_id)) {
4117 int func = CNIC_FUNC(cp);
4119 addr = BNX2X_SHMEM_ADDR(base,
4120 mf_cfg.func_mf_config[func].e1hov_tag);
4121 val = CNIC_RD(dev, addr);
4122 val &= FUNC_MF_CFG_E1HOV_TAG_MASK;
4123 if (val != FUNC_MF_CFG_E1HOV_TAG_DEFAULT) {
4124 addr = BNX2X_SHMEM_ADDR(base,
4125 mf_cfg.func_mf_config[func].config);
4126 val = CNIC_RD(dev, addr);
4127 val &= FUNC_MF_CFG_PROTOCOL_MASK;
4128 if (val != FUNC_MF_CFG_PROTOCOL_ISCSI)
4129 dev->max_iscsi_conn = 0;
4134 static int cnic_start_bnx2x_hw(struct cnic_dev *dev)
4136 struct cnic_local *cp = dev->cnic_priv;
4137 int func = CNIC_FUNC(cp), ret, i;
4138 int port = CNIC_PORT(cp);
4140 u8 sb_id = cp->status_blk_num;
4142 ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ,
4143 cp->iscsi_start_cid);
4148 cp->kcq_io_addr = BAR_CSTRORM_INTMEM +
4149 CSTORM_ISCSI_EQ_PROD_OFFSET(func, 0);
4150 cp->kcq_prod_idx = 0;
4152 cnic_get_bnx2x_iscsi_info(dev);
4155 CNIC_WR16(dev, cp->kcq_io_addr, MAX_KCQ_IDX);
4156 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4157 CSTORM_ISCSI_EQ_CONS_OFFSET(func, 0), 0);
4158 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4159 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(func, 0),
4160 cp->kcq_info.pg_map_arr[1] & 0xffffffff);
4161 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4162 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(func, 0) + 4,
4163 (u64) cp->kcq_info.pg_map_arr[1] >> 32);
4164 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4165 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(func, 0),
4166 cp->kcq_info.pg_map_arr[0] & 0xffffffff);
4167 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4168 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(func, 0) + 4,
4169 (u64) cp->kcq_info.pg_map_arr[0] >> 32);
4170 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4171 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(func, 0), 1);
4172 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
4173 CSTORM_ISCSI_EQ_SB_NUM_OFFSET(func, 0), cp->status_blk_num);
4174 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4175 CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(func, 0),
4176 HC_INDEX_C_ISCSI_EQ_CONS);
4178 for (i = 0; i < cp->conn_buf_info.num_pages; i++) {
4179 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4180 TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(func, i),
4181 cp->conn_buf_info.pgtbl[2 * i]);
4182 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4183 TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(func, i) + 4,
4184 cp->conn_buf_info.pgtbl[(2 * i) + 1]);
4187 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4188 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(func),
4189 cp->gbl_buf_info.pg_map_arr[0] & 0xffffffff);
4190 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4191 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(func) + 4,
4192 (u64) cp->gbl_buf_info.pg_map_arr[0] >> 32);
4194 cnic_setup_bnx2x_context(dev);
4196 eq_idx = CNIC_RD16(dev, BAR_CSTRORM_INTMEM +
4197 CSTORM_SB_HOST_STATUS_BLOCK_C_OFFSET(port, sb_id) +
4198 offsetof(struct cstorm_status_block_c,
4199 index_values[HC_INDEX_C_ISCSI_EQ_CONS]));
4201 netdev_err(dev->netdev, "EQ cons index %x != 0\n", eq_idx);
4204 ret = cnic_init_bnx2x_irq(dev);
4208 cnic_init_bnx2x_tx_ring(dev);
4209 cnic_init_bnx2x_rx_ring(dev);
4214 static void cnic_init_rings(struct cnic_dev *dev)
4216 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
4217 cnic_init_bnx2_tx_ring(dev);
4218 cnic_init_bnx2_rx_ring(dev);
4219 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
4220 struct cnic_local *cp = dev->cnic_priv;
4221 u32 cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
4222 union l5cm_specific_data l5_data;
4223 struct ustorm_eth_rx_producers rx_prods = {0};
4226 rx_prods.bd_prod = 0;
4227 rx_prods.cqe_prod = BNX2X_MAX_RCQ_DESC_CNT;
4230 off = BAR_USTRORM_INTMEM +
4231 USTORM_RX_PRODS_OFFSET(CNIC_PORT(cp), cli);
4233 for (i = 0; i < sizeof(struct ustorm_eth_rx_producers) / 4; i++)
4234 CNIC_WR(dev, off + i * 4, ((u32 *) &rx_prods)[i]);
4236 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
4238 cnic_init_bnx2x_tx_ring(dev);
4239 cnic_init_bnx2x_rx_ring(dev);
4241 l5_data.phy_address.lo = cli;
4242 l5_data.phy_address.hi = 0;
4243 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CLIENT_SETUP,
4244 BNX2X_ISCSI_L2_CID, ETH_CONNECTION_TYPE, &l5_data);
4246 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
4250 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
4251 netdev_err(dev->netdev,
4252 "iSCSI CLIENT_SETUP did not complete\n");
4253 cnic_kwq_completion(dev, 1);
4254 cnic_ring_ctl(dev, BNX2X_ISCSI_L2_CID, cli, 1);
4258 static void cnic_shutdown_rings(struct cnic_dev *dev)
4260 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
4261 cnic_shutdown_bnx2_rx_ring(dev);
4262 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
4263 struct cnic_local *cp = dev->cnic_priv;
4264 u32 cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
4265 union l5cm_specific_data l5_data;
4268 cnic_ring_ctl(dev, BNX2X_ISCSI_L2_CID, cli, 0);
4270 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
4272 l5_data.phy_address.lo = cli;
4273 l5_data.phy_address.hi = 0;
4274 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_HALT,
4275 BNX2X_ISCSI_L2_CID, ETH_CONNECTION_TYPE, &l5_data);
4277 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
4281 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
4282 netdev_err(dev->netdev,
4283 "iSCSI CLIENT_HALT did not complete\n");
4284 cnic_kwq_completion(dev, 1);
4286 memset(&l5_data, 0, sizeof(l5_data));
4287 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CFC_DEL,
4288 BNX2X_ISCSI_L2_CID, ETH_CONNECTION_TYPE |
4289 (1 << SPE_HDR_COMMON_RAMROD_SHIFT), &l5_data);
4294 static int cnic_register_netdev(struct cnic_dev *dev)
4296 struct cnic_local *cp = dev->cnic_priv;
4297 struct cnic_eth_dev *ethdev = cp->ethdev;
4303 if (ethdev->drv_state & CNIC_DRV_STATE_REGD)
4306 err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
4308 netdev_err(dev->netdev, "register_cnic failed\n");
4313 static void cnic_unregister_netdev(struct cnic_dev *dev)
4315 struct cnic_local *cp = dev->cnic_priv;
4316 struct cnic_eth_dev *ethdev = cp->ethdev;
4321 ethdev->drv_unregister_cnic(dev->netdev);
4324 static int cnic_start_hw(struct cnic_dev *dev)
4326 struct cnic_local *cp = dev->cnic_priv;
4327 struct cnic_eth_dev *ethdev = cp->ethdev;
4330 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
4333 dev->regview = ethdev->io_base;
4334 cp->chip_id = ethdev->chip_id;
4335 pci_dev_get(dev->pcidev);
4336 cp->func = PCI_FUNC(dev->pcidev->devfn);
4337 cp->status_blk.gen = ethdev->irq_arr[0].status_blk;
4338 cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
4340 err = cp->alloc_resc(dev);
4342 netdev_err(dev->netdev, "allocate resource failure\n");
4346 err = cp->start_hw(dev);
4350 err = cnic_cm_open(dev);
4354 set_bit(CNIC_F_CNIC_UP, &dev->flags);
4356 cp->enable_int(dev);
4362 pci_dev_put(dev->pcidev);
4366 static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
4368 cnic_disable_bnx2_int_sync(dev);
4370 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
4371 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
4373 cnic_init_context(dev, KWQ_CID);
4374 cnic_init_context(dev, KCQ_CID);
4376 cnic_setup_5709_context(dev, 0);
4379 cnic_free_resc(dev);
4383 static void cnic_stop_bnx2x_hw(struct cnic_dev *dev)
4385 struct cnic_local *cp = dev->cnic_priv;
4386 u8 sb_id = cp->status_blk_num;
4387 int port = CNIC_PORT(cp);
4390 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
4391 CSTORM_SB_HOST_STATUS_BLOCK_C_OFFSET(port, sb_id) +
4392 offsetof(struct cstorm_status_block_c,
4393 index_values[HC_INDEX_C_ISCSI_EQ_CONS]),
4395 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4396 CSTORM_ISCSI_EQ_CONS_OFFSET(cp->func, 0), 0);
4397 CNIC_WR16(dev, cp->kcq_io_addr, 0);
4398 cnic_free_resc(dev);
4401 static void cnic_stop_hw(struct cnic_dev *dev)
4403 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
4404 struct cnic_local *cp = dev->cnic_priv;
4407 /* Need to wait for the ring shutdown event to complete
4408 * before clearing the CNIC_UP flag.
4410 while (cp->uio_dev != -1 && i < 15) {
4414 clear_bit(CNIC_F_CNIC_UP, &dev->flags);
4415 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], NULL);
4417 cnic_cm_shutdown(dev);
4419 pci_dev_put(dev->pcidev);
4423 static void cnic_free_dev(struct cnic_dev *dev)
4427 while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
4431 if (atomic_read(&dev->ref_count) != 0)
4432 netdev_err(dev->netdev, "Failed waiting for ref count to go to zero\n");
4434 netdev_info(dev->netdev, "Removed CNIC device\n");
4435 dev_put(dev->netdev);
4439 static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
4440 struct pci_dev *pdev)
4442 struct cnic_dev *cdev;
4443 struct cnic_local *cp;
4446 alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
4448 cdev = kzalloc(alloc_size , GFP_KERNEL);
4450 netdev_err(dev, "allocate dev struct failure\n");
4455 cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
4456 cdev->register_device = cnic_register_device;
4457 cdev->unregister_device = cnic_unregister_device;
4458 cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
4460 cp = cdev->cnic_priv;
4463 cp->l2_single_buf_size = 0x400;
4464 cp->l2_rx_ring_size = 3;
4466 spin_lock_init(&cp->cnic_ulp_lock);
4468 netdev_info(dev, "Added CNIC device\n");
4473 static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
4475 struct pci_dev *pdev;
4476 struct cnic_dev *cdev;
4477 struct cnic_local *cp;
4478 struct cnic_eth_dev *ethdev = NULL;
4479 struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
4481 probe = symbol_get(bnx2_cnic_probe);
4483 ethdev = (*probe)(dev);
4484 symbol_put(bnx2_cnic_probe);
4489 pdev = ethdev->pdev;
4495 if (pdev->device == PCI_DEVICE_ID_NX2_5709 ||
4496 pdev->device == PCI_DEVICE_ID_NX2_5709S) {
4499 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
4507 cdev = cnic_alloc_dev(dev, pdev);
4511 set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
4512 cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
4514 cp = cdev->cnic_priv;
4515 cp->ethdev = ethdev;
4516 cdev->pcidev = pdev;
4518 cp->cnic_ops = &cnic_bnx2_ops;
4519 cp->start_hw = cnic_start_bnx2_hw;
4520 cp->stop_hw = cnic_stop_bnx2_hw;
4521 cp->setup_pgtbl = cnic_setup_page_tbl;
4522 cp->alloc_resc = cnic_alloc_bnx2_resc;
4523 cp->free_resc = cnic_free_resc;
4524 cp->start_cm = cnic_cm_init_bnx2_hw;
4525 cp->stop_cm = cnic_cm_stop_bnx2_hw;
4526 cp->enable_int = cnic_enable_bnx2_int;
4527 cp->disable_int_sync = cnic_disable_bnx2_int_sync;
4528 cp->close_conn = cnic_close_bnx2_conn;
4529 cp->next_idx = cnic_bnx2_next_idx;
4530 cp->hw_idx = cnic_bnx2_hw_idx;
4538 static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev)
4540 struct pci_dev *pdev;
4541 struct cnic_dev *cdev;
4542 struct cnic_local *cp;
4543 struct cnic_eth_dev *ethdev = NULL;
4544 struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
4546 probe = symbol_get(bnx2x_cnic_probe);
4548 ethdev = (*probe)(dev);
4549 symbol_put(bnx2x_cnic_probe);
4554 pdev = ethdev->pdev;
4559 cdev = cnic_alloc_dev(dev, pdev);
4565 set_bit(CNIC_F_BNX2X_CLASS, &cdev->flags);
4566 cdev->submit_kwqes = cnic_submit_bnx2x_kwqes;
4568 cp = cdev->cnic_priv;
4569 cp->ethdev = ethdev;
4570 cdev->pcidev = pdev;
4572 cp->cnic_ops = &cnic_bnx2x_ops;
4573 cp->start_hw = cnic_start_bnx2x_hw;
4574 cp->stop_hw = cnic_stop_bnx2x_hw;
4575 cp->setup_pgtbl = cnic_setup_page_tbl_le;
4576 cp->alloc_resc = cnic_alloc_bnx2x_resc;
4577 cp->free_resc = cnic_free_resc;
4578 cp->start_cm = cnic_cm_init_bnx2x_hw;
4579 cp->stop_cm = cnic_cm_stop_bnx2x_hw;
4580 cp->enable_int = cnic_enable_bnx2x_int;
4581 cp->disable_int_sync = cnic_disable_bnx2x_int_sync;
4582 cp->ack_int = cnic_ack_bnx2x_msix;
4583 cp->close_conn = cnic_close_bnx2x_conn;
4584 cp->next_idx = cnic_bnx2x_next_idx;
4585 cp->hw_idx = cnic_bnx2x_hw_idx;
4589 static struct cnic_dev *is_cnic_dev(struct net_device *dev)
4591 struct ethtool_drvinfo drvinfo;
4592 struct cnic_dev *cdev = NULL;
4594 if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
4595 memset(&drvinfo, 0, sizeof(drvinfo));
4596 dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
4598 if (!strcmp(drvinfo.driver, "bnx2"))
4599 cdev = init_bnx2_cnic(dev);
4600 if (!strcmp(drvinfo.driver, "bnx2x"))
4601 cdev = init_bnx2x_cnic(dev);
4603 write_lock(&cnic_dev_lock);
4604 list_add(&cdev->list, &cnic_dev_list);
4605 write_unlock(&cnic_dev_lock);
4612 * netdev event handler
4614 static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
4617 struct net_device *netdev = ptr;
4618 struct cnic_dev *dev;
4622 dev = cnic_from_netdev(netdev);
4624 if (!dev && (event == NETDEV_REGISTER || event == NETDEV_UP)) {
4625 /* Check for the hot-plug device */
4626 dev = is_cnic_dev(netdev);
4633 struct cnic_local *cp = dev->cnic_priv;
4637 else if (event == NETDEV_UNREGISTER)
4640 if (event == NETDEV_UP) {
4641 if (cnic_register_netdev(dev) != 0) {
4645 if (!cnic_start_hw(dev))
4646 cnic_ulp_start(dev);
4650 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
4651 struct cnic_ulp_ops *ulp_ops;
4654 ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
4655 if (!ulp_ops || !ulp_ops->indicate_netevent)
4658 ctx = cp->ulp_handle[if_type];
4660 ulp_ops->indicate_netevent(ctx, event);
4664 if (event == NETDEV_GOING_DOWN) {
4667 cnic_unregister_netdev(dev);
4668 } else if (event == NETDEV_UNREGISTER) {
4669 write_lock(&cnic_dev_lock);
4670 list_del_init(&dev->list);
4671 write_unlock(&cnic_dev_lock);
4683 static struct notifier_block cnic_netdev_notifier = {
4684 .notifier_call = cnic_netdev_event
4687 static void cnic_release(void)
4689 struct cnic_dev *dev;
4691 while (!list_empty(&cnic_dev_list)) {
4692 dev = list_entry(cnic_dev_list.next, struct cnic_dev, list);
4693 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
4699 cnic_unregister_netdev(dev);
4700 list_del_init(&dev->list);
4705 static int __init cnic_init(void)
4709 pr_info("%s", version);
4711 rc = register_netdevice_notifier(&cnic_netdev_notifier);
4720 static void __exit cnic_exit(void)
4722 unregister_netdevice_notifier(&cnic_netdev_notifier);
4726 module_init(cnic_init);
4727 module_exit(cnic_exit);