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cnic: Check device state before reading the kcq pointer in IRQ
[karo-tx-linux.git] / drivers / net / cnic.c
1 /* cnic.c: Broadcom CNIC core network driver.
2  *
3  * Copyright (c) 2006-2010 Broadcom Corporation
4  *
5  * This program is free software; you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation.
8  *
9  * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
10  * Modified and maintained by: Michael Chan <mchan@broadcom.com>
11  */
12
13 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14
15 #include <linux/module.h>
16
17 #include <linux/kernel.h>
18 #include <linux/errno.h>
19 #include <linux/list.h>
20 #include <linux/slab.h>
21 #include <linux/pci.h>
22 #include <linux/init.h>
23 #include <linux/netdevice.h>
24 #include <linux/uio_driver.h>
25 #include <linux/in.h>
26 #include <linux/dma-mapping.h>
27 #include <linux/delay.h>
28 #include <linux/ethtool.h>
29 #include <linux/if_vlan.h>
30 #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
31 #define BCM_VLAN 1
32 #endif
33 #include <net/ip.h>
34 #include <net/tcp.h>
35 #include <net/route.h>
36 #include <net/ipv6.h>
37 #include <net/ip6_route.h>
38 #include <net/ip6_checksum.h>
39 #include <scsi/iscsi_if.h>
40
41 #include "cnic_if.h"
42 #include "bnx2.h"
43 #include "bnx2x/bnx2x_reg.h"
44 #include "bnx2x/bnx2x_fw_defs.h"
45 #include "bnx2x/bnx2x_hsi.h"
46 #include "../scsi/bnx2i/57xx_iscsi_constants.h"
47 #include "../scsi/bnx2i/57xx_iscsi_hsi.h"
48 #include "cnic.h"
49 #include "cnic_defs.h"
50
51 #define DRV_MODULE_NAME         "cnic"
52
53 static char version[] __devinitdata =
54         "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
55
56 MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
57               "Chen (zongxi@broadcom.com");
58 MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
59 MODULE_LICENSE("GPL");
60 MODULE_VERSION(CNIC_MODULE_VERSION);
61
62 /* cnic_dev_list modifications are protected by both rtnl and cnic_dev_lock */
63 static LIST_HEAD(cnic_dev_list);
64 static LIST_HEAD(cnic_udev_list);
65 static DEFINE_RWLOCK(cnic_dev_lock);
66 static DEFINE_MUTEX(cnic_lock);
67
68 static struct cnic_ulp_ops *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
69
70 static int cnic_service_bnx2(void *, void *);
71 static int cnic_service_bnx2x(void *, void *);
72 static int cnic_ctl(void *, struct cnic_ctl_info *);
73
74 static struct cnic_ops cnic_bnx2_ops = {
75         .cnic_owner     = THIS_MODULE,
76         .cnic_handler   = cnic_service_bnx2,
77         .cnic_ctl       = cnic_ctl,
78 };
79
80 static struct cnic_ops cnic_bnx2x_ops = {
81         .cnic_owner     = THIS_MODULE,
82         .cnic_handler   = cnic_service_bnx2x,
83         .cnic_ctl       = cnic_ctl,
84 };
85
86 static struct workqueue_struct *cnic_wq;
87
88 static void cnic_shutdown_rings(struct cnic_dev *);
89 static void cnic_init_rings(struct cnic_dev *);
90 static int cnic_cm_set_pg(struct cnic_sock *);
91
92 static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
93 {
94         struct cnic_uio_dev *udev = uinfo->priv;
95         struct cnic_dev *dev;
96
97         if (!capable(CAP_NET_ADMIN))
98                 return -EPERM;
99
100         if (udev->uio_dev != -1)
101                 return -EBUSY;
102
103         rtnl_lock();
104         dev = udev->dev;
105
106         if (!dev || !test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
107                 rtnl_unlock();
108                 return -ENODEV;
109         }
110
111         udev->uio_dev = iminor(inode);
112
113         cnic_shutdown_rings(dev);
114         cnic_init_rings(dev);
115         rtnl_unlock();
116
117         return 0;
118 }
119
120 static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
121 {
122         struct cnic_uio_dev *udev = uinfo->priv;
123
124         udev->uio_dev = -1;
125         return 0;
126 }
127
128 static inline void cnic_hold(struct cnic_dev *dev)
129 {
130         atomic_inc(&dev->ref_count);
131 }
132
133 static inline void cnic_put(struct cnic_dev *dev)
134 {
135         atomic_dec(&dev->ref_count);
136 }
137
138 static inline void csk_hold(struct cnic_sock *csk)
139 {
140         atomic_inc(&csk->ref_count);
141 }
142
143 static inline void csk_put(struct cnic_sock *csk)
144 {
145         atomic_dec(&csk->ref_count);
146 }
147
148 static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
149 {
150         struct cnic_dev *cdev;
151
152         read_lock(&cnic_dev_lock);
153         list_for_each_entry(cdev, &cnic_dev_list, list) {
154                 if (netdev == cdev->netdev) {
155                         cnic_hold(cdev);
156                         read_unlock(&cnic_dev_lock);
157                         return cdev;
158                 }
159         }
160         read_unlock(&cnic_dev_lock);
161         return NULL;
162 }
163
164 static inline void ulp_get(struct cnic_ulp_ops *ulp_ops)
165 {
166         atomic_inc(&ulp_ops->ref_count);
167 }
168
169 static inline void ulp_put(struct cnic_ulp_ops *ulp_ops)
170 {
171         atomic_dec(&ulp_ops->ref_count);
172 }
173
174 static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
175 {
176         struct cnic_local *cp = dev->cnic_priv;
177         struct cnic_eth_dev *ethdev = cp->ethdev;
178         struct drv_ctl_info info;
179         struct drv_ctl_io *io = &info.data.io;
180
181         info.cmd = DRV_CTL_CTX_WR_CMD;
182         io->cid_addr = cid_addr;
183         io->offset = off;
184         io->data = val;
185         ethdev->drv_ctl(dev->netdev, &info);
186 }
187
188 static void cnic_ctx_tbl_wr(struct cnic_dev *dev, u32 off, dma_addr_t addr)
189 {
190         struct cnic_local *cp = dev->cnic_priv;
191         struct cnic_eth_dev *ethdev = cp->ethdev;
192         struct drv_ctl_info info;
193         struct drv_ctl_io *io = &info.data.io;
194
195         info.cmd = DRV_CTL_CTXTBL_WR_CMD;
196         io->offset = off;
197         io->dma_addr = addr;
198         ethdev->drv_ctl(dev->netdev, &info);
199 }
200
201 static void cnic_ring_ctl(struct cnic_dev *dev, u32 cid, u32 cl_id, int start)
202 {
203         struct cnic_local *cp = dev->cnic_priv;
204         struct cnic_eth_dev *ethdev = cp->ethdev;
205         struct drv_ctl_info info;
206         struct drv_ctl_l2_ring *ring = &info.data.ring;
207
208         if (start)
209                 info.cmd = DRV_CTL_START_L2_CMD;
210         else
211                 info.cmd = DRV_CTL_STOP_L2_CMD;
212
213         ring->cid = cid;
214         ring->client_id = cl_id;
215         ethdev->drv_ctl(dev->netdev, &info);
216 }
217
218 static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
219 {
220         struct cnic_local *cp = dev->cnic_priv;
221         struct cnic_eth_dev *ethdev = cp->ethdev;
222         struct drv_ctl_info info;
223         struct drv_ctl_io *io = &info.data.io;
224
225         info.cmd = DRV_CTL_IO_WR_CMD;
226         io->offset = off;
227         io->data = val;
228         ethdev->drv_ctl(dev->netdev, &info);
229 }
230
231 static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
232 {
233         struct cnic_local *cp = dev->cnic_priv;
234         struct cnic_eth_dev *ethdev = cp->ethdev;
235         struct drv_ctl_info info;
236         struct drv_ctl_io *io = &info.data.io;
237
238         info.cmd = DRV_CTL_IO_RD_CMD;
239         io->offset = off;
240         ethdev->drv_ctl(dev->netdev, &info);
241         return io->data;
242 }
243
244 static int cnic_in_use(struct cnic_sock *csk)
245 {
246         return test_bit(SK_F_INUSE, &csk->flags);
247 }
248
249 static void cnic_spq_completion(struct cnic_dev *dev, int cmd, u32 count)
250 {
251         struct cnic_local *cp = dev->cnic_priv;
252         struct cnic_eth_dev *ethdev = cp->ethdev;
253         struct drv_ctl_info info;
254
255         info.cmd = cmd;
256         info.data.credit.credit_count = count;
257         ethdev->drv_ctl(dev->netdev, &info);
258 }
259
260 static int cnic_get_l5_cid(struct cnic_local *cp, u32 cid, u32 *l5_cid)
261 {
262         u32 i;
263
264         for (i = 0; i < cp->max_cid_space; i++) {
265                 if (cp->ctx_tbl[i].cid == cid) {
266                         *l5_cid = i;
267                         return 0;
268                 }
269         }
270         return -EINVAL;
271 }
272
273 static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
274                            struct cnic_sock *csk)
275 {
276         struct iscsi_path path_req;
277         char *buf = NULL;
278         u16 len = 0;
279         u32 msg_type = ISCSI_KEVENT_IF_DOWN;
280         struct cnic_ulp_ops *ulp_ops;
281         struct cnic_uio_dev *udev = cp->udev;
282         int rc = 0, retry = 0;
283
284         if (!udev || udev->uio_dev == -1)
285                 return -ENODEV;
286
287         if (csk) {
288                 len = sizeof(path_req);
289                 buf = (char *) &path_req;
290                 memset(&path_req, 0, len);
291
292                 msg_type = ISCSI_KEVENT_PATH_REQ;
293                 path_req.handle = (u64) csk->l5_cid;
294                 if (test_bit(SK_F_IPV6, &csk->flags)) {
295                         memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
296                                sizeof(struct in6_addr));
297                         path_req.ip_addr_len = 16;
298                 } else {
299                         memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
300                                sizeof(struct in_addr));
301                         path_req.ip_addr_len = 4;
302                 }
303                 path_req.vlan_id = csk->vlan_id;
304                 path_req.pmtu = csk->mtu;
305         }
306
307         while (retry < 3) {
308                 rc = 0;
309                 rcu_read_lock();
310                 ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]);
311                 if (ulp_ops)
312                         rc = ulp_ops->iscsi_nl_send_msg(
313                                 cp->ulp_handle[CNIC_ULP_ISCSI],
314                                 msg_type, buf, len);
315                 rcu_read_unlock();
316                 if (rc == 0 || msg_type != ISCSI_KEVENT_PATH_REQ)
317                         break;
318
319                 msleep(100);
320                 retry++;
321         }
322         return 0;
323 }
324
325 static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
326                                   char *buf, u16 len)
327 {
328         int rc = -EINVAL;
329
330         switch (msg_type) {
331         case ISCSI_UEVENT_PATH_UPDATE: {
332                 struct cnic_local *cp;
333                 u32 l5_cid;
334                 struct cnic_sock *csk;
335                 struct iscsi_path *path_resp;
336
337                 if (len < sizeof(*path_resp))
338                         break;
339
340                 path_resp = (struct iscsi_path *) buf;
341                 cp = dev->cnic_priv;
342                 l5_cid = (u32) path_resp->handle;
343                 if (l5_cid >= MAX_CM_SK_TBL_SZ)
344                         break;
345
346                 rcu_read_lock();
347                 if (!rcu_dereference(cp->ulp_ops[CNIC_ULP_L4])) {
348                         rc = -ENODEV;
349                         rcu_read_unlock();
350                         break;
351                 }
352                 csk = &cp->csk_tbl[l5_cid];
353                 csk_hold(csk);
354                 if (cnic_in_use(csk)) {
355                         memcpy(csk->ha, path_resp->mac_addr, 6);
356                         if (test_bit(SK_F_IPV6, &csk->flags))
357                                 memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
358                                        sizeof(struct in6_addr));
359                         else
360                                 memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
361                                        sizeof(struct in_addr));
362                         if (is_valid_ether_addr(csk->ha))
363                                 cnic_cm_set_pg(csk);
364                 }
365                 csk_put(csk);
366                 rcu_read_unlock();
367                 rc = 0;
368         }
369         }
370
371         return rc;
372 }
373
374 static int cnic_offld_prep(struct cnic_sock *csk)
375 {
376         if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
377                 return 0;
378
379         if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
380                 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
381                 return 0;
382         }
383
384         return 1;
385 }
386
387 static int cnic_close_prep(struct cnic_sock *csk)
388 {
389         clear_bit(SK_F_CONNECT_START, &csk->flags);
390         smp_mb__after_clear_bit();
391
392         if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
393                 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
394                         msleep(1);
395
396                 return 1;
397         }
398         return 0;
399 }
400
401 static int cnic_abort_prep(struct cnic_sock *csk)
402 {
403         clear_bit(SK_F_CONNECT_START, &csk->flags);
404         smp_mb__after_clear_bit();
405
406         while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
407                 msleep(1);
408
409         if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
410                 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
411                 return 1;
412         }
413
414         return 0;
415 }
416
417 static void cnic_uio_stop(void)
418 {
419         struct cnic_dev *dev;
420
421         read_lock(&cnic_dev_lock);
422         list_for_each_entry(dev, &cnic_dev_list, list) {
423                 struct cnic_local *cp = dev->cnic_priv;
424
425                 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
426         }
427         read_unlock(&cnic_dev_lock);
428 }
429
430 int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
431 {
432         struct cnic_dev *dev;
433
434         if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
435                 pr_err("%s: Bad type %d\n", __func__, ulp_type);
436                 return -EINVAL;
437         }
438         mutex_lock(&cnic_lock);
439         if (cnic_ulp_tbl[ulp_type]) {
440                 pr_err("%s: Type %d has already been registered\n",
441                        __func__, ulp_type);
442                 mutex_unlock(&cnic_lock);
443                 return -EBUSY;
444         }
445
446         read_lock(&cnic_dev_lock);
447         list_for_each_entry(dev, &cnic_dev_list, list) {
448                 struct cnic_local *cp = dev->cnic_priv;
449
450                 clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
451         }
452         read_unlock(&cnic_dev_lock);
453
454         atomic_set(&ulp_ops->ref_count, 0);
455         rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
456         mutex_unlock(&cnic_lock);
457
458         /* Prevent race conditions with netdev_event */
459         rtnl_lock();
460         list_for_each_entry(dev, &cnic_dev_list, list) {
461                 struct cnic_local *cp = dev->cnic_priv;
462
463                 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
464                         ulp_ops->cnic_init(dev);
465         }
466         rtnl_unlock();
467
468         return 0;
469 }
470
471 int cnic_unregister_driver(int ulp_type)
472 {
473         struct cnic_dev *dev;
474         struct cnic_ulp_ops *ulp_ops;
475         int i = 0;
476
477         if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
478                 pr_err("%s: Bad type %d\n", __func__, ulp_type);
479                 return -EINVAL;
480         }
481         mutex_lock(&cnic_lock);
482         ulp_ops = cnic_ulp_tbl[ulp_type];
483         if (!ulp_ops) {
484                 pr_err("%s: Type %d has not been registered\n",
485                        __func__, ulp_type);
486                 goto out_unlock;
487         }
488         read_lock(&cnic_dev_lock);
489         list_for_each_entry(dev, &cnic_dev_list, list) {
490                 struct cnic_local *cp = dev->cnic_priv;
491
492                 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
493                         pr_err("%s: Type %d still has devices registered\n",
494                                __func__, ulp_type);
495                         read_unlock(&cnic_dev_lock);
496                         goto out_unlock;
497                 }
498         }
499         read_unlock(&cnic_dev_lock);
500
501         if (ulp_type == CNIC_ULP_ISCSI)
502                 cnic_uio_stop();
503
504         rcu_assign_pointer(cnic_ulp_tbl[ulp_type], NULL);
505
506         mutex_unlock(&cnic_lock);
507         synchronize_rcu();
508         while ((atomic_read(&ulp_ops->ref_count) != 0) && (i < 20)) {
509                 msleep(100);
510                 i++;
511         }
512
513         if (atomic_read(&ulp_ops->ref_count) != 0)
514                 netdev_warn(dev->netdev, "Failed waiting for ref count to go to zero\n");
515         return 0;
516
517 out_unlock:
518         mutex_unlock(&cnic_lock);
519         return -EINVAL;
520 }
521
522 static int cnic_start_hw(struct cnic_dev *);
523 static void cnic_stop_hw(struct cnic_dev *);
524
525 static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
526                                 void *ulp_ctx)
527 {
528         struct cnic_local *cp = dev->cnic_priv;
529         struct cnic_ulp_ops *ulp_ops;
530
531         if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
532                 pr_err("%s: Bad type %d\n", __func__, ulp_type);
533                 return -EINVAL;
534         }
535         mutex_lock(&cnic_lock);
536         if (cnic_ulp_tbl[ulp_type] == NULL) {
537                 pr_err("%s: Driver with type %d has not been registered\n",
538                        __func__, ulp_type);
539                 mutex_unlock(&cnic_lock);
540                 return -EAGAIN;
541         }
542         if (rcu_dereference(cp->ulp_ops[ulp_type])) {
543                 pr_err("%s: Type %d has already been registered to this device\n",
544                        __func__, ulp_type);
545                 mutex_unlock(&cnic_lock);
546                 return -EBUSY;
547         }
548
549         clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
550         cp->ulp_handle[ulp_type] = ulp_ctx;
551         ulp_ops = cnic_ulp_tbl[ulp_type];
552         rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
553         cnic_hold(dev);
554
555         if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
556                 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
557                         ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
558
559         mutex_unlock(&cnic_lock);
560
561         return 0;
562
563 }
564 EXPORT_SYMBOL(cnic_register_driver);
565
566 static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
567 {
568         struct cnic_local *cp = dev->cnic_priv;
569         int i = 0;
570
571         if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
572                 pr_err("%s: Bad type %d\n", __func__, ulp_type);
573                 return -EINVAL;
574         }
575         mutex_lock(&cnic_lock);
576         if (rcu_dereference(cp->ulp_ops[ulp_type])) {
577                 rcu_assign_pointer(cp->ulp_ops[ulp_type], NULL);
578                 cnic_put(dev);
579         } else {
580                 pr_err("%s: device not registered to this ulp type %d\n",
581                        __func__, ulp_type);
582                 mutex_unlock(&cnic_lock);
583                 return -EINVAL;
584         }
585         mutex_unlock(&cnic_lock);
586
587         synchronize_rcu();
588
589         while (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]) &&
590                i < 20) {
591                 msleep(100);
592                 i++;
593         }
594         if (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]))
595                 netdev_warn(dev->netdev, "Failed waiting for ULP up call to complete\n");
596
597         return 0;
598 }
599 EXPORT_SYMBOL(cnic_unregister_driver);
600
601 static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id)
602 {
603         id_tbl->start = start_id;
604         id_tbl->max = size;
605         id_tbl->next = 0;
606         spin_lock_init(&id_tbl->lock);
607         id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
608         if (!id_tbl->table)
609                 return -ENOMEM;
610
611         return 0;
612 }
613
614 static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
615 {
616         kfree(id_tbl->table);
617         id_tbl->table = NULL;
618 }
619
620 static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
621 {
622         int ret = -1;
623
624         id -= id_tbl->start;
625         if (id >= id_tbl->max)
626                 return ret;
627
628         spin_lock(&id_tbl->lock);
629         if (!test_bit(id, id_tbl->table)) {
630                 set_bit(id, id_tbl->table);
631                 ret = 0;
632         }
633         spin_unlock(&id_tbl->lock);
634         return ret;
635 }
636
637 /* Returns -1 if not successful */
638 static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
639 {
640         u32 id;
641
642         spin_lock(&id_tbl->lock);
643         id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
644         if (id >= id_tbl->max) {
645                 id = -1;
646                 if (id_tbl->next != 0) {
647                         id = find_first_zero_bit(id_tbl->table, id_tbl->next);
648                         if (id >= id_tbl->next)
649                                 id = -1;
650                 }
651         }
652
653         if (id < id_tbl->max) {
654                 set_bit(id, id_tbl->table);
655                 id_tbl->next = (id + 1) & (id_tbl->max - 1);
656                 id += id_tbl->start;
657         }
658
659         spin_unlock(&id_tbl->lock);
660
661         return id;
662 }
663
664 static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
665 {
666         if (id == -1)
667                 return;
668
669         id -= id_tbl->start;
670         if (id >= id_tbl->max)
671                 return;
672
673         clear_bit(id, id_tbl->table);
674 }
675
676 static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
677 {
678         int i;
679
680         if (!dma->pg_arr)
681                 return;
682
683         for (i = 0; i < dma->num_pages; i++) {
684                 if (dma->pg_arr[i]) {
685                         dma_free_coherent(&dev->pcidev->dev, BCM_PAGE_SIZE,
686                                           dma->pg_arr[i], dma->pg_map_arr[i]);
687                         dma->pg_arr[i] = NULL;
688                 }
689         }
690         if (dma->pgtbl) {
691                 dma_free_coherent(&dev->pcidev->dev, dma->pgtbl_size,
692                                   dma->pgtbl, dma->pgtbl_map);
693                 dma->pgtbl = NULL;
694         }
695         kfree(dma->pg_arr);
696         dma->pg_arr = NULL;
697         dma->num_pages = 0;
698 }
699
700 static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
701 {
702         int i;
703         u32 *page_table = dma->pgtbl;
704
705         for (i = 0; i < dma->num_pages; i++) {
706                 /* Each entry needs to be in big endian format. */
707                 *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
708                 page_table++;
709                 *page_table = (u32) dma->pg_map_arr[i];
710                 page_table++;
711         }
712 }
713
714 static void cnic_setup_page_tbl_le(struct cnic_dev *dev, struct cnic_dma *dma)
715 {
716         int i;
717         u32 *page_table = dma->pgtbl;
718
719         for (i = 0; i < dma->num_pages; i++) {
720                 /* Each entry needs to be in little endian format. */
721                 *page_table = dma->pg_map_arr[i] & 0xffffffff;
722                 page_table++;
723                 *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
724                 page_table++;
725         }
726 }
727
728 static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
729                           int pages, int use_pg_tbl)
730 {
731         int i, size;
732         struct cnic_local *cp = dev->cnic_priv;
733
734         size = pages * (sizeof(void *) + sizeof(dma_addr_t));
735         dma->pg_arr = kzalloc(size, GFP_ATOMIC);
736         if (dma->pg_arr == NULL)
737                 return -ENOMEM;
738
739         dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
740         dma->num_pages = pages;
741
742         for (i = 0; i < pages; i++) {
743                 dma->pg_arr[i] = dma_alloc_coherent(&dev->pcidev->dev,
744                                                     BCM_PAGE_SIZE,
745                                                     &dma->pg_map_arr[i],
746                                                     GFP_ATOMIC);
747                 if (dma->pg_arr[i] == NULL)
748                         goto error;
749         }
750         if (!use_pg_tbl)
751                 return 0;
752
753         dma->pgtbl_size = ((pages * 8) + BCM_PAGE_SIZE - 1) &
754                           ~(BCM_PAGE_SIZE - 1);
755         dma->pgtbl = dma_alloc_coherent(&dev->pcidev->dev, dma->pgtbl_size,
756                                         &dma->pgtbl_map, GFP_ATOMIC);
757         if (dma->pgtbl == NULL)
758                 goto error;
759
760         cp->setup_pgtbl(dev, dma);
761
762         return 0;
763
764 error:
765         cnic_free_dma(dev, dma);
766         return -ENOMEM;
767 }
768
769 static void cnic_free_context(struct cnic_dev *dev)
770 {
771         struct cnic_local *cp = dev->cnic_priv;
772         int i;
773
774         for (i = 0; i < cp->ctx_blks; i++) {
775                 if (cp->ctx_arr[i].ctx) {
776                         dma_free_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
777                                           cp->ctx_arr[i].ctx,
778                                           cp->ctx_arr[i].mapping);
779                         cp->ctx_arr[i].ctx = NULL;
780                 }
781         }
782 }
783
784 static void __cnic_free_uio(struct cnic_uio_dev *udev)
785 {
786         uio_unregister_device(&udev->cnic_uinfo);
787
788         if (udev->l2_buf) {
789                 dma_free_coherent(&udev->pdev->dev, udev->l2_buf_size,
790                                   udev->l2_buf, udev->l2_buf_map);
791                 udev->l2_buf = NULL;
792         }
793
794         if (udev->l2_ring) {
795                 dma_free_coherent(&udev->pdev->dev, udev->l2_ring_size,
796                                   udev->l2_ring, udev->l2_ring_map);
797                 udev->l2_ring = NULL;
798         }
799
800         pci_dev_put(udev->pdev);
801         kfree(udev);
802 }
803
804 static void cnic_free_uio(struct cnic_uio_dev *udev)
805 {
806         if (!udev)
807                 return;
808
809         write_lock(&cnic_dev_lock);
810         list_del_init(&udev->list);
811         write_unlock(&cnic_dev_lock);
812         __cnic_free_uio(udev);
813 }
814
815 static void cnic_free_resc(struct cnic_dev *dev)
816 {
817         struct cnic_local *cp = dev->cnic_priv;
818         struct cnic_uio_dev *udev = cp->udev;
819
820         if (udev) {
821                 udev->dev = NULL;
822                 cp->udev = NULL;
823         }
824
825         cnic_free_context(dev);
826         kfree(cp->ctx_arr);
827         cp->ctx_arr = NULL;
828         cp->ctx_blks = 0;
829
830         cnic_free_dma(dev, &cp->gbl_buf_info);
831         cnic_free_dma(dev, &cp->conn_buf_info);
832         cnic_free_dma(dev, &cp->kwq_info);
833         cnic_free_dma(dev, &cp->kwq_16_data_info);
834         cnic_free_dma(dev, &cp->kcq1.dma);
835         kfree(cp->iscsi_tbl);
836         cp->iscsi_tbl = NULL;
837         kfree(cp->ctx_tbl);
838         cp->ctx_tbl = NULL;
839
840         cnic_free_id_tbl(&cp->cid_tbl);
841 }
842
843 static int cnic_alloc_context(struct cnic_dev *dev)
844 {
845         struct cnic_local *cp = dev->cnic_priv;
846
847         if (CHIP_NUM(cp) == CHIP_NUM_5709) {
848                 int i, k, arr_size;
849
850                 cp->ctx_blk_size = BCM_PAGE_SIZE;
851                 cp->cids_per_blk = BCM_PAGE_SIZE / 128;
852                 arr_size = BNX2_MAX_CID / cp->cids_per_blk *
853                            sizeof(struct cnic_ctx);
854                 cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
855                 if (cp->ctx_arr == NULL)
856                         return -ENOMEM;
857
858                 k = 0;
859                 for (i = 0; i < 2; i++) {
860                         u32 j, reg, off, lo, hi;
861
862                         if (i == 0)
863                                 off = BNX2_PG_CTX_MAP;
864                         else
865                                 off = BNX2_ISCSI_CTX_MAP;
866
867                         reg = cnic_reg_rd_ind(dev, off);
868                         lo = reg >> 16;
869                         hi = reg & 0xffff;
870                         for (j = lo; j < hi; j += cp->cids_per_blk, k++)
871                                 cp->ctx_arr[k].cid = j;
872                 }
873
874                 cp->ctx_blks = k;
875                 if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
876                         cp->ctx_blks = 0;
877                         return -ENOMEM;
878                 }
879
880                 for (i = 0; i < cp->ctx_blks; i++) {
881                         cp->ctx_arr[i].ctx =
882                                 dma_alloc_coherent(&dev->pcidev->dev,
883                                                    BCM_PAGE_SIZE,
884                                                    &cp->ctx_arr[i].mapping,
885                                                    GFP_KERNEL);
886                         if (cp->ctx_arr[i].ctx == NULL)
887                                 return -ENOMEM;
888                 }
889         }
890         return 0;
891 }
892
893 static int cnic_alloc_kcq(struct cnic_dev *dev, struct kcq_info *info)
894 {
895         int err, i, is_bnx2 = 0;
896         struct kcqe **kcq;
897
898         if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags))
899                 is_bnx2 = 1;
900
901         err = cnic_alloc_dma(dev, &info->dma, KCQ_PAGE_CNT, is_bnx2);
902         if (err)
903                 return err;
904
905         kcq = (struct kcqe **) info->dma.pg_arr;
906         info->kcq = kcq;
907
908         if (is_bnx2)
909                 return 0;
910
911         for (i = 0; i < KCQ_PAGE_CNT; i++) {
912                 struct bnx2x_bd_chain_next *next =
913                         (struct bnx2x_bd_chain_next *) &kcq[i][MAX_KCQE_CNT];
914                 int j = i + 1;
915
916                 if (j >= KCQ_PAGE_CNT)
917                         j = 0;
918                 next->addr_hi = (u64) info->dma.pg_map_arr[j] >> 32;
919                 next->addr_lo = info->dma.pg_map_arr[j] & 0xffffffff;
920         }
921         return 0;
922 }
923
924 static int cnic_alloc_uio_rings(struct cnic_dev *dev, int pages)
925 {
926         struct cnic_local *cp = dev->cnic_priv;
927         struct cnic_uio_dev *udev;
928
929         read_lock(&cnic_dev_lock);
930         list_for_each_entry(udev, &cnic_udev_list, list) {
931                 if (udev->pdev == dev->pcidev) {
932                         udev->dev = dev;
933                         cp->udev = udev;
934                         read_unlock(&cnic_dev_lock);
935                         return 0;
936                 }
937         }
938         read_unlock(&cnic_dev_lock);
939
940         udev = kzalloc(sizeof(struct cnic_uio_dev), GFP_ATOMIC);
941         if (!udev)
942                 return -ENOMEM;
943
944         udev->uio_dev = -1;
945
946         udev->dev = dev;
947         udev->pdev = dev->pcidev;
948         udev->l2_ring_size = pages * BCM_PAGE_SIZE;
949         udev->l2_ring = dma_alloc_coherent(&udev->pdev->dev, udev->l2_ring_size,
950                                            &udev->l2_ring_map,
951                                            GFP_KERNEL | __GFP_COMP);
952         if (!udev->l2_ring)
953                 return -ENOMEM;
954
955         udev->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
956         udev->l2_buf_size = PAGE_ALIGN(udev->l2_buf_size);
957         udev->l2_buf = dma_alloc_coherent(&udev->pdev->dev, udev->l2_buf_size,
958                                           &udev->l2_buf_map,
959                                           GFP_KERNEL | __GFP_COMP);
960         if (!udev->l2_buf)
961                 return -ENOMEM;
962
963         write_lock(&cnic_dev_lock);
964         list_add(&udev->list, &cnic_udev_list);
965         write_unlock(&cnic_dev_lock);
966
967         pci_dev_get(udev->pdev);
968
969         cp->udev = udev;
970
971         return 0;
972 }
973
974 static int cnic_init_uio(struct cnic_dev *dev)
975 {
976         struct cnic_local *cp = dev->cnic_priv;
977         struct cnic_uio_dev *udev = cp->udev;
978         struct uio_info *uinfo;
979         int ret = 0;
980
981         if (!udev)
982                 return -ENOMEM;
983
984         uinfo = &udev->cnic_uinfo;
985
986         uinfo->mem[0].addr = dev->netdev->base_addr;
987         uinfo->mem[0].internal_addr = dev->regview;
988         uinfo->mem[0].size = dev->netdev->mem_end - dev->netdev->mem_start;
989         uinfo->mem[0].memtype = UIO_MEM_PHYS;
990
991         if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
992                 uinfo->mem[1].addr = (unsigned long) cp->status_blk.gen &
993                                         PAGE_MASK;
994                 if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
995                         uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
996                 else
997                         uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
998
999                 uinfo->name = "bnx2_cnic";
1000         } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
1001                 uinfo->mem[1].addr = (unsigned long) cp->bnx2x_def_status_blk &
1002                         PAGE_MASK;
1003                 uinfo->mem[1].size = sizeof(*cp->bnx2x_def_status_blk);
1004
1005                 uinfo->name = "bnx2x_cnic";
1006         }
1007
1008         uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
1009
1010         uinfo->mem[2].addr = (unsigned long) udev->l2_ring;
1011         uinfo->mem[2].size = udev->l2_ring_size;
1012         uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
1013
1014         uinfo->mem[3].addr = (unsigned long) udev->l2_buf;
1015         uinfo->mem[3].size = udev->l2_buf_size;
1016         uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
1017
1018         uinfo->version = CNIC_MODULE_VERSION;
1019         uinfo->irq = UIO_IRQ_CUSTOM;
1020
1021         uinfo->open = cnic_uio_open;
1022         uinfo->release = cnic_uio_close;
1023
1024         if (udev->uio_dev == -1) {
1025                 if (!uinfo->priv) {
1026                         uinfo->priv = udev;
1027
1028                         ret = uio_register_device(&udev->pdev->dev, uinfo);
1029                 }
1030         } else {
1031                 cnic_init_rings(dev);
1032         }
1033
1034         return ret;
1035 }
1036
1037 static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
1038 {
1039         struct cnic_local *cp = dev->cnic_priv;
1040         int ret;
1041
1042         ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
1043         if (ret)
1044                 goto error;
1045         cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
1046
1047         ret = cnic_alloc_kcq(dev, &cp->kcq1);
1048         if (ret)
1049                 goto error;
1050
1051         ret = cnic_alloc_context(dev);
1052         if (ret)
1053                 goto error;
1054
1055         ret = cnic_alloc_uio_rings(dev, 2);
1056         if (ret)
1057                 goto error;
1058
1059         ret = cnic_init_uio(dev);
1060         if (ret)
1061                 goto error;
1062
1063         return 0;
1064
1065 error:
1066         cnic_free_resc(dev);
1067         return ret;
1068 }
1069
1070 static int cnic_alloc_bnx2x_context(struct cnic_dev *dev)
1071 {
1072         struct cnic_local *cp = dev->cnic_priv;
1073         int ctx_blk_size = cp->ethdev->ctx_blk_size;
1074         int total_mem, blks, i;
1075
1076         total_mem = BNX2X_CONTEXT_MEM_SIZE * cp->max_cid_space;
1077         blks = total_mem / ctx_blk_size;
1078         if (total_mem % ctx_blk_size)
1079                 blks++;
1080
1081         if (blks > cp->ethdev->ctx_tbl_len)
1082                 return -ENOMEM;
1083
1084         cp->ctx_arr = kcalloc(blks, sizeof(struct cnic_ctx), GFP_KERNEL);
1085         if (cp->ctx_arr == NULL)
1086                 return -ENOMEM;
1087
1088         cp->ctx_blks = blks;
1089         cp->ctx_blk_size = ctx_blk_size;
1090         if (!BNX2X_CHIP_IS_57710(cp->chip_id))
1091                 cp->ctx_align = 0;
1092         else
1093                 cp->ctx_align = ctx_blk_size;
1094
1095         cp->cids_per_blk = ctx_blk_size / BNX2X_CONTEXT_MEM_SIZE;
1096
1097         for (i = 0; i < blks; i++) {
1098                 cp->ctx_arr[i].ctx =
1099                         dma_alloc_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
1100                                            &cp->ctx_arr[i].mapping,
1101                                            GFP_KERNEL);
1102                 if (cp->ctx_arr[i].ctx == NULL)
1103                         return -ENOMEM;
1104
1105                 if (cp->ctx_align && cp->ctx_blk_size == ctx_blk_size) {
1106                         if (cp->ctx_arr[i].mapping & (cp->ctx_align - 1)) {
1107                                 cnic_free_context(dev);
1108                                 cp->ctx_blk_size += cp->ctx_align;
1109                                 i = -1;
1110                                 continue;
1111                         }
1112                 }
1113         }
1114         return 0;
1115 }
1116
1117 static int cnic_alloc_bnx2x_resc(struct cnic_dev *dev)
1118 {
1119         struct cnic_local *cp = dev->cnic_priv;
1120         struct cnic_eth_dev *ethdev = cp->ethdev;
1121         u32 start_cid = ethdev->starting_cid;
1122         int i, j, n, ret, pages;
1123         struct cnic_dma *kwq_16_dma = &cp->kwq_16_data_info;
1124
1125         cp->iro_arr = ethdev->iro_arr;
1126
1127         cp->max_cid_space = MAX_ISCSI_TBL_SZ;
1128         cp->iscsi_start_cid = start_cid;
1129         if (start_cid < BNX2X_ISCSI_START_CID) {
1130                 u32 delta = BNX2X_ISCSI_START_CID - start_cid;
1131
1132                 cp->iscsi_start_cid = BNX2X_ISCSI_START_CID;
1133                 cp->max_cid_space += delta;
1134         }
1135
1136         cp->iscsi_tbl = kzalloc(sizeof(struct cnic_iscsi) * MAX_ISCSI_TBL_SZ,
1137                                 GFP_KERNEL);
1138         if (!cp->iscsi_tbl)
1139                 goto error;
1140
1141         cp->ctx_tbl = kzalloc(sizeof(struct cnic_context) *
1142                                 cp->max_cid_space, GFP_KERNEL);
1143         if (!cp->ctx_tbl)
1144                 goto error;
1145
1146         for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) {
1147                 cp->ctx_tbl[i].proto.iscsi = &cp->iscsi_tbl[i];
1148                 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_ISCSI;
1149         }
1150
1151         pages = PAGE_ALIGN(cp->max_cid_space * CNIC_KWQ16_DATA_SIZE) /
1152                 PAGE_SIZE;
1153
1154         ret = cnic_alloc_dma(dev, kwq_16_dma, pages, 0);
1155         if (ret)
1156                 return -ENOMEM;
1157
1158         n = PAGE_SIZE / CNIC_KWQ16_DATA_SIZE;
1159         for (i = 0, j = 0; i < cp->max_cid_space; i++) {
1160                 long off = CNIC_KWQ16_DATA_SIZE * (i % n);
1161
1162                 cp->ctx_tbl[i].kwqe_data = kwq_16_dma->pg_arr[j] + off;
1163                 cp->ctx_tbl[i].kwqe_data_mapping = kwq_16_dma->pg_map_arr[j] +
1164                                                    off;
1165
1166                 if ((i % n) == (n - 1))
1167                         j++;
1168         }
1169
1170         ret = cnic_alloc_kcq(dev, &cp->kcq1);
1171         if (ret)
1172                 goto error;
1173
1174         pages = PAGE_ALIGN(BNX2X_ISCSI_NUM_CONNECTIONS *
1175                            BNX2X_ISCSI_CONN_BUF_SIZE) / PAGE_SIZE;
1176         ret = cnic_alloc_dma(dev, &cp->conn_buf_info, pages, 1);
1177         if (ret)
1178                 goto error;
1179
1180         pages = PAGE_ALIGN(BNX2X_ISCSI_GLB_BUF_SIZE) / PAGE_SIZE;
1181         ret = cnic_alloc_dma(dev, &cp->gbl_buf_info, pages, 0);
1182         if (ret)
1183                 goto error;
1184
1185         ret = cnic_alloc_bnx2x_context(dev);
1186         if (ret)
1187                 goto error;
1188
1189         cp->bnx2x_def_status_blk = cp->ethdev->irq_arr[1].status_blk;
1190
1191         cp->l2_rx_ring_size = 15;
1192
1193         ret = cnic_alloc_uio_rings(dev, 4);
1194         if (ret)
1195                 goto error;
1196
1197         ret = cnic_init_uio(dev);
1198         if (ret)
1199                 goto error;
1200
1201         return 0;
1202
1203 error:
1204         cnic_free_resc(dev);
1205         return -ENOMEM;
1206 }
1207
1208 static inline u32 cnic_kwq_avail(struct cnic_local *cp)
1209 {
1210         return cp->max_kwq_idx -
1211                 ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
1212 }
1213
1214 static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1215                                   u32 num_wqes)
1216 {
1217         struct cnic_local *cp = dev->cnic_priv;
1218         struct kwqe *prod_qe;
1219         u16 prod, sw_prod, i;
1220
1221         if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
1222                 return -EAGAIN;         /* bnx2 is down */
1223
1224         spin_lock_bh(&cp->cnic_ulp_lock);
1225         if (num_wqes > cnic_kwq_avail(cp) &&
1226             !test_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags)) {
1227                 spin_unlock_bh(&cp->cnic_ulp_lock);
1228                 return -EAGAIN;
1229         }
1230
1231         clear_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
1232
1233         prod = cp->kwq_prod_idx;
1234         sw_prod = prod & MAX_KWQ_IDX;
1235         for (i = 0; i < num_wqes; i++) {
1236                 prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
1237                 memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
1238                 prod++;
1239                 sw_prod = prod & MAX_KWQ_IDX;
1240         }
1241         cp->kwq_prod_idx = prod;
1242
1243         CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
1244
1245         spin_unlock_bh(&cp->cnic_ulp_lock);
1246         return 0;
1247 }
1248
1249 static void *cnic_get_kwqe_16_data(struct cnic_local *cp, u32 l5_cid,
1250                                    union l5cm_specific_data *l5_data)
1251 {
1252         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1253         dma_addr_t map;
1254
1255         map = ctx->kwqe_data_mapping;
1256         l5_data->phy_address.lo = (u64) map & 0xffffffff;
1257         l5_data->phy_address.hi = (u64) map >> 32;
1258         return ctx->kwqe_data;
1259 }
1260
1261 static int cnic_submit_kwqe_16(struct cnic_dev *dev, u32 cmd, u32 cid,
1262                                 u32 type, union l5cm_specific_data *l5_data)
1263 {
1264         struct cnic_local *cp = dev->cnic_priv;
1265         struct l5cm_spe kwqe;
1266         struct kwqe_16 *kwq[1];
1267         int ret;
1268
1269         kwqe.hdr.conn_and_cmd_data =
1270                 cpu_to_le32(((cmd << SPE_HDR_CMD_ID_SHIFT) |
1271                              BNX2X_HW_CID(cp, cid)));
1272         kwqe.hdr.type = cpu_to_le16(type);
1273         kwqe.hdr.reserved1 = 0;
1274         kwqe.data.phy_address.lo = cpu_to_le32(l5_data->phy_address.lo);
1275         kwqe.data.phy_address.hi = cpu_to_le32(l5_data->phy_address.hi);
1276
1277         kwq[0] = (struct kwqe_16 *) &kwqe;
1278
1279         spin_lock_bh(&cp->cnic_ulp_lock);
1280         ret = cp->ethdev->drv_submit_kwqes_16(dev->netdev, kwq, 1);
1281         spin_unlock_bh(&cp->cnic_ulp_lock);
1282
1283         if (ret == 1)
1284                 return 0;
1285
1286         return -EBUSY;
1287 }
1288
1289 static void cnic_reply_bnx2x_kcqes(struct cnic_dev *dev, int ulp_type,
1290                                    struct kcqe *cqes[], u32 num_cqes)
1291 {
1292         struct cnic_local *cp = dev->cnic_priv;
1293         struct cnic_ulp_ops *ulp_ops;
1294
1295         rcu_read_lock();
1296         ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
1297         if (likely(ulp_ops)) {
1298                 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
1299                                           cqes, num_cqes);
1300         }
1301         rcu_read_unlock();
1302 }
1303
1304 static int cnic_bnx2x_iscsi_init1(struct cnic_dev *dev, struct kwqe *kwqe)
1305 {
1306         struct cnic_local *cp = dev->cnic_priv;
1307         struct iscsi_kwqe_init1 *req1 = (struct iscsi_kwqe_init1 *) kwqe;
1308         int hq_bds, pages;
1309         u32 pfid = cp->pfid;
1310
1311         cp->num_iscsi_tasks = req1->num_tasks_per_conn;
1312         cp->num_ccells = req1->num_ccells_per_conn;
1313         cp->task_array_size = BNX2X_ISCSI_TASK_CONTEXT_SIZE *
1314                               cp->num_iscsi_tasks;
1315         cp->r2tq_size = cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS *
1316                         BNX2X_ISCSI_R2TQE_SIZE;
1317         cp->hq_size = cp->num_ccells * BNX2X_ISCSI_HQ_BD_SIZE;
1318         pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1319         hq_bds = pages * (PAGE_SIZE / BNX2X_ISCSI_HQ_BD_SIZE);
1320         cp->num_cqs = req1->num_cqs;
1321
1322         if (!dev->max_iscsi_conn)
1323                 return 0;
1324
1325         /* init Tstorm RAM */
1326         CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_RQ_SIZE_OFFSET(pfid),
1327                   req1->rq_num_wqes);
1328         CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1329                   PAGE_SIZE);
1330         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1331                  TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1332         CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1333                   TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1334                   req1->num_tasks_per_conn);
1335
1336         /* init Ustorm RAM */
1337         CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1338                   USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(pfid),
1339                   req1->rq_buffer_size);
1340         CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1341                   PAGE_SIZE);
1342         CNIC_WR8(dev, BAR_USTRORM_INTMEM +
1343                  USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1344         CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1345                   USTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1346                   req1->num_tasks_per_conn);
1347         CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_RQ_SIZE_OFFSET(pfid),
1348                   req1->rq_num_wqes);
1349         CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_CQ_SIZE_OFFSET(pfid),
1350                   req1->cq_num_wqes);
1351         CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid),
1352                   cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1353
1354         /* init Xstorm RAM */
1355         CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1356                   PAGE_SIZE);
1357         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1358                  XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1359         CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1360                   XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1361                   req1->num_tasks_per_conn);
1362         CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_HQ_SIZE_OFFSET(pfid),
1363                   hq_bds);
1364         CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_SQ_SIZE_OFFSET(pfid),
1365                   req1->num_tasks_per_conn);
1366         CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_R2TQ_SIZE_OFFSET(pfid),
1367                   cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1368
1369         /* init Cstorm RAM */
1370         CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_PAGE_SIZE_OFFSET(pfid),
1371                   PAGE_SIZE);
1372         CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
1373                  CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(pfid), PAGE_SHIFT);
1374         CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1375                   CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(pfid),
1376                   req1->num_tasks_per_conn);
1377         CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_CQ_SIZE_OFFSET(pfid),
1378                   req1->cq_num_wqes);
1379         CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_HQ_SIZE_OFFSET(pfid),
1380                   hq_bds);
1381
1382         return 0;
1383 }
1384
1385 static int cnic_bnx2x_iscsi_init2(struct cnic_dev *dev, struct kwqe *kwqe)
1386 {
1387         struct iscsi_kwqe_init2 *req2 = (struct iscsi_kwqe_init2 *) kwqe;
1388         struct cnic_local *cp = dev->cnic_priv;
1389         u32 pfid = cp->pfid;
1390         struct iscsi_kcqe kcqe;
1391         struct kcqe *cqes[1];
1392
1393         memset(&kcqe, 0, sizeof(kcqe));
1394         if (!dev->max_iscsi_conn) {
1395                 kcqe.completion_status =
1396                         ISCSI_KCQE_COMPLETION_STATUS_ISCSI_NOT_SUPPORTED;
1397                 goto done;
1398         }
1399
1400         CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1401                 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid), req2->error_bit_map[0]);
1402         CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1403                 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid) + 4,
1404                 req2->error_bit_map[1]);
1405
1406         CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1407                   USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid), req2->max_cq_sqn);
1408         CNIC_WR(dev, BAR_USTRORM_INTMEM +
1409                 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid), req2->error_bit_map[0]);
1410         CNIC_WR(dev, BAR_USTRORM_INTMEM +
1411                 USTORM_ISCSI_ERROR_BITMAP_OFFSET(pfid) + 4,
1412                 req2->error_bit_map[1]);
1413
1414         CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1415                   CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(pfid), req2->max_cq_sqn);
1416
1417         kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1418
1419 done:
1420         kcqe.op_code = ISCSI_KCQE_OPCODE_INIT;
1421         cqes[0] = (struct kcqe *) &kcqe;
1422         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1423
1424         return 0;
1425 }
1426
1427 static void cnic_free_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1428 {
1429         struct cnic_local *cp = dev->cnic_priv;
1430         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1431
1432         if (ctx->ulp_proto_id == CNIC_ULP_ISCSI) {
1433                 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1434
1435                 cnic_free_dma(dev, &iscsi->hq_info);
1436                 cnic_free_dma(dev, &iscsi->r2tq_info);
1437                 cnic_free_dma(dev, &iscsi->task_array_info);
1438         }
1439         cnic_free_id(&cp->cid_tbl, ctx->cid);
1440         ctx->cid = 0;
1441 }
1442
1443 static int cnic_alloc_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1444 {
1445         u32 cid;
1446         int ret, pages;
1447         struct cnic_local *cp = dev->cnic_priv;
1448         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1449         struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1450
1451         cid = cnic_alloc_new_id(&cp->cid_tbl);
1452         if (cid == -1) {
1453                 ret = -ENOMEM;
1454                 goto error;
1455         }
1456
1457         ctx->cid = cid;
1458         pages = PAGE_ALIGN(cp->task_array_size) / PAGE_SIZE;
1459
1460         ret = cnic_alloc_dma(dev, &iscsi->task_array_info, pages, 1);
1461         if (ret)
1462                 goto error;
1463
1464         pages = PAGE_ALIGN(cp->r2tq_size) / PAGE_SIZE;
1465         ret = cnic_alloc_dma(dev, &iscsi->r2tq_info, pages, 1);
1466         if (ret)
1467                 goto error;
1468
1469         pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1470         ret = cnic_alloc_dma(dev, &iscsi->hq_info, pages, 1);
1471         if (ret)
1472                 goto error;
1473
1474         return 0;
1475
1476 error:
1477         cnic_free_bnx2x_conn_resc(dev, l5_cid);
1478         return ret;
1479 }
1480
1481 static void *cnic_get_bnx2x_ctx(struct cnic_dev *dev, u32 cid, int init,
1482                                 struct regpair *ctx_addr)
1483 {
1484         struct cnic_local *cp = dev->cnic_priv;
1485         struct cnic_eth_dev *ethdev = cp->ethdev;
1486         int blk = (cid - ethdev->starting_cid) / cp->cids_per_blk;
1487         int off = (cid - ethdev->starting_cid) % cp->cids_per_blk;
1488         unsigned long align_off = 0;
1489         dma_addr_t ctx_map;
1490         void *ctx;
1491
1492         if (cp->ctx_align) {
1493                 unsigned long mask = cp->ctx_align - 1;
1494
1495                 if (cp->ctx_arr[blk].mapping & mask)
1496                         align_off = cp->ctx_align -
1497                                     (cp->ctx_arr[blk].mapping & mask);
1498         }
1499         ctx_map = cp->ctx_arr[blk].mapping + align_off +
1500                 (off * BNX2X_CONTEXT_MEM_SIZE);
1501         ctx = cp->ctx_arr[blk].ctx + align_off +
1502               (off * BNX2X_CONTEXT_MEM_SIZE);
1503         if (init)
1504                 memset(ctx, 0, BNX2X_CONTEXT_MEM_SIZE);
1505
1506         ctx_addr->lo = ctx_map & 0xffffffff;
1507         ctx_addr->hi = (u64) ctx_map >> 32;
1508         return ctx;
1509 }
1510
1511 static int cnic_setup_bnx2x_ctx(struct cnic_dev *dev, struct kwqe *wqes[],
1512                                 u32 num)
1513 {
1514         struct cnic_local *cp = dev->cnic_priv;
1515         struct iscsi_kwqe_conn_offload1 *req1 =
1516                         (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1517         struct iscsi_kwqe_conn_offload2 *req2 =
1518                         (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1519         struct iscsi_kwqe_conn_offload3 *req3;
1520         struct cnic_context *ctx = &cp->ctx_tbl[req1->iscsi_conn_id];
1521         struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1522         u32 cid = ctx->cid;
1523         u32 hw_cid = BNX2X_HW_CID(cp, cid);
1524         struct iscsi_context *ictx;
1525         struct regpair context_addr;
1526         int i, j, n = 2, n_max;
1527
1528         ctx->ctx_flags = 0;
1529         if (!req2->num_additional_wqes)
1530                 return -EINVAL;
1531
1532         n_max = req2->num_additional_wqes + 2;
1533
1534         ictx = cnic_get_bnx2x_ctx(dev, cid, 1, &context_addr);
1535         if (ictx == NULL)
1536                 return -ENOMEM;
1537
1538         req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1539
1540         ictx->xstorm_ag_context.hq_prod = 1;
1541
1542         ictx->xstorm_st_context.iscsi.first_burst_length =
1543                 ISCSI_DEF_FIRST_BURST_LEN;
1544         ictx->xstorm_st_context.iscsi.max_send_pdu_length =
1545                 ISCSI_DEF_MAX_RECV_SEG_LEN;
1546         ictx->xstorm_st_context.iscsi.sq_pbl_base.lo =
1547                 req1->sq_page_table_addr_lo;
1548         ictx->xstorm_st_context.iscsi.sq_pbl_base.hi =
1549                 req1->sq_page_table_addr_hi;
1550         ictx->xstorm_st_context.iscsi.sq_curr_pbe.lo = req2->sq_first_pte.hi;
1551         ictx->xstorm_st_context.iscsi.sq_curr_pbe.hi = req2->sq_first_pte.lo;
1552         ictx->xstorm_st_context.iscsi.hq_pbl_base.lo =
1553                 iscsi->hq_info.pgtbl_map & 0xffffffff;
1554         ictx->xstorm_st_context.iscsi.hq_pbl_base.hi =
1555                 (u64) iscsi->hq_info.pgtbl_map >> 32;
1556         ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.lo =
1557                 iscsi->hq_info.pgtbl[0];
1558         ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.hi =
1559                 iscsi->hq_info.pgtbl[1];
1560         ictx->xstorm_st_context.iscsi.r2tq_pbl_base.lo =
1561                 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1562         ictx->xstorm_st_context.iscsi.r2tq_pbl_base.hi =
1563                 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1564         ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.lo =
1565                 iscsi->r2tq_info.pgtbl[0];
1566         ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.hi =
1567                 iscsi->r2tq_info.pgtbl[1];
1568         ictx->xstorm_st_context.iscsi.task_pbl_base.lo =
1569                 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1570         ictx->xstorm_st_context.iscsi.task_pbl_base.hi =
1571                 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1572         ictx->xstorm_st_context.iscsi.task_pbl_cache_idx =
1573                 BNX2X_ISCSI_PBL_NOT_CACHED;
1574         ictx->xstorm_st_context.iscsi.flags.flags |=
1575                 XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA;
1576         ictx->xstorm_st_context.iscsi.flags.flags |=
1577                 XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T;
1578
1579         ictx->tstorm_st_context.iscsi.hdr_bytes_2_fetch = ISCSI_HEADER_SIZE;
1580         /* TSTORM requires the base address of RQ DB & not PTE */
1581         ictx->tstorm_st_context.iscsi.rq_db_phy_addr.lo =
1582                 req2->rq_page_table_addr_lo & PAGE_MASK;
1583         ictx->tstorm_st_context.iscsi.rq_db_phy_addr.hi =
1584                 req2->rq_page_table_addr_hi;
1585         ictx->tstorm_st_context.iscsi.iscsi_conn_id = req1->iscsi_conn_id;
1586         ictx->tstorm_st_context.tcp.cwnd = 0x5A8;
1587         ictx->tstorm_st_context.tcp.flags2 |=
1588                 TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN;
1589         ictx->tstorm_st_context.tcp.ooo_support_mode =
1590                 TCP_TSTORM_OOO_DROP_AND_PROC_ACK;
1591
1592         ictx->timers_context.flags |= TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG;
1593
1594         ictx->ustorm_st_context.ring.rq.pbl_base.lo =
1595                 req2->rq_page_table_addr_lo;
1596         ictx->ustorm_st_context.ring.rq.pbl_base.hi =
1597                 req2->rq_page_table_addr_hi;
1598         ictx->ustorm_st_context.ring.rq.curr_pbe.lo = req3->qp_first_pte[0].hi;
1599         ictx->ustorm_st_context.ring.rq.curr_pbe.hi = req3->qp_first_pte[0].lo;
1600         ictx->ustorm_st_context.ring.r2tq.pbl_base.lo =
1601                 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1602         ictx->ustorm_st_context.ring.r2tq.pbl_base.hi =
1603                 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1604         ictx->ustorm_st_context.ring.r2tq.curr_pbe.lo =
1605                 iscsi->r2tq_info.pgtbl[0];
1606         ictx->ustorm_st_context.ring.r2tq.curr_pbe.hi =
1607                 iscsi->r2tq_info.pgtbl[1];
1608         ictx->ustorm_st_context.ring.cq_pbl_base.lo =
1609                 req1->cq_page_table_addr_lo;
1610         ictx->ustorm_st_context.ring.cq_pbl_base.hi =
1611                 req1->cq_page_table_addr_hi;
1612         ictx->ustorm_st_context.ring.cq[0].cq_sn = ISCSI_INITIAL_SN;
1613         ictx->ustorm_st_context.ring.cq[0].curr_pbe.lo = req2->cq_first_pte.hi;
1614         ictx->ustorm_st_context.ring.cq[0].curr_pbe.hi = req2->cq_first_pte.lo;
1615         ictx->ustorm_st_context.task_pbe_cache_index =
1616                 BNX2X_ISCSI_PBL_NOT_CACHED;
1617         ictx->ustorm_st_context.task_pdu_cache_index =
1618                 BNX2X_ISCSI_PDU_HEADER_NOT_CACHED;
1619
1620         for (i = 1, j = 1; i < cp->num_cqs; i++, j++) {
1621                 if (j == 3) {
1622                         if (n >= n_max)
1623                                 break;
1624                         req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1625                         j = 0;
1626                 }
1627                 ictx->ustorm_st_context.ring.cq[i].cq_sn = ISCSI_INITIAL_SN;
1628                 ictx->ustorm_st_context.ring.cq[i].curr_pbe.lo =
1629                         req3->qp_first_pte[j].hi;
1630                 ictx->ustorm_st_context.ring.cq[i].curr_pbe.hi =
1631                         req3->qp_first_pte[j].lo;
1632         }
1633
1634         ictx->ustorm_st_context.task_pbl_base.lo =
1635                 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1636         ictx->ustorm_st_context.task_pbl_base.hi =
1637                 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1638         ictx->ustorm_st_context.tce_phy_addr.lo =
1639                 iscsi->task_array_info.pgtbl[0];
1640         ictx->ustorm_st_context.tce_phy_addr.hi =
1641                 iscsi->task_array_info.pgtbl[1];
1642         ictx->ustorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1643         ictx->ustorm_st_context.num_cqs = cp->num_cqs;
1644         ictx->ustorm_st_context.negotiated_rx |= ISCSI_DEF_MAX_RECV_SEG_LEN;
1645         ictx->ustorm_st_context.negotiated_rx_and_flags |=
1646                 ISCSI_DEF_MAX_BURST_LEN;
1647         ictx->ustorm_st_context.negotiated_rx |=
1648                 ISCSI_DEFAULT_MAX_OUTSTANDING_R2T <<
1649                 USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT;
1650
1651         ictx->cstorm_st_context.hq_pbl_base.lo =
1652                 iscsi->hq_info.pgtbl_map & 0xffffffff;
1653         ictx->cstorm_st_context.hq_pbl_base.hi =
1654                 (u64) iscsi->hq_info.pgtbl_map >> 32;
1655         ictx->cstorm_st_context.hq_curr_pbe.lo = iscsi->hq_info.pgtbl[0];
1656         ictx->cstorm_st_context.hq_curr_pbe.hi = iscsi->hq_info.pgtbl[1];
1657         ictx->cstorm_st_context.task_pbl_base.lo =
1658                 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1659         ictx->cstorm_st_context.task_pbl_base.hi =
1660                 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1661         /* CSTORM and USTORM initialization is different, CSTORM requires
1662          * CQ DB base & not PTE addr */
1663         ictx->cstorm_st_context.cq_db_base.lo =
1664                 req1->cq_page_table_addr_lo & PAGE_MASK;
1665         ictx->cstorm_st_context.cq_db_base.hi = req1->cq_page_table_addr_hi;
1666         ictx->cstorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1667         ictx->cstorm_st_context.cq_proc_en_bit_map = (1 << cp->num_cqs) - 1;
1668         for (i = 0; i < cp->num_cqs; i++) {
1669                 ictx->cstorm_st_context.cq_c_prod_sqn_arr.sqn[i] =
1670                         ISCSI_INITIAL_SN;
1671                 ictx->cstorm_st_context.cq_c_sqn_2_notify_arr.sqn[i] =
1672                         ISCSI_INITIAL_SN;
1673         }
1674
1675         ictx->xstorm_ag_context.cdu_reserved =
1676                 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
1677                                        ISCSI_CONNECTION_TYPE);
1678         ictx->ustorm_ag_context.cdu_usage =
1679                 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
1680                                        ISCSI_CONNECTION_TYPE);
1681         return 0;
1682
1683 }
1684
1685 static int cnic_bnx2x_iscsi_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
1686                                    u32 num, int *work)
1687 {
1688         struct iscsi_kwqe_conn_offload1 *req1;
1689         struct iscsi_kwqe_conn_offload2 *req2;
1690         struct cnic_local *cp = dev->cnic_priv;
1691         struct cnic_context *ctx;
1692         struct iscsi_kcqe kcqe;
1693         struct kcqe *cqes[1];
1694         u32 l5_cid;
1695         int ret = 0;
1696
1697         if (num < 2) {
1698                 *work = num;
1699                 return -EINVAL;
1700         }
1701
1702         req1 = (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1703         req2 = (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1704         if ((num - 2) < req2->num_additional_wqes) {
1705                 *work = num;
1706                 return -EINVAL;
1707         }
1708         *work = 2 + req2->num_additional_wqes;
1709
1710         l5_cid = req1->iscsi_conn_id;
1711         if (l5_cid >= MAX_ISCSI_TBL_SZ)
1712                 return -EINVAL;
1713
1714         memset(&kcqe, 0, sizeof(kcqe));
1715         kcqe.op_code = ISCSI_KCQE_OPCODE_OFFLOAD_CONN;
1716         kcqe.iscsi_conn_id = l5_cid;
1717         kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
1718
1719         ctx = &cp->ctx_tbl[l5_cid];
1720         if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags)) {
1721                 kcqe.completion_status =
1722                         ISCSI_KCQE_COMPLETION_STATUS_CID_BUSY;
1723                 goto done;
1724         }
1725
1726         if (atomic_inc_return(&cp->iscsi_conn) > dev->max_iscsi_conn) {
1727                 atomic_dec(&cp->iscsi_conn);
1728                 goto done;
1729         }
1730         ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
1731         if (ret) {
1732                 atomic_dec(&cp->iscsi_conn);
1733                 ret = 0;
1734                 goto done;
1735         }
1736         ret = cnic_setup_bnx2x_ctx(dev, wqes, num);
1737         if (ret < 0) {
1738                 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1739                 atomic_dec(&cp->iscsi_conn);
1740                 goto done;
1741         }
1742
1743         kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1744         kcqe.iscsi_conn_context_id = BNX2X_HW_CID(cp, cp->ctx_tbl[l5_cid].cid);
1745
1746 done:
1747         cqes[0] = (struct kcqe *) &kcqe;
1748         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1749         return ret;
1750 }
1751
1752
1753 static int cnic_bnx2x_iscsi_update(struct cnic_dev *dev, struct kwqe *kwqe)
1754 {
1755         struct cnic_local *cp = dev->cnic_priv;
1756         struct iscsi_kwqe_conn_update *req =
1757                 (struct iscsi_kwqe_conn_update *) kwqe;
1758         void *data;
1759         union l5cm_specific_data l5_data;
1760         u32 l5_cid, cid = BNX2X_SW_CID(req->context_id);
1761         int ret;
1762
1763         if (cnic_get_l5_cid(cp, cid, &l5_cid) != 0)
1764                 return -EINVAL;
1765
1766         data = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1767         if (!data)
1768                 return -ENOMEM;
1769
1770         memcpy(data, kwqe, sizeof(struct kwqe));
1771
1772         ret = cnic_submit_kwqe_16(dev, ISCSI_RAMROD_CMD_ID_UPDATE_CONN,
1773                         req->context_id, ISCSI_CONNECTION_TYPE, &l5_data);
1774         return ret;
1775 }
1776
1777 static int cnic_bnx2x_destroy_ramrod(struct cnic_dev *dev, u32 l5_cid)
1778 {
1779         struct cnic_local *cp = dev->cnic_priv;
1780         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1781         union l5cm_specific_data l5_data;
1782         int ret;
1783         u32 hw_cid, type;
1784
1785         init_waitqueue_head(&ctx->waitq);
1786         ctx->wait_cond = 0;
1787         memset(&l5_data, 0, sizeof(l5_data));
1788         hw_cid = BNX2X_HW_CID(cp, ctx->cid);
1789         type = (NONE_CONNECTION_TYPE << SPE_HDR_CONN_TYPE_SHIFT)
1790                 & SPE_HDR_CONN_TYPE;
1791         type |= ((cp->pfid << SPE_HDR_FUNCTION_ID_SHIFT) &
1792                  SPE_HDR_FUNCTION_ID);
1793
1794         ret = cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL,
1795                                   hw_cid, type, &l5_data);
1796
1797         if (ret == 0)
1798                 wait_event(ctx->waitq, ctx->wait_cond);
1799
1800         return ret;
1801 }
1802
1803 static int cnic_bnx2x_iscsi_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
1804 {
1805         struct cnic_local *cp = dev->cnic_priv;
1806         struct iscsi_kwqe_conn_destroy *req =
1807                 (struct iscsi_kwqe_conn_destroy *) kwqe;
1808         u32 l5_cid = req->reserved0;
1809         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1810         int ret = 0;
1811         struct iscsi_kcqe kcqe;
1812         struct kcqe *cqes[1];
1813
1814         if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
1815                 goto skip_cfc_delete;
1816
1817         if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) {
1818                 unsigned long delta = ctx->timestamp + (2 * HZ) - jiffies;
1819
1820                 if (delta > (2 * HZ))
1821                         delta = 0;
1822
1823                 set_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags);
1824                 queue_delayed_work(cnic_wq, &cp->delete_task, delta);
1825                 goto destroy_reply;
1826         }
1827
1828         ret = cnic_bnx2x_destroy_ramrod(dev, l5_cid);
1829
1830 skip_cfc_delete:
1831         cnic_free_bnx2x_conn_resc(dev, l5_cid);
1832
1833         atomic_dec(&cp->iscsi_conn);
1834         clear_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
1835
1836 destroy_reply:
1837         memset(&kcqe, 0, sizeof(kcqe));
1838         kcqe.op_code = ISCSI_KCQE_OPCODE_DESTROY_CONN;
1839         kcqe.iscsi_conn_id = l5_cid;
1840         kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1841         kcqe.iscsi_conn_context_id = req->context_id;
1842
1843         cqes[0] = (struct kcqe *) &kcqe;
1844         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1845
1846         return ret;
1847 }
1848
1849 static void cnic_init_storm_conn_bufs(struct cnic_dev *dev,
1850                                       struct l4_kwq_connect_req1 *kwqe1,
1851                                       struct l4_kwq_connect_req3 *kwqe3,
1852                                       struct l5cm_active_conn_buffer *conn_buf)
1853 {
1854         struct l5cm_conn_addr_params *conn_addr = &conn_buf->conn_addr_buf;
1855         struct l5cm_xstorm_conn_buffer *xstorm_buf =
1856                 &conn_buf->xstorm_conn_buffer;
1857         struct l5cm_tstorm_conn_buffer *tstorm_buf =
1858                 &conn_buf->tstorm_conn_buffer;
1859         struct regpair context_addr;
1860         u32 cid = BNX2X_SW_CID(kwqe1->cid);
1861         struct in6_addr src_ip, dst_ip;
1862         int i;
1863         u32 *addrp;
1864
1865         addrp = (u32 *) &conn_addr->local_ip_addr;
1866         for (i = 0; i < 4; i++, addrp++)
1867                 src_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1868
1869         addrp = (u32 *) &conn_addr->remote_ip_addr;
1870         for (i = 0; i < 4; i++, addrp++)
1871                 dst_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1872
1873         cnic_get_bnx2x_ctx(dev, cid, 0, &context_addr);
1874
1875         xstorm_buf->context_addr.hi = context_addr.hi;
1876         xstorm_buf->context_addr.lo = context_addr.lo;
1877         xstorm_buf->mss = 0xffff;
1878         xstorm_buf->rcv_buf = kwqe3->rcv_buf;
1879         if (kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE)
1880                 xstorm_buf->params |= L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE;
1881         xstorm_buf->pseudo_header_checksum =
1882                 swab16(~csum_ipv6_magic(&src_ip, &dst_ip, 0, IPPROTO_TCP, 0));
1883
1884         if (!(kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK))
1885                 tstorm_buf->params |=
1886                         L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE;
1887         if (kwqe3->ka_timeout) {
1888                 tstorm_buf->ka_enable = 1;
1889                 tstorm_buf->ka_timeout = kwqe3->ka_timeout;
1890                 tstorm_buf->ka_interval = kwqe3->ka_interval;
1891                 tstorm_buf->ka_max_probe_count = kwqe3->ka_max_probe_count;
1892         }
1893         tstorm_buf->rcv_buf = kwqe3->rcv_buf;
1894         tstorm_buf->snd_buf = kwqe3->snd_buf;
1895         tstorm_buf->max_rt_time = 0xffffffff;
1896 }
1897
1898 static void cnic_init_bnx2x_mac(struct cnic_dev *dev)
1899 {
1900         struct cnic_local *cp = dev->cnic_priv;
1901         u32 pfid = cp->pfid;
1902         u8 *mac = dev->mac_addr;
1903
1904         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1905                  XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(pfid), mac[0]);
1906         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1907                  XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(pfid), mac[1]);
1908         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1909                  XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(pfid), mac[2]);
1910         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1911                  XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(pfid), mac[3]);
1912         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1913                  XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(pfid), mac[4]);
1914         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1915                  XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(pfid), mac[5]);
1916
1917         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1918                  TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[5]);
1919         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1920                  TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
1921                  mac[4]);
1922         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1923                  TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid), mac[3]);
1924         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1925                  TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 1,
1926                  mac[2]);
1927         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1928                  TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 2,
1929                  mac[1]);
1930         CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1931                  TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(pfid) + 3,
1932                  mac[0]);
1933 }
1934
1935 static void cnic_bnx2x_set_tcp_timestamp(struct cnic_dev *dev, int tcp_ts)
1936 {
1937         struct cnic_local *cp = dev->cnic_priv;
1938         u8 xstorm_flags = XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN;
1939         u16 tstorm_flags = 0;
1940
1941         if (tcp_ts) {
1942                 xstorm_flags |= XSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1943                 tstorm_flags |= TSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1944         }
1945
1946         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1947                  XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->pfid), xstorm_flags);
1948
1949         CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1950                   TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->pfid), tstorm_flags);
1951 }
1952
1953 static int cnic_bnx2x_connect(struct cnic_dev *dev, struct kwqe *wqes[],
1954                               u32 num, int *work)
1955 {
1956         struct cnic_local *cp = dev->cnic_priv;
1957         struct l4_kwq_connect_req1 *kwqe1 =
1958                 (struct l4_kwq_connect_req1 *) wqes[0];
1959         struct l4_kwq_connect_req3 *kwqe3;
1960         struct l5cm_active_conn_buffer *conn_buf;
1961         struct l5cm_conn_addr_params *conn_addr;
1962         union l5cm_specific_data l5_data;
1963         u32 l5_cid = kwqe1->pg_cid;
1964         struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
1965         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1966         int ret;
1967
1968         if (num < 2) {
1969                 *work = num;
1970                 return -EINVAL;
1971         }
1972
1973         if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6)
1974                 *work = 3;
1975         else
1976                 *work = 2;
1977
1978         if (num < *work) {
1979                 *work = num;
1980                 return -EINVAL;
1981         }
1982
1983         if (sizeof(*conn_buf) > CNIC_KWQ16_DATA_SIZE) {
1984                 netdev_err(dev->netdev, "conn_buf size too big\n");
1985                 return -ENOMEM;
1986         }
1987         conn_buf = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1988         if (!conn_buf)
1989                 return -ENOMEM;
1990
1991         memset(conn_buf, 0, sizeof(*conn_buf));
1992
1993         conn_addr = &conn_buf->conn_addr_buf;
1994         conn_addr->remote_addr_0 = csk->ha[0];
1995         conn_addr->remote_addr_1 = csk->ha[1];
1996         conn_addr->remote_addr_2 = csk->ha[2];
1997         conn_addr->remote_addr_3 = csk->ha[3];
1998         conn_addr->remote_addr_4 = csk->ha[4];
1999         conn_addr->remote_addr_5 = csk->ha[5];
2000
2001         if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6) {
2002                 struct l4_kwq_connect_req2 *kwqe2 =
2003                         (struct l4_kwq_connect_req2 *) wqes[1];
2004
2005                 conn_addr->local_ip_addr.ip_addr_hi_hi = kwqe2->src_ip_v6_4;
2006                 conn_addr->local_ip_addr.ip_addr_hi_lo = kwqe2->src_ip_v6_3;
2007                 conn_addr->local_ip_addr.ip_addr_lo_hi = kwqe2->src_ip_v6_2;
2008
2009                 conn_addr->remote_ip_addr.ip_addr_hi_hi = kwqe2->dst_ip_v6_4;
2010                 conn_addr->remote_ip_addr.ip_addr_hi_lo = kwqe2->dst_ip_v6_3;
2011                 conn_addr->remote_ip_addr.ip_addr_lo_hi = kwqe2->dst_ip_v6_2;
2012                 conn_addr->params |= L5CM_CONN_ADDR_PARAMS_IP_VERSION;
2013         }
2014         kwqe3 = (struct l4_kwq_connect_req3 *) wqes[*work - 1];
2015
2016         conn_addr->local_ip_addr.ip_addr_lo_lo = kwqe1->src_ip;
2017         conn_addr->remote_ip_addr.ip_addr_lo_lo = kwqe1->dst_ip;
2018         conn_addr->local_tcp_port = kwqe1->src_port;
2019         conn_addr->remote_tcp_port = kwqe1->dst_port;
2020
2021         conn_addr->pmtu = kwqe3->pmtu;
2022         cnic_init_storm_conn_bufs(dev, kwqe1, kwqe3, conn_buf);
2023
2024         CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
2025                   XSTORM_ISCSI_LOCAL_VLAN_OFFSET(cp->pfid), csk->vlan_id);
2026
2027         cnic_bnx2x_set_tcp_timestamp(dev,
2028                 kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_TIME_STAMP);
2029
2030         ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_TCP_CONNECT,
2031                         kwqe1->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2032         if (!ret)
2033                 set_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
2034
2035         return ret;
2036 }
2037
2038 static int cnic_bnx2x_close(struct cnic_dev *dev, struct kwqe *kwqe)
2039 {
2040         struct l4_kwq_close_req *req = (struct l4_kwq_close_req *) kwqe;
2041         union l5cm_specific_data l5_data;
2042         int ret;
2043
2044         memset(&l5_data, 0, sizeof(l5_data));
2045         ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_CLOSE,
2046                         req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2047         return ret;
2048 }
2049
2050 static int cnic_bnx2x_reset(struct cnic_dev *dev, struct kwqe *kwqe)
2051 {
2052         struct l4_kwq_reset_req *req = (struct l4_kwq_reset_req *) kwqe;
2053         union l5cm_specific_data l5_data;
2054         int ret;
2055
2056         memset(&l5_data, 0, sizeof(l5_data));
2057         ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_ABORT,
2058                         req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
2059         return ret;
2060 }
2061 static int cnic_bnx2x_offload_pg(struct cnic_dev *dev, struct kwqe *kwqe)
2062 {
2063         struct l4_kwq_offload_pg *req = (struct l4_kwq_offload_pg *) kwqe;
2064         struct l4_kcq kcqe;
2065         struct kcqe *cqes[1];
2066
2067         memset(&kcqe, 0, sizeof(kcqe));
2068         kcqe.pg_host_opaque = req->host_opaque;
2069         kcqe.pg_cid = req->host_opaque;
2070         kcqe.op_code = L4_KCQE_OPCODE_VALUE_OFFLOAD_PG;
2071         cqes[0] = (struct kcqe *) &kcqe;
2072         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
2073         return 0;
2074 }
2075
2076 static int cnic_bnx2x_update_pg(struct cnic_dev *dev, struct kwqe *kwqe)
2077 {
2078         struct l4_kwq_update_pg *req = (struct l4_kwq_update_pg *) kwqe;
2079         struct l4_kcq kcqe;
2080         struct kcqe *cqes[1];
2081
2082         memset(&kcqe, 0, sizeof(kcqe));
2083         kcqe.pg_host_opaque = req->pg_host_opaque;
2084         kcqe.pg_cid = req->pg_cid;
2085         kcqe.op_code = L4_KCQE_OPCODE_VALUE_UPDATE_PG;
2086         cqes[0] = (struct kcqe *) &kcqe;
2087         cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
2088         return 0;
2089 }
2090
2091 static int cnic_submit_bnx2x_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
2092                                    u32 num_wqes)
2093 {
2094         int i, work, ret;
2095         u32 opcode;
2096         struct kwqe *kwqe;
2097
2098         if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2099                 return -EAGAIN;         /* bnx2 is down */
2100
2101         for (i = 0; i < num_wqes; ) {
2102                 kwqe = wqes[i];
2103                 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2104                 work = 1;
2105
2106                 switch (opcode) {
2107                 case ISCSI_KWQE_OPCODE_INIT1:
2108                         ret = cnic_bnx2x_iscsi_init1(dev, kwqe);
2109                         break;
2110                 case ISCSI_KWQE_OPCODE_INIT2:
2111                         ret = cnic_bnx2x_iscsi_init2(dev, kwqe);
2112                         break;
2113                 case ISCSI_KWQE_OPCODE_OFFLOAD_CONN1:
2114                         ret = cnic_bnx2x_iscsi_ofld1(dev, &wqes[i],
2115                                                      num_wqes - i, &work);
2116                         break;
2117                 case ISCSI_KWQE_OPCODE_UPDATE_CONN:
2118                         ret = cnic_bnx2x_iscsi_update(dev, kwqe);
2119                         break;
2120                 case ISCSI_KWQE_OPCODE_DESTROY_CONN:
2121                         ret = cnic_bnx2x_iscsi_destroy(dev, kwqe);
2122                         break;
2123                 case L4_KWQE_OPCODE_VALUE_CONNECT1:
2124                         ret = cnic_bnx2x_connect(dev, &wqes[i], num_wqes - i,
2125                                                  &work);
2126                         break;
2127                 case L4_KWQE_OPCODE_VALUE_CLOSE:
2128                         ret = cnic_bnx2x_close(dev, kwqe);
2129                         break;
2130                 case L4_KWQE_OPCODE_VALUE_RESET:
2131                         ret = cnic_bnx2x_reset(dev, kwqe);
2132                         break;
2133                 case L4_KWQE_OPCODE_VALUE_OFFLOAD_PG:
2134                         ret = cnic_bnx2x_offload_pg(dev, kwqe);
2135                         break;
2136                 case L4_KWQE_OPCODE_VALUE_UPDATE_PG:
2137                         ret = cnic_bnx2x_update_pg(dev, kwqe);
2138                         break;
2139                 case L4_KWQE_OPCODE_VALUE_UPLOAD_PG:
2140                         ret = 0;
2141                         break;
2142                 default:
2143                         ret = 0;
2144                         netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2145                                    opcode);
2146                         break;
2147                 }
2148                 if (ret < 0)
2149                         netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2150                                    opcode);
2151                 i += work;
2152         }
2153         return 0;
2154 }
2155
2156 static void service_kcqes(struct cnic_dev *dev, int num_cqes)
2157 {
2158         struct cnic_local *cp = dev->cnic_priv;
2159         int i, j, comp = 0;
2160
2161         i = 0;
2162         j = 1;
2163         while (num_cqes) {
2164                 struct cnic_ulp_ops *ulp_ops;
2165                 int ulp_type;
2166                 u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
2167                 u32 kcqe_layer = kcqe_op_flag & KCQE_FLAGS_LAYER_MASK;
2168
2169                 if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
2170                         comp++;
2171
2172                 while (j < num_cqes) {
2173                         u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
2174
2175                         if ((next_op & KCQE_FLAGS_LAYER_MASK) != kcqe_layer)
2176                                 break;
2177
2178                         if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
2179                                 comp++;
2180                         j++;
2181                 }
2182
2183                 if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
2184                         ulp_type = CNIC_ULP_RDMA;
2185                 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
2186                         ulp_type = CNIC_ULP_ISCSI;
2187                 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
2188                         ulp_type = CNIC_ULP_L4;
2189                 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
2190                         goto end;
2191                 else {
2192                         netdev_err(dev->netdev, "Unknown type of KCQE(0x%x)\n",
2193                                    kcqe_op_flag);
2194                         goto end;
2195                 }
2196
2197                 rcu_read_lock();
2198                 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
2199                 if (likely(ulp_ops)) {
2200                         ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
2201                                                   cp->completed_kcq + i, j);
2202                 }
2203                 rcu_read_unlock();
2204 end:
2205                 num_cqes -= j;
2206                 i += j;
2207                 j = 1;
2208         }
2209         if (unlikely(comp))
2210                 cnic_spq_completion(dev, DRV_CTL_RET_L5_SPQ_CREDIT_CMD, comp);
2211 }
2212
2213 static u16 cnic_bnx2_next_idx(u16 idx)
2214 {
2215         return idx + 1;
2216 }
2217
2218 static u16 cnic_bnx2_hw_idx(u16 idx)
2219 {
2220         return idx;
2221 }
2222
2223 static u16 cnic_bnx2x_next_idx(u16 idx)
2224 {
2225         idx++;
2226         if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
2227                 idx++;
2228
2229         return idx;
2230 }
2231
2232 static u16 cnic_bnx2x_hw_idx(u16 idx)
2233 {
2234         if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
2235                 idx++;
2236         return idx;
2237 }
2238
2239 static int cnic_get_kcqes(struct cnic_dev *dev, struct kcq_info *info)
2240 {
2241         struct cnic_local *cp = dev->cnic_priv;
2242         u16 i, ri, hw_prod, last;
2243         struct kcqe *kcqe;
2244         int kcqe_cnt = 0, last_cnt = 0;
2245
2246         i = ri = last = info->sw_prod_idx;
2247         ri &= MAX_KCQ_IDX;
2248         hw_prod = *info->hw_prod_idx_ptr;
2249         hw_prod = cp->hw_idx(hw_prod);
2250
2251         while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
2252                 kcqe = &info->kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
2253                 cp->completed_kcq[kcqe_cnt++] = kcqe;
2254                 i = cp->next_idx(i);
2255                 ri = i & MAX_KCQ_IDX;
2256                 if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
2257                         last_cnt = kcqe_cnt;
2258                         last = i;
2259                 }
2260         }
2261
2262         info->sw_prod_idx = last;
2263         return last_cnt;
2264 }
2265
2266 static int cnic_l2_completion(struct cnic_local *cp)
2267 {
2268         u16 hw_cons, sw_cons;
2269         struct cnic_uio_dev *udev = cp->udev;
2270         union eth_rx_cqe *cqe, *cqe_ring = (union eth_rx_cqe *)
2271                                         (udev->l2_ring + (2 * BCM_PAGE_SIZE));
2272         u32 cmd;
2273         int comp = 0;
2274
2275         if (!test_bit(CNIC_F_BNX2X_CLASS, &cp->dev->flags))
2276                 return 0;
2277
2278         hw_cons = *cp->rx_cons_ptr;
2279         if ((hw_cons & BNX2X_MAX_RCQ_DESC_CNT) == BNX2X_MAX_RCQ_DESC_CNT)
2280                 hw_cons++;
2281
2282         sw_cons = cp->rx_cons;
2283         while (sw_cons != hw_cons) {
2284                 u8 cqe_fp_flags;
2285
2286                 cqe = &cqe_ring[sw_cons & BNX2X_MAX_RCQ_DESC_CNT];
2287                 cqe_fp_flags = cqe->fast_path_cqe.type_error_flags;
2288                 if (cqe_fp_flags & ETH_FAST_PATH_RX_CQE_TYPE) {
2289                         cmd = le32_to_cpu(cqe->ramrod_cqe.conn_and_cmd_data);
2290                         cmd >>= COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT;
2291                         if (cmd == RAMROD_CMD_ID_ETH_CLIENT_SETUP ||
2292                             cmd == RAMROD_CMD_ID_ETH_HALT)
2293                                 comp++;
2294                 }
2295                 sw_cons = BNX2X_NEXT_RCQE(sw_cons);
2296         }
2297         return comp;
2298 }
2299
2300 static void cnic_chk_pkt_rings(struct cnic_local *cp)
2301 {
2302         u16 rx_cons, tx_cons;
2303         int comp = 0;
2304
2305         if (!test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
2306                 return;
2307
2308         rx_cons = *cp->rx_cons_ptr;
2309         tx_cons = *cp->tx_cons_ptr;
2310         if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
2311                 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
2312                         comp = cnic_l2_completion(cp);
2313
2314                 cp->tx_cons = tx_cons;
2315                 cp->rx_cons = rx_cons;
2316
2317                 if (cp->udev)
2318                         uio_event_notify(&cp->udev->cnic_uinfo);
2319         }
2320         if (comp)
2321                 clear_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
2322 }
2323
2324 static u32 cnic_service_bnx2_queues(struct cnic_dev *dev)
2325 {
2326         struct cnic_local *cp = dev->cnic_priv;
2327         u32 status_idx = (u16) *cp->kcq1.status_idx_ptr;
2328         int kcqe_cnt;
2329
2330         cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2331
2332         while ((kcqe_cnt = cnic_get_kcqes(dev, &cp->kcq1))) {
2333
2334                 service_kcqes(dev, kcqe_cnt);
2335
2336                 /* Tell compiler that status_blk fields can change. */
2337                 barrier();
2338                 if (status_idx != *cp->kcq1.status_idx_ptr) {
2339                         status_idx = (u16) *cp->kcq1.status_idx_ptr;
2340                         cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2341                 } else
2342                         break;
2343         }
2344
2345         CNIC_WR16(dev, cp->kcq1.io_addr, cp->kcq1.sw_prod_idx);
2346
2347         cnic_chk_pkt_rings(cp);
2348
2349         return status_idx;
2350 }
2351
2352 static int cnic_service_bnx2(void *data, void *status_blk)
2353 {
2354         struct cnic_dev *dev = data;
2355
2356         if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
2357                 struct status_block *sblk = status_blk;
2358
2359                 return sblk->status_idx;
2360         }
2361
2362         return cnic_service_bnx2_queues(dev);
2363 }
2364
2365 static void cnic_service_bnx2_msix(unsigned long data)
2366 {
2367         struct cnic_dev *dev = (struct cnic_dev *) data;
2368         struct cnic_local *cp = dev->cnic_priv;
2369
2370         cp->last_status_idx = cnic_service_bnx2_queues(dev);
2371
2372         CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
2373                 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
2374 }
2375
2376 static void cnic_doirq(struct cnic_dev *dev)
2377 {
2378         struct cnic_local *cp = dev->cnic_priv;
2379
2380         if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
2381                 u16 prod = cp->kcq1.sw_prod_idx & MAX_KCQ_IDX;
2382
2383                 prefetch(cp->status_blk.gen);
2384                 prefetch(&cp->kcq1.kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
2385
2386                 tasklet_schedule(&cp->cnic_irq_task);
2387         }
2388 }
2389
2390 static irqreturn_t cnic_irq(int irq, void *dev_instance)
2391 {
2392         struct cnic_dev *dev = dev_instance;
2393         struct cnic_local *cp = dev->cnic_priv;
2394
2395         if (cp->ack_int)
2396                 cp->ack_int(dev);
2397
2398         cnic_doirq(dev);
2399
2400         return IRQ_HANDLED;
2401 }
2402
2403 static inline void cnic_ack_bnx2x_int(struct cnic_dev *dev, u8 id, u8 storm,
2404                                       u16 index, u8 op, u8 update)
2405 {
2406         struct cnic_local *cp = dev->cnic_priv;
2407         u32 hc_addr = (HC_REG_COMMAND_REG + CNIC_PORT(cp) * 32 +
2408                        COMMAND_REG_INT_ACK);
2409         struct igu_ack_register igu_ack;
2410
2411         igu_ack.status_block_index = index;
2412         igu_ack.sb_id_and_flags =
2413                         ((id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) |
2414                          (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) |
2415                          (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) |
2416                          (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT));
2417
2418         CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack));
2419 }
2420
2421 static void cnic_ack_igu_sb(struct cnic_dev *dev, u8 igu_sb_id, u8 segment,
2422                             u16 index, u8 op, u8 update)
2423 {
2424         struct igu_regular cmd_data;
2425         u32 igu_addr = BAR_IGU_INTMEM + (IGU_CMD_INT_ACK_BASE + igu_sb_id) * 8;
2426
2427         cmd_data.sb_id_and_flags =
2428                 (index << IGU_REGULAR_SB_INDEX_SHIFT) |
2429                 (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
2430                 (update << IGU_REGULAR_BUPDATE_SHIFT) |
2431                 (op << IGU_REGULAR_ENABLE_INT_SHIFT);
2432
2433
2434         CNIC_WR(dev, igu_addr, cmd_data.sb_id_and_flags);
2435 }
2436
2437 static void cnic_ack_bnx2x_msix(struct cnic_dev *dev)
2438 {
2439         struct cnic_local *cp = dev->cnic_priv;
2440
2441         cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, CSTORM_ID, 0,
2442                            IGU_INT_DISABLE, 0);
2443 }
2444
2445 static void cnic_ack_bnx2x_e2_msix(struct cnic_dev *dev)
2446 {
2447         struct cnic_local *cp = dev->cnic_priv;
2448
2449         cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF, 0,
2450                         IGU_INT_DISABLE, 0);
2451 }
2452
2453 static u32 cnic_service_bnx2x_kcq(struct cnic_dev *dev, struct kcq_info *info)
2454 {
2455         u32 last_status = *info->status_idx_ptr;
2456         int kcqe_cnt;
2457
2458         while ((kcqe_cnt = cnic_get_kcqes(dev, info))) {
2459
2460                 service_kcqes(dev, kcqe_cnt);
2461
2462                 /* Tell compiler that sblk fields can change. */
2463                 barrier();
2464                 if (last_status == *info->status_idx_ptr)
2465                         break;
2466
2467                 last_status = *info->status_idx_ptr;
2468         }
2469         return last_status;
2470 }
2471
2472 static void cnic_service_bnx2x_bh(unsigned long data)
2473 {
2474         struct cnic_dev *dev = (struct cnic_dev *) data;
2475         struct cnic_local *cp = dev->cnic_priv;
2476         u32 status_idx;
2477
2478         if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2479                 return;
2480
2481         status_idx = cnic_service_bnx2x_kcq(dev, &cp->kcq1);
2482
2483         CNIC_WR16(dev, cp->kcq1.io_addr, cp->kcq1.sw_prod_idx + MAX_KCQ_IDX);
2484         if (BNX2X_CHIP_IS_E2(cp->chip_id))
2485                 cnic_ack_igu_sb(dev, cp->bnx2x_igu_sb_id, IGU_SEG_ACCESS_DEF,
2486                                 status_idx, IGU_INT_ENABLE, 1);
2487         else
2488                 cnic_ack_bnx2x_int(dev, cp->bnx2x_igu_sb_id, USTORM_ID,
2489                                    status_idx, IGU_INT_ENABLE, 1);
2490 }
2491
2492 static int cnic_service_bnx2x(void *data, void *status_blk)
2493 {
2494         struct cnic_dev *dev = data;
2495         struct cnic_local *cp = dev->cnic_priv;
2496
2497         if (!(cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
2498                 cnic_doirq(dev);
2499
2500         cnic_chk_pkt_rings(cp);
2501
2502         return 0;
2503 }
2504
2505 static void cnic_ulp_stop(struct cnic_dev *dev)
2506 {
2507         struct cnic_local *cp = dev->cnic_priv;
2508         int if_type;
2509
2510         cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
2511
2512         for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
2513                 struct cnic_ulp_ops *ulp_ops;
2514
2515                 mutex_lock(&cnic_lock);
2516                 ulp_ops = cp->ulp_ops[if_type];
2517                 if (!ulp_ops) {
2518                         mutex_unlock(&cnic_lock);
2519                         continue;
2520                 }
2521                 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2522                 mutex_unlock(&cnic_lock);
2523
2524                 if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
2525                         ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
2526
2527                 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2528         }
2529 }
2530
2531 static void cnic_ulp_start(struct cnic_dev *dev)
2532 {
2533         struct cnic_local *cp = dev->cnic_priv;
2534         int if_type;
2535
2536         for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
2537                 struct cnic_ulp_ops *ulp_ops;
2538
2539                 mutex_lock(&cnic_lock);
2540                 ulp_ops = cp->ulp_ops[if_type];
2541                 if (!ulp_ops || !ulp_ops->cnic_start) {
2542                         mutex_unlock(&cnic_lock);
2543                         continue;
2544                 }
2545                 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2546                 mutex_unlock(&cnic_lock);
2547
2548                 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
2549                         ulp_ops->cnic_start(cp->ulp_handle[if_type]);
2550
2551                 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2552         }
2553 }
2554
2555 static int cnic_ctl(void *data, struct cnic_ctl_info *info)
2556 {
2557         struct cnic_dev *dev = data;
2558
2559         switch (info->cmd) {
2560         case CNIC_CTL_STOP_CMD:
2561                 cnic_hold(dev);
2562
2563                 cnic_ulp_stop(dev);
2564                 cnic_stop_hw(dev);
2565
2566                 cnic_put(dev);
2567                 break;
2568         case CNIC_CTL_START_CMD:
2569                 cnic_hold(dev);
2570
2571                 if (!cnic_start_hw(dev))
2572                         cnic_ulp_start(dev);
2573
2574                 cnic_put(dev);
2575                 break;
2576         case CNIC_CTL_COMPLETION_CMD: {
2577                 u32 cid = BNX2X_SW_CID(info->data.comp.cid);
2578                 u32 l5_cid;
2579                 struct cnic_local *cp = dev->cnic_priv;
2580
2581                 if (cnic_get_l5_cid(cp, cid, &l5_cid) == 0) {
2582                         struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
2583
2584                         ctx->wait_cond = 1;
2585                         wake_up(&ctx->waitq);
2586                 }
2587                 break;
2588         }
2589         default:
2590                 return -EINVAL;
2591         }
2592         return 0;
2593 }
2594
2595 static void cnic_ulp_init(struct cnic_dev *dev)
2596 {
2597         int i;
2598         struct cnic_local *cp = dev->cnic_priv;
2599
2600         for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
2601                 struct cnic_ulp_ops *ulp_ops;
2602
2603                 mutex_lock(&cnic_lock);
2604                 ulp_ops = cnic_ulp_tbl[i];
2605                 if (!ulp_ops || !ulp_ops->cnic_init) {
2606                         mutex_unlock(&cnic_lock);
2607                         continue;
2608                 }
2609                 ulp_get(ulp_ops);
2610                 mutex_unlock(&cnic_lock);
2611
2612                 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
2613                         ulp_ops->cnic_init(dev);
2614
2615                 ulp_put(ulp_ops);
2616         }
2617 }
2618
2619 static void cnic_ulp_exit(struct cnic_dev *dev)
2620 {
2621         int i;
2622         struct cnic_local *cp = dev->cnic_priv;
2623
2624         for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
2625                 struct cnic_ulp_ops *ulp_ops;
2626
2627                 mutex_lock(&cnic_lock);
2628                 ulp_ops = cnic_ulp_tbl[i];
2629                 if (!ulp_ops || !ulp_ops->cnic_exit) {
2630                         mutex_unlock(&cnic_lock);
2631                         continue;
2632                 }
2633                 ulp_get(ulp_ops);
2634                 mutex_unlock(&cnic_lock);
2635
2636                 if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
2637                         ulp_ops->cnic_exit(dev);
2638
2639                 ulp_put(ulp_ops);
2640         }
2641 }
2642
2643 static int cnic_cm_offload_pg(struct cnic_sock *csk)
2644 {
2645         struct cnic_dev *dev = csk->dev;
2646         struct l4_kwq_offload_pg *l4kwqe;
2647         struct kwqe *wqes[1];
2648
2649         l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
2650         memset(l4kwqe, 0, sizeof(*l4kwqe));
2651         wqes[0] = (struct kwqe *) l4kwqe;
2652
2653         l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
2654         l4kwqe->flags =
2655                 L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
2656         l4kwqe->l2hdr_nbytes = ETH_HLEN;
2657
2658         l4kwqe->da0 = csk->ha[0];
2659         l4kwqe->da1 = csk->ha[1];
2660         l4kwqe->da2 = csk->ha[2];
2661         l4kwqe->da3 = csk->ha[3];
2662         l4kwqe->da4 = csk->ha[4];
2663         l4kwqe->da5 = csk->ha[5];
2664
2665         l4kwqe->sa0 = dev->mac_addr[0];
2666         l4kwqe->sa1 = dev->mac_addr[1];
2667         l4kwqe->sa2 = dev->mac_addr[2];
2668         l4kwqe->sa3 = dev->mac_addr[3];
2669         l4kwqe->sa4 = dev->mac_addr[4];
2670         l4kwqe->sa5 = dev->mac_addr[5];
2671
2672         l4kwqe->etype = ETH_P_IP;
2673         l4kwqe->ipid_start = DEF_IPID_START;
2674         l4kwqe->host_opaque = csk->l5_cid;
2675
2676         if (csk->vlan_id) {
2677                 l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
2678                 l4kwqe->vlan_tag = csk->vlan_id;
2679                 l4kwqe->l2hdr_nbytes += 4;
2680         }
2681
2682         return dev->submit_kwqes(dev, wqes, 1);
2683 }
2684
2685 static int cnic_cm_update_pg(struct cnic_sock *csk)
2686 {
2687         struct cnic_dev *dev = csk->dev;
2688         struct l4_kwq_update_pg *l4kwqe;
2689         struct kwqe *wqes[1];
2690
2691         l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
2692         memset(l4kwqe, 0, sizeof(*l4kwqe));
2693         wqes[0] = (struct kwqe *) l4kwqe;
2694
2695         l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
2696         l4kwqe->flags =
2697                 L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
2698         l4kwqe->pg_cid = csk->pg_cid;
2699
2700         l4kwqe->da0 = csk->ha[0];
2701         l4kwqe->da1 = csk->ha[1];
2702         l4kwqe->da2 = csk->ha[2];
2703         l4kwqe->da3 = csk->ha[3];
2704         l4kwqe->da4 = csk->ha[4];
2705         l4kwqe->da5 = csk->ha[5];
2706
2707         l4kwqe->pg_host_opaque = csk->l5_cid;
2708         l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
2709
2710         return dev->submit_kwqes(dev, wqes, 1);
2711 }
2712
2713 static int cnic_cm_upload_pg(struct cnic_sock *csk)
2714 {
2715         struct cnic_dev *dev = csk->dev;
2716         struct l4_kwq_upload *l4kwqe;
2717         struct kwqe *wqes[1];
2718
2719         l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
2720         memset(l4kwqe, 0, sizeof(*l4kwqe));
2721         wqes[0] = (struct kwqe *) l4kwqe;
2722
2723         l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
2724         l4kwqe->flags =
2725                 L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
2726         l4kwqe->cid = csk->pg_cid;
2727
2728         return dev->submit_kwqes(dev, wqes, 1);
2729 }
2730
2731 static int cnic_cm_conn_req(struct cnic_sock *csk)
2732 {
2733         struct cnic_dev *dev = csk->dev;
2734         struct l4_kwq_connect_req1 *l4kwqe1;
2735         struct l4_kwq_connect_req2 *l4kwqe2;
2736         struct l4_kwq_connect_req3 *l4kwqe3;
2737         struct kwqe *wqes[3];
2738         u8 tcp_flags = 0;
2739         int num_wqes = 2;
2740
2741         l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
2742         l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
2743         l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
2744         memset(l4kwqe1, 0, sizeof(*l4kwqe1));
2745         memset(l4kwqe2, 0, sizeof(*l4kwqe2));
2746         memset(l4kwqe3, 0, sizeof(*l4kwqe3));
2747
2748         l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
2749         l4kwqe3->flags =
2750                 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
2751         l4kwqe3->ka_timeout = csk->ka_timeout;
2752         l4kwqe3->ka_interval = csk->ka_interval;
2753         l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
2754         l4kwqe3->tos = csk->tos;
2755         l4kwqe3->ttl = csk->ttl;
2756         l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
2757         l4kwqe3->pmtu = csk->mtu;
2758         l4kwqe3->rcv_buf = csk->rcv_buf;
2759         l4kwqe3->snd_buf = csk->snd_buf;
2760         l4kwqe3->seed = csk->seed;
2761
2762         wqes[0] = (struct kwqe *) l4kwqe1;
2763         if (test_bit(SK_F_IPV6, &csk->flags)) {
2764                 wqes[1] = (struct kwqe *) l4kwqe2;
2765                 wqes[2] = (struct kwqe *) l4kwqe3;
2766                 num_wqes = 3;
2767
2768                 l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
2769                 l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
2770                 l4kwqe2->flags =
2771                         L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
2772                         L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
2773                 l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
2774                 l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
2775                 l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
2776                 l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
2777                 l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
2778                 l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
2779                 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
2780                                sizeof(struct tcphdr);
2781         } else {
2782                 wqes[1] = (struct kwqe *) l4kwqe3;
2783                 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
2784                                sizeof(struct tcphdr);
2785         }
2786
2787         l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
2788         l4kwqe1->flags =
2789                 (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
2790                  L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
2791         l4kwqe1->cid = csk->cid;
2792         l4kwqe1->pg_cid = csk->pg_cid;
2793         l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
2794         l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
2795         l4kwqe1->src_port = be16_to_cpu(csk->src_port);
2796         l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
2797         if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
2798                 tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
2799         if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
2800                 tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
2801         if (csk->tcp_flags & SK_TCP_NAGLE)
2802                 tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
2803         if (csk->tcp_flags & SK_TCP_TIMESTAMP)
2804                 tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
2805         if (csk->tcp_flags & SK_TCP_SACK)
2806                 tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
2807         if (csk->tcp_flags & SK_TCP_SEG_SCALING)
2808                 tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
2809
2810         l4kwqe1->tcp_flags = tcp_flags;
2811
2812         return dev->submit_kwqes(dev, wqes, num_wqes);
2813 }
2814
2815 static int cnic_cm_close_req(struct cnic_sock *csk)
2816 {
2817         struct cnic_dev *dev = csk->dev;
2818         struct l4_kwq_close_req *l4kwqe;
2819         struct kwqe *wqes[1];
2820
2821         l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
2822         memset(l4kwqe, 0, sizeof(*l4kwqe));
2823         wqes[0] = (struct kwqe *) l4kwqe;
2824
2825         l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
2826         l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
2827         l4kwqe->cid = csk->cid;
2828
2829         return dev->submit_kwqes(dev, wqes, 1);
2830 }
2831
2832 static int cnic_cm_abort_req(struct cnic_sock *csk)
2833 {
2834         struct cnic_dev *dev = csk->dev;
2835         struct l4_kwq_reset_req *l4kwqe;
2836         struct kwqe *wqes[1];
2837
2838         l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
2839         memset(l4kwqe, 0, sizeof(*l4kwqe));
2840         wqes[0] = (struct kwqe *) l4kwqe;
2841
2842         l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
2843         l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
2844         l4kwqe->cid = csk->cid;
2845
2846         return dev->submit_kwqes(dev, wqes, 1);
2847 }
2848
2849 static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
2850                           u32 l5_cid, struct cnic_sock **csk, void *context)
2851 {
2852         struct cnic_local *cp = dev->cnic_priv;
2853         struct cnic_sock *csk1;
2854
2855         if (l5_cid >= MAX_CM_SK_TBL_SZ)
2856                 return -EINVAL;
2857
2858         if (cp->ctx_tbl) {
2859                 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
2860
2861                 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
2862                         return -EAGAIN;
2863         }
2864
2865         csk1 = &cp->csk_tbl[l5_cid];
2866         if (atomic_read(&csk1->ref_count))
2867                 return -EAGAIN;
2868
2869         if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
2870                 return -EBUSY;
2871
2872         csk1->dev = dev;
2873         csk1->cid = cid;
2874         csk1->l5_cid = l5_cid;
2875         csk1->ulp_type = ulp_type;
2876         csk1->context = context;
2877
2878         csk1->ka_timeout = DEF_KA_TIMEOUT;
2879         csk1->ka_interval = DEF_KA_INTERVAL;
2880         csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
2881         csk1->tos = DEF_TOS;
2882         csk1->ttl = DEF_TTL;
2883         csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
2884         csk1->rcv_buf = DEF_RCV_BUF;
2885         csk1->snd_buf = DEF_SND_BUF;
2886         csk1->seed = DEF_SEED;
2887
2888         *csk = csk1;
2889         return 0;
2890 }
2891
2892 static void cnic_cm_cleanup(struct cnic_sock *csk)
2893 {
2894         if (csk->src_port) {
2895                 struct cnic_dev *dev = csk->dev;
2896                 struct cnic_local *cp = dev->cnic_priv;
2897
2898                 cnic_free_id(&cp->csk_port_tbl, be16_to_cpu(csk->src_port));
2899                 csk->src_port = 0;
2900         }
2901 }
2902
2903 static void cnic_close_conn(struct cnic_sock *csk)
2904 {
2905         if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
2906                 cnic_cm_upload_pg(csk);
2907                 clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
2908         }
2909         cnic_cm_cleanup(csk);
2910 }
2911
2912 static int cnic_cm_destroy(struct cnic_sock *csk)
2913 {
2914         if (!cnic_in_use(csk))
2915                 return -EINVAL;
2916
2917         csk_hold(csk);
2918         clear_bit(SK_F_INUSE, &csk->flags);
2919         smp_mb__after_clear_bit();
2920         while (atomic_read(&csk->ref_count) != 1)
2921                 msleep(1);
2922         cnic_cm_cleanup(csk);
2923
2924         csk->flags = 0;
2925         csk_put(csk);
2926         return 0;
2927 }
2928
2929 static inline u16 cnic_get_vlan(struct net_device *dev,
2930                                 struct net_device **vlan_dev)
2931 {
2932         if (dev->priv_flags & IFF_802_1Q_VLAN) {
2933                 *vlan_dev = vlan_dev_real_dev(dev);
2934                 return vlan_dev_vlan_id(dev);
2935         }
2936         *vlan_dev = dev;
2937         return 0;
2938 }
2939
2940 static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
2941                              struct dst_entry **dst)
2942 {
2943 #if defined(CONFIG_INET)
2944         struct flowi fl;
2945         int err;
2946         struct rtable *rt;
2947
2948         memset(&fl, 0, sizeof(fl));
2949         fl.nl_u.ip4_u.daddr = dst_addr->sin_addr.s_addr;
2950
2951         err = ip_route_output_key(&init_net, &rt, &fl);
2952         if (!err)
2953                 *dst = &rt->dst;
2954         return err;
2955 #else
2956         return -ENETUNREACH;
2957 #endif
2958 }
2959
2960 static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
2961                              struct dst_entry **dst)
2962 {
2963 #if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
2964         struct flowi fl;
2965
2966         memset(&fl, 0, sizeof(fl));
2967         ipv6_addr_copy(&fl.fl6_dst, &dst_addr->sin6_addr);
2968         if (ipv6_addr_type(&fl.fl6_dst) & IPV6_ADDR_LINKLOCAL)
2969                 fl.oif = dst_addr->sin6_scope_id;
2970
2971         *dst = ip6_route_output(&init_net, NULL, &fl);
2972         if (*dst)
2973                 return 0;
2974 #endif
2975
2976         return -ENETUNREACH;
2977 }
2978
2979 static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
2980                                            int ulp_type)
2981 {
2982         struct cnic_dev *dev = NULL;
2983         struct dst_entry *dst;
2984         struct net_device *netdev = NULL;
2985         int err = -ENETUNREACH;
2986
2987         if (dst_addr->sin_family == AF_INET)
2988                 err = cnic_get_v4_route(dst_addr, &dst);
2989         else if (dst_addr->sin_family == AF_INET6) {
2990                 struct sockaddr_in6 *dst_addr6 =
2991                         (struct sockaddr_in6 *) dst_addr;
2992
2993                 err = cnic_get_v6_route(dst_addr6, &dst);
2994         } else
2995                 return NULL;
2996
2997         if (err)
2998                 return NULL;
2999
3000         if (!dst->dev)
3001                 goto done;
3002
3003         cnic_get_vlan(dst->dev, &netdev);
3004
3005         dev = cnic_from_netdev(netdev);
3006
3007 done:
3008         dst_release(dst);
3009         if (dev)
3010                 cnic_put(dev);
3011         return dev;
3012 }
3013
3014 static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3015 {
3016         struct cnic_dev *dev = csk->dev;
3017         struct cnic_local *cp = dev->cnic_priv;
3018
3019         return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
3020 }
3021
3022 static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3023 {
3024         struct cnic_dev *dev = csk->dev;
3025         struct cnic_local *cp = dev->cnic_priv;
3026         int is_v6, rc = 0;
3027         struct dst_entry *dst = NULL;
3028         struct net_device *realdev;
3029         __be16 local_port;
3030         u32 port_id;
3031
3032         if (saddr->local.v6.sin6_family == AF_INET6 &&
3033             saddr->remote.v6.sin6_family == AF_INET6)
3034                 is_v6 = 1;
3035         else if (saddr->local.v4.sin_family == AF_INET &&
3036                  saddr->remote.v4.sin_family == AF_INET)
3037                 is_v6 = 0;
3038         else
3039                 return -EINVAL;
3040
3041         clear_bit(SK_F_IPV6, &csk->flags);
3042
3043         if (is_v6) {
3044                 set_bit(SK_F_IPV6, &csk->flags);
3045                 cnic_get_v6_route(&saddr->remote.v6, &dst);
3046
3047                 memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
3048                        sizeof(struct in6_addr));
3049                 csk->dst_port = saddr->remote.v6.sin6_port;
3050                 local_port = saddr->local.v6.sin6_port;
3051
3052         } else {
3053                 cnic_get_v4_route(&saddr->remote.v4, &dst);
3054
3055                 csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
3056                 csk->dst_port = saddr->remote.v4.sin_port;
3057                 local_port = saddr->local.v4.sin_port;
3058         }
3059
3060         csk->vlan_id = 0;
3061         csk->mtu = dev->netdev->mtu;
3062         if (dst && dst->dev) {
3063                 u16 vlan = cnic_get_vlan(dst->dev, &realdev);
3064                 if (realdev == dev->netdev) {
3065                         csk->vlan_id = vlan;
3066                         csk->mtu = dst_mtu(dst);
3067                 }
3068         }
3069
3070         port_id = be16_to_cpu(local_port);
3071         if (port_id >= CNIC_LOCAL_PORT_MIN &&
3072             port_id < CNIC_LOCAL_PORT_MAX) {
3073                 if (cnic_alloc_id(&cp->csk_port_tbl, port_id))
3074                         port_id = 0;
3075         } else
3076                 port_id = 0;
3077
3078         if (!port_id) {
3079                 port_id = cnic_alloc_new_id(&cp->csk_port_tbl);
3080                 if (port_id == -1) {
3081                         rc = -ENOMEM;
3082                         goto err_out;
3083                 }
3084                 local_port = cpu_to_be16(port_id);
3085         }
3086         csk->src_port = local_port;
3087
3088 err_out:
3089         dst_release(dst);
3090         return rc;
3091 }
3092
3093 static void cnic_init_csk_state(struct cnic_sock *csk)
3094 {
3095         csk->state = 0;
3096         clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3097         clear_bit(SK_F_CLOSING, &csk->flags);
3098 }
3099
3100 static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3101 {
3102         int err = 0;
3103
3104         if (!cnic_in_use(csk))
3105                 return -EINVAL;
3106
3107         if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
3108                 return -EINVAL;
3109
3110         cnic_init_csk_state(csk);
3111
3112         err = cnic_get_route(csk, saddr);
3113         if (err)
3114                 goto err_out;
3115
3116         err = cnic_resolve_addr(csk, saddr);
3117         if (!err)
3118                 return 0;
3119
3120 err_out:
3121         clear_bit(SK_F_CONNECT_START, &csk->flags);
3122         return err;
3123 }
3124
3125 static int cnic_cm_abort(struct cnic_sock *csk)
3126 {
3127         struct cnic_local *cp = csk->dev->cnic_priv;
3128         u32 opcode = L4_KCQE_OPCODE_VALUE_RESET_COMP;
3129
3130         if (!cnic_in_use(csk))
3131                 return -EINVAL;
3132
3133         if (cnic_abort_prep(csk))
3134                 return cnic_cm_abort_req(csk);
3135
3136         /* Getting here means that we haven't started connect, or
3137          * connect was not successful.
3138          */
3139
3140         cp->close_conn(csk, opcode);
3141         if (csk->state != opcode)
3142                 return -EALREADY;
3143
3144         return 0;
3145 }
3146
3147 static int cnic_cm_close(struct cnic_sock *csk)
3148 {
3149         if (!cnic_in_use(csk))
3150                 return -EINVAL;
3151
3152         if (cnic_close_prep(csk)) {
3153                 csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
3154                 return cnic_cm_close_req(csk);
3155         } else {
3156                 return -EALREADY;
3157         }
3158         return 0;
3159 }
3160
3161 static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
3162                            u8 opcode)
3163 {
3164         struct cnic_ulp_ops *ulp_ops;
3165         int ulp_type = csk->ulp_type;
3166
3167         rcu_read_lock();
3168         ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
3169         if (ulp_ops) {
3170                 if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
3171                         ulp_ops->cm_connect_complete(csk);
3172                 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
3173                         ulp_ops->cm_close_complete(csk);
3174                 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
3175                         ulp_ops->cm_remote_abort(csk);
3176                 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
3177                         ulp_ops->cm_abort_complete(csk);
3178                 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
3179                         ulp_ops->cm_remote_close(csk);
3180         }
3181         rcu_read_unlock();
3182 }
3183
3184 static int cnic_cm_set_pg(struct cnic_sock *csk)
3185 {
3186         if (cnic_offld_prep(csk)) {
3187                 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3188                         cnic_cm_update_pg(csk);
3189                 else
3190                         cnic_cm_offload_pg(csk);
3191         }
3192         return 0;
3193 }
3194
3195 static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
3196 {
3197         struct cnic_local *cp = dev->cnic_priv;
3198         u32 l5_cid = kcqe->pg_host_opaque;
3199         u8 opcode = kcqe->op_code;
3200         struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
3201
3202         csk_hold(csk);
3203         if (!cnic_in_use(csk))
3204                 goto done;
3205
3206         if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3207                 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3208                 goto done;
3209         }
3210         /* Possible PG kcqe status:  SUCCESS, OFFLOADED_PG, or CTX_ALLOC_FAIL */
3211         if (kcqe->status == L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL) {
3212                 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3213                 cnic_cm_upcall(cp, csk,
3214                                L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3215                 goto done;
3216         }
3217
3218         csk->pg_cid = kcqe->pg_cid;
3219         set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3220         cnic_cm_conn_req(csk);
3221
3222 done:
3223         csk_put(csk);
3224 }
3225
3226 static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
3227 {
3228         struct cnic_local *cp = dev->cnic_priv;
3229         struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
3230         u8 opcode = l4kcqe->op_code;
3231         u32 l5_cid;
3232         struct cnic_sock *csk;
3233
3234         if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
3235             opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3236                 cnic_cm_process_offld_pg(dev, l4kcqe);
3237                 return;
3238         }
3239
3240         l5_cid = l4kcqe->conn_id;
3241         if (opcode & 0x80)
3242                 l5_cid = l4kcqe->cid;
3243         if (l5_cid >= MAX_CM_SK_TBL_SZ)
3244                 return;
3245
3246         csk = &cp->csk_tbl[l5_cid];
3247         csk_hold(csk);
3248
3249         if (!cnic_in_use(csk)) {
3250                 csk_put(csk);
3251                 return;
3252         }
3253
3254         switch (opcode) {
3255         case L5CM_RAMROD_CMD_ID_TCP_CONNECT:
3256                 if (l4kcqe->status != 0) {
3257                         clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3258                         cnic_cm_upcall(cp, csk,
3259                                        L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3260                 }
3261                 break;
3262         case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
3263                 if (l4kcqe->status == 0)
3264                         set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
3265
3266                 smp_mb__before_clear_bit();
3267                 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3268                 cnic_cm_upcall(cp, csk, opcode);
3269                 break;
3270
3271         case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
3272         case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
3273         case L4_KCQE_OPCODE_VALUE_RESET_COMP:
3274         case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
3275         case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
3276                 cp->close_conn(csk, opcode);
3277                 break;
3278
3279         case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
3280                 cnic_cm_upcall(cp, csk, opcode);
3281                 break;
3282         }
3283         csk_put(csk);
3284 }
3285
3286 static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
3287 {
3288         struct cnic_dev *dev = data;
3289         int i;
3290
3291         for (i = 0; i < num; i++)
3292                 cnic_cm_process_kcqe(dev, kcqe[i]);
3293 }
3294
3295 static struct cnic_ulp_ops cm_ulp_ops = {
3296         .indicate_kcqes         = cnic_cm_indicate_kcqe,
3297 };
3298
3299 static void cnic_cm_free_mem(struct cnic_dev *dev)
3300 {
3301         struct cnic_local *cp = dev->cnic_priv;
3302
3303         kfree(cp->csk_tbl);
3304         cp->csk_tbl = NULL;
3305         cnic_free_id_tbl(&cp->csk_port_tbl);
3306 }
3307
3308 static int cnic_cm_alloc_mem(struct cnic_dev *dev)
3309 {
3310         struct cnic_local *cp = dev->cnic_priv;
3311
3312         cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
3313                               GFP_KERNEL);
3314         if (!cp->csk_tbl)
3315                 return -ENOMEM;
3316
3317         if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
3318                              CNIC_LOCAL_PORT_MIN)) {
3319                 cnic_cm_free_mem(dev);
3320                 return -ENOMEM;
3321         }
3322         return 0;
3323 }
3324
3325 static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
3326 {
3327         if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
3328                 /* Unsolicited RESET_COMP or RESET_RECEIVED */
3329                 opcode = L4_KCQE_OPCODE_VALUE_RESET_RECEIVED;
3330                 csk->state = opcode;
3331         }
3332
3333         /* 1. If event opcode matches the expected event in csk->state
3334          * 2. If the expected event is CLOSE_COMP, we accept any event
3335          * 3. If the expected event is 0, meaning the connection was never
3336          *    never established, we accept the opcode from cm_abort.
3337          */
3338         if (opcode == csk->state || csk->state == 0 ||
3339             csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP) {
3340                 if (!test_and_set_bit(SK_F_CLOSING, &csk->flags)) {
3341                         if (csk->state == 0)
3342                                 csk->state = opcode;
3343                         return 1;
3344                 }
3345         }
3346         return 0;
3347 }
3348
3349 static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
3350 {
3351         struct cnic_dev *dev = csk->dev;
3352         struct cnic_local *cp = dev->cnic_priv;
3353
3354         if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED) {
3355                 cnic_cm_upcall(cp, csk, opcode);
3356                 return;
3357         }
3358
3359         clear_bit(SK_F_CONNECT_START, &csk->flags);
3360         cnic_close_conn(csk);
3361         csk->state = opcode;
3362         cnic_cm_upcall(cp, csk, opcode);
3363 }
3364
3365 static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
3366 {
3367 }
3368
3369 static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
3370 {
3371         u32 seed;
3372
3373         get_random_bytes(&seed, 4);
3374         cnic_ctx_wr(dev, 45, 0, seed);
3375         return 0;
3376 }
3377
3378 static void cnic_close_bnx2x_conn(struct cnic_sock *csk, u32 opcode)
3379 {
3380         struct cnic_dev *dev = csk->dev;
3381         struct cnic_local *cp = dev->cnic_priv;
3382         struct cnic_context *ctx = &cp->ctx_tbl[csk->l5_cid];
3383         union l5cm_specific_data l5_data;
3384         u32 cmd = 0;
3385         int close_complete = 0;
3386
3387         switch (opcode) {
3388         case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
3389         case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
3390         case L4_KCQE_OPCODE_VALUE_RESET_COMP:
3391                 if (cnic_ready_to_close(csk, opcode)) {
3392                         if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3393                                 cmd = L5CM_RAMROD_CMD_ID_SEARCHER_DELETE;
3394                         else
3395                                 close_complete = 1;
3396                 }
3397                 break;
3398         case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
3399                 cmd = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
3400                 break;
3401         case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
3402                 close_complete = 1;
3403                 break;
3404         }
3405         if (cmd) {
3406                 memset(&l5_data, 0, sizeof(l5_data));
3407
3408                 cnic_submit_kwqe_16(dev, cmd, csk->cid, ISCSI_CONNECTION_TYPE,
3409                                     &l5_data);
3410         } else if (close_complete) {
3411                 ctx->timestamp = jiffies;
3412                 cnic_close_conn(csk);
3413                 cnic_cm_upcall(cp, csk, csk->state);
3414         }
3415 }
3416
3417 static void cnic_cm_stop_bnx2x_hw(struct cnic_dev *dev)
3418 {
3419         struct cnic_local *cp = dev->cnic_priv;
3420         int i;
3421
3422         if (!cp->ctx_tbl)
3423                 return;
3424
3425         if (!netif_running(dev->netdev))
3426                 return;
3427
3428         for (i = 0; i < cp->max_cid_space; i++) {
3429                 struct cnic_context *ctx = &cp->ctx_tbl[i];
3430
3431                 while (test_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
3432                         msleep(10);
3433
3434                 if (test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags))
3435                         netdev_warn(dev->netdev, "CID %x not deleted\n",
3436                                    ctx->cid);
3437         }
3438
3439         cancel_delayed_work(&cp->delete_task);
3440         flush_workqueue(cnic_wq);
3441
3442         if (atomic_read(&cp->iscsi_conn) != 0)
3443                 netdev_warn(dev->netdev, "%d iSCSI connections not destroyed\n",
3444                             atomic_read(&cp->iscsi_conn));
3445 }
3446
3447 static int cnic_cm_init_bnx2x_hw(struct cnic_dev *dev)
3448 {
3449         struct cnic_local *cp = dev->cnic_priv;
3450         u32 pfid = cp->pfid;
3451         u32 port = CNIC_PORT(cp);
3452
3453         cnic_init_bnx2x_mac(dev);
3454         cnic_bnx2x_set_tcp_timestamp(dev, 1);
3455
3456         CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
3457                   XSTORM_ISCSI_LOCAL_VLAN_OFFSET(pfid), 0);
3458
3459         CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3460                 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(port), 1);
3461         CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3462                 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(port),
3463                 DEF_MAX_DA_COUNT);
3464
3465         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3466                  XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(pfid), DEF_TTL);
3467         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3468                  XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(pfid), DEF_TOS);
3469         CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3470                  XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(pfid), 2);
3471         CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3472                 XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(pfid), DEF_SWS_TIMER);
3473
3474         CNIC_WR(dev, BAR_TSTRORM_INTMEM + TSTORM_TCP_MAX_CWND_OFFSET(pfid),
3475                 DEF_MAX_CWND);
3476         return 0;
3477 }
3478
3479 static void cnic_delete_task(struct work_struct *work)
3480 {
3481         struct cnic_local *cp;
3482         struct cnic_dev *dev;
3483         u32 i;
3484         int need_resched = 0;
3485
3486         cp = container_of(work, struct cnic_local, delete_task.work);
3487         dev = cp->dev;
3488
3489         for (i = 0; i < cp->max_cid_space; i++) {
3490                 struct cnic_context *ctx = &cp->ctx_tbl[i];
3491
3492                 if (!test_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags) ||
3493                     !test_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
3494                         continue;
3495
3496                 if (!time_after(jiffies, ctx->timestamp + (2 * HZ))) {
3497                         need_resched = 1;
3498                         continue;
3499                 }
3500
3501                 if (!test_and_clear_bit(CTX_FL_DELETE_WAIT, &ctx->ctx_flags))
3502                         continue;
3503
3504                 cnic_bnx2x_destroy_ramrod(dev, i);
3505
3506                 cnic_free_bnx2x_conn_resc(dev, i);
3507                 if (ctx->ulp_proto_id == CNIC_ULP_ISCSI)
3508                         atomic_dec(&cp->iscsi_conn);
3509
3510                 clear_bit(CTX_FL_OFFLD_START, &ctx->ctx_flags);
3511         }
3512
3513         if (need_resched)
3514                 queue_delayed_work(cnic_wq, &cp->delete_task,
3515                                    msecs_to_jiffies(10));
3516
3517 }
3518
3519 static int cnic_cm_open(struct cnic_dev *dev)
3520 {
3521         struct cnic_local *cp = dev->cnic_priv;
3522         int err;
3523
3524         err = cnic_cm_alloc_mem(dev);
3525         if (err)
3526                 return err;
3527
3528         err = cp->start_cm(dev);
3529
3530         if (err)
3531                 goto err_out;
3532
3533         INIT_DELAYED_WORK(&cp->delete_task, cnic_delete_task);
3534
3535         dev->cm_create = cnic_cm_create;
3536         dev->cm_destroy = cnic_cm_destroy;
3537         dev->cm_connect = cnic_cm_connect;
3538         dev->cm_abort = cnic_cm_abort;
3539         dev->cm_close = cnic_cm_close;
3540         dev->cm_select_dev = cnic_cm_select_dev;
3541
3542         cp->ulp_handle[CNIC_ULP_L4] = dev;
3543         rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
3544         return 0;
3545
3546 err_out:
3547         cnic_cm_free_mem(dev);
3548         return err;
3549 }
3550
3551 static int cnic_cm_shutdown(struct cnic_dev *dev)
3552 {
3553         struct cnic_local *cp = dev->cnic_priv;
3554         int i;
3555
3556         cp->stop_cm(dev);
3557
3558         if (!cp->csk_tbl)
3559                 return 0;
3560
3561         for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
3562                 struct cnic_sock *csk = &cp->csk_tbl[i];
3563
3564                 clear_bit(SK_F_INUSE, &csk->flags);
3565                 cnic_cm_cleanup(csk);
3566         }
3567         cnic_cm_free_mem(dev);
3568
3569         return 0;
3570 }
3571
3572 static void cnic_init_context(struct cnic_dev *dev, u32 cid)
3573 {
3574         u32 cid_addr;
3575         int i;
3576
3577         cid_addr = GET_CID_ADDR(cid);
3578
3579         for (i = 0; i < CTX_SIZE; i += 4)
3580                 cnic_ctx_wr(dev, cid_addr, i, 0);
3581 }
3582
3583 static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
3584 {
3585         struct cnic_local *cp = dev->cnic_priv;
3586         int ret = 0, i;
3587         u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
3588
3589         if (CHIP_NUM(cp) != CHIP_NUM_5709)
3590                 return 0;
3591
3592         for (i = 0; i < cp->ctx_blks; i++) {
3593                 int j;
3594                 u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
3595                 u32 val;
3596
3597                 memset(cp->ctx_arr[i].ctx, 0, BCM_PAGE_SIZE);
3598
3599                 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
3600                         (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
3601                 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
3602                         (u64) cp->ctx_arr[i].mapping >> 32);
3603                 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
3604                         BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
3605                 for (j = 0; j < 10; j++) {
3606
3607                         val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
3608                         if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
3609                                 break;
3610                         udelay(5);
3611                 }
3612                 if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
3613                         ret = -EBUSY;
3614                         break;
3615                 }
3616         }
3617         return ret;
3618 }
3619
3620 static void cnic_free_irq(struct cnic_dev *dev)
3621 {
3622         struct cnic_local *cp = dev->cnic_priv;
3623         struct cnic_eth_dev *ethdev = cp->ethdev;
3624
3625         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3626                 cp->disable_int_sync(dev);
3627                 tasklet_kill(&cp->cnic_irq_task);
3628                 free_irq(ethdev->irq_arr[0].vector, dev);
3629         }
3630 }
3631
3632 static int cnic_request_irq(struct cnic_dev *dev)
3633 {
3634         struct cnic_local *cp = dev->cnic_priv;
3635         struct cnic_eth_dev *ethdev = cp->ethdev;
3636         int err;
3637
3638         err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0, "cnic", dev);
3639         if (err)
3640                 tasklet_disable(&cp->cnic_irq_task);
3641
3642         return err;
3643 }
3644
3645 static int cnic_init_bnx2_irq(struct cnic_dev *dev)
3646 {
3647         struct cnic_local *cp = dev->cnic_priv;
3648         struct cnic_eth_dev *ethdev = cp->ethdev;
3649
3650         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3651                 int err, i = 0;
3652                 int sblk_num = cp->status_blk_num;
3653                 u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
3654                            BNX2_HC_SB_CONFIG_1;
3655
3656                 CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
3657
3658                 CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
3659                 CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
3660                 CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
3661
3662                 cp->last_status_idx = cp->status_blk.bnx2->status_idx;
3663                 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2_msix,
3664                              (unsigned long) dev);
3665                 err = cnic_request_irq(dev);
3666                 if (err)
3667                         return err;
3668
3669                 while (cp->status_blk.bnx2->status_completion_producer_index &&
3670                        i < 10) {
3671                         CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
3672                                 1 << (11 + sblk_num));
3673                         udelay(10);
3674                         i++;
3675                         barrier();
3676                 }
3677                 if (cp->status_blk.bnx2->status_completion_producer_index) {
3678                         cnic_free_irq(dev);
3679                         goto failed;
3680                 }
3681
3682         } else {
3683                 struct status_block *sblk = cp->status_blk.gen;
3684                 u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
3685                 int i = 0;
3686
3687                 while (sblk->status_completion_producer_index && i < 10) {
3688                         CNIC_WR(dev, BNX2_HC_COMMAND,
3689                                 hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
3690                         udelay(10);
3691                         i++;
3692                         barrier();
3693                 }
3694                 if (sblk->status_completion_producer_index)
3695                         goto failed;
3696
3697         }
3698         return 0;
3699
3700 failed:
3701         netdev_err(dev->netdev, "KCQ index not resetting to 0\n");
3702         return -EBUSY;
3703 }
3704
3705 static void cnic_enable_bnx2_int(struct cnic_dev *dev)
3706 {
3707         struct cnic_local *cp = dev->cnic_priv;
3708         struct cnic_eth_dev *ethdev = cp->ethdev;
3709
3710         if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3711                 return;
3712
3713         CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
3714                 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
3715 }
3716
3717 static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
3718 {
3719         struct cnic_local *cp = dev->cnic_priv;
3720         struct cnic_eth_dev *ethdev = cp->ethdev;
3721
3722         if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3723                 return;
3724
3725         CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
3726                 BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
3727         CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
3728         synchronize_irq(ethdev->irq_arr[0].vector);
3729 }
3730
3731 static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
3732 {
3733         struct cnic_local *cp = dev->cnic_priv;
3734         struct cnic_eth_dev *ethdev = cp->ethdev;
3735         struct cnic_uio_dev *udev = cp->udev;
3736         u32 cid_addr, tx_cid, sb_id;
3737         u32 val, offset0, offset1, offset2, offset3;
3738         int i;
3739         struct tx_bd *txbd;
3740         dma_addr_t buf_map, ring_map = udev->l2_ring_map;
3741         struct status_block *s_blk = cp->status_blk.gen;
3742
3743         sb_id = cp->status_blk_num;
3744         tx_cid = 20;
3745         cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
3746         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3747                 struct status_block_msix *sblk = cp->status_blk.bnx2;
3748
3749                 tx_cid = TX_TSS_CID + sb_id - 1;
3750                 CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
3751                         (TX_TSS_CID << 7));
3752                 cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
3753         }
3754         cp->tx_cons = *cp->tx_cons_ptr;
3755
3756         cid_addr = GET_CID_ADDR(tx_cid);
3757         if (CHIP_NUM(cp) == CHIP_NUM_5709) {
3758                 u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
3759
3760                 for (i = 0; i < PHY_CTX_SIZE; i += 4)
3761                         cnic_ctx_wr(dev, cid_addr2, i, 0);
3762
3763                 offset0 = BNX2_L2CTX_TYPE_XI;
3764                 offset1 = BNX2_L2CTX_CMD_TYPE_XI;
3765                 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
3766                 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
3767         } else {
3768                 cnic_init_context(dev, tx_cid);
3769                 cnic_init_context(dev, tx_cid + 1);
3770
3771                 offset0 = BNX2_L2CTX_TYPE;
3772                 offset1 = BNX2_L2CTX_CMD_TYPE;
3773                 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
3774                 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
3775         }
3776         val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
3777         cnic_ctx_wr(dev, cid_addr, offset0, val);
3778
3779         val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
3780         cnic_ctx_wr(dev, cid_addr, offset1, val);
3781
3782         txbd = (struct tx_bd *) udev->l2_ring;
3783
3784         buf_map = udev->l2_buf_map;
3785         for (i = 0; i < MAX_TX_DESC_CNT; i++, txbd++) {
3786                 txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
3787                 txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
3788         }
3789         val = (u64) ring_map >> 32;
3790         cnic_ctx_wr(dev, cid_addr, offset2, val);
3791         txbd->tx_bd_haddr_hi = val;
3792
3793         val = (u64) ring_map & 0xffffffff;
3794         cnic_ctx_wr(dev, cid_addr, offset3, val);
3795         txbd->tx_bd_haddr_lo = val;
3796 }
3797
3798 static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
3799 {
3800         struct cnic_local *cp = dev->cnic_priv;
3801         struct cnic_eth_dev *ethdev = cp->ethdev;
3802         struct cnic_uio_dev *udev = cp->udev;
3803         u32 cid_addr, sb_id, val, coal_reg, coal_val;
3804         int i;
3805         struct rx_bd *rxbd;
3806         struct status_block *s_blk = cp->status_blk.gen;
3807         dma_addr_t ring_map = udev->l2_ring_map;
3808
3809         sb_id = cp->status_blk_num;
3810         cnic_init_context(dev, 2);
3811         cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
3812         coal_reg = BNX2_HC_COMMAND;
3813         coal_val = CNIC_RD(dev, coal_reg);
3814         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3815                 struct status_block_msix *sblk = cp->status_blk.bnx2;
3816
3817                 cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
3818                 coal_reg = BNX2_HC_COALESCE_NOW;
3819                 coal_val = 1 << (11 + sb_id);
3820         }
3821         i = 0;
3822         while (!(*cp->rx_cons_ptr != 0) && i < 10) {
3823                 CNIC_WR(dev, coal_reg, coal_val);
3824                 udelay(10);
3825                 i++;
3826                 barrier();
3827         }
3828         cp->rx_cons = *cp->rx_cons_ptr;
3829
3830         cid_addr = GET_CID_ADDR(2);
3831         val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
3832               BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
3833         cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
3834
3835         if (sb_id == 0)
3836                 val = 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT;
3837         else
3838                 val = BNX2_L2CTX_L2_STATUSB_NUM(sb_id);
3839         cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
3840
3841         rxbd = (struct rx_bd *) (udev->l2_ring + BCM_PAGE_SIZE);
3842         for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
3843                 dma_addr_t buf_map;
3844                 int n = (i % cp->l2_rx_ring_size) + 1;
3845
3846                 buf_map = udev->l2_buf_map + (n * cp->l2_single_buf_size);
3847                 rxbd->rx_bd_len = cp->l2_single_buf_size;
3848                 rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
3849                 rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
3850                 rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
3851         }
3852         val = (u64) (ring_map + BCM_PAGE_SIZE) >> 32;
3853         cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
3854         rxbd->rx_bd_haddr_hi = val;
3855
3856         val = (u64) (ring_map + BCM_PAGE_SIZE) & 0xffffffff;
3857         cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
3858         rxbd->rx_bd_haddr_lo = val;
3859
3860         val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
3861         cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
3862 }
3863
3864 static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
3865 {
3866         struct kwqe *wqes[1], l2kwqe;
3867
3868         memset(&l2kwqe, 0, sizeof(l2kwqe));
3869         wqes[0] = &l2kwqe;
3870         l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_FLAGS_LAYER_SHIFT) |
3871                               (L2_KWQE_OPCODE_VALUE_FLUSH <<
3872                                KWQE_OPCODE_SHIFT) | 2;
3873         dev->submit_kwqes(dev, wqes, 1);
3874 }
3875
3876 static void cnic_set_bnx2_mac(struct cnic_dev *dev)
3877 {
3878         struct cnic_local *cp = dev->cnic_priv;
3879         u32 val;
3880
3881         val = cp->func << 2;
3882
3883         cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
3884
3885         val = cnic_reg_rd_ind(dev, cp->shmem_base +
3886                               BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
3887         dev->mac_addr[0] = (u8) (val >> 8);
3888         dev->mac_addr[1] = (u8) val;
3889
3890         CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
3891
3892         val = cnic_reg_rd_ind(dev, cp->shmem_base +
3893                               BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
3894         dev->mac_addr[2] = (u8) (val >> 24);
3895         dev->mac_addr[3] = (u8) (val >> 16);
3896         dev->mac_addr[4] = (u8) (val >> 8);
3897         dev->mac_addr[5] = (u8) val;
3898
3899         CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
3900
3901         val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
3902         if (CHIP_NUM(cp) != CHIP_NUM_5709)
3903                 val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
3904
3905         CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
3906         CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
3907         CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
3908 }
3909
3910 static int cnic_start_bnx2_hw(struct cnic_dev *dev)
3911 {
3912         struct cnic_local *cp = dev->cnic_priv;
3913         struct cnic_eth_dev *ethdev = cp->ethdev;
3914         struct status_block *sblk = cp->status_blk.gen;
3915         u32 val, kcq_cid_addr, kwq_cid_addr;
3916         int err;
3917
3918         cnic_set_bnx2_mac(dev);
3919
3920         val = CNIC_RD(dev, BNX2_MQ_CONFIG);
3921         val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
3922         if (BCM_PAGE_BITS > 12)
3923                 val |= (12 - 8)  << 4;
3924         else
3925                 val |= (BCM_PAGE_BITS - 8)  << 4;
3926
3927         CNIC_WR(dev, BNX2_MQ_CONFIG, val);
3928
3929         CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
3930         CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
3931         CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
3932
3933         err = cnic_setup_5709_context(dev, 1);
3934         if (err)
3935                 return err;
3936
3937         cnic_init_context(dev, KWQ_CID);
3938         cnic_init_context(dev, KCQ_CID);
3939
3940         kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
3941         cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
3942
3943         cp->max_kwq_idx = MAX_KWQ_IDX;
3944         cp->kwq_prod_idx = 0;
3945         cp->kwq_con_idx = 0;
3946         set_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
3947
3948         if (CHIP_NUM(cp) == CHIP_NUM_5706 || CHIP_NUM(cp) == CHIP_NUM_5708)
3949                 cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
3950         else
3951                 cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
3952
3953         /* Initialize the kernel work queue context. */
3954         val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
3955               (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
3956         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_TYPE, val);
3957
3958         val = (BCM_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
3959         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
3960
3961         val = ((BCM_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
3962         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
3963
3964         val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
3965         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
3966
3967         val = (u32) cp->kwq_info.pgtbl_map;
3968         cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
3969
3970         kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
3971         cp->kcq1.io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
3972
3973         cp->kcq1.sw_prod_idx = 0;
3974         cp->kcq1.hw_prod_idx_ptr =
3975                 (u16 *) &sblk->status_completion_producer_index;
3976
3977         cp->kcq1.status_idx_ptr = (u16 *) &sblk->status_idx;
3978
3979         /* Initialize the kernel complete queue context. */
3980         val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
3981               (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
3982         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_TYPE, val);
3983
3984         val = (BCM_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
3985         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
3986
3987         val = ((BCM_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
3988         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
3989
3990         val = (u32) ((u64) cp->kcq1.dma.pgtbl_map >> 32);
3991         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
3992
3993         val = (u32) cp->kcq1.dma.pgtbl_map;
3994         cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
3995
3996         cp->int_num = 0;
3997         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3998                 struct status_block_msix *msblk = cp->status_blk.bnx2;
3999                 u32 sb_id = cp->status_blk_num;
4000                 u32 sb = BNX2_L2CTX_L5_STATUSB_NUM(sb_id);
4001
4002                 cp->kcq1.hw_prod_idx_ptr =
4003                         (u16 *) &msblk->status_completion_producer_index;
4004                 cp->kcq1.status_idx_ptr = (u16 *) &msblk->status_idx;
4005                 cp->kwq_con_idx_ptr = (u16 *) &msblk->status_cmd_consumer_index;
4006                 cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
4007                 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
4008                 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
4009         }
4010
4011         /* Enable Commnad Scheduler notification when we write to the
4012          * host producer index of the kernel contexts. */
4013         CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
4014
4015         /* Enable Command Scheduler notification when we write to either
4016          * the Send Queue or Receive Queue producer indexes of the kernel
4017          * bypass contexts. */
4018         CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
4019         CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
4020
4021         /* Notify COM when the driver post an application buffer. */
4022         CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
4023
4024         /* Set the CP and COM doorbells.  These two processors polls the
4025          * doorbell for a non zero value before running.  This must be done
4026          * after setting up the kernel queue contexts. */
4027         cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
4028         cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
4029
4030         cnic_init_bnx2_tx_ring(dev);
4031         cnic_init_bnx2_rx_ring(dev);
4032
4033         err = cnic_init_bnx2_irq(dev);
4034         if (err) {
4035                 netdev_err(dev->netdev, "cnic_init_irq failed\n");
4036                 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
4037                 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
4038                 return err;
4039         }
4040
4041         return 0;
4042 }
4043
4044 static void cnic_setup_bnx2x_context(struct cnic_dev *dev)
4045 {
4046         struct cnic_local *cp = dev->cnic_priv;
4047         struct cnic_eth_dev *ethdev = cp->ethdev;
4048         u32 start_offset = ethdev->ctx_tbl_offset;
4049         int i;
4050
4051         for (i = 0; i < cp->ctx_blks; i++) {
4052                 struct cnic_ctx *ctx = &cp->ctx_arr[i];
4053                 dma_addr_t map = ctx->mapping;
4054
4055                 if (cp->ctx_align) {
4056                         unsigned long mask = cp->ctx_align - 1;
4057
4058                         map = (map + mask) & ~mask;
4059                 }
4060
4061                 cnic_ctx_tbl_wr(dev, start_offset + i, map);
4062         }
4063 }
4064
4065 static int cnic_init_bnx2x_irq(struct cnic_dev *dev)
4066 {
4067         struct cnic_local *cp = dev->cnic_priv;
4068         struct cnic_eth_dev *ethdev = cp->ethdev;
4069         int err = 0;
4070
4071         tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2x_bh,
4072                      (unsigned long) dev);
4073         if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
4074                 err = cnic_request_irq(dev);
4075
4076         return err;
4077 }
4078
4079 static inline void cnic_storm_memset_hc_disable(struct cnic_dev *dev,
4080                                                 u16 sb_id, u8 sb_index,
4081                                                 u8 disable)
4082 {
4083
4084         u32 addr = BAR_CSTRORM_INTMEM +
4085                         CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) +
4086                         offsetof(struct hc_status_block_data_e1x, index_data) +
4087                         sizeof(struct hc_index_data)*sb_index +
4088                         offsetof(struct hc_index_data, flags);
4089         u16 flags = CNIC_RD16(dev, addr);
4090         /* clear and set */
4091         flags &= ~HC_INDEX_DATA_HC_ENABLED;
4092         flags |= (((~disable) << HC_INDEX_DATA_HC_ENABLED_SHIFT) &
4093                   HC_INDEX_DATA_HC_ENABLED);
4094         CNIC_WR16(dev, addr, flags);
4095 }
4096
4097 static void cnic_enable_bnx2x_int(struct cnic_dev *dev)
4098 {
4099         struct cnic_local *cp = dev->cnic_priv;
4100         u8 sb_id = cp->status_blk_num;
4101
4102         CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4103                         CSTORM_STATUS_BLOCK_DATA_OFFSET(sb_id) +
4104                         offsetof(struct hc_status_block_data_e1x, index_data) +
4105                         sizeof(struct hc_index_data)*HC_INDEX_ISCSI_EQ_CONS +
4106                         offsetof(struct hc_index_data, timeout), 64 / 12);
4107         cnic_storm_memset_hc_disable(dev, sb_id, HC_INDEX_ISCSI_EQ_CONS, 0);
4108 }
4109
4110 static void cnic_disable_bnx2x_int_sync(struct cnic_dev *dev)
4111 {
4112 }
4113
4114 static void cnic_init_bnx2x_tx_ring(struct cnic_dev *dev,
4115                                     struct client_init_ramrod_data *data)
4116 {
4117         struct cnic_local *cp = dev->cnic_priv;
4118         struct cnic_uio_dev *udev = cp->udev;
4119         union eth_tx_bd_types *txbd = (union eth_tx_bd_types *) udev->l2_ring;
4120         dma_addr_t buf_map, ring_map = udev->l2_ring_map;
4121         struct host_sp_status_block *sb = cp->bnx2x_def_status_blk;
4122         int port = CNIC_PORT(cp);
4123         int i;
4124         u32 cli = cp->ethdev->iscsi_l2_client_id;
4125         u32 val;
4126
4127         memset(txbd, 0, BCM_PAGE_SIZE);
4128
4129         buf_map = udev->l2_buf_map;
4130         for (i = 0; i < MAX_TX_DESC_CNT; i += 3, txbd += 3) {
4131                 struct eth_tx_start_bd *start_bd = &txbd->start_bd;
4132                 struct eth_tx_bd *reg_bd = &((txbd + 2)->reg_bd);
4133
4134                 start_bd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
4135                 start_bd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
4136                 reg_bd->addr_hi = start_bd->addr_hi;
4137                 reg_bd->addr_lo = start_bd->addr_lo + 0x10;
4138                 start_bd->nbytes = cpu_to_le16(0x10);
4139                 start_bd->nbd = cpu_to_le16(3);
4140                 start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
4141                 start_bd->general_data = (UNICAST_ADDRESS <<
4142                         ETH_TX_START_BD_ETH_ADDR_TYPE_SHIFT);
4143                 start_bd->general_data |= (1 << ETH_TX_START_BD_HDR_NBDS_SHIFT);
4144
4145         }
4146
4147         val = (u64) ring_map >> 32;
4148         txbd->next_bd.addr_hi = cpu_to_le32(val);
4149
4150         data->tx.tx_bd_page_base.hi = cpu_to_le32(val);
4151
4152         val = (u64) ring_map & 0xffffffff;
4153         txbd->next_bd.addr_lo = cpu_to_le32(val);
4154
4155         data->tx.tx_bd_page_base.lo = cpu_to_le32(val);
4156
4157         /* Other ramrod params */
4158         data->tx.tx_sb_index_number = HC_SP_INDEX_ETH_ISCSI_CQ_CONS;
4159         data->tx.tx_status_block_id = BNX2X_DEF_SB_ID;
4160
4161         /* reset xstorm per client statistics */
4162         if (cli < MAX_STAT_COUNTER_ID) {
4163                 val = BAR_XSTRORM_INTMEM +
4164                       XSTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
4165                 for (i = 0; i < sizeof(struct xstorm_per_client_stats) / 4; i++)
4166                         CNIC_WR(dev, val + i * 4, 0);
4167         }
4168
4169         cp->tx_cons_ptr =
4170                 &sb->sp_sb.index_values[HC_SP_INDEX_ETH_ISCSI_CQ_CONS];
4171 }
4172
4173 static void cnic_init_bnx2x_rx_ring(struct cnic_dev *dev,
4174                                     struct client_init_ramrod_data *data)
4175 {
4176         struct cnic_local *cp = dev->cnic_priv;
4177         struct cnic_uio_dev *udev = cp->udev;
4178         struct eth_rx_bd *rxbd = (struct eth_rx_bd *) (udev->l2_ring +
4179                                 BCM_PAGE_SIZE);
4180         struct eth_rx_cqe_next_page *rxcqe = (struct eth_rx_cqe_next_page *)
4181                                 (udev->l2_ring + (2 * BCM_PAGE_SIZE));
4182         struct host_sp_status_block *sb = cp->bnx2x_def_status_blk;
4183         int i;
4184         int port = CNIC_PORT(cp);
4185         u32 cli = cp->ethdev->iscsi_l2_client_id;
4186         int cl_qzone_id = BNX2X_CL_QZONE_ID(cp, cli);
4187         u32 val;
4188         dma_addr_t ring_map = udev->l2_ring_map;
4189
4190         /* General data */
4191         data->general.client_id = cli;
4192         data->general.statistics_en_flg = 1;
4193         data->general.statistics_counter_id = cli;
4194         data->general.activate_flg = 1;
4195         data->general.sp_client_id = cli;
4196
4197         for (i = 0; i < BNX2X_MAX_RX_DESC_CNT; i++, rxbd++) {
4198                 dma_addr_t buf_map;
4199                 int n = (i % cp->l2_rx_ring_size) + 1;
4200
4201                 buf_map = udev->l2_buf_map + (n * cp->l2_single_buf_size);
4202                 rxbd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
4203                 rxbd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
4204         }
4205
4206         val = (u64) (ring_map + BCM_PAGE_SIZE) >> 32;
4207         rxbd->addr_hi = cpu_to_le32(val);
4208         data->rx.bd_page_base.hi = cpu_to_le32(val);
4209
4210         val = (u64) (ring_map + BCM_PAGE_SIZE) & 0xffffffff;
4211         rxbd->addr_lo = cpu_to_le32(val);
4212         data->rx.bd_page_base.lo = cpu_to_le32(val);
4213
4214         rxcqe += BNX2X_MAX_RCQ_DESC_CNT;
4215         val = (u64) (ring_map + (2 * BCM_PAGE_SIZE)) >> 32;
4216         rxcqe->addr_hi = cpu_to_le32(val);
4217         data->rx.cqe_page_base.hi = cpu_to_le32(val);
4218
4219         val = (u64) (ring_map + (2 * BCM_PAGE_SIZE)) & 0xffffffff;
4220         rxcqe->addr_lo = cpu_to_le32(val);
4221         data->rx.cqe_page_base.lo = cpu_to_le32(val);
4222
4223         /* Other ramrod params */
4224         data->rx.client_qzone_id = cl_qzone_id;
4225         data->rx.rx_sb_index_number = HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS;
4226         data->rx.status_block_id = BNX2X_DEF_SB_ID;
4227
4228         data->rx.cache_line_alignment_log_size = L1_CACHE_SHIFT;
4229         data->rx.bd_buff_size = cpu_to_le16(cp->l2_single_buf_size);
4230
4231         data->rx.mtu = cpu_to_le16(cp->l2_single_buf_size - 14);
4232         data->rx.outer_vlan_removal_enable_flg = 1;
4233
4234         /* reset tstorm and ustorm per client statistics */
4235         if (cli < MAX_STAT_COUNTER_ID) {
4236                 val = BAR_TSTRORM_INTMEM +
4237                       TSTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
4238                 for (i = 0; i < sizeof(struct tstorm_per_client_stats) / 4; i++)
4239                         CNIC_WR(dev, val + i * 4, 0);
4240
4241                 val = BAR_USTRORM_INTMEM +
4242                       USTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
4243                 for (i = 0; i < sizeof(struct ustorm_per_client_stats) / 4; i++)
4244                         CNIC_WR(dev, val + i * 4, 0);
4245         }
4246
4247         cp->rx_cons_ptr =
4248                 &sb->sp_sb.index_values[HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS];
4249         cp->rx_cons = *cp->rx_cons_ptr;
4250 }
4251
4252 static int cnic_read_bnx2x_iscsi_mac(struct cnic_dev *dev, u32 upper_addr,
4253                                      u32 lower_addr)
4254 {
4255         u32 val;
4256         u8 mac[6];
4257
4258         val = CNIC_RD(dev, upper_addr);
4259
4260         mac[0] = (u8) (val >> 8);
4261         mac[1] = (u8) val;
4262
4263         val = CNIC_RD(dev, lower_addr);
4264
4265         mac[2] = (u8) (val >> 24);
4266         mac[3] = (u8) (val >> 16);
4267         mac[4] = (u8) (val >> 8);
4268         mac[5] = (u8) val;
4269
4270         if (is_valid_ether_addr(mac)) {
4271                 memcpy(dev->mac_addr, mac, 6);
4272                 return 0;
4273         } else {
4274                 return -EINVAL;
4275         }
4276 }
4277
4278 static void cnic_get_bnx2x_iscsi_info(struct cnic_dev *dev)
4279 {
4280         struct cnic_local *cp = dev->cnic_priv;
4281         u32 base, base2, addr, addr1, val;
4282         int port = CNIC_PORT(cp);
4283
4284         dev->max_iscsi_conn = 0;
4285         base = CNIC_RD(dev, MISC_REG_SHARED_MEM_ADDR);
4286         if (base == 0)
4287                 return;
4288
4289         base2 = CNIC_RD(dev, (CNIC_PATH(cp) ? MISC_REG_GENERIC_CR_1 :
4290                                               MISC_REG_GENERIC_CR_0));
4291         addr = BNX2X_SHMEM_ADDR(base,
4292                 dev_info.port_hw_config[port].iscsi_mac_upper);
4293
4294         addr1 = BNX2X_SHMEM_ADDR(base,
4295                 dev_info.port_hw_config[port].iscsi_mac_lower);
4296
4297         cnic_read_bnx2x_iscsi_mac(dev, addr, addr1);
4298
4299         addr = BNX2X_SHMEM_ADDR(base, validity_map[port]);
4300         val = CNIC_RD(dev, addr);
4301
4302         if (!(val & SHR_MEM_VALIDITY_LIC_NO_KEY_IN_EFFECT)) {
4303                 u16 val16;
4304
4305                 addr = BNX2X_SHMEM_ADDR(base,
4306                                 drv_lic_key[port].max_iscsi_init_conn);
4307                 val16 = CNIC_RD16(dev, addr);
4308
4309                 if (val16)
4310                         val16 ^= 0x1e1e;
4311                 dev->max_iscsi_conn = val16;
4312         }
4313         if (BNX2X_CHIP_IS_E1H(cp->chip_id) || BNX2X_CHIP_IS_E2(cp->chip_id)) {
4314                 int func = CNIC_FUNC(cp);
4315                 u32 mf_cfg_addr;
4316
4317                 if (BNX2X_SHMEM2_HAS(base2, mf_cfg_addr))
4318                         mf_cfg_addr = CNIC_RD(dev, BNX2X_SHMEM2_ADDR(base2,
4319                                               mf_cfg_addr));
4320                 else
4321                         mf_cfg_addr = base + BNX2X_SHMEM_MF_BLK_OFFSET;
4322
4323                 if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
4324                         /* Must determine if the MF is SD vs SI mode */
4325                         addr = BNX2X_SHMEM_ADDR(base,
4326                                         dev_info.shared_feature_config.config);
4327                         val = CNIC_RD(dev, addr);
4328                         if ((val & SHARED_FEAT_CFG_FORCE_SF_MODE_MASK) ==
4329                             SHARED_FEAT_CFG_FORCE_SF_MODE_SWITCH_INDEPT) {
4330                                 int rc;
4331
4332                                 /* MULTI_FUNCTION_SI mode */
4333                                 addr = BNX2X_MF_CFG_ADDR(mf_cfg_addr,
4334                                         func_ext_config[func].func_cfg);
4335                                 val = CNIC_RD(dev, addr);
4336                                 if (!(val & MACP_FUNC_CFG_FLAGS_ISCSI_OFFLOAD))
4337                                         dev->max_iscsi_conn = 0;
4338
4339                                 addr = BNX2X_MF_CFG_ADDR(mf_cfg_addr,
4340                                         func_ext_config[func].
4341                                         iscsi_mac_addr_upper);
4342                                 addr1 = BNX2X_MF_CFG_ADDR(mf_cfg_addr,
4343                                         func_ext_config[func].
4344                                         iscsi_mac_addr_lower);
4345                                 rc = cnic_read_bnx2x_iscsi_mac(dev, addr,
4346                                                                 addr1);
4347                                 if (rc && func > 1)
4348                                         dev->max_iscsi_conn = 0;
4349
4350                                 return;
4351                         }
4352                 }
4353
4354                 addr = BNX2X_MF_CFG_ADDR(mf_cfg_addr,
4355                         func_mf_config[func].e1hov_tag);
4356
4357                 val = CNIC_RD(dev, addr);
4358                 val &= FUNC_MF_CFG_E1HOV_TAG_MASK;
4359                 if (val != FUNC_MF_CFG_E1HOV_TAG_DEFAULT) {
4360                         addr = BNX2X_MF_CFG_ADDR(mf_cfg_addr,
4361                                 func_mf_config[func].config);
4362                         val = CNIC_RD(dev, addr);
4363                         val &= FUNC_MF_CFG_PROTOCOL_MASK;
4364                         if (val != FUNC_MF_CFG_PROTOCOL_ISCSI)
4365                                 dev->max_iscsi_conn = 0;
4366                 }
4367         }
4368         if (!is_valid_ether_addr(dev->mac_addr))
4369                 dev->max_iscsi_conn = 0;
4370 }
4371
4372 static int cnic_start_bnx2x_hw(struct cnic_dev *dev)
4373 {
4374         struct cnic_local *cp = dev->cnic_priv;
4375         struct cnic_eth_dev *ethdev = cp->ethdev;
4376         int func = CNIC_FUNC(cp), ret, i;
4377         u32 pfid;
4378
4379         if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
4380                 u32 val = CNIC_RD(dev, MISC_REG_PORT4MODE_EN_OVWR);
4381
4382                 if (!(val & 1))
4383                         val = CNIC_RD(dev, MISC_REG_PORT4MODE_EN);
4384                 else
4385                         val = (val >> 1) & 1;
4386
4387                 if (val)
4388                         cp->pfid = func >> 1;
4389                 else
4390                         cp->pfid = func & 0x6;
4391         } else {
4392                 cp->pfid = func;
4393         }
4394         pfid = cp->pfid;
4395
4396         ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ,
4397                                cp->iscsi_start_cid);
4398
4399         if (ret)
4400                 return -ENOMEM;
4401
4402         cp->bnx2x_igu_sb_id = ethdev->irq_arr[0].status_blk_num2;
4403
4404         cp->kcq1.io_addr = BAR_CSTRORM_INTMEM +
4405                           CSTORM_ISCSI_EQ_PROD_OFFSET(pfid, 0);
4406         cp->kcq1.sw_prod_idx = 0;
4407
4408         if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
4409                 struct host_hc_status_block_e2 *sb = cp->status_blk.gen;
4410
4411                 cp->kcq1.hw_prod_idx_ptr =
4412                         &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
4413                 cp->kcq1.status_idx_ptr =
4414                         &sb->sb.running_index[SM_RX_ID];
4415         } else {
4416                 struct host_hc_status_block_e1x *sb = cp->status_blk.gen;
4417
4418                 cp->kcq1.hw_prod_idx_ptr =
4419                         &sb->sb.index_values[HC_INDEX_ISCSI_EQ_CONS];
4420                 cp->kcq1.status_idx_ptr =
4421                         &sb->sb.running_index[SM_RX_ID];
4422         }
4423
4424         cnic_get_bnx2x_iscsi_info(dev);
4425
4426         /* Only 1 EQ */
4427         CNIC_WR16(dev, cp->kcq1.io_addr, MAX_KCQ_IDX);
4428         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4429                 CSTORM_ISCSI_EQ_CONS_OFFSET(pfid, 0), 0);
4430         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4431                 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0),
4432                 cp->kcq1.dma.pg_map_arr[1] & 0xffffffff);
4433         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4434                 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(pfid, 0) + 4,
4435                 (u64) cp->kcq1.dma.pg_map_arr[1] >> 32);
4436         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4437                 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0),
4438                 cp->kcq1.dma.pg_map_arr[0] & 0xffffffff);
4439         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4440                 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(pfid, 0) + 4,
4441                 (u64) cp->kcq1.dma.pg_map_arr[0] >> 32);
4442         CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4443                 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(pfid, 0), 1);
4444         CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
4445                 CSTORM_ISCSI_EQ_SB_NUM_OFFSET(pfid, 0), cp->status_blk_num);
4446         CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4447                 CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(pfid, 0),
4448                 HC_INDEX_ISCSI_EQ_CONS);
4449
4450         for (i = 0; i < cp->conn_buf_info.num_pages; i++) {
4451                 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4452                         TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(pfid, i),
4453                         cp->conn_buf_info.pgtbl[2 * i]);
4454                 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4455                         TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(pfid, i) + 4,
4456                         cp->conn_buf_info.pgtbl[(2 * i) + 1]);
4457         }
4458
4459         CNIC_WR(dev, BAR_USTRORM_INTMEM +
4460                 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid),
4461                 cp->gbl_buf_info.pg_map_arr[0] & 0xffffffff);
4462         CNIC_WR(dev, BAR_USTRORM_INTMEM +
4463                 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(pfid) + 4,
4464                 (u64) cp->gbl_buf_info.pg_map_arr[0] >> 32);
4465
4466         CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4467                 TSTORM_ISCSI_TCP_LOCAL_ADV_WND_OFFSET(pfid), DEF_RCV_BUF);
4468
4469         cnic_setup_bnx2x_context(dev);
4470
4471         ret = cnic_init_bnx2x_irq(dev);
4472         if (ret)
4473                 return ret;
4474
4475         return 0;
4476 }
4477
4478 static void cnic_init_rings(struct cnic_dev *dev)
4479 {
4480         struct cnic_local *cp = dev->cnic_priv;
4481         struct cnic_uio_dev *udev = cp->udev;
4482
4483         if (test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
4484                 return;
4485
4486         if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
4487                 cnic_init_bnx2_tx_ring(dev);
4488                 cnic_init_bnx2_rx_ring(dev);
4489                 set_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
4490         } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
4491                 u32 cli = cp->ethdev->iscsi_l2_client_id;
4492                 u32 cid = cp->ethdev->iscsi_l2_cid;
4493                 u32 cl_qzone_id, type;
4494                 struct client_init_ramrod_data *data;
4495                 union l5cm_specific_data l5_data;
4496                 struct ustorm_eth_rx_producers rx_prods = {0};
4497                 u32 off, i;
4498
4499                 rx_prods.bd_prod = 0;
4500                 rx_prods.cqe_prod = BNX2X_MAX_RCQ_DESC_CNT;
4501                 barrier();
4502
4503                 cl_qzone_id = BNX2X_CL_QZONE_ID(cp, cli);
4504
4505                 off = BAR_USTRORM_INTMEM +
4506                         (BNX2X_CHIP_IS_E2(cp->chip_id) ?
4507                          USTORM_RX_PRODS_E2_OFFSET(cl_qzone_id) :
4508                          USTORM_RX_PRODS_E1X_OFFSET(CNIC_PORT(cp), cli));
4509
4510                 for (i = 0; i < sizeof(struct ustorm_eth_rx_producers) / 4; i++)
4511                         CNIC_WR(dev, off + i * 4, ((u32 *) &rx_prods)[i]);
4512
4513                 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
4514
4515                 data = udev->l2_buf;
4516
4517                 memset(data, 0, sizeof(*data));
4518
4519                 cnic_init_bnx2x_tx_ring(dev, data);
4520                 cnic_init_bnx2x_rx_ring(dev, data);
4521
4522                 l5_data.phy_address.lo = udev->l2_buf_map & 0xffffffff;
4523                 l5_data.phy_address.hi = (u64) udev->l2_buf_map >> 32;
4524
4525                 type = (ETH_CONNECTION_TYPE << SPE_HDR_CONN_TYPE_SHIFT)
4526                         & SPE_HDR_CONN_TYPE;
4527                 type |= ((cp->pfid << SPE_HDR_FUNCTION_ID_SHIFT) &
4528                         SPE_HDR_FUNCTION_ID);
4529
4530                 set_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
4531
4532                 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CLIENT_SETUP,
4533                         cid, type, &l5_data);
4534
4535                 i = 0;
4536                 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
4537                        ++i < 10)
4538                         msleep(1);
4539
4540                 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
4541                         netdev_err(dev->netdev,
4542                                 "iSCSI CLIENT_SETUP did not complete\n");
4543                 cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
4544                 cnic_ring_ctl(dev, cid, cli, 1);
4545         }
4546 }
4547
4548 static void cnic_shutdown_rings(struct cnic_dev *dev)
4549 {
4550         struct cnic_local *cp = dev->cnic_priv;
4551
4552         if (!test_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags))
4553                 return;
4554
4555         if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
4556                 cnic_shutdown_bnx2_rx_ring(dev);
4557         } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
4558                 struct cnic_local *cp = dev->cnic_priv;
4559                 u32 cli = cp->ethdev->iscsi_l2_client_id;
4560                 u32 cid = cp->ethdev->iscsi_l2_cid;
4561                 union l5cm_specific_data l5_data;
4562                 int i;
4563                 u32 type;
4564
4565                 cnic_ring_ctl(dev, cid, cli, 0);
4566
4567                 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
4568
4569                 l5_data.phy_address.lo = cli;
4570                 l5_data.phy_address.hi = 0;
4571                 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_HALT,
4572                         cid, ETH_CONNECTION_TYPE, &l5_data);
4573                 i = 0;
4574                 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
4575                        ++i < 10)
4576                         msleep(1);
4577
4578                 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
4579                         netdev_err(dev->netdev,
4580                                 "iSCSI CLIENT_HALT did not complete\n");
4581                 cnic_spq_completion(dev, DRV_CTL_RET_L2_SPQ_CREDIT_CMD, 1);
4582
4583                 memset(&l5_data, 0, sizeof(l5_data));
4584                 type = (NONE_CONNECTION_TYPE << SPE_HDR_CONN_TYPE_SHIFT)
4585                         & SPE_HDR_CONN_TYPE;
4586                 type |= ((cp->pfid << SPE_HDR_FUNCTION_ID_SHIFT) &
4587                          SPE_HDR_FUNCTION_ID);
4588                 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_COMMON_CFC_DEL,
4589                         cid, type, &l5_data);
4590                 msleep(10);
4591         }
4592         clear_bit(CNIC_LCL_FL_RINGS_INITED, &cp->cnic_local_flags);
4593 }
4594
4595 static int cnic_register_netdev(struct cnic_dev *dev)
4596 {
4597         struct cnic_local *cp = dev->cnic_priv;
4598         struct cnic_eth_dev *ethdev = cp->ethdev;
4599         int err;
4600
4601         if (!ethdev)
4602                 return -ENODEV;
4603
4604         if (ethdev->drv_state & CNIC_DRV_STATE_REGD)
4605                 return 0;
4606
4607         err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
4608         if (err)
4609                 netdev_err(dev->netdev, "register_cnic failed\n");
4610
4611         return err;
4612 }
4613
4614 static void cnic_unregister_netdev(struct cnic_dev *dev)
4615 {
4616         struct cnic_local *cp = dev->cnic_priv;
4617         struct cnic_eth_dev *ethdev = cp->ethdev;
4618
4619         if (!ethdev)
4620                 return;
4621
4622         ethdev->drv_unregister_cnic(dev->netdev);
4623 }
4624
4625 static int cnic_start_hw(struct cnic_dev *dev)
4626 {
4627         struct cnic_local *cp = dev->cnic_priv;
4628         struct cnic_eth_dev *ethdev = cp->ethdev;
4629         int err;
4630
4631         if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
4632                 return -EALREADY;
4633
4634         dev->regview = ethdev->io_base;
4635         pci_dev_get(dev->pcidev);
4636         cp->func = PCI_FUNC(dev->pcidev->devfn);
4637         cp->status_blk.gen = ethdev->irq_arr[0].status_blk;
4638         cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
4639
4640         err = cp->alloc_resc(dev);
4641         if (err) {
4642                 netdev_err(dev->netdev, "allocate resource failure\n");
4643                 goto err1;
4644         }
4645
4646         err = cp->start_hw(dev);
4647         if (err)
4648                 goto err1;
4649
4650         err = cnic_cm_open(dev);
4651         if (err)
4652                 goto err1;
4653
4654         set_bit(CNIC_F_CNIC_UP, &dev->flags);
4655
4656         cp->enable_int(dev);
4657
4658         return 0;
4659
4660 err1:
4661         cp->free_resc(dev);
4662         pci_dev_put(dev->pcidev);
4663         return err;
4664 }
4665
4666 static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
4667 {
4668         cnic_disable_bnx2_int_sync(dev);
4669
4670         cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
4671         cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
4672
4673         cnic_init_context(dev, KWQ_CID);
4674         cnic_init_context(dev, KCQ_CID);
4675
4676         cnic_setup_5709_context(dev, 0);
4677         cnic_free_irq(dev);
4678
4679         cnic_free_resc(dev);
4680 }
4681
4682
4683 static void cnic_stop_bnx2x_hw(struct cnic_dev *dev)
4684 {
4685         struct cnic_local *cp = dev->cnic_priv;
4686
4687         cnic_free_irq(dev);
4688         *cp->kcq1.hw_prod_idx_ptr = 0;
4689         CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4690                 CSTORM_ISCSI_EQ_CONS_OFFSET(cp->pfid, 0), 0);
4691         CNIC_WR16(dev, cp->kcq1.io_addr, 0);
4692         cnic_free_resc(dev);
4693 }
4694
4695 static void cnic_stop_hw(struct cnic_dev *dev)
4696 {
4697         if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
4698                 struct cnic_local *cp = dev->cnic_priv;
4699                 int i = 0;
4700
4701                 /* Need to wait for the ring shutdown event to complete
4702                  * before clearing the CNIC_UP flag.
4703                  */
4704                 while (cp->udev->uio_dev != -1 && i < 15) {
4705                         msleep(100);
4706                         i++;
4707                 }
4708                 cnic_shutdown_rings(dev);
4709                 clear_bit(CNIC_F_CNIC_UP, &dev->flags);
4710                 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], NULL);
4711                 synchronize_rcu();
4712                 cnic_cm_shutdown(dev);
4713                 cp->stop_hw(dev);
4714                 pci_dev_put(dev->pcidev);
4715         }
4716 }
4717
4718 static void cnic_free_dev(struct cnic_dev *dev)
4719 {
4720         int i = 0;
4721
4722         while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
4723                 msleep(100);
4724                 i++;
4725         }
4726         if (atomic_read(&dev->ref_count) != 0)
4727                 netdev_err(dev->netdev, "Failed waiting for ref count to go to zero\n");
4728
4729         netdev_info(dev->netdev, "Removed CNIC device\n");
4730         dev_put(dev->netdev);
4731         kfree(dev);
4732 }
4733
4734 static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
4735                                        struct pci_dev *pdev)
4736 {
4737         struct cnic_dev *cdev;
4738         struct cnic_local *cp;
4739         int alloc_size;
4740
4741         alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
4742
4743         cdev = kzalloc(alloc_size , GFP_KERNEL);
4744         if (cdev == NULL) {
4745                 netdev_err(dev, "allocate dev struct failure\n");
4746                 return NULL;
4747         }
4748
4749         cdev->netdev = dev;
4750         cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
4751         cdev->register_device = cnic_register_device;
4752         cdev->unregister_device = cnic_unregister_device;
4753         cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
4754
4755         cp = cdev->cnic_priv;
4756         cp->dev = cdev;
4757         cp->l2_single_buf_size = 0x400;
4758         cp->l2_rx_ring_size = 3;
4759
4760         spin_lock_init(&cp->cnic_ulp_lock);
4761
4762         netdev_info(dev, "Added CNIC device\n");
4763
4764         return cdev;
4765 }
4766
4767 static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
4768 {
4769         struct pci_dev *pdev;
4770         struct cnic_dev *cdev;
4771         struct cnic_local *cp;
4772         struct cnic_eth_dev *ethdev = NULL;
4773         struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
4774
4775         probe = symbol_get(bnx2_cnic_probe);
4776         if (probe) {
4777                 ethdev = (*probe)(dev);
4778                 symbol_put(bnx2_cnic_probe);
4779         }
4780         if (!ethdev)
4781                 return NULL;
4782
4783         pdev = ethdev->pdev;
4784         if (!pdev)
4785                 return NULL;
4786
4787         dev_hold(dev);
4788         pci_dev_get(pdev);
4789         if (pdev->device == PCI_DEVICE_ID_NX2_5709 ||
4790             pdev->device == PCI_DEVICE_ID_NX2_5709S) {
4791                 u8 rev;
4792
4793                 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
4794                 if (rev < 0x10) {
4795                         pci_dev_put(pdev);
4796                         goto cnic_err;
4797                 }
4798         }
4799         pci_dev_put(pdev);
4800
4801         cdev = cnic_alloc_dev(dev, pdev);
4802         if (cdev == NULL)
4803                 goto cnic_err;
4804
4805         set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
4806         cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
4807
4808         cp = cdev->cnic_priv;
4809         cp->ethdev = ethdev;
4810         cdev->pcidev = pdev;
4811         cp->chip_id = ethdev->chip_id;
4812
4813         cp->cnic_ops = &cnic_bnx2_ops;
4814         cp->start_hw = cnic_start_bnx2_hw;
4815         cp->stop_hw = cnic_stop_bnx2_hw;
4816         cp->setup_pgtbl = cnic_setup_page_tbl;
4817         cp->alloc_resc = cnic_alloc_bnx2_resc;
4818         cp->free_resc = cnic_free_resc;
4819         cp->start_cm = cnic_cm_init_bnx2_hw;
4820         cp->stop_cm = cnic_cm_stop_bnx2_hw;
4821         cp->enable_int = cnic_enable_bnx2_int;
4822         cp->disable_int_sync = cnic_disable_bnx2_int_sync;
4823         cp->close_conn = cnic_close_bnx2_conn;
4824         cp->next_idx = cnic_bnx2_next_idx;
4825         cp->hw_idx = cnic_bnx2_hw_idx;
4826         return cdev;
4827
4828 cnic_err:
4829         dev_put(dev);
4830         return NULL;
4831 }
4832
4833 static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev)
4834 {
4835         struct pci_dev *pdev;
4836         struct cnic_dev *cdev;
4837         struct cnic_local *cp;
4838         struct cnic_eth_dev *ethdev = NULL;
4839         struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
4840
4841         probe = symbol_get(bnx2x_cnic_probe);
4842         if (probe) {
4843                 ethdev = (*probe)(dev);
4844                 symbol_put(bnx2x_cnic_probe);
4845         }
4846         if (!ethdev)
4847                 return NULL;
4848
4849         pdev = ethdev->pdev;
4850         if (!pdev)
4851                 return NULL;
4852
4853         dev_hold(dev);
4854         cdev = cnic_alloc_dev(dev, pdev);
4855         if (cdev == NULL) {
4856                 dev_put(dev);
4857                 return NULL;
4858         }
4859
4860         set_bit(CNIC_F_BNX2X_CLASS, &cdev->flags);
4861         cdev->submit_kwqes = cnic_submit_bnx2x_kwqes;
4862
4863         cp = cdev->cnic_priv;
4864         cp->ethdev = ethdev;
4865         cdev->pcidev = pdev;
4866         cp->chip_id = ethdev->chip_id;
4867
4868         cp->cnic_ops = &cnic_bnx2x_ops;
4869         cp->start_hw = cnic_start_bnx2x_hw;
4870         cp->stop_hw = cnic_stop_bnx2x_hw;
4871         cp->setup_pgtbl = cnic_setup_page_tbl_le;
4872         cp->alloc_resc = cnic_alloc_bnx2x_resc;
4873         cp->free_resc = cnic_free_resc;
4874         cp->start_cm = cnic_cm_init_bnx2x_hw;
4875         cp->stop_cm = cnic_cm_stop_bnx2x_hw;
4876         cp->enable_int = cnic_enable_bnx2x_int;
4877         cp->disable_int_sync = cnic_disable_bnx2x_int_sync;
4878         if (BNX2X_CHIP_IS_E2(cp->chip_id))
4879                 cp->ack_int = cnic_ack_bnx2x_e2_msix;
4880         else
4881                 cp->ack_int = cnic_ack_bnx2x_msix;
4882         cp->close_conn = cnic_close_bnx2x_conn;
4883         cp->next_idx = cnic_bnx2x_next_idx;
4884         cp->hw_idx = cnic_bnx2x_hw_idx;
4885         return cdev;
4886 }
4887
4888 static struct cnic_dev *is_cnic_dev(struct net_device *dev)
4889 {
4890         struct ethtool_drvinfo drvinfo;
4891         struct cnic_dev *cdev = NULL;
4892
4893         if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
4894                 memset(&drvinfo, 0, sizeof(drvinfo));
4895                 dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
4896
4897                 if (!strcmp(drvinfo.driver, "bnx2"))
4898                         cdev = init_bnx2_cnic(dev);
4899                 if (!strcmp(drvinfo.driver, "bnx2x"))
4900                         cdev = init_bnx2x_cnic(dev);
4901                 if (cdev) {
4902                         write_lock(&cnic_dev_lock);
4903                         list_add(&cdev->list, &cnic_dev_list);
4904                         write_unlock(&cnic_dev_lock);
4905                 }
4906         }
4907         return cdev;
4908 }
4909
4910 /**
4911  * netdev event handler
4912  */
4913 static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
4914                                                          void *ptr)
4915 {
4916         struct net_device *netdev = ptr;
4917         struct cnic_dev *dev;
4918         int if_type;
4919         int new_dev = 0;
4920
4921         dev = cnic_from_netdev(netdev);
4922
4923         if (!dev && (event == NETDEV_REGISTER || event == NETDEV_UP)) {
4924                 /* Check for the hot-plug device */
4925                 dev = is_cnic_dev(netdev);
4926                 if (dev) {
4927                         new_dev = 1;
4928                         cnic_hold(dev);
4929                 }
4930         }
4931         if (dev) {
4932                 struct cnic_local *cp = dev->cnic_priv;
4933
4934                 if (new_dev)
4935                         cnic_ulp_init(dev);
4936                 else if (event == NETDEV_UNREGISTER)
4937                         cnic_ulp_exit(dev);
4938
4939                 if (event == NETDEV_UP) {
4940                         if (cnic_register_netdev(dev) != 0) {
4941                                 cnic_put(dev);
4942                                 goto done;
4943                         }
4944                         if (!cnic_start_hw(dev))
4945                                 cnic_ulp_start(dev);
4946                 }
4947
4948                 rcu_read_lock();
4949                 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
4950                         struct cnic_ulp_ops *ulp_ops;
4951                         void *ctx;
4952
4953                         ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
4954                         if (!ulp_ops || !ulp_ops->indicate_netevent)
4955                                 continue;
4956
4957                         ctx = cp->ulp_handle[if_type];
4958
4959                         ulp_ops->indicate_netevent(ctx, event);
4960                 }
4961                 rcu_read_unlock();
4962
4963                 if (event == NETDEV_GOING_DOWN) {
4964                         cnic_ulp_stop(dev);
4965                         cnic_stop_hw(dev);
4966                         cnic_unregister_netdev(dev);
4967                 } else if (event == NETDEV_UNREGISTER) {
4968                         write_lock(&cnic_dev_lock);
4969                         list_del_init(&dev->list);
4970                         write_unlock(&cnic_dev_lock);
4971
4972                         cnic_put(dev);
4973                         cnic_free_dev(dev);
4974                         goto done;
4975                 }
4976                 cnic_put(dev);
4977         }
4978 done:
4979         return NOTIFY_DONE;
4980 }
4981
4982 static struct notifier_block cnic_netdev_notifier = {
4983         .notifier_call = cnic_netdev_event
4984 };
4985
4986 static void cnic_release(void)
4987 {
4988         struct cnic_dev *dev;
4989         struct cnic_uio_dev *udev;
4990
4991         while (!list_empty(&cnic_dev_list)) {
4992                 dev = list_entry(cnic_dev_list.next, struct cnic_dev, list);
4993                 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
4994                         cnic_ulp_stop(dev);
4995                         cnic_stop_hw(dev);
4996                 }
4997
4998                 cnic_ulp_exit(dev);
4999                 cnic_unregister_netdev(dev);
5000                 list_del_init(&dev->list);
5001                 cnic_free_dev(dev);
5002         }
5003         while (!list_empty(&cnic_udev_list)) {
5004                 udev = list_entry(cnic_udev_list.next, struct cnic_uio_dev,
5005                                   list);
5006                 cnic_free_uio(udev);
5007         }
5008 }
5009
5010 static int __init cnic_init(void)
5011 {
5012         int rc = 0;
5013
5014         pr_info("%s", version);
5015
5016         rc = register_netdevice_notifier(&cnic_netdev_notifier);
5017         if (rc) {
5018                 cnic_release();
5019                 return rc;
5020         }
5021
5022         cnic_wq = create_singlethread_workqueue("cnic_wq");
5023         if (!cnic_wq) {
5024                 cnic_release();
5025                 unregister_netdevice_notifier(&cnic_netdev_notifier);
5026                 return -ENOMEM;
5027         }
5028
5029         return 0;
5030 }
5031
5032 static void __exit cnic_exit(void)
5033 {
5034         unregister_netdevice_notifier(&cnic_netdev_notifier);
5035         cnic_release();
5036         destroy_workqueue(cnic_wq);
5037 }
5038
5039 module_init(cnic_init);
5040 module_exit(cnic_exit);