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36 AEL100X_TX_DISABLE = 9,
37 AEL100X_TX_CONFIG1 = 0xc002,
38 AEL1002_PWR_DOWN_HI = 0xc011,
39 AEL1002_PWR_DOWN_LO = 0xc012,
40 AEL1002_XFI_EQL = 0xc015,
41 AEL1002_LB_EN = 0xc017,
47 static void ael100x_txon(struct cphy *phy)
49 int tx_on_gpio = phy->addr == 0 ? F_GPIO7_OUT_VAL : F_GPIO2_OUT_VAL;
52 t3_set_reg_field(phy->adapter, A_T3DBG_GPIO_EN, 0, tx_on_gpio);
56 static int ael1002_power_down(struct cphy *phy, int enable)
60 err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_DISABLE, !!enable);
62 err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR,
63 BMCR_PDOWN, enable ? BMCR_PDOWN : 0);
67 static int ael1002_reset(struct cphy *phy, int wait)
71 if ((err = ael1002_power_down(phy, 0)) ||
72 (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL100X_TX_CONFIG1, 1)) ||
73 (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_HI, 0)) ||
74 (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_PWR_DOWN_LO, 0)) ||
75 (err = mdio_write(phy, MDIO_DEV_PMA_PMD, AEL1002_XFI_EQL, 0x18)) ||
76 (err = t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, AEL1002_LB_EN,
82 static int ael1002_intr_noop(struct cphy *phy)
87 static int ael100x_get_link_status(struct cphy *phy, int *link_ok,
88 int *speed, int *duplex, int *fc)
92 int err = mdio_read(phy, MDIO_DEV_PMA_PMD, MII_BMSR, &status);
95 * BMSR_LSTATUS is latch-low, so if it is 0 we need to read it
96 * once more to get the current link state.
98 if (!err && !(status & BMSR_LSTATUS))
99 err = mdio_read(phy, MDIO_DEV_PMA_PMD, MII_BMSR,
103 *link_ok = !!(status & BMSR_LSTATUS);
106 *speed = SPEED_10000;
108 *duplex = DUPLEX_FULL;
112 static struct cphy_ops ael1002_ops = {
113 .reset = ael1002_reset,
114 .intr_enable = ael1002_intr_noop,
115 .intr_disable = ael1002_intr_noop,
116 .intr_clear = ael1002_intr_noop,
117 .intr_handler = ael1002_intr_noop,
118 .get_link_status = ael100x_get_link_status,
119 .power_down = ael1002_power_down,
122 int t3_ael1002_phy_prep(struct cphy *phy, struct adapter *adapter,
123 int phy_addr, const struct mdio_ops *mdio_ops)
125 cphy_init(phy, adapter, phy_addr, &ael1002_ops, mdio_ops,
126 SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_FIBRE,
132 static int ael1006_reset(struct cphy *phy, int wait)
134 return t3_phy_reset(phy, MDIO_DEV_PMA_PMD, wait);
137 static int ael1006_intr_enable(struct cphy *phy)
139 return mdio_write(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, 1);
142 static int ael1006_intr_disable(struct cphy *phy)
144 return mdio_write(phy, MDIO_DEV_PMA_PMD, LASI_CTRL, 0);
147 static int ael1006_intr_clear(struct cphy *phy)
151 return mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_STAT, &val);
154 static int ael1006_intr_handler(struct cphy *phy)
157 int err = mdio_read(phy, MDIO_DEV_PMA_PMD, LASI_STAT, &status);
161 return (status & 1) ? cphy_cause_link_change : 0;
164 static int ael1006_power_down(struct cphy *phy, int enable)
166 return t3_mdio_change_bits(phy, MDIO_DEV_PMA_PMD, MII_BMCR,
167 BMCR_PDOWN, enable ? BMCR_PDOWN : 0);
170 static struct cphy_ops ael1006_ops = {
171 .reset = ael1006_reset,
172 .intr_enable = ael1006_intr_enable,
173 .intr_disable = ael1006_intr_disable,
174 .intr_clear = ael1006_intr_clear,
175 .intr_handler = ael1006_intr_handler,
176 .get_link_status = ael100x_get_link_status,
177 .power_down = ael1006_power_down,
180 int t3_ael1006_phy_prep(struct cphy *phy, struct adapter *adapter,
181 int phy_addr, const struct mdio_ops *mdio_ops)
183 cphy_init(phy, adapter, phy_addr, &ael1006_ops, mdio_ops,
184 SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_FIBRE,
190 static struct cphy_ops qt2045_ops = {
191 .reset = ael1006_reset,
192 .intr_enable = ael1006_intr_enable,
193 .intr_disable = ael1006_intr_disable,
194 .intr_clear = ael1006_intr_clear,
195 .intr_handler = ael1006_intr_handler,
196 .get_link_status = ael100x_get_link_status,
197 .power_down = ael1006_power_down,
200 int t3_qt2045_phy_prep(struct cphy *phy, struct adapter *adapter,
201 int phy_addr, const struct mdio_ops *mdio_ops)
205 cphy_init(phy, adapter, phy_addr, &qt2045_ops, mdio_ops,
206 SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_TP,
210 * Some cards where the PHY is supposed to be at address 0 actually
213 if (!phy_addr && !mdio_read(phy, MDIO_DEV_PMA_PMD, MII_BMSR, &stat) &&
219 static int xaui_direct_reset(struct cphy *phy, int wait)
224 static int xaui_direct_get_link_status(struct cphy *phy, int *link_ok,
225 int *speed, int *duplex, int *fc)
230 status = t3_read_reg(phy->adapter,
231 XGM_REG(A_XGM_SERDES_STAT0, phy->addr)) |
232 t3_read_reg(phy->adapter,
233 XGM_REG(A_XGM_SERDES_STAT1, phy->addr)) |
234 t3_read_reg(phy->adapter,
235 XGM_REG(A_XGM_SERDES_STAT2, phy->addr)) |
236 t3_read_reg(phy->adapter,
237 XGM_REG(A_XGM_SERDES_STAT3, phy->addr));
238 *link_ok = !(status & F_LOWSIG0);
241 *speed = SPEED_10000;
243 *duplex = DUPLEX_FULL;
247 static int xaui_direct_power_down(struct cphy *phy, int enable)
252 static struct cphy_ops xaui_direct_ops = {
253 .reset = xaui_direct_reset,
254 .intr_enable = ael1002_intr_noop,
255 .intr_disable = ael1002_intr_noop,
256 .intr_clear = ael1002_intr_noop,
257 .intr_handler = ael1002_intr_noop,
258 .get_link_status = xaui_direct_get_link_status,
259 .power_down = xaui_direct_power_down,
262 int t3_xaui_direct_phy_prep(struct cphy *phy, struct adapter *adapter,
263 int phy_addr, const struct mdio_ops *mdio_ops)
265 cphy_init(phy, adapter, phy_addr, &xaui_direct_ops, mdio_ops,
266 SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_TP,