1 /* D-Link DL2000-based Gigabit Ethernet Adapter Linux driver */
3 Copyright (c) 2001, 2002 by D-Link Corporation
4 Written by Edward Peng.<edward_peng@dlink.com.tw>
5 Created 03-May-2001, base on Linux' sundance.c.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
13 #define DRV_NAME "DL2000/TC902x-based linux driver"
14 #define DRV_VERSION "v1.19"
15 #define DRV_RELDATE "2007/08/12"
17 #include <linux/dma-mapping.h>
19 static char version[] __devinitdata =
20 KERN_INFO DRV_NAME " " DRV_VERSION " " DRV_RELDATE "\n";
22 static int mtu[MAX_UNITS];
23 static int vlan[MAX_UNITS];
24 static int jumbo[MAX_UNITS];
25 static char *media[MAX_UNITS];
26 static int tx_flow=-1;
27 static int rx_flow=-1;
28 static int copy_thresh;
29 static int rx_coalesce=10; /* Rx frame count each interrupt */
30 static int rx_timeout=200; /* Rx DMA wait time in 640ns increments */
31 static int tx_coalesce=16; /* HW xmit count each TxDMAComplete */
34 MODULE_AUTHOR ("Edward Peng");
35 MODULE_DESCRIPTION ("D-Link DL2000-based Gigabit Ethernet Adapter");
36 MODULE_LICENSE("GPL");
37 module_param_array(mtu, int, NULL, 0);
38 module_param_array(media, charp, NULL, 0);
39 module_param_array(vlan, int, NULL, 0);
40 module_param_array(jumbo, int, NULL, 0);
41 module_param(tx_flow, int, 0);
42 module_param(rx_flow, int, 0);
43 module_param(copy_thresh, int, 0);
44 module_param(rx_coalesce, int, 0); /* Rx frame count each interrupt */
45 module_param(rx_timeout, int, 0); /* Rx DMA wait time in 64ns increments */
46 module_param(tx_coalesce, int, 0); /* HW xmit count each TxDMAComplete */
49 /* Enable the default interrupts */
50 #define DEFAULT_INTR (RxDMAComplete | HostError | IntRequested | TxDMAComplete| \
51 UpdateStats | LinkEvent)
53 writew(DEFAULT_INTR, ioaddr + IntEnable)
55 static const int max_intrloop = 50;
56 static const int multicast_filter_limit = 0x40;
58 static int rio_open (struct net_device *dev);
59 static void rio_timer (unsigned long data);
60 static void rio_tx_timeout (struct net_device *dev);
61 static void alloc_list (struct net_device *dev);
62 static netdev_tx_t start_xmit (struct sk_buff *skb, struct net_device *dev);
63 static irqreturn_t rio_interrupt (int irq, void *dev_instance);
64 static void rio_free_tx (struct net_device *dev, int irq);
65 static void tx_error (struct net_device *dev, int tx_status);
66 static int receive_packet (struct net_device *dev);
67 static void rio_error (struct net_device *dev, int int_status);
68 static int change_mtu (struct net_device *dev, int new_mtu);
69 static void set_multicast (struct net_device *dev);
70 static struct net_device_stats *get_stats (struct net_device *dev);
71 static int clear_stats (struct net_device *dev);
72 static int rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd);
73 static int rio_close (struct net_device *dev);
74 static int find_miiphy (struct net_device *dev);
75 static int parse_eeprom (struct net_device *dev);
76 static int read_eeprom (long ioaddr, int eep_addr);
77 static int mii_wait_link (struct net_device *dev, int wait);
78 static int mii_set_media (struct net_device *dev);
79 static int mii_get_media (struct net_device *dev);
80 static int mii_set_media_pcs (struct net_device *dev);
81 static int mii_get_media_pcs (struct net_device *dev);
82 static int mii_read (struct net_device *dev, int phy_addr, int reg_num);
83 static int mii_write (struct net_device *dev, int phy_addr, int reg_num,
86 static const struct ethtool_ops ethtool_ops;
88 static const struct net_device_ops netdev_ops = {
90 .ndo_start_xmit = start_xmit,
91 .ndo_stop = rio_close,
92 .ndo_get_stats = get_stats,
93 .ndo_validate_addr = eth_validate_addr,
94 .ndo_set_mac_address = eth_mac_addr,
95 .ndo_set_multicast_list = set_multicast,
96 .ndo_do_ioctl = rio_ioctl,
97 .ndo_tx_timeout = rio_tx_timeout,
98 .ndo_change_mtu = change_mtu,
102 rio_probe1 (struct pci_dev *pdev, const struct pci_device_id *ent)
104 struct net_device *dev;
105 struct netdev_private *np;
107 int chip_idx = ent->driver_data;
110 static int version_printed;
114 if (!version_printed++)
115 printk ("%s", version);
117 err = pci_enable_device (pdev);
122 err = pci_request_regions (pdev, "dl2k");
124 goto err_out_disable;
126 pci_set_master (pdev);
127 dev = alloc_etherdev (sizeof (*np));
132 SET_NETDEV_DEV(dev, &pdev->dev);
135 ioaddr = pci_resource_start (pdev, 1);
136 ioaddr = (long) ioremap (ioaddr, RIO_IO_SIZE);
142 ioaddr = pci_resource_start (pdev, 0);
144 dev->base_addr = ioaddr;
146 np = netdev_priv(dev);
147 np->chip_id = chip_idx;
149 spin_lock_init (&np->tx_lock);
150 spin_lock_init (&np->rx_lock);
152 /* Parse manual configuration */
155 if (card_idx < MAX_UNITS) {
156 if (media[card_idx] != NULL) {
158 if (strcmp (media[card_idx], "auto") == 0 ||
159 strcmp (media[card_idx], "autosense") == 0 ||
160 strcmp (media[card_idx], "0") == 0 ) {
162 } else if (strcmp (media[card_idx], "100mbps_fd") == 0 ||
163 strcmp (media[card_idx], "4") == 0) {
166 } else if (strcmp (media[card_idx], "100mbps_hd") == 0 ||
167 strcmp (media[card_idx], "3") == 0) {
170 } else if (strcmp (media[card_idx], "10mbps_fd") == 0 ||
171 strcmp (media[card_idx], "2") == 0) {
174 } else if (strcmp (media[card_idx], "10mbps_hd") == 0 ||
175 strcmp (media[card_idx], "1") == 0) {
178 } else if (strcmp (media[card_idx], "1000mbps_fd") == 0 ||
179 strcmp (media[card_idx], "6") == 0) {
182 } else if (strcmp (media[card_idx], "1000mbps_hd") == 0 ||
183 strcmp (media[card_idx], "5") == 0) {
190 if (jumbo[card_idx] != 0) {
192 dev->mtu = MAX_JUMBO;
195 if (mtu[card_idx] > 0 && mtu[card_idx] < PACKET_SIZE)
196 dev->mtu = mtu[card_idx];
198 np->vlan = (vlan[card_idx] > 0 && vlan[card_idx] < 4096) ?
200 if (rx_coalesce > 0 && rx_timeout > 0) {
201 np->rx_coalesce = rx_coalesce;
202 np->rx_timeout = rx_timeout;
205 np->tx_flow = (tx_flow == 0) ? 0 : 1;
206 np->rx_flow = (rx_flow == 0) ? 0 : 1;
210 else if (tx_coalesce > TX_RING_SIZE-1)
211 tx_coalesce = TX_RING_SIZE - 1;
213 dev->netdev_ops = &netdev_ops;
214 dev->watchdog_timeo = TX_TIMEOUT;
215 SET_ETHTOOL_OPS(dev, ðtool_ops);
217 dev->features = NETIF_F_IP_CSUM;
219 pci_set_drvdata (pdev, dev);
221 ring_space = pci_alloc_consistent (pdev, TX_TOTAL_SIZE, &ring_dma);
223 goto err_out_iounmap;
224 np->tx_ring = (struct netdev_desc *) ring_space;
225 np->tx_ring_dma = ring_dma;
227 ring_space = pci_alloc_consistent (pdev, RX_TOTAL_SIZE, &ring_dma);
229 goto err_out_unmap_tx;
230 np->rx_ring = (struct netdev_desc *) ring_space;
231 np->rx_ring_dma = ring_dma;
233 /* Parse eeprom data */
236 /* Find PHY address */
237 err = find_miiphy (dev);
239 goto err_out_unmap_rx;
242 np->phy_media = (readw(ioaddr + ASICCtrl) & PhyMedia) ? 1 : 0;
244 /* Set media and reset PHY */
246 /* default Auto-Negotiation for fiber deivices */
247 if (np->an_enable == 2) {
250 mii_set_media_pcs (dev);
252 /* Auto-Negotiation is mandatory for 1000BASE-T,
253 IEEE 802.3ab Annex 28D page 14 */
254 if (np->speed == 1000)
259 err = register_netdev (dev);
261 goto err_out_unmap_rx;
265 printk (KERN_INFO "%s: %s, %pM, IRQ %d\n",
266 dev->name, np->name, dev->dev_addr, irq);
268 printk(KERN_INFO "tx_coalesce:\t%d packets\n",
272 "rx_coalesce:\t%d packets\n"
273 "rx_timeout: \t%d ns\n",
274 np->rx_coalesce, np->rx_timeout*640);
276 printk(KERN_INFO "vlan(id):\t%d\n", np->vlan);
280 pci_free_consistent (pdev, RX_TOTAL_SIZE, np->rx_ring, np->rx_ring_dma);
282 pci_free_consistent (pdev, TX_TOTAL_SIZE, np->tx_ring, np->tx_ring_dma);
285 iounmap ((void *) ioaddr);
292 pci_release_regions (pdev);
295 pci_disable_device (pdev);
300 find_miiphy (struct net_device *dev)
302 int i, phy_found = 0;
303 struct netdev_private *np;
305 np = netdev_priv(dev);
306 ioaddr = dev->base_addr;
309 for (i = 31; i >= 0; i--) {
310 int mii_status = mii_read (dev, i, 1);
311 if (mii_status != 0xffff && mii_status != 0x0000) {
317 printk (KERN_ERR "%s: No MII PHY found!\n", dev->name);
324 parse_eeprom (struct net_device *dev)
327 long ioaddr = dev->base_addr;
331 PSROM_t psrom = (PSROM_t) sromdata;
332 struct netdev_private *np = netdev_priv(dev);
337 ioaddr = pci_resource_start (np->pdev, 0);
340 for (i = 0; i < 128; i++) {
341 ((__le16 *) sromdata)[i] = cpu_to_le16(read_eeprom (ioaddr, i));
344 ioaddr = dev->base_addr;
346 if (np->pdev->vendor == PCI_VENDOR_ID_DLINK) { /* D-Link Only */
348 crc = ~ether_crc_le (256 - 4, sromdata);
349 if (psrom->crc != crc) {
350 printk (KERN_ERR "%s: EEPROM data CRC error.\n",
356 /* Set MAC address */
357 for (i = 0; i < 6; i++)
358 dev->dev_addr[i] = psrom->mac_addr[i];
360 if (np->pdev->vendor != PCI_VENDOR_ID_DLINK) {
364 /* Parse Software Information Block */
366 psib = (u8 *) sromdata;
370 if ((cid == 0 && next == 0) || (cid == 0xff && next == 0xff)) {
371 printk (KERN_ERR "Cell data error\n");
375 case 0: /* Format version */
377 case 1: /* End of cell */
379 case 2: /* Duplex Polarity */
380 np->duplex_polarity = psib[i];
381 writeb (readb (ioaddr + PhyCtrl) | psib[i],
384 case 3: /* Wake Polarity */
385 np->wake_polarity = psib[i];
387 case 9: /* Adapter description */
388 j = (next - i > 255) ? 255 : next - i;
389 memcpy (np->name, &(psib[i]), j);
395 case 8: /* Reversed */
397 default: /* Unknown cell */
407 rio_open (struct net_device *dev)
409 struct netdev_private *np = netdev_priv(dev);
410 long ioaddr = dev->base_addr;
414 i = request_irq (dev->irq, rio_interrupt, IRQF_SHARED, dev->name, dev);
418 /* Reset all logic functions */
419 writew (GlobalReset | DMAReset | FIFOReset | NetworkReset | HostReset,
420 ioaddr + ASICCtrl + 2);
423 /* DebugCtrl bit 4, 5, 9 must set */
424 writel (readl (ioaddr + DebugCtrl) | 0x0230, ioaddr + DebugCtrl);
428 writew (MAX_JUMBO+14, ioaddr + MaxFrameSize);
432 /* Get station address */
433 for (i = 0; i < 6; i++)
434 writeb (dev->dev_addr[i], ioaddr + StationAddr0 + i);
438 writel (np->rx_coalesce | np->rx_timeout << 16,
439 ioaddr + RxDMAIntCtrl);
441 /* Set RIO to poll every N*320nsec. */
442 writeb (0x20, ioaddr + RxDMAPollPeriod);
443 writeb (0xff, ioaddr + TxDMAPollPeriod);
444 writeb (0x30, ioaddr + RxDMABurstThresh);
445 writeb (0x30, ioaddr + RxDMAUrgentThresh);
446 writel (0x0007ffff, ioaddr + RmonStatMask);
447 /* clear statistics */
452 /* priority field in RxDMAIntCtrl */
453 writel (readl(ioaddr + RxDMAIntCtrl) | 0x7 << 10,
454 ioaddr + RxDMAIntCtrl);
456 writew (np->vlan, ioaddr + VLANId);
457 /* Length/Type should be 0x8100 */
458 writel (0x8100 << 16 | np->vlan, ioaddr + VLANTag);
459 /* Enable AutoVLANuntagging, but disable AutoVLANtagging.
460 VLAN information tagged by TFC' VID, CFI fields. */
461 writel (readl (ioaddr + MACCtrl) | AutoVLANuntagging,
465 init_timer (&np->timer);
466 np->timer.expires = jiffies + 1*HZ;
467 np->timer.data = (unsigned long) dev;
468 np->timer.function = &rio_timer;
469 add_timer (&np->timer);
472 writel (readl (ioaddr + MACCtrl) | StatsEnable | RxEnable | TxEnable,
476 macctrl |= (np->vlan) ? AutoVLANuntagging : 0;
477 macctrl |= (np->full_duplex) ? DuplexSelect : 0;
478 macctrl |= (np->tx_flow) ? TxFlowControlEnable : 0;
479 macctrl |= (np->rx_flow) ? RxFlowControlEnable : 0;
480 writew(macctrl, ioaddr + MACCtrl);
482 netif_start_queue (dev);
484 /* Enable default interrupts */
490 rio_timer (unsigned long data)
492 struct net_device *dev = (struct net_device *)data;
493 struct netdev_private *np = netdev_priv(dev);
495 int next_tick = 1*HZ;
498 spin_lock_irqsave(&np->rx_lock, flags);
499 /* Recover rx ring exhausted error */
500 if (np->cur_rx - np->old_rx >= RX_RING_SIZE) {
501 printk(KERN_INFO "Try to recover rx ring exhausted...\n");
502 /* Re-allocate skbuffs to fill the descriptor ring */
503 for (; np->cur_rx - np->old_rx > 0; np->old_rx++) {
505 entry = np->old_rx % RX_RING_SIZE;
506 /* Dropped packets don't need to re-allocate */
507 if (np->rx_skbuff[entry] == NULL) {
508 skb = netdev_alloc_skb_ip_align(dev,
511 np->rx_ring[entry].fraginfo = 0;
513 "%s: Still unable to re-allocate Rx skbuff.#%d\n",
517 np->rx_skbuff[entry] = skb;
518 np->rx_ring[entry].fraginfo =
519 cpu_to_le64 (pci_map_single
520 (np->pdev, skb->data, np->rx_buf_sz,
521 PCI_DMA_FROMDEVICE));
523 np->rx_ring[entry].fraginfo |=
524 cpu_to_le64((u64)np->rx_buf_sz << 48);
525 np->rx_ring[entry].status = 0;
528 spin_unlock_irqrestore (&np->rx_lock, flags);
529 np->timer.expires = jiffies + next_tick;
530 add_timer(&np->timer);
534 rio_tx_timeout (struct net_device *dev)
536 long ioaddr = dev->base_addr;
538 printk (KERN_INFO "%s: Tx timed out (%4.4x), is buffer full?\n",
539 dev->name, readl (ioaddr + TxStatus));
542 dev->trans_start = jiffies; /* prevent tx timeout */
545 /* allocate and initialize Tx and Rx descriptors */
547 alloc_list (struct net_device *dev)
549 struct netdev_private *np = netdev_priv(dev);
552 np->cur_rx = np->cur_tx = 0;
553 np->old_rx = np->old_tx = 0;
554 np->rx_buf_sz = (dev->mtu <= 1500 ? PACKET_SIZE : dev->mtu + 32);
556 /* Initialize Tx descriptors, TFDListPtr leaves in start_xmit(). */
557 for (i = 0; i < TX_RING_SIZE; i++) {
558 np->tx_skbuff[i] = NULL;
559 np->tx_ring[i].status = cpu_to_le64 (TFDDone);
560 np->tx_ring[i].next_desc = cpu_to_le64 (np->tx_ring_dma +
561 ((i+1)%TX_RING_SIZE) *
562 sizeof (struct netdev_desc));
565 /* Initialize Rx descriptors */
566 for (i = 0; i < RX_RING_SIZE; i++) {
567 np->rx_ring[i].next_desc = cpu_to_le64 (np->rx_ring_dma +
568 ((i + 1) % RX_RING_SIZE) *
569 sizeof (struct netdev_desc));
570 np->rx_ring[i].status = 0;
571 np->rx_ring[i].fraginfo = 0;
572 np->rx_skbuff[i] = NULL;
575 /* Allocate the rx buffers */
576 for (i = 0; i < RX_RING_SIZE; i++) {
577 /* Allocated fixed size of skbuff */
580 skb = netdev_alloc_skb_ip_align(dev, np->rx_buf_sz);
581 np->rx_skbuff[i] = skb;
584 "%s: alloc_list: allocate Rx buffer error! ",
588 /* Rubicon now supports 40 bits of addressing space. */
589 np->rx_ring[i].fraginfo =
590 cpu_to_le64 ( pci_map_single (
591 np->pdev, skb->data, np->rx_buf_sz,
592 PCI_DMA_FROMDEVICE));
593 np->rx_ring[i].fraginfo |= cpu_to_le64((u64)np->rx_buf_sz << 48);
597 writel (np->rx_ring_dma, dev->base_addr + RFDListPtr0);
598 writel (0, dev->base_addr + RFDListPtr1);
602 start_xmit (struct sk_buff *skb, struct net_device *dev)
604 struct netdev_private *np = netdev_priv(dev);
605 struct netdev_desc *txdesc;
608 u64 tfc_vlan_tag = 0;
610 if (np->link_status == 0) { /* Link Down */
614 ioaddr = dev->base_addr;
615 entry = np->cur_tx % TX_RING_SIZE;
616 np->tx_skbuff[entry] = skb;
617 txdesc = &np->tx_ring[entry];
620 if (skb->ip_summed == CHECKSUM_PARTIAL) {
622 cpu_to_le64 (TCPChecksumEnable | UDPChecksumEnable |
627 tfc_vlan_tag = VLANTagInsert |
628 ((u64)np->vlan << 32) |
629 ((u64)skb->priority << 45);
631 txdesc->fraginfo = cpu_to_le64 (pci_map_single (np->pdev, skb->data,
634 txdesc->fraginfo |= cpu_to_le64((u64)skb->len << 48);
636 /* DL2K bug: DMA fails to get next descriptor ptr in 10Mbps mode
637 * Work around: Always use 1 descriptor in 10Mbps mode */
638 if (entry % np->tx_coalesce == 0 || np->speed == 10)
639 txdesc->status = cpu_to_le64 (entry | tfc_vlan_tag |
642 (1 << FragCountShift));
644 txdesc->status = cpu_to_le64 (entry | tfc_vlan_tag |
646 (1 << FragCountShift));
649 writel (readl (ioaddr + DMACtrl) | 0x00001000, ioaddr + DMACtrl);
651 writel(10000, ioaddr + CountDown);
652 np->cur_tx = (np->cur_tx + 1) % TX_RING_SIZE;
653 if ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE
654 < TX_QUEUE_LEN - 1 && np->speed != 10) {
656 } else if (!netif_queue_stopped(dev)) {
657 netif_stop_queue (dev);
660 /* The first TFDListPtr */
661 if (readl (dev->base_addr + TFDListPtr0) == 0) {
662 writel (np->tx_ring_dma + entry * sizeof (struct netdev_desc),
663 dev->base_addr + TFDListPtr0);
664 writel (0, dev->base_addr + TFDListPtr1);
671 rio_interrupt (int irq, void *dev_instance)
673 struct net_device *dev = dev_instance;
674 struct netdev_private *np;
677 int cnt = max_intrloop;
680 ioaddr = dev->base_addr;
681 np = netdev_priv(dev);
683 int_status = readw (ioaddr + IntStatus);
684 writew (int_status, ioaddr + IntStatus);
685 int_status &= DEFAULT_INTR;
686 if (int_status == 0 || --cnt < 0)
689 /* Processing received packets */
690 if (int_status & RxDMAComplete)
691 receive_packet (dev);
692 /* TxDMAComplete interrupt */
693 if ((int_status & (TxDMAComplete|IntRequested))) {
695 tx_status = readl (ioaddr + TxStatus);
696 if (tx_status & 0x01)
697 tx_error (dev, tx_status);
698 /* Free used tx skbuffs */
699 rio_free_tx (dev, 1);
702 /* Handle uncommon events */
704 (HostError | LinkEvent | UpdateStats))
705 rio_error (dev, int_status);
707 if (np->cur_tx != np->old_tx)
708 writel (100, ioaddr + CountDown);
709 return IRQ_RETVAL(handled);
712 static inline dma_addr_t desc_to_dma(struct netdev_desc *desc)
714 return le64_to_cpu(desc->fraginfo) & DMA_BIT_MASK(48);
718 rio_free_tx (struct net_device *dev, int irq)
720 struct netdev_private *np = netdev_priv(dev);
721 int entry = np->old_tx % TX_RING_SIZE;
723 unsigned long flag = 0;
726 spin_lock(&np->tx_lock);
728 spin_lock_irqsave(&np->tx_lock, flag);
730 /* Free used tx skbuffs */
731 while (entry != np->cur_tx) {
734 if (!(np->tx_ring[entry].status & cpu_to_le64(TFDDone)))
736 skb = np->tx_skbuff[entry];
737 pci_unmap_single (np->pdev,
738 desc_to_dma(&np->tx_ring[entry]),
739 skb->len, PCI_DMA_TODEVICE);
741 dev_kfree_skb_irq (skb);
745 np->tx_skbuff[entry] = NULL;
746 entry = (entry + 1) % TX_RING_SIZE;
750 spin_unlock(&np->tx_lock);
752 spin_unlock_irqrestore(&np->tx_lock, flag);
755 /* If the ring is no longer full, clear tx_full and
756 call netif_wake_queue() */
758 if (netif_queue_stopped(dev) &&
759 ((np->cur_tx - np->old_tx + TX_RING_SIZE) % TX_RING_SIZE
760 < TX_QUEUE_LEN - 1 || np->speed == 10)) {
761 netif_wake_queue (dev);
766 tx_error (struct net_device *dev, int tx_status)
768 struct netdev_private *np;
769 long ioaddr = dev->base_addr;
773 np = netdev_priv(dev);
775 frame_id = (tx_status & 0xffff0000);
776 printk (KERN_ERR "%s: Transmit error, TxStatus %4.4x, FrameId %d.\n",
777 dev->name, tx_status, frame_id);
778 np->stats.tx_errors++;
779 /* Ttransmit Underrun */
780 if (tx_status & 0x10) {
781 np->stats.tx_fifo_errors++;
782 writew (readw (ioaddr + TxStartThresh) + 0x10,
783 ioaddr + TxStartThresh);
784 /* Transmit Underrun need to set TxReset, DMARest, FIFOReset */
785 writew (TxReset | DMAReset | FIFOReset | NetworkReset,
786 ioaddr + ASICCtrl + 2);
787 /* Wait for ResetBusy bit clear */
788 for (i = 50; i > 0; i--) {
789 if ((readw (ioaddr + ASICCtrl + 2) & ResetBusy) == 0)
793 rio_free_tx (dev, 1);
794 /* Reset TFDListPtr */
795 writel (np->tx_ring_dma +
796 np->old_tx * sizeof (struct netdev_desc),
797 dev->base_addr + TFDListPtr0);
798 writel (0, dev->base_addr + TFDListPtr1);
800 /* Let TxStartThresh stay default value */
803 if (tx_status & 0x04) {
804 np->stats.tx_fifo_errors++;
805 /* TxReset and clear FIFO */
806 writew (TxReset | FIFOReset, ioaddr + ASICCtrl + 2);
807 /* Wait reset done */
808 for (i = 50; i > 0; i--) {
809 if ((readw (ioaddr + ASICCtrl + 2) & ResetBusy) == 0)
813 /* Let TxStartThresh stay default value */
815 /* Maximum Collisions */
817 if (tx_status & 0x08)
818 np->stats.collisions16++;
820 if (tx_status & 0x08)
821 np->stats.collisions++;
824 writel (readw (dev->base_addr + MACCtrl) | TxEnable, ioaddr + MACCtrl);
828 receive_packet (struct net_device *dev)
830 struct netdev_private *np = netdev_priv(dev);
831 int entry = np->cur_rx % RX_RING_SIZE;
834 /* If RFDDone, FrameStart and FrameEnd set, there is a new packet in. */
836 struct netdev_desc *desc = &np->rx_ring[entry];
840 if (!(desc->status & cpu_to_le64(RFDDone)) ||
841 !(desc->status & cpu_to_le64(FrameStart)) ||
842 !(desc->status & cpu_to_le64(FrameEnd)))
845 /* Chip omits the CRC. */
846 frame_status = le64_to_cpu(desc->status);
847 pkt_len = frame_status & 0xffff;
850 /* Update rx error statistics, drop packet. */
851 if (frame_status & RFS_Errors) {
852 np->stats.rx_errors++;
853 if (frame_status & (RxRuntFrame | RxLengthError))
854 np->stats.rx_length_errors++;
855 if (frame_status & RxFCSError)
856 np->stats.rx_crc_errors++;
857 if (frame_status & RxAlignmentError && np->speed != 1000)
858 np->stats.rx_frame_errors++;
859 if (frame_status & RxFIFOOverrun)
860 np->stats.rx_fifo_errors++;
864 /* Small skbuffs for short packets */
865 if (pkt_len > copy_thresh) {
866 pci_unmap_single (np->pdev,
870 skb_put (skb = np->rx_skbuff[entry], pkt_len);
871 np->rx_skbuff[entry] = NULL;
872 } else if ((skb = netdev_alloc_skb_ip_align(dev, pkt_len))) {
873 pci_dma_sync_single_for_cpu(np->pdev,
877 skb_copy_to_linear_data (skb,
878 np->rx_skbuff[entry]->data,
880 skb_put (skb, pkt_len);
881 pci_dma_sync_single_for_device(np->pdev,
886 skb->protocol = eth_type_trans (skb, dev);
888 /* Checksum done by hw, but csum value unavailable. */
889 if (np->pdev->pci_rev_id >= 0x0c &&
890 !(frame_status & (TCPError | UDPError | IPError))) {
891 skb->ip_summed = CHECKSUM_UNNECESSARY;
896 entry = (entry + 1) % RX_RING_SIZE;
898 spin_lock(&np->rx_lock);
900 /* Re-allocate skbuffs to fill the descriptor ring */
902 while (entry != np->cur_rx) {
904 /* Dropped packets don't need to re-allocate */
905 if (np->rx_skbuff[entry] == NULL) {
906 skb = netdev_alloc_skb_ip_align(dev, np->rx_buf_sz);
908 np->rx_ring[entry].fraginfo = 0;
910 "%s: receive_packet: "
911 "Unable to re-allocate Rx skbuff.#%d\n",
915 np->rx_skbuff[entry] = skb;
916 np->rx_ring[entry].fraginfo =
917 cpu_to_le64 (pci_map_single
918 (np->pdev, skb->data, np->rx_buf_sz,
919 PCI_DMA_FROMDEVICE));
921 np->rx_ring[entry].fraginfo |=
922 cpu_to_le64((u64)np->rx_buf_sz << 48);
923 np->rx_ring[entry].status = 0;
924 entry = (entry + 1) % RX_RING_SIZE;
927 spin_unlock(&np->rx_lock);
932 rio_error (struct net_device *dev, int int_status)
934 long ioaddr = dev->base_addr;
935 struct netdev_private *np = netdev_priv(dev);
938 /* Link change event */
939 if (int_status & LinkEvent) {
940 if (mii_wait_link (dev, 10) == 0) {
941 printk (KERN_INFO "%s: Link up\n", dev->name);
943 mii_get_media_pcs (dev);
946 if (np->speed == 1000)
947 np->tx_coalesce = tx_coalesce;
951 macctrl |= (np->vlan) ? AutoVLANuntagging : 0;
952 macctrl |= (np->full_duplex) ? DuplexSelect : 0;
953 macctrl |= (np->tx_flow) ?
954 TxFlowControlEnable : 0;
955 macctrl |= (np->rx_flow) ?
956 RxFlowControlEnable : 0;
957 writew(macctrl, ioaddr + MACCtrl);
959 netif_carrier_on(dev);
961 printk (KERN_INFO "%s: Link off\n", dev->name);
963 netif_carrier_off(dev);
967 /* UpdateStats statistics registers */
968 if (int_status & UpdateStats) {
972 /* PCI Error, a catastronphic error related to the bus interface
973 occurs, set GlobalReset and HostReset to reset. */
974 if (int_status & HostError) {
975 printk (KERN_ERR "%s: HostError! IntStatus %4.4x.\n",
976 dev->name, int_status);
977 writew (GlobalReset | HostReset, ioaddr + ASICCtrl + 2);
982 static struct net_device_stats *
983 get_stats (struct net_device *dev)
985 long ioaddr = dev->base_addr;
986 struct netdev_private *np = netdev_priv(dev);
990 unsigned int stat_reg;
992 /* All statistics registers need to be acknowledged,
993 else statistic overflow could cause problems */
995 np->stats.rx_packets += readl (ioaddr + FramesRcvOk);
996 np->stats.tx_packets += readl (ioaddr + FramesXmtOk);
997 np->stats.rx_bytes += readl (ioaddr + OctetRcvOk);
998 np->stats.tx_bytes += readl (ioaddr + OctetXmtOk);
1000 np->stats.multicast = readl (ioaddr + McstFramesRcvdOk);
1001 np->stats.collisions += readl (ioaddr + SingleColFrames)
1002 + readl (ioaddr + MultiColFrames);
1004 /* detailed tx errors */
1005 stat_reg = readw (ioaddr + FramesAbortXSColls);
1006 np->stats.tx_aborted_errors += stat_reg;
1007 np->stats.tx_errors += stat_reg;
1009 stat_reg = readw (ioaddr + CarrierSenseErrors);
1010 np->stats.tx_carrier_errors += stat_reg;
1011 np->stats.tx_errors += stat_reg;
1013 /* Clear all other statistic register. */
1014 readl (ioaddr + McstOctetXmtOk);
1015 readw (ioaddr + BcstFramesXmtdOk);
1016 readl (ioaddr + McstFramesXmtdOk);
1017 readw (ioaddr + BcstFramesRcvdOk);
1018 readw (ioaddr + MacControlFramesRcvd);
1019 readw (ioaddr + FrameTooLongErrors);
1020 readw (ioaddr + InRangeLengthErrors);
1021 readw (ioaddr + FramesCheckSeqErrors);
1022 readw (ioaddr + FramesLostRxErrors);
1023 readl (ioaddr + McstOctetXmtOk);
1024 readl (ioaddr + BcstOctetXmtOk);
1025 readl (ioaddr + McstFramesXmtdOk);
1026 readl (ioaddr + FramesWDeferredXmt);
1027 readl (ioaddr + LateCollisions);
1028 readw (ioaddr + BcstFramesXmtdOk);
1029 readw (ioaddr + MacControlFramesXmtd);
1030 readw (ioaddr + FramesWEXDeferal);
1033 for (i = 0x100; i <= 0x150; i += 4)
1036 readw (ioaddr + TxJumboFrames);
1037 readw (ioaddr + RxJumboFrames);
1038 readw (ioaddr + TCPCheckSumErrors);
1039 readw (ioaddr + UDPCheckSumErrors);
1040 readw (ioaddr + IPCheckSumErrors);
1045 clear_stats (struct net_device *dev)
1047 long ioaddr = dev->base_addr;
1052 /* All statistics registers need to be acknowledged,
1053 else statistic overflow could cause problems */
1054 readl (ioaddr + FramesRcvOk);
1055 readl (ioaddr + FramesXmtOk);
1056 readl (ioaddr + OctetRcvOk);
1057 readl (ioaddr + OctetXmtOk);
1059 readl (ioaddr + McstFramesRcvdOk);
1060 readl (ioaddr + SingleColFrames);
1061 readl (ioaddr + MultiColFrames);
1062 readl (ioaddr + LateCollisions);
1063 /* detailed rx errors */
1064 readw (ioaddr + FrameTooLongErrors);
1065 readw (ioaddr + InRangeLengthErrors);
1066 readw (ioaddr + FramesCheckSeqErrors);
1067 readw (ioaddr + FramesLostRxErrors);
1069 /* detailed tx errors */
1070 readw (ioaddr + FramesAbortXSColls);
1071 readw (ioaddr + CarrierSenseErrors);
1073 /* Clear all other statistic register. */
1074 readl (ioaddr + McstOctetXmtOk);
1075 readw (ioaddr + BcstFramesXmtdOk);
1076 readl (ioaddr + McstFramesXmtdOk);
1077 readw (ioaddr + BcstFramesRcvdOk);
1078 readw (ioaddr + MacControlFramesRcvd);
1079 readl (ioaddr + McstOctetXmtOk);
1080 readl (ioaddr + BcstOctetXmtOk);
1081 readl (ioaddr + McstFramesXmtdOk);
1082 readl (ioaddr + FramesWDeferredXmt);
1083 readw (ioaddr + BcstFramesXmtdOk);
1084 readw (ioaddr + MacControlFramesXmtd);
1085 readw (ioaddr + FramesWEXDeferal);
1087 for (i = 0x100; i <= 0x150; i += 4)
1090 readw (ioaddr + TxJumboFrames);
1091 readw (ioaddr + RxJumboFrames);
1092 readw (ioaddr + TCPCheckSumErrors);
1093 readw (ioaddr + UDPCheckSumErrors);
1094 readw (ioaddr + IPCheckSumErrors);
1100 change_mtu (struct net_device *dev, int new_mtu)
1102 struct netdev_private *np = netdev_priv(dev);
1103 int max = (np->jumbo) ? MAX_JUMBO : 1536;
1105 if ((new_mtu < 68) || (new_mtu > max)) {
1115 set_multicast (struct net_device *dev)
1117 long ioaddr = dev->base_addr;
1120 struct netdev_private *np = netdev_priv(dev);
1122 hash_table[0] = hash_table[1] = 0;
1123 /* RxFlowcontrol DA: 01-80-C2-00-00-01. Hash index=0x39 */
1124 hash_table[1] |= 0x02000000;
1125 if (dev->flags & IFF_PROMISC) {
1126 /* Receive all frames promiscuously. */
1127 rx_mode = ReceiveAllFrames;
1128 } else if ((dev->flags & IFF_ALLMULTI) ||
1129 (netdev_mc_count(dev) > multicast_filter_limit)) {
1130 /* Receive broadcast and multicast frames */
1131 rx_mode = ReceiveBroadcast | ReceiveMulticast | ReceiveUnicast;
1132 } else if (!netdev_mc_empty(dev)) {
1133 struct netdev_hw_addr *ha;
1134 /* Receive broadcast frames and multicast frames filtering
1137 ReceiveBroadcast | ReceiveMulticastHash | ReceiveUnicast;
1138 netdev_for_each_mc_addr(ha, dev) {
1140 int crc = ether_crc_le(ETH_ALEN, ha->addr);
1141 /* The inverted high significant 6 bits of CRC are
1142 used as an index to hashtable */
1143 for (bit = 0; bit < 6; bit++)
1144 if (crc & (1 << (31 - bit)))
1145 index |= (1 << bit);
1146 hash_table[index / 32] |= (1 << (index % 32));
1149 rx_mode = ReceiveBroadcast | ReceiveUnicast;
1152 /* ReceiveVLANMatch field in ReceiveMode */
1153 rx_mode |= ReceiveVLANMatch;
1156 writel (hash_table[0], ioaddr + HashTable0);
1157 writel (hash_table[1], ioaddr + HashTable1);
1158 writew (rx_mode, ioaddr + ReceiveMode);
1161 static void rio_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1163 struct netdev_private *np = netdev_priv(dev);
1164 strcpy(info->driver, "dl2k");
1165 strcpy(info->version, DRV_VERSION);
1166 strcpy(info->bus_info, pci_name(np->pdev));
1169 static int rio_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1171 struct netdev_private *np = netdev_priv(dev);
1172 if (np->phy_media) {
1174 cmd->supported = SUPPORTED_Autoneg | SUPPORTED_FIBRE;
1175 cmd->advertising= ADVERTISED_Autoneg | ADVERTISED_FIBRE;
1176 cmd->port = PORT_FIBRE;
1177 cmd->transceiver = XCVR_INTERNAL;
1180 cmd->supported = SUPPORTED_10baseT_Half |
1181 SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Half
1182 | SUPPORTED_100baseT_Full | SUPPORTED_1000baseT_Full |
1183 SUPPORTED_Autoneg | SUPPORTED_MII;
1184 cmd->advertising = ADVERTISED_10baseT_Half |
1185 ADVERTISED_10baseT_Full | ADVERTISED_100baseT_Half |
1186 ADVERTISED_100baseT_Full | ADVERTISED_1000baseT_Full|
1187 ADVERTISED_Autoneg | ADVERTISED_MII;
1188 cmd->port = PORT_MII;
1189 cmd->transceiver = XCVR_INTERNAL;
1191 if ( np->link_status ) {
1192 cmd->speed = np->speed;
1193 cmd->duplex = np->full_duplex ? DUPLEX_FULL : DUPLEX_HALF;
1199 cmd->autoneg = AUTONEG_ENABLE;
1201 cmd->autoneg = AUTONEG_DISABLE;
1203 cmd->phy_address = np->phy_addr;
1207 static int rio_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
1209 struct netdev_private *np = netdev_priv(dev);
1210 netif_carrier_off(dev);
1211 if (cmd->autoneg == AUTONEG_ENABLE) {
1221 if (np->speed == 1000) {
1222 cmd->speed = SPEED_100;
1223 cmd->duplex = DUPLEX_FULL;
1224 printk("Warning!! Can't disable Auto negotiation in 1000Mbps, change to Manual 100Mbps, Full duplex.\n");
1226 switch(cmd->speed + cmd->duplex) {
1228 case SPEED_10 + DUPLEX_HALF:
1230 np->full_duplex = 0;
1233 case SPEED_10 + DUPLEX_FULL:
1235 np->full_duplex = 1;
1237 case SPEED_100 + DUPLEX_HALF:
1239 np->full_duplex = 0;
1241 case SPEED_100 + DUPLEX_FULL:
1243 np->full_duplex = 1;
1245 case SPEED_1000 + DUPLEX_HALF:/* not supported */
1246 case SPEED_1000 + DUPLEX_FULL:/* not supported */
1255 static u32 rio_get_link(struct net_device *dev)
1257 struct netdev_private *np = netdev_priv(dev);
1258 return np->link_status;
1261 static const struct ethtool_ops ethtool_ops = {
1262 .get_drvinfo = rio_get_drvinfo,
1263 .get_settings = rio_get_settings,
1264 .set_settings = rio_set_settings,
1265 .get_link = rio_get_link,
1269 rio_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
1272 struct netdev_private *np = netdev_priv(dev);
1273 struct mii_data *miidata = (struct mii_data *) &rq->ifr_ifru;
1275 struct netdev_desc *desc;
1278 phy_addr = np->phy_addr;
1280 case SIOCDEVPRIVATE:
1283 case SIOCDEVPRIVATE + 1:
1284 miidata->out_value = mii_read (dev, phy_addr, miidata->reg_num);
1286 case SIOCDEVPRIVATE + 2:
1287 mii_write (dev, phy_addr, miidata->reg_num, miidata->in_value);
1289 case SIOCDEVPRIVATE + 3:
1291 case SIOCDEVPRIVATE + 4:
1293 case SIOCDEVPRIVATE + 5:
1294 netif_stop_queue (dev);
1296 case SIOCDEVPRIVATE + 6:
1297 netif_wake_queue (dev);
1299 case SIOCDEVPRIVATE + 7:
1301 ("tx_full=%x cur_tx=%lx old_tx=%lx cur_rx=%lx old_rx=%lx\n",
1302 netif_queue_stopped(dev), np->cur_tx, np->old_tx, np->cur_rx,
1305 case SIOCDEVPRIVATE + 8:
1306 printk("TX ring:\n");
1307 for (i = 0; i < TX_RING_SIZE; i++) {
1308 desc = &np->tx_ring[i];
1310 ("%02x:cur:%08x next:%08x status:%08x frag1:%08x frag0:%08x",
1312 (u32) (np->tx_ring_dma + i * sizeof (*desc)),
1313 (u32)le64_to_cpu(desc->next_desc),
1314 (u32)le64_to_cpu(desc->status),
1315 (u32)(le64_to_cpu(desc->fraginfo) >> 32),
1316 (u32)le64_to_cpu(desc->fraginfo));
1328 #define EEP_READ 0x0200
1329 #define EEP_BUSY 0x8000
1330 /* Read the EEPROM word */
1331 /* We use I/O instruction to read/write eeprom to avoid fail on some machines */
1333 read_eeprom (long ioaddr, int eep_addr)
1336 outw (EEP_READ | (eep_addr & 0xff), ioaddr + EepromCtrl);
1338 if (!(inw (ioaddr + EepromCtrl) & EEP_BUSY)) {
1339 return inw (ioaddr + EepromData);
1345 enum phy_ctrl_bits {
1346 MII_READ = 0x00, MII_CLK = 0x01, MII_DATA1 = 0x02, MII_WRITE = 0x04,
1350 #define mii_delay() readb(ioaddr)
1352 mii_sendbit (struct net_device *dev, u32 data)
1354 long ioaddr = dev->base_addr + PhyCtrl;
1355 data = (data) ? MII_DATA1 : 0;
1357 data |= (readb (ioaddr) & 0xf8) | MII_WRITE;
1358 writeb (data, ioaddr);
1360 writeb (data | MII_CLK, ioaddr);
1365 mii_getbit (struct net_device *dev)
1367 long ioaddr = dev->base_addr + PhyCtrl;
1370 data = (readb (ioaddr) & 0xf8) | MII_READ;
1371 writeb (data, ioaddr);
1373 writeb (data | MII_CLK, ioaddr);
1375 return ((readb (ioaddr) >> 1) & 1);
1379 mii_send_bits (struct net_device *dev, u32 data, int len)
1382 for (i = len - 1; i >= 0; i--) {
1383 mii_sendbit (dev, data & (1 << i));
1388 mii_read (struct net_device *dev, int phy_addr, int reg_num)
1395 mii_send_bits (dev, 0xffffffff, 32);
1396 /* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */
1397 /* ST,OP = 0110'b for read operation */
1398 cmd = (0x06 << 10 | phy_addr << 5 | reg_num);
1399 mii_send_bits (dev, cmd, 14);
1401 if (mii_getbit (dev))
1404 for (i = 0; i < 16; i++) {
1405 retval |= mii_getbit (dev);
1410 return (retval >> 1) & 0xffff;
1416 mii_write (struct net_device *dev, int phy_addr, int reg_num, u16 data)
1421 mii_send_bits (dev, 0xffffffff, 32);
1422 /* ST(2), OP(2), ADDR(5), REG#(5), TA(2), Data(16) total 32 bits */
1423 /* ST,OP,AAAAA,RRRRR,TA = 0101xxxxxxxxxx10'b = 0x5002 for write */
1424 cmd = (0x5002 << 16) | (phy_addr << 23) | (reg_num << 18) | data;
1425 mii_send_bits (dev, cmd, 32);
1431 mii_wait_link (struct net_device *dev, int wait)
1435 struct netdev_private *np;
1437 np = netdev_priv(dev);
1438 phy_addr = np->phy_addr;
1441 bmsr = mii_read (dev, phy_addr, MII_BMSR);
1442 if (bmsr & MII_BMSR_LINK_STATUS)
1445 } while (--wait > 0);
1449 mii_get_media (struct net_device *dev)
1456 struct netdev_private *np;
1458 np = netdev_priv(dev);
1459 phy_addr = np->phy_addr;
1461 bmsr = mii_read (dev, phy_addr, MII_BMSR);
1462 if (np->an_enable) {
1463 if (!(bmsr & MII_BMSR_AN_COMPLETE)) {
1464 /* Auto-Negotiation not completed */
1467 negotiate = mii_read (dev, phy_addr, MII_ANAR) &
1468 mii_read (dev, phy_addr, MII_ANLPAR);
1469 mscr = mii_read (dev, phy_addr, MII_MSCR);
1470 mssr = mii_read (dev, phy_addr, MII_MSSR);
1471 if (mscr & MII_MSCR_1000BT_FD && mssr & MII_MSSR_LP_1000BT_FD) {
1473 np->full_duplex = 1;
1474 printk (KERN_INFO "Auto 1000 Mbps, Full duplex\n");
1475 } else if (mscr & MII_MSCR_1000BT_HD && mssr & MII_MSSR_LP_1000BT_HD) {
1477 np->full_duplex = 0;
1478 printk (KERN_INFO "Auto 1000 Mbps, Half duplex\n");
1479 } else if (negotiate & MII_ANAR_100BX_FD) {
1481 np->full_duplex = 1;
1482 printk (KERN_INFO "Auto 100 Mbps, Full duplex\n");
1483 } else if (negotiate & MII_ANAR_100BX_HD) {
1485 np->full_duplex = 0;
1486 printk (KERN_INFO "Auto 100 Mbps, Half duplex\n");
1487 } else if (negotiate & MII_ANAR_10BT_FD) {
1489 np->full_duplex = 1;
1490 printk (KERN_INFO "Auto 10 Mbps, Full duplex\n");
1491 } else if (negotiate & MII_ANAR_10BT_HD) {
1493 np->full_duplex = 0;
1494 printk (KERN_INFO "Auto 10 Mbps, Half duplex\n");
1496 if (negotiate & MII_ANAR_PAUSE) {
1499 } else if (negotiate & MII_ANAR_ASYMMETRIC) {
1503 /* else tx_flow, rx_flow = user select */
1505 __u16 bmcr = mii_read (dev, phy_addr, MII_BMCR);
1506 switch (bmcr & (MII_BMCR_SPEED_100 | MII_BMCR_SPEED_1000)) {
1507 case MII_BMCR_SPEED_1000:
1508 printk (KERN_INFO "Operating at 1000 Mbps, ");
1510 case MII_BMCR_SPEED_100:
1511 printk (KERN_INFO "Operating at 100 Mbps, ");
1514 printk (KERN_INFO "Operating at 10 Mbps, ");
1516 if (bmcr & MII_BMCR_DUPLEX_MODE) {
1517 printk (KERN_CONT "Full duplex\n");
1519 printk (KERN_CONT "Half duplex\n");
1523 printk(KERN_INFO "Enable Tx Flow Control\n");
1525 printk(KERN_INFO "Disable Tx Flow Control\n");
1527 printk(KERN_INFO "Enable Rx Flow Control\n");
1529 printk(KERN_INFO "Disable Rx Flow Control\n");
1535 mii_set_media (struct net_device *dev)
1542 struct netdev_private *np;
1543 np = netdev_priv(dev);
1544 phy_addr = np->phy_addr;
1546 /* Does user set speed? */
1547 if (np->an_enable) {
1548 /* Advertise capabilities */
1549 bmsr = mii_read (dev, phy_addr, MII_BMSR);
1550 anar = mii_read (dev, phy_addr, MII_ANAR) &
1551 ~MII_ANAR_100BX_FD &
1552 ~MII_ANAR_100BX_HD &
1556 if (bmsr & MII_BMSR_100BX_FD)
1557 anar |= MII_ANAR_100BX_FD;
1558 if (bmsr & MII_BMSR_100BX_HD)
1559 anar |= MII_ANAR_100BX_HD;
1560 if (bmsr & MII_BMSR_100BT4)
1561 anar |= MII_ANAR_100BT4;
1562 if (bmsr & MII_BMSR_10BT_FD)
1563 anar |= MII_ANAR_10BT_FD;
1564 if (bmsr & MII_BMSR_10BT_HD)
1565 anar |= MII_ANAR_10BT_HD;
1566 anar |= MII_ANAR_PAUSE | MII_ANAR_ASYMMETRIC;
1567 mii_write (dev, phy_addr, MII_ANAR, anar);
1569 /* Enable Auto crossover */
1570 pscr = mii_read (dev, phy_addr, MII_PHY_SCR);
1571 pscr |= 3 << 5; /* 11'b */
1572 mii_write (dev, phy_addr, MII_PHY_SCR, pscr);
1574 /* Soft reset PHY */
1575 mii_write (dev, phy_addr, MII_BMCR, MII_BMCR_RESET);
1576 bmcr = MII_BMCR_AN_ENABLE | MII_BMCR_RESTART_AN | MII_BMCR_RESET;
1577 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1580 /* Force speed setting */
1581 /* 1) Disable Auto crossover */
1582 pscr = mii_read (dev, phy_addr, MII_PHY_SCR);
1584 mii_write (dev, phy_addr, MII_PHY_SCR, pscr);
1587 bmcr = mii_read (dev, phy_addr, MII_BMCR);
1588 bmcr |= MII_BMCR_RESET;
1589 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1592 bmcr = 0x1940; /* must be 0x1940 */
1593 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1594 mdelay (100); /* wait a certain time */
1596 /* 4) Advertise nothing */
1597 mii_write (dev, phy_addr, MII_ANAR, 0);
1599 /* 5) Set media and Power Up */
1600 bmcr = MII_BMCR_POWER_DOWN;
1601 if (np->speed == 100) {
1602 bmcr |= MII_BMCR_SPEED_100;
1603 printk (KERN_INFO "Manual 100 Mbps, ");
1604 } else if (np->speed == 10) {
1605 printk (KERN_INFO "Manual 10 Mbps, ");
1607 if (np->full_duplex) {
1608 bmcr |= MII_BMCR_DUPLEX_MODE;
1609 printk (KERN_CONT "Full duplex\n");
1611 printk (KERN_CONT "Half duplex\n");
1614 /* Set 1000BaseT Master/Slave setting */
1615 mscr = mii_read (dev, phy_addr, MII_MSCR);
1616 mscr |= MII_MSCR_CFG_ENABLE;
1617 mscr &= ~MII_MSCR_CFG_VALUE = 0;
1619 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1626 mii_get_media_pcs (struct net_device *dev)
1631 struct netdev_private *np;
1633 np = netdev_priv(dev);
1634 phy_addr = np->phy_addr;
1636 bmsr = mii_read (dev, phy_addr, PCS_BMSR);
1637 if (np->an_enable) {
1638 if (!(bmsr & MII_BMSR_AN_COMPLETE)) {
1639 /* Auto-Negotiation not completed */
1642 negotiate = mii_read (dev, phy_addr, PCS_ANAR) &
1643 mii_read (dev, phy_addr, PCS_ANLPAR);
1645 if (negotiate & PCS_ANAR_FULL_DUPLEX) {
1646 printk (KERN_INFO "Auto 1000 Mbps, Full duplex\n");
1647 np->full_duplex = 1;
1649 printk (KERN_INFO "Auto 1000 Mbps, half duplex\n");
1650 np->full_duplex = 0;
1652 if (negotiate & PCS_ANAR_PAUSE) {
1655 } else if (negotiate & PCS_ANAR_ASYMMETRIC) {
1659 /* else tx_flow, rx_flow = user select */
1661 __u16 bmcr = mii_read (dev, phy_addr, PCS_BMCR);
1662 printk (KERN_INFO "Operating at 1000 Mbps, ");
1663 if (bmcr & MII_BMCR_DUPLEX_MODE) {
1664 printk (KERN_CONT "Full duplex\n");
1666 printk (KERN_CONT "Half duplex\n");
1670 printk(KERN_INFO "Enable Tx Flow Control\n");
1672 printk(KERN_INFO "Disable Tx Flow Control\n");
1674 printk(KERN_INFO "Enable Rx Flow Control\n");
1676 printk(KERN_INFO "Disable Rx Flow Control\n");
1682 mii_set_media_pcs (struct net_device *dev)
1688 struct netdev_private *np;
1689 np = netdev_priv(dev);
1690 phy_addr = np->phy_addr;
1692 /* Auto-Negotiation? */
1693 if (np->an_enable) {
1694 /* Advertise capabilities */
1695 esr = mii_read (dev, phy_addr, PCS_ESR);
1696 anar = mii_read (dev, phy_addr, MII_ANAR) &
1697 ~PCS_ANAR_HALF_DUPLEX &
1698 ~PCS_ANAR_FULL_DUPLEX;
1699 if (esr & (MII_ESR_1000BT_HD | MII_ESR_1000BX_HD))
1700 anar |= PCS_ANAR_HALF_DUPLEX;
1701 if (esr & (MII_ESR_1000BT_FD | MII_ESR_1000BX_FD))
1702 anar |= PCS_ANAR_FULL_DUPLEX;
1703 anar |= PCS_ANAR_PAUSE | PCS_ANAR_ASYMMETRIC;
1704 mii_write (dev, phy_addr, MII_ANAR, anar);
1706 /* Soft reset PHY */
1707 mii_write (dev, phy_addr, MII_BMCR, MII_BMCR_RESET);
1708 bmcr = MII_BMCR_AN_ENABLE | MII_BMCR_RESTART_AN |
1710 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1713 /* Force speed setting */
1715 bmcr = MII_BMCR_RESET;
1716 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1718 if (np->full_duplex) {
1719 bmcr = MII_BMCR_DUPLEX_MODE;
1720 printk (KERN_INFO "Manual full duplex\n");
1723 printk (KERN_INFO "Manual half duplex\n");
1725 mii_write (dev, phy_addr, MII_BMCR, bmcr);
1728 /* Advertise nothing */
1729 mii_write (dev, phy_addr, MII_ANAR, 0);
1736 rio_close (struct net_device *dev)
1738 long ioaddr = dev->base_addr;
1739 struct netdev_private *np = netdev_priv(dev);
1740 struct sk_buff *skb;
1743 netif_stop_queue (dev);
1745 /* Disable interrupts */
1746 writew (0, ioaddr + IntEnable);
1748 /* Stop Tx and Rx logics */
1749 writel (TxDisable | RxDisable | StatsDisable, ioaddr + MACCtrl);
1751 free_irq (dev->irq, dev);
1752 del_timer_sync (&np->timer);
1754 /* Free all the skbuffs in the queue. */
1755 for (i = 0; i < RX_RING_SIZE; i++) {
1756 np->rx_ring[i].status = 0;
1757 np->rx_ring[i].fraginfo = 0;
1758 skb = np->rx_skbuff[i];
1760 pci_unmap_single(np->pdev,
1761 desc_to_dma(&np->rx_ring[i]),
1762 skb->len, PCI_DMA_FROMDEVICE);
1763 dev_kfree_skb (skb);
1764 np->rx_skbuff[i] = NULL;
1767 for (i = 0; i < TX_RING_SIZE; i++) {
1768 skb = np->tx_skbuff[i];
1770 pci_unmap_single(np->pdev,
1771 desc_to_dma(&np->tx_ring[i]),
1772 skb->len, PCI_DMA_TODEVICE);
1773 dev_kfree_skb (skb);
1774 np->tx_skbuff[i] = NULL;
1781 static void __devexit
1782 rio_remove1 (struct pci_dev *pdev)
1784 struct net_device *dev = pci_get_drvdata (pdev);
1787 struct netdev_private *np = netdev_priv(dev);
1789 unregister_netdev (dev);
1790 pci_free_consistent (pdev, RX_TOTAL_SIZE, np->rx_ring,
1792 pci_free_consistent (pdev, TX_TOTAL_SIZE, np->tx_ring,
1795 iounmap ((char *) (dev->base_addr));
1798 pci_release_regions (pdev);
1799 pci_disable_device (pdev);
1801 pci_set_drvdata (pdev, NULL);
1804 static struct pci_driver rio_driver = {
1806 .id_table = rio_pci_tbl,
1807 .probe = rio_probe1,
1808 .remove = __devexit_p(rio_remove1),
1814 return pci_register_driver(&rio_driver);
1820 pci_unregister_driver (&rio_driver);
1823 module_init (rio_init);
1824 module_exit (rio_exit);
1830 gcc -D__KERNEL__ -DMODULE -I/usr/src/linux/include -Wall -Wstrict-prototypes -O2 -c dl2k.c
1832 Read Documentation/networking/dl2k.txt for details.