2 * Davicom DM9000 Fast Ethernet driver for Linux.
3 * Copyright (C) 1997 Sten Wang
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * (C) Copyright 1997-1998 DAVICOM Semiconductor,Inc. All Rights Reserved.
17 * Additional updates, Copyright:
18 * Ben Dooks <ben@simtec.co.uk>
19 * Sascha Hauer <s.hauer@pengutronix.de>
22 #include <linux/module.h>
23 #include <linux/ioport.h>
24 #include <linux/netdevice.h>
25 #include <linux/etherdevice.h>
26 #include <linux/init.h>
27 #include <linux/skbuff.h>
28 #include <linux/spinlock.h>
29 #include <linux/crc32.h>
30 #include <linux/mii.h>
31 #include <linux/ethtool.h>
32 #include <linux/dm9000.h>
33 #include <linux/delay.h>
34 #include <linux/platform_device.h>
35 #include <linux/irq.h>
37 #include <asm/delay.h>
43 /* Board/System/Debug information/definition ---------------- */
45 #define DM9000_PHY 0x40 /* PHY address 0x01 */
47 #define CARDNAME "dm9000"
48 #define DRV_VERSION "1.31"
51 * Transmit timeout, default 5 seconds.
53 static int watchdog = 5000;
54 module_param(watchdog, int, 0400);
55 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
57 /* DM9000 register address locking.
59 * The DM9000 uses an address register to control where data written
60 * to the data register goes. This means that the address register
61 * must be preserved over interrupts or similar calls.
63 * During interrupt and other critical calls, a spinlock is used to
64 * protect the system, but the calls themselves save the address
65 * in the address register in case they are interrupting another
66 * access to the device.
68 * For general accesses a lock is provided so that calls which are
69 * allowed to sleep are serialised so that the address register does
70 * not need to be saved. This lock also serves to serialise access
71 * to the EEPROM and PHY access registers which are shared between
75 /* The driver supports the original DM9000E, and now the two newer
76 * devices, DM9000A and DM9000B.
80 TYPE_DM9000E, /* original DM9000 */
85 /* Structure/enum declaration ------------------------------- */
86 typedef struct board_info {
88 void __iomem *io_addr; /* Register I/O base address */
89 void __iomem *io_data; /* Data I/O address */
97 u8 io_mode; /* 0:word, 2:byte */
102 unsigned int in_suspend :1;
103 unsigned int wake_supported :1;
106 enum dm9000_type type;
108 void (*inblk)(void __iomem *port, void *data, int length);
109 void (*outblk)(void __iomem *port, void *data, int length);
110 void (*dumpblk)(void __iomem *port, int length);
112 struct device *dev; /* parent device */
114 struct resource *addr_res; /* resources found */
115 struct resource *data_res;
116 struct resource *addr_req; /* resources requested */
117 struct resource *data_req;
118 struct resource *irq_res;
122 struct mutex addr_lock; /* phy and eeprom access lock */
124 struct delayed_work phy_poll;
125 struct net_device *ndev;
129 struct mii_if_info mii;
140 #define dm9000_dbg(db, lev, msg...) do { \
141 if ((lev) < CONFIG_DM9000_DEBUGLEVEL && \
142 (lev) < db->debug_level) { \
143 dev_dbg(db->dev, msg); \
147 static inline board_info_t *to_dm9000_board(struct net_device *dev)
149 return netdev_priv(dev);
152 /* DM9000 network board routine ---------------------------- */
155 dm9000_reset(board_info_t * db)
157 dev_dbg(db->dev, "resetting device\n");
160 writeb(DM9000_NCR, db->io_addr);
162 writeb(NCR_RST, db->io_data);
167 * Read a byte from I/O port
170 ior(board_info_t * db, int reg)
172 writeb(reg, db->io_addr);
173 return readb(db->io_data);
177 * Write a byte to I/O port
181 iow(board_info_t * db, int reg, int value)
183 writeb(reg, db->io_addr);
184 writeb(value, db->io_data);
187 /* routines for sending block to chip */
189 static void dm9000_outblk_8bit(void __iomem *reg, void *data, int count)
191 writesb(reg, data, count);
194 static void dm9000_outblk_16bit(void __iomem *reg, void *data, int count)
196 writesw(reg, data, (count+1) >> 1);
199 static void dm9000_outblk_32bit(void __iomem *reg, void *data, int count)
201 writesl(reg, data, (count+3) >> 2);
204 /* input block from chip to memory */
206 static void dm9000_inblk_8bit(void __iomem *reg, void *data, int count)
208 readsb(reg, data, count);
212 static void dm9000_inblk_16bit(void __iomem *reg, void *data, int count)
214 readsw(reg, data, (count+1) >> 1);
217 static void dm9000_inblk_32bit(void __iomem *reg, void *data, int count)
219 readsl(reg, data, (count+3) >> 2);
222 /* dump block from chip to null */
224 static void dm9000_dumpblk_8bit(void __iomem *reg, int count)
229 for (i = 0; i < count; i++)
233 static void dm9000_dumpblk_16bit(void __iomem *reg, int count)
238 count = (count + 1) >> 1;
240 for (i = 0; i < count; i++)
244 static void dm9000_dumpblk_32bit(void __iomem *reg, int count)
249 count = (count + 3) >> 2;
251 for (i = 0; i < count; i++)
257 * select the specified set of io routines to use with the
261 static void dm9000_set_io(struct board_info *db, int byte_width)
263 /* use the size of the data resource to work out what IO
264 * routines we want to use
267 switch (byte_width) {
269 db->dumpblk = dm9000_dumpblk_8bit;
270 db->outblk = dm9000_outblk_8bit;
271 db->inblk = dm9000_inblk_8bit;
276 dev_dbg(db->dev, ": 3 byte IO, falling back to 16bit\n");
278 db->dumpblk = dm9000_dumpblk_16bit;
279 db->outblk = dm9000_outblk_16bit;
280 db->inblk = dm9000_inblk_16bit;
285 db->dumpblk = dm9000_dumpblk_32bit;
286 db->outblk = dm9000_outblk_32bit;
287 db->inblk = dm9000_inblk_32bit;
292 static void dm9000_schedule_poll(board_info_t *db)
294 if (db->type == TYPE_DM9000E)
295 schedule_delayed_work(&db->phy_poll, HZ * 2);
298 static int dm9000_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
300 board_info_t *dm = to_dm9000_board(dev);
302 if (!netif_running(dev))
305 return generic_mii_ioctl(&dm->mii, if_mii(req), cmd, NULL);
309 dm9000_read_locked(board_info_t *db, int reg)
314 spin_lock_irqsave(&db->lock, flags);
316 spin_unlock_irqrestore(&db->lock, flags);
321 static int dm9000_wait_eeprom(board_info_t *db)
324 int timeout = 8; /* wait max 8msec */
326 /* The DM9000 data sheets say we should be able to
327 * poll the ERRE bit in EPCR to wait for the EEPROM
328 * operation. From testing several chips, this bit
329 * does not seem to work.
331 * We attempt to use the bit, but fall back to the
332 * timeout (which is why we do not return an error
333 * on expiry) to say that the EEPROM operation has
338 status = dm9000_read_locked(db, DM9000_EPCR);
340 if ((status & EPCR_ERRE) == 0)
346 dev_dbg(db->dev, "timeout waiting EEPROM\n");
355 * Read a word data from EEPROM
358 dm9000_read_eeprom(board_info_t *db, int offset, u8 *to)
362 if (db->flags & DM9000_PLATF_NO_EEPROM) {
368 mutex_lock(&db->addr_lock);
370 spin_lock_irqsave(&db->lock, flags);
372 iow(db, DM9000_EPAR, offset);
373 iow(db, DM9000_EPCR, EPCR_ERPRR);
375 spin_unlock_irqrestore(&db->lock, flags);
377 dm9000_wait_eeprom(db);
379 /* delay for at-least 150uS */
382 spin_lock_irqsave(&db->lock, flags);
384 iow(db, DM9000_EPCR, 0x0);
386 to[0] = ior(db, DM9000_EPDRL);
387 to[1] = ior(db, DM9000_EPDRH);
389 spin_unlock_irqrestore(&db->lock, flags);
391 mutex_unlock(&db->addr_lock);
395 * Write a word data to SROM
398 dm9000_write_eeprom(board_info_t *db, int offset, u8 *data)
402 if (db->flags & DM9000_PLATF_NO_EEPROM)
405 mutex_lock(&db->addr_lock);
407 spin_lock_irqsave(&db->lock, flags);
408 iow(db, DM9000_EPAR, offset);
409 iow(db, DM9000_EPDRH, data[1]);
410 iow(db, DM9000_EPDRL, data[0]);
411 iow(db, DM9000_EPCR, EPCR_WEP | EPCR_ERPRW);
412 spin_unlock_irqrestore(&db->lock, flags);
414 dm9000_wait_eeprom(db);
416 mdelay(1); /* wait at least 150uS to clear */
418 spin_lock_irqsave(&db->lock, flags);
419 iow(db, DM9000_EPCR, 0);
420 spin_unlock_irqrestore(&db->lock, flags);
422 mutex_unlock(&db->addr_lock);
427 static void dm9000_get_drvinfo(struct net_device *dev,
428 struct ethtool_drvinfo *info)
430 board_info_t *dm = to_dm9000_board(dev);
432 strcpy(info->driver, CARDNAME);
433 strcpy(info->version, DRV_VERSION);
434 strcpy(info->bus_info, to_platform_device(dm->dev)->name);
437 static u32 dm9000_get_msglevel(struct net_device *dev)
439 board_info_t *dm = to_dm9000_board(dev);
441 return dm->msg_enable;
444 static void dm9000_set_msglevel(struct net_device *dev, u32 value)
446 board_info_t *dm = to_dm9000_board(dev);
448 dm->msg_enable = value;
451 static int dm9000_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
453 board_info_t *dm = to_dm9000_board(dev);
455 mii_ethtool_gset(&dm->mii, cmd);
459 static int dm9000_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
461 board_info_t *dm = to_dm9000_board(dev);
463 return mii_ethtool_sset(&dm->mii, cmd);
466 static int dm9000_nway_reset(struct net_device *dev)
468 board_info_t *dm = to_dm9000_board(dev);
469 return mii_nway_restart(&dm->mii);
472 static uint32_t dm9000_get_rx_csum(struct net_device *dev)
474 board_info_t *dm = to_dm9000_board(dev);
478 static int dm9000_set_rx_csum(struct net_device *dev, uint32_t data)
480 board_info_t *dm = to_dm9000_board(dev);
486 spin_lock_irqsave(&dm->lock, flags);
487 iow(dm, DM9000_RCSR, dm->rx_csum ? RCSR_CSUM : 0);
488 spin_unlock_irqrestore(&dm->lock, flags);
496 static int dm9000_set_tx_csum(struct net_device *dev, uint32_t data)
498 board_info_t *dm = to_dm9000_board(dev);
499 int ret = -EOPNOTSUPP;
502 ret = ethtool_op_set_tx_csum(dev, data);
506 static u32 dm9000_get_link(struct net_device *dev)
508 board_info_t *dm = to_dm9000_board(dev);
511 if (dm->flags & DM9000_PLATF_EXT_PHY)
512 ret = mii_link_ok(&dm->mii);
514 ret = dm9000_read_locked(dm, DM9000_NSR) & NSR_LINKST ? 1 : 0;
519 #define DM_EEPROM_MAGIC (0x444D394B)
521 static int dm9000_get_eeprom_len(struct net_device *dev)
526 static int dm9000_get_eeprom(struct net_device *dev,
527 struct ethtool_eeprom *ee, u8 *data)
529 board_info_t *dm = to_dm9000_board(dev);
530 int offset = ee->offset;
534 /* EEPROM access is aligned to two bytes */
536 if ((len & 1) != 0 || (offset & 1) != 0)
539 if (dm->flags & DM9000_PLATF_NO_EEPROM)
542 ee->magic = DM_EEPROM_MAGIC;
544 for (i = 0; i < len; i += 2)
545 dm9000_read_eeprom(dm, (offset + i) / 2, data + i);
550 static int dm9000_set_eeprom(struct net_device *dev,
551 struct ethtool_eeprom *ee, u8 *data)
553 board_info_t *dm = to_dm9000_board(dev);
554 int offset = ee->offset;
558 /* EEPROM access is aligned to two bytes */
560 if ((len & 1) != 0 || (offset & 1) != 0)
563 if (dm->flags & DM9000_PLATF_NO_EEPROM)
566 if (ee->magic != DM_EEPROM_MAGIC)
569 for (i = 0; i < len; i += 2)
570 dm9000_write_eeprom(dm, (offset + i) / 2, data + i);
575 static void dm9000_get_wol(struct net_device *dev, struct ethtool_wolinfo *w)
577 board_info_t *dm = to_dm9000_board(dev);
579 memset(w, 0, sizeof(struct ethtool_wolinfo));
581 /* note, we could probably support wake-phy too */
582 w->supported = dm->wake_supported ? WAKE_MAGIC : 0;
583 w->wolopts = dm->wake_state;
586 static int dm9000_set_wol(struct net_device *dev, struct ethtool_wolinfo *w)
588 board_info_t *dm = to_dm9000_board(dev);
590 u32 opts = w->wolopts;
593 if (!dm->wake_supported)
596 if (opts & ~WAKE_MAGIC)
599 if (opts & WAKE_MAGIC)
602 mutex_lock(&dm->addr_lock);
604 spin_lock_irqsave(&dm->lock, flags);
605 iow(dm, DM9000_WCR, wcr);
606 spin_unlock_irqrestore(&dm->lock, flags);
608 mutex_unlock(&dm->addr_lock);
610 if (dm->wake_state != opts) {
611 /* change in wol state, update IRQ state */
614 set_irq_wake(dm->irq_wake, 1);
615 else if (dm->wake_state & !opts)
616 set_irq_wake(dm->irq_wake, 0);
619 dm->wake_state = opts;
623 static const struct ethtool_ops dm9000_ethtool_ops = {
624 .get_drvinfo = dm9000_get_drvinfo,
625 .get_settings = dm9000_get_settings,
626 .set_settings = dm9000_set_settings,
627 .get_msglevel = dm9000_get_msglevel,
628 .set_msglevel = dm9000_set_msglevel,
629 .nway_reset = dm9000_nway_reset,
630 .get_link = dm9000_get_link,
631 .get_wol = dm9000_get_wol,
632 .set_wol = dm9000_set_wol,
633 .get_eeprom_len = dm9000_get_eeprom_len,
634 .get_eeprom = dm9000_get_eeprom,
635 .set_eeprom = dm9000_set_eeprom,
636 .get_rx_csum = dm9000_get_rx_csum,
637 .set_rx_csum = dm9000_set_rx_csum,
638 .get_tx_csum = ethtool_op_get_tx_csum,
639 .set_tx_csum = dm9000_set_tx_csum,
642 static void dm9000_show_carrier(board_info_t *db,
643 unsigned carrier, unsigned nsr)
645 struct net_device *ndev = db->ndev;
646 unsigned ncr = dm9000_read_locked(db, DM9000_NCR);
649 dev_info(db->dev, "%s: link up, %dMbps, %s-duplex, no LPA\n",
650 ndev->name, (nsr & NSR_SPEED) ? 10 : 100,
651 (ncr & NCR_FDX) ? "full" : "half");
653 dev_info(db->dev, "%s: link down\n", ndev->name);
657 dm9000_poll_work(struct work_struct *w)
659 struct delayed_work *dw = to_delayed_work(w);
660 board_info_t *db = container_of(dw, board_info_t, phy_poll);
661 struct net_device *ndev = db->ndev;
663 if (db->flags & DM9000_PLATF_SIMPLE_PHY &&
664 !(db->flags & DM9000_PLATF_EXT_PHY)) {
665 unsigned nsr = dm9000_read_locked(db, DM9000_NSR);
666 unsigned old_carrier = netif_carrier_ok(ndev) ? 1 : 0;
667 unsigned new_carrier;
669 new_carrier = (nsr & NSR_LINKST) ? 1 : 0;
671 if (old_carrier != new_carrier) {
672 if (netif_msg_link(db))
673 dm9000_show_carrier(db, new_carrier, nsr);
676 netif_carrier_off(ndev);
678 netif_carrier_on(ndev);
681 mii_check_media(&db->mii, netif_msg_link(db), 0);
683 if (netif_running(ndev))
684 dm9000_schedule_poll(db);
687 /* dm9000_release_board
689 * release a board, and any mapped resources
693 dm9000_release_board(struct platform_device *pdev, struct board_info *db)
695 /* unmap our resources */
697 iounmap(db->io_addr);
698 iounmap(db->io_data);
700 /* release the resources */
702 release_resource(db->data_req);
705 release_resource(db->addr_req);
709 static unsigned char dm9000_type_to_char(enum dm9000_type type)
712 case TYPE_DM9000E: return 'e';
713 case TYPE_DM9000A: return 'a';
714 case TYPE_DM9000B: return 'b';
721 * Set DM9000 multicast address
724 dm9000_hash_table(struct net_device *dev)
726 board_info_t *db = netdev_priv(dev);
727 struct dev_mc_list *mcptr;
731 u8 rcr = RCR_DIS_LONG | RCR_DIS_CRC | RCR_RXEN;
734 dm9000_dbg(db, 1, "entering %s\n", __func__);
736 spin_lock_irqsave(&db->lock, flags);
738 for (i = 0, oft = DM9000_PAR; i < 6; i++, oft++)
739 iow(db, oft, dev->dev_addr[i]);
741 /* Clear Hash Table */
742 for (i = 0; i < 4; i++)
745 /* broadcast address */
746 hash_table[3] = 0x8000;
748 if (dev->flags & IFF_PROMISC)
751 if (dev->flags & IFF_ALLMULTI)
754 /* the multicast address in Hash Table : 64 bits */
755 netdev_for_each_mc_addr(mcptr, dev) {
756 hash_val = ether_crc_le(6, mcptr->dmi_addr) & 0x3f;
757 hash_table[hash_val / 16] |= (u16) 1 << (hash_val % 16);
760 /* Write the hash table to MAC MD table */
761 for (i = 0, oft = DM9000_MAR; i < 4; i++) {
762 iow(db, oft++, hash_table[i]);
763 iow(db, oft++, hash_table[i] >> 8);
766 iow(db, DM9000_RCR, rcr);
767 spin_unlock_irqrestore(&db->lock, flags);
771 * Initilize dm9000 board
774 dm9000_init_dm9000(struct net_device *dev)
776 board_info_t *db = netdev_priv(dev);
780 dm9000_dbg(db, 1, "entering %s\n", __func__);
783 db->io_mode = ior(db, DM9000_ISR) >> 6; /* ISR bit7:6 keeps I/O mode */
786 dm9000_set_rx_csum(dev, db->rx_csum);
788 /* GPIO0 on pre-activate PHY */
789 iow(db, DM9000_GPR, 0); /* REG_1F bit0 activate phyxcer */
790 iow(db, DM9000_GPCR, GPCR_GEP_CNTL); /* Let GPIO0 output */
791 iow(db, DM9000_GPR, 0); /* Enable PHY */
793 ncr = (db->flags & DM9000_PLATF_EXT_PHY) ? NCR_EXT_PHY : 0;
795 /* if wol is needed, then always set NCR_WAKEEN otherwise we end
796 * up dumping the wake events if we disable this. There is already
797 * a wake-mask in DM9000_WCR */
798 if (db->wake_supported)
801 iow(db, DM9000_NCR, ncr);
803 /* Program operating register */
804 iow(db, DM9000_TCR, 0); /* TX Polling clear */
805 iow(db, DM9000_BPTR, 0x3f); /* Less 3Kb, 200us */
806 iow(db, DM9000_FCR, 0xff); /* Flow Control */
807 iow(db, DM9000_SMCR, 0); /* Special Mode */
808 /* clear TX status */
809 iow(db, DM9000_NSR, NSR_WAKEST | NSR_TX2END | NSR_TX1END);
810 iow(db, DM9000_ISR, ISR_CLR_STATUS); /* Clear interrupt status */
812 /* Set address filter table */
813 dm9000_hash_table(dev);
815 imr = IMR_PAR | IMR_PTM | IMR_PRM;
816 if (db->type != TYPE_DM9000E)
821 /* Enable TX/RX interrupt mask */
822 iow(db, DM9000_IMR, imr);
824 /* Init Driver variable */
826 db->queue_pkt_len = 0;
827 dev->trans_start = 0;
830 /* Our watchdog timed out. Called by the networking layer */
831 static void dm9000_timeout(struct net_device *dev)
833 board_info_t *db = netdev_priv(dev);
837 /* Save previous register address */
838 reg_save = readb(db->io_addr);
839 spin_lock_irqsave(&db->lock, flags);
841 netif_stop_queue(dev);
843 dm9000_init_dm9000(dev);
844 /* We can accept TX packets again */
845 dev->trans_start = jiffies;
846 netif_wake_queue(dev);
848 /* Restore previous register address */
849 writeb(reg_save, db->io_addr);
850 spin_unlock_irqrestore(&db->lock, flags);
853 static void dm9000_send_packet(struct net_device *dev,
857 board_info_t *dm = to_dm9000_board(dev);
859 /* The DM9000 is not smart enough to leave fragmented packets alone. */
860 if (dm->ip_summed != ip_summed) {
861 if (ip_summed == CHECKSUM_NONE)
862 iow(dm, DM9000_TCCR, 0);
864 iow(dm, DM9000_TCCR, TCCR_IP | TCCR_UDP | TCCR_TCP);
865 dm->ip_summed = ip_summed;
868 /* Set TX length to DM9000 */
869 iow(dm, DM9000_TXPLL, pkt_len);
870 iow(dm, DM9000_TXPLH, pkt_len >> 8);
872 /* Issue TX polling command */
873 iow(dm, DM9000_TCR, TCR_TXREQ); /* Cleared after TX complete */
877 * Hardware start transmission.
878 * Send a packet to media from the upper layer.
881 dm9000_start_xmit(struct sk_buff *skb, struct net_device *dev)
884 board_info_t *db = netdev_priv(dev);
886 dm9000_dbg(db, 3, "%s:\n", __func__);
888 if (db->tx_pkt_cnt > 1)
889 return NETDEV_TX_BUSY;
891 spin_lock_irqsave(&db->lock, flags);
893 /* Move data to DM9000 TX RAM */
894 writeb(DM9000_MWCMD, db->io_addr);
896 (db->outblk)(db->io_data, skb->data, skb->len);
897 dev->stats.tx_bytes += skb->len;
900 /* TX control: First packet immediately send, second packet queue */
901 if (db->tx_pkt_cnt == 1) {
902 dm9000_send_packet(dev, skb->ip_summed, skb->len);
905 db->queue_pkt_len = skb->len;
906 db->queue_ip_summed = skb->ip_summed;
907 netif_stop_queue(dev);
910 spin_unlock_irqrestore(&db->lock, flags);
919 * DM9000 interrupt handler
920 * receive the packet to upper layer, free the transmitted packet
923 static void dm9000_tx_done(struct net_device *dev, board_info_t *db)
925 int tx_status = ior(db, DM9000_NSR); /* Got TX status */
927 if (tx_status & (NSR_TX2END | NSR_TX1END)) {
928 /* One packet sent complete */
930 dev->stats.tx_packets++;
932 if (netif_msg_tx_done(db))
933 dev_dbg(db->dev, "tx done, NSR %02x\n", tx_status);
935 /* Queue packet check & send */
936 if (db->tx_pkt_cnt > 0)
937 dm9000_send_packet(dev, db->queue_ip_summed,
939 netif_wake_queue(dev);
943 struct dm9000_rxhdr {
947 } __attribute__((__packed__));
950 * Received a packet and pass to upper layer
953 dm9000_rx(struct net_device *dev)
955 board_info_t *db = netdev_priv(dev);
956 struct dm9000_rxhdr rxhdr;
962 /* Check packet ready or not */
964 ior(db, DM9000_MRCMDX); /* Dummy read */
966 /* Get most updated data */
967 rxbyte = readb(db->io_data);
969 /* Status check: this byte must be 0 or 1 */
970 if (rxbyte & DM9000_PKT_ERR) {
971 dev_warn(db->dev, "status check fail: %d\n", rxbyte);
972 iow(db, DM9000_RCR, 0x00); /* Stop Device */
973 iow(db, DM9000_ISR, IMR_PAR); /* Stop INT request */
977 if (!(rxbyte & DM9000_PKT_RDY))
980 /* A packet ready now & Get status/length */
982 writeb(DM9000_MRCMD, db->io_addr);
984 (db->inblk)(db->io_data, &rxhdr, sizeof(rxhdr));
986 RxLen = le16_to_cpu(rxhdr.RxLen);
988 if (netif_msg_rx_status(db))
989 dev_dbg(db->dev, "RX: status %02x, length %04x\n",
990 rxhdr.RxStatus, RxLen);
992 /* Packet Status check */
995 if (netif_msg_rx_err(db))
996 dev_dbg(db->dev, "RX: Bad Packet (runt)\n");
999 if (RxLen > DM9000_PKT_MAX) {
1000 dev_dbg(db->dev, "RST: RX Len:%x\n", RxLen);
1003 /* rxhdr.RxStatus is identical to RSR register. */
1004 if (rxhdr.RxStatus & (RSR_FOE | RSR_CE | RSR_AE |
1005 RSR_PLE | RSR_RWTO |
1006 RSR_LCS | RSR_RF)) {
1008 if (rxhdr.RxStatus & RSR_FOE) {
1009 if (netif_msg_rx_err(db))
1010 dev_dbg(db->dev, "fifo error\n");
1011 dev->stats.rx_fifo_errors++;
1013 if (rxhdr.RxStatus & RSR_CE) {
1014 if (netif_msg_rx_err(db))
1015 dev_dbg(db->dev, "crc error\n");
1016 dev->stats.rx_crc_errors++;
1018 if (rxhdr.RxStatus & RSR_RF) {
1019 if (netif_msg_rx_err(db))
1020 dev_dbg(db->dev, "length error\n");
1021 dev->stats.rx_length_errors++;
1025 /* Move data from DM9000 */
1027 ((skb = dev_alloc_skb(RxLen + 4)) != NULL)) {
1028 skb_reserve(skb, 2);
1029 rdptr = (u8 *) skb_put(skb, RxLen - 4);
1031 /* Read received packet from RX SRAM */
1033 (db->inblk)(db->io_data, rdptr, RxLen);
1034 dev->stats.rx_bytes += RxLen;
1036 /* Pass to upper layer */
1037 skb->protocol = eth_type_trans(skb, dev);
1039 if ((((rxbyte & 0x1c) << 3) & rxbyte) == 0)
1040 skb->ip_summed = CHECKSUM_UNNECESSARY;
1042 skb->ip_summed = CHECKSUM_NONE;
1045 dev->stats.rx_packets++;
1048 /* need to dump the packet's data */
1050 (db->dumpblk)(db->io_data, RxLen);
1052 } while (rxbyte & DM9000_PKT_RDY);
1055 static irqreturn_t dm9000_interrupt(int irq, void *dev_id)
1057 struct net_device *dev = dev_id;
1058 board_info_t *db = netdev_priv(dev);
1060 unsigned long flags;
1063 dm9000_dbg(db, 3, "entering %s\n", __func__);
1065 /* A real interrupt coming */
1067 /* holders of db->lock must always block IRQs */
1068 spin_lock_irqsave(&db->lock, flags);
1070 /* Save previous register address */
1071 reg_save = readb(db->io_addr);
1073 /* Disable all interrupts */
1074 iow(db, DM9000_IMR, IMR_PAR);
1076 /* Got DM9000 interrupt status */
1077 int_status = ior(db, DM9000_ISR); /* Got ISR */
1078 iow(db, DM9000_ISR, int_status); /* Clear ISR status */
1080 if (netif_msg_intr(db))
1081 dev_dbg(db->dev, "interrupt status %02x\n", int_status);
1083 /* Received the coming packet */
1084 if (int_status & ISR_PRS)
1087 /* Trnasmit Interrupt check */
1088 if (int_status & ISR_PTS)
1089 dm9000_tx_done(dev, db);
1091 if (db->type != TYPE_DM9000E) {
1092 if (int_status & ISR_LNKCHNG) {
1093 /* fire a link-change request */
1094 schedule_delayed_work(&db->phy_poll, 1);
1098 /* Re-enable interrupt mask */
1099 iow(db, DM9000_IMR, db->imr_all);
1101 /* Restore previous register address */
1102 writeb(reg_save, db->io_addr);
1104 spin_unlock_irqrestore(&db->lock, flags);
1109 static irqreturn_t dm9000_wol_interrupt(int irq, void *dev_id)
1111 struct net_device *dev = dev_id;
1112 board_info_t *db = netdev_priv(dev);
1113 unsigned long flags;
1116 spin_lock_irqsave(&db->lock, flags);
1118 nsr = ior(db, DM9000_NSR);
1119 wcr = ior(db, DM9000_WCR);
1121 dev_dbg(db->dev, "%s: NSR=0x%02x, WCR=0x%02x\n", __func__, nsr, wcr);
1123 if (nsr & NSR_WAKEST) {
1124 /* clear, so we can avoid */
1125 iow(db, DM9000_NSR, NSR_WAKEST);
1127 if (wcr & WCR_LINKST)
1128 dev_info(db->dev, "wake by link status change\n");
1129 if (wcr & WCR_SAMPLEST)
1130 dev_info(db->dev, "wake by sample packet\n");
1131 if (wcr & WCR_MAGICST )
1132 dev_info(db->dev, "wake by magic packet\n");
1133 if (!(wcr & (WCR_LINKST | WCR_SAMPLEST | WCR_MAGICST)))
1134 dev_err(db->dev, "wake signalled with no reason? "
1135 "NSR=0x%02x, WSR=0x%02x\n", nsr, wcr);
1139 spin_unlock_irqrestore(&db->lock, flags);
1141 return (nsr & NSR_WAKEST) ? IRQ_HANDLED : IRQ_NONE;
1144 #ifdef CONFIG_NET_POLL_CONTROLLER
1148 static void dm9000_poll_controller(struct net_device *dev)
1150 disable_irq(dev->irq);
1151 dm9000_interrupt(dev->irq, dev);
1152 enable_irq(dev->irq);
1157 * Open the interface.
1158 * The interface is opened whenever "ifconfig" actives it.
1161 dm9000_open(struct net_device *dev)
1163 board_info_t *db = netdev_priv(dev);
1164 unsigned long irqflags = db->irq_res->flags & IRQF_TRIGGER_MASK;
1166 if (netif_msg_ifup(db))
1167 dev_dbg(db->dev, "enabling %s\n", dev->name);
1169 /* If there is no IRQ type specified, default to something that
1170 * may work, and tell the user that this is a problem */
1172 if (irqflags == IRQF_TRIGGER_NONE)
1173 dev_warn(db->dev, "WARNING: no IRQ resource flags set.\n");
1175 irqflags |= IRQF_SHARED;
1177 if (request_irq(dev->irq, dm9000_interrupt, irqflags, dev->name, dev))
1180 /* Initialize DM9000 board */
1182 dm9000_init_dm9000(dev);
1184 /* Init driver variable */
1187 mii_check_media(&db->mii, netif_msg_link(db), 1);
1188 netif_start_queue(dev);
1190 dm9000_schedule_poll(db);
1196 * Sleep, either by using msleep() or if we are suspending, then
1197 * use mdelay() to sleep.
1199 static void dm9000_msleep(board_info_t *db, unsigned int ms)
1208 * Read a word from phyxcer
1211 dm9000_phy_read(struct net_device *dev, int phy_reg_unused, int reg)
1213 board_info_t *db = netdev_priv(dev);
1214 unsigned long flags;
1215 unsigned int reg_save;
1218 mutex_lock(&db->addr_lock);
1220 spin_lock_irqsave(&db->lock,flags);
1222 /* Save previous register address */
1223 reg_save = readb(db->io_addr);
1225 /* Fill the phyxcer register into REG_0C */
1226 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1228 iow(db, DM9000_EPCR, EPCR_ERPRR | EPCR_EPOS); /* Issue phyxcer read command */
1230 writeb(reg_save, db->io_addr);
1231 spin_unlock_irqrestore(&db->lock,flags);
1233 dm9000_msleep(db, 1); /* Wait read complete */
1235 spin_lock_irqsave(&db->lock,flags);
1236 reg_save = readb(db->io_addr);
1238 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer read command */
1240 /* The read data keeps on REG_0D & REG_0E */
1241 ret = (ior(db, DM9000_EPDRH) << 8) | ior(db, DM9000_EPDRL);
1243 /* restore the previous address */
1244 writeb(reg_save, db->io_addr);
1245 spin_unlock_irqrestore(&db->lock,flags);
1247 mutex_unlock(&db->addr_lock);
1249 dm9000_dbg(db, 5, "phy_read[%02x] -> %04x\n", reg, ret);
1254 * Write a word to phyxcer
1257 dm9000_phy_write(struct net_device *dev,
1258 int phyaddr_unused, int reg, int value)
1260 board_info_t *db = netdev_priv(dev);
1261 unsigned long flags;
1262 unsigned long reg_save;
1264 dm9000_dbg(db, 5, "phy_write[%02x] = %04x\n", reg, value);
1265 mutex_lock(&db->addr_lock);
1267 spin_lock_irqsave(&db->lock,flags);
1269 /* Save previous register address */
1270 reg_save = readb(db->io_addr);
1272 /* Fill the phyxcer register into REG_0C */
1273 iow(db, DM9000_EPAR, DM9000_PHY | reg);
1275 /* Fill the written data into REG_0D & REG_0E */
1276 iow(db, DM9000_EPDRL, value);
1277 iow(db, DM9000_EPDRH, value >> 8);
1279 iow(db, DM9000_EPCR, EPCR_EPOS | EPCR_ERPRW); /* Issue phyxcer write command */
1281 writeb(reg_save, db->io_addr);
1282 spin_unlock_irqrestore(&db->lock, flags);
1284 dm9000_msleep(db, 1); /* Wait write complete */
1286 spin_lock_irqsave(&db->lock,flags);
1287 reg_save = readb(db->io_addr);
1289 iow(db, DM9000_EPCR, 0x0); /* Clear phyxcer write command */
1291 /* restore the previous address */
1292 writeb(reg_save, db->io_addr);
1294 spin_unlock_irqrestore(&db->lock, flags);
1295 mutex_unlock(&db->addr_lock);
1299 dm9000_shutdown(struct net_device *dev)
1301 board_info_t *db = netdev_priv(dev);
1304 dm9000_phy_write(dev, 0, MII_BMCR, BMCR_RESET); /* PHY RESET */
1305 iow(db, DM9000_GPR, 0x01); /* Power-Down PHY */
1306 iow(db, DM9000_IMR, IMR_PAR); /* Disable all interrupt */
1307 iow(db, DM9000_RCR, 0x00); /* Disable RX */
1311 * Stop the interface.
1312 * The interface is stopped when it is brought.
1315 dm9000_stop(struct net_device *ndev)
1317 board_info_t *db = netdev_priv(ndev);
1319 if (netif_msg_ifdown(db))
1320 dev_dbg(db->dev, "shutting down %s\n", ndev->name);
1322 cancel_delayed_work_sync(&db->phy_poll);
1324 netif_stop_queue(ndev);
1325 netif_carrier_off(ndev);
1327 /* free interrupt */
1328 free_irq(ndev->irq, ndev);
1330 dm9000_shutdown(ndev);
1335 static const struct net_device_ops dm9000_netdev_ops = {
1336 .ndo_open = dm9000_open,
1337 .ndo_stop = dm9000_stop,
1338 .ndo_start_xmit = dm9000_start_xmit,
1339 .ndo_tx_timeout = dm9000_timeout,
1340 .ndo_set_multicast_list = dm9000_hash_table,
1341 .ndo_do_ioctl = dm9000_ioctl,
1342 .ndo_change_mtu = eth_change_mtu,
1343 .ndo_validate_addr = eth_validate_addr,
1344 .ndo_set_mac_address = eth_mac_addr,
1345 #ifdef CONFIG_NET_POLL_CONTROLLER
1346 .ndo_poll_controller = dm9000_poll_controller,
1351 * Search DM9000 board, allocate space and register it
1353 static int __devinit
1354 dm9000_probe(struct platform_device *pdev)
1356 struct dm9000_plat_data *pdata = pdev->dev.platform_data;
1357 struct board_info *db; /* Point a board information structure */
1358 struct net_device *ndev;
1359 const unsigned char *mac_src;
1365 /* Init network device */
1366 ndev = alloc_etherdev(sizeof(struct board_info));
1368 dev_err(&pdev->dev, "could not allocate device.\n");
1372 SET_NETDEV_DEV(ndev, &pdev->dev);
1374 dev_dbg(&pdev->dev, "dm9000_probe()\n");
1376 /* setup board info structure */
1377 db = netdev_priv(ndev);
1379 db->dev = &pdev->dev;
1382 spin_lock_init(&db->lock);
1383 mutex_init(&db->addr_lock);
1385 INIT_DELAYED_WORK(&db->phy_poll, dm9000_poll_work);
1387 db->addr_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1388 db->data_res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1389 db->irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1391 if (db->addr_res == NULL || db->data_res == NULL ||
1392 db->irq_res == NULL) {
1393 dev_err(db->dev, "insufficient resources\n");
1398 db->irq_wake = platform_get_irq(pdev, 1);
1399 if (db->irq_wake >= 0) {
1400 dev_dbg(db->dev, "wakeup irq %d\n", db->irq_wake);
1402 ret = request_irq(db->irq_wake, dm9000_wol_interrupt,
1403 IRQF_SHARED, dev_name(db->dev), ndev);
1405 dev_err(db->dev, "cannot get wakeup irq (%d)\n", ret);
1408 /* test to see if irq is really wakeup capable */
1409 ret = set_irq_wake(db->irq_wake, 1);
1411 dev_err(db->dev, "irq %d cannot set wakeup (%d)\n",
1415 set_irq_wake(db->irq_wake, 0);
1416 db->wake_supported = 1;
1421 iosize = resource_size(db->addr_res);
1422 db->addr_req = request_mem_region(db->addr_res->start, iosize,
1425 if (db->addr_req == NULL) {
1426 dev_err(db->dev, "cannot claim address reg area\n");
1431 db->io_addr = ioremap(db->addr_res->start, iosize);
1433 if (db->io_addr == NULL) {
1434 dev_err(db->dev, "failed to ioremap address reg\n");
1439 iosize = resource_size(db->data_res);
1440 db->data_req = request_mem_region(db->data_res->start, iosize,
1443 if (db->data_req == NULL) {
1444 dev_err(db->dev, "cannot claim data reg area\n");
1449 db->io_data = ioremap(db->data_res->start, iosize);
1451 if (db->io_data == NULL) {
1452 dev_err(db->dev, "failed to ioremap data reg\n");
1457 /* fill in parameters for net-dev structure */
1458 ndev->base_addr = (unsigned long)db->io_addr;
1459 ndev->irq = db->irq_res->start;
1461 /* ensure at least we have a default set of IO routines */
1462 dm9000_set_io(db, iosize);
1464 /* check to see if anything is being over-ridden */
1465 if (pdata != NULL) {
1466 /* check to see if the driver wants to over-ride the
1467 * default IO width */
1469 if (pdata->flags & DM9000_PLATF_8BITONLY)
1470 dm9000_set_io(db, 1);
1472 if (pdata->flags & DM9000_PLATF_16BITONLY)
1473 dm9000_set_io(db, 2);
1475 if (pdata->flags & DM9000_PLATF_32BITONLY)
1476 dm9000_set_io(db, 4);
1478 /* check to see if there are any IO routine
1481 if (pdata->inblk != NULL)
1482 db->inblk = pdata->inblk;
1484 if (pdata->outblk != NULL)
1485 db->outblk = pdata->outblk;
1487 if (pdata->dumpblk != NULL)
1488 db->dumpblk = pdata->dumpblk;
1490 db->flags = pdata->flags;
1493 #ifdef CONFIG_DM9000_FORCE_SIMPLE_PHY_POLL
1494 db->flags |= DM9000_PLATF_SIMPLE_PHY;
1499 /* try multiple times, DM9000 sometimes gets the read wrong */
1500 for (i = 0; i < 8; i++) {
1501 id_val = ior(db, DM9000_VIDL);
1502 id_val |= (u32)ior(db, DM9000_VIDH) << 8;
1503 id_val |= (u32)ior(db, DM9000_PIDL) << 16;
1504 id_val |= (u32)ior(db, DM9000_PIDH) << 24;
1506 if (id_val == DM9000_ID)
1508 dev_err(db->dev, "read wrong id 0x%08x\n", id_val);
1511 if (id_val != DM9000_ID) {
1512 dev_err(db->dev, "wrong id: 0x%08x\n", id_val);
1517 /* Identify what type of DM9000 we are working on */
1519 id_val = ior(db, DM9000_CHIPR);
1520 dev_dbg(db->dev, "dm9000 revision 0x%02x\n", id_val);
1524 db->type = TYPE_DM9000A;
1527 db->type = TYPE_DM9000B;
1530 dev_dbg(db->dev, "ID %02x => defaulting to DM9000E\n", id_val);
1531 db->type = TYPE_DM9000E;
1534 /* dm9000a/b are capable of hardware checksum offload */
1535 if (db->type == TYPE_DM9000A || db->type == TYPE_DM9000B) {
1538 ndev->features |= NETIF_F_IP_CSUM;
1541 /* from this point we assume that we have found a DM9000 */
1543 /* driver system function */
1546 ndev->netdev_ops = &dm9000_netdev_ops;
1547 ndev->watchdog_timeo = msecs_to_jiffies(watchdog);
1548 ndev->ethtool_ops = &dm9000_ethtool_ops;
1550 db->msg_enable = NETIF_MSG_LINK;
1551 db->mii.phy_id_mask = 0x1f;
1552 db->mii.reg_num_mask = 0x1f;
1553 db->mii.force_media = 0;
1554 db->mii.full_duplex = 0;
1556 db->mii.mdio_read = dm9000_phy_read;
1557 db->mii.mdio_write = dm9000_phy_write;
1561 /* try reading the node address from the attached EEPROM */
1562 for (i = 0; i < 6; i += 2)
1563 dm9000_read_eeprom(db, i / 2, ndev->dev_addr+i);
1565 if (!is_valid_ether_addr(ndev->dev_addr) && pdata != NULL) {
1566 mac_src = "platform data";
1567 memcpy(ndev->dev_addr, pdata->dev_addr, 6);
1570 if (!is_valid_ether_addr(ndev->dev_addr)) {
1571 /* try reading from mac */
1574 for (i = 0; i < 6; i++)
1575 ndev->dev_addr[i] = ior(db, i+DM9000_PAR);
1578 if (!is_valid_ether_addr(ndev->dev_addr))
1579 dev_warn(db->dev, "%s: Invalid ethernet MAC address. Please "
1580 "set using ifconfig\n", ndev->name);
1582 platform_set_drvdata(pdev, ndev);
1583 ret = register_netdev(ndev);
1586 printk(KERN_INFO "%s: dm9000%c at %p,%p IRQ %d MAC: %pM (%s)\n",
1587 ndev->name, dm9000_type_to_char(db->type),
1588 db->io_addr, db->io_data, ndev->irq,
1589 ndev->dev_addr, mac_src);
1593 dev_err(db->dev, "not found (%d).\n", ret);
1595 dm9000_release_board(pdev, db);
1602 dm9000_drv_suspend(struct device *dev)
1604 struct platform_device *pdev = to_platform_device(dev);
1605 struct net_device *ndev = platform_get_drvdata(pdev);
1609 db = netdev_priv(ndev);
1612 if (!netif_running(ndev))
1615 netif_device_detach(ndev);
1617 /* only shutdown if not using WoL */
1618 if (!db->wake_state)
1619 dm9000_shutdown(ndev);
1625 dm9000_drv_resume(struct device *dev)
1627 struct platform_device *pdev = to_platform_device(dev);
1628 struct net_device *ndev = platform_get_drvdata(pdev);
1629 board_info_t *db = netdev_priv(ndev);
1632 if (netif_running(ndev)) {
1633 /* reset if we were not in wake mode to ensure if
1634 * the device was powered off it is in a known state */
1635 if (!db->wake_state) {
1637 dm9000_init_dm9000(ndev);
1640 netif_device_attach(ndev);
1648 static const struct dev_pm_ops dm9000_drv_pm_ops = {
1649 .suspend = dm9000_drv_suspend,
1650 .resume = dm9000_drv_resume,
1653 static int __devexit
1654 dm9000_drv_remove(struct platform_device *pdev)
1656 struct net_device *ndev = platform_get_drvdata(pdev);
1658 platform_set_drvdata(pdev, NULL);
1660 unregister_netdev(ndev);
1661 dm9000_release_board(pdev, (board_info_t *) netdev_priv(ndev));
1662 free_netdev(ndev); /* free device structure */
1664 dev_dbg(&pdev->dev, "released and freed device\n");
1668 static struct platform_driver dm9000_driver = {
1671 .owner = THIS_MODULE,
1672 .pm = &dm9000_drv_pm_ops,
1674 .probe = dm9000_probe,
1675 .remove = __devexit_p(dm9000_drv_remove),
1681 printk(KERN_INFO "%s Ethernet Driver, V%s\n", CARDNAME, DRV_VERSION);
1683 return platform_driver_register(&dm9000_driver);
1687 dm9000_cleanup(void)
1689 platform_driver_unregister(&dm9000_driver);
1692 module_init(dm9000_init);
1693 module_exit(dm9000_cleanup);
1695 MODULE_AUTHOR("Sascha Hauer, Ben Dooks");
1696 MODULE_DESCRIPTION("Davicom DM9000 network driver");
1697 MODULE_LICENSE("GPL");
1698 MODULE_ALIAS("platform:dm9000");