1 /*******************************************************************************
3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *******************************************************************************/
30 #include <net/ip6_checksum.h>
32 char e1000_driver_name[] = "e1000";
33 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
34 #ifndef CONFIG_E1000_NAPI
37 #define DRIVERNAPI "-NAPI"
39 #define DRV_VERSION "7.3.20-k2"DRIVERNAPI
40 const char e1000_driver_version[] = DRV_VERSION;
41 static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
43 /* e1000_pci_tbl - PCI Device ID Table
45 * Last entry must be all 0s
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
50 static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
76 INTEL_E1000_ETHERNET_DEVICE(0x1049),
77 INTEL_E1000_ETHERNET_DEVICE(0x104A),
78 INTEL_E1000_ETHERNET_DEVICE(0x104B),
79 INTEL_E1000_ETHERNET_DEVICE(0x104C),
80 INTEL_E1000_ETHERNET_DEVICE(0x104D),
81 INTEL_E1000_ETHERNET_DEVICE(0x105E),
82 INTEL_E1000_ETHERNET_DEVICE(0x105F),
83 INTEL_E1000_ETHERNET_DEVICE(0x1060),
84 INTEL_E1000_ETHERNET_DEVICE(0x1075),
85 INTEL_E1000_ETHERNET_DEVICE(0x1076),
86 INTEL_E1000_ETHERNET_DEVICE(0x1077),
87 INTEL_E1000_ETHERNET_DEVICE(0x1078),
88 INTEL_E1000_ETHERNET_DEVICE(0x1079),
89 INTEL_E1000_ETHERNET_DEVICE(0x107A),
90 INTEL_E1000_ETHERNET_DEVICE(0x107B),
91 INTEL_E1000_ETHERNET_DEVICE(0x107C),
92 INTEL_E1000_ETHERNET_DEVICE(0x107D),
93 INTEL_E1000_ETHERNET_DEVICE(0x107E),
94 INTEL_E1000_ETHERNET_DEVICE(0x107F),
95 INTEL_E1000_ETHERNET_DEVICE(0x108A),
96 INTEL_E1000_ETHERNET_DEVICE(0x108B),
97 INTEL_E1000_ETHERNET_DEVICE(0x108C),
98 INTEL_E1000_ETHERNET_DEVICE(0x1096),
99 INTEL_E1000_ETHERNET_DEVICE(0x1098),
100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
102 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
103 INTEL_E1000_ETHERNET_DEVICE(0x10A5),
104 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
105 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
106 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
107 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
108 INTEL_E1000_ETHERNET_DEVICE(0x10BC),
109 INTEL_E1000_ETHERNET_DEVICE(0x10C4),
110 INTEL_E1000_ETHERNET_DEVICE(0x10C5),
111 INTEL_E1000_ETHERNET_DEVICE(0x10D5),
112 INTEL_E1000_ETHERNET_DEVICE(0x10D9),
113 INTEL_E1000_ETHERNET_DEVICE(0x10DA),
114 /* required last entry */
118 MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
120 int e1000_up(struct e1000_adapter *adapter);
121 void e1000_down(struct e1000_adapter *adapter);
122 void e1000_reinit_locked(struct e1000_adapter *adapter);
123 void e1000_reset(struct e1000_adapter *adapter);
124 int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
125 int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
126 int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
127 void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
128 void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
129 static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
130 struct e1000_tx_ring *txdr);
131 static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
132 struct e1000_rx_ring *rxdr);
133 static void e1000_free_tx_resources(struct e1000_adapter *adapter,
134 struct e1000_tx_ring *tx_ring);
135 static void e1000_free_rx_resources(struct e1000_adapter *adapter,
136 struct e1000_rx_ring *rx_ring);
137 void e1000_update_stats(struct e1000_adapter *adapter);
139 static int e1000_init_module(void);
140 static void e1000_exit_module(void);
141 static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
142 static void __devexit e1000_remove(struct pci_dev *pdev);
143 static int e1000_alloc_queues(struct e1000_adapter *adapter);
144 static int e1000_sw_init(struct e1000_adapter *adapter);
145 static int e1000_open(struct net_device *netdev);
146 static int e1000_close(struct net_device *netdev);
147 static void e1000_configure_tx(struct e1000_adapter *adapter);
148 static void e1000_configure_rx(struct e1000_adapter *adapter);
149 static void e1000_setup_rctl(struct e1000_adapter *adapter);
150 static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
151 static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
152 static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
153 struct e1000_tx_ring *tx_ring);
154 static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
155 struct e1000_rx_ring *rx_ring);
156 static void e1000_set_rx_mode(struct net_device *netdev);
157 static void e1000_update_phy_info(unsigned long data);
158 static void e1000_watchdog(unsigned long data);
159 static void e1000_82547_tx_fifo_stall(unsigned long data);
160 static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
161 static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
162 static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
163 static int e1000_set_mac(struct net_device *netdev, void *p);
164 static irqreturn_t e1000_intr(int irq, void *data);
165 static irqreturn_t e1000_intr_msi(int irq, void *data);
166 static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
167 struct e1000_tx_ring *tx_ring);
168 #ifdef CONFIG_E1000_NAPI
169 static int e1000_clean(struct napi_struct *napi, int budget);
170 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
171 struct e1000_rx_ring *rx_ring,
172 int *work_done, int work_to_do);
173 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
174 struct e1000_rx_ring *rx_ring,
175 int *work_done, int work_to_do);
177 static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
178 struct e1000_rx_ring *rx_ring);
179 static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
180 struct e1000_rx_ring *rx_ring);
182 static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
183 struct e1000_rx_ring *rx_ring,
185 static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
186 struct e1000_rx_ring *rx_ring,
188 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
189 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
191 static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
192 static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
193 static void e1000_tx_timeout(struct net_device *dev);
194 static void e1000_reset_task(struct work_struct *work);
195 static void e1000_smartspeed(struct e1000_adapter *adapter);
196 static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
197 struct sk_buff *skb);
199 static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
200 static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
201 static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
202 static void e1000_restore_vlan(struct e1000_adapter *adapter);
204 static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
206 static int e1000_resume(struct pci_dev *pdev);
208 static void e1000_shutdown(struct pci_dev *pdev);
210 #ifdef CONFIG_NET_POLL_CONTROLLER
211 /* for netdump / net console */
212 static void e1000_netpoll (struct net_device *netdev);
215 #define COPYBREAK_DEFAULT 256
216 static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
217 module_param(copybreak, uint, 0644);
218 MODULE_PARM_DESC(copybreak,
219 "Maximum size of packet that is copied to a new buffer on receive");
221 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
222 pci_channel_state_t state);
223 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
224 static void e1000_io_resume(struct pci_dev *pdev);
226 static struct pci_error_handlers e1000_err_handler = {
227 .error_detected = e1000_io_error_detected,
228 .slot_reset = e1000_io_slot_reset,
229 .resume = e1000_io_resume,
232 static struct pci_driver e1000_driver = {
233 .name = e1000_driver_name,
234 .id_table = e1000_pci_tbl,
235 .probe = e1000_probe,
236 .remove = __devexit_p(e1000_remove),
238 /* Power Managment Hooks */
239 .suspend = e1000_suspend,
240 .resume = e1000_resume,
242 .shutdown = e1000_shutdown,
243 .err_handler = &e1000_err_handler
246 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
247 MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
248 MODULE_LICENSE("GPL");
249 MODULE_VERSION(DRV_VERSION);
251 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
252 module_param(debug, int, 0);
253 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
256 * e1000_init_module - Driver Registration Routine
258 * e1000_init_module is the first routine called when the driver is
259 * loaded. All it does is register with the PCI subsystem.
263 e1000_init_module(void)
266 printk(KERN_INFO "%s - version %s\n",
267 e1000_driver_string, e1000_driver_version);
269 printk(KERN_INFO "%s\n", e1000_copyright);
271 ret = pci_register_driver(&e1000_driver);
272 if (copybreak != COPYBREAK_DEFAULT) {
274 printk(KERN_INFO "e1000: copybreak disabled\n");
276 printk(KERN_INFO "e1000: copybreak enabled for "
277 "packets <= %u bytes\n", copybreak);
282 module_init(e1000_init_module);
285 * e1000_exit_module - Driver Exit Cleanup Routine
287 * e1000_exit_module is called just before the driver is removed
292 e1000_exit_module(void)
294 pci_unregister_driver(&e1000_driver);
297 module_exit(e1000_exit_module);
299 static int e1000_request_irq(struct e1000_adapter *adapter)
301 struct net_device *netdev = adapter->netdev;
302 irq_handler_t handler = e1000_intr;
303 int irq_flags = IRQF_SHARED;
306 if (adapter->hw.mac_type >= e1000_82571) {
307 adapter->have_msi = !pci_enable_msi(adapter->pdev);
308 if (adapter->have_msi) {
309 handler = e1000_intr_msi;
314 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
317 if (adapter->have_msi)
318 pci_disable_msi(adapter->pdev);
320 "Unable to allocate interrupt Error: %d\n", err);
326 static void e1000_free_irq(struct e1000_adapter *adapter)
328 struct net_device *netdev = adapter->netdev;
330 free_irq(adapter->pdev->irq, netdev);
332 if (adapter->have_msi)
333 pci_disable_msi(adapter->pdev);
337 * e1000_irq_disable - Mask off interrupt generation on the NIC
338 * @adapter: board private structure
342 e1000_irq_disable(struct e1000_adapter *adapter)
344 atomic_inc(&adapter->irq_sem);
345 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
346 E1000_WRITE_FLUSH(&adapter->hw);
347 synchronize_irq(adapter->pdev->irq);
351 * e1000_irq_enable - Enable default interrupt generation settings
352 * @adapter: board private structure
356 e1000_irq_enable(struct e1000_adapter *adapter)
358 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
359 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
360 E1000_WRITE_FLUSH(&adapter->hw);
365 e1000_update_mng_vlan(struct e1000_adapter *adapter)
367 struct net_device *netdev = adapter->netdev;
368 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
369 uint16_t old_vid = adapter->mng_vlan_id;
370 if (adapter->vlgrp) {
371 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
372 if (adapter->hw.mng_cookie.status &
373 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
374 e1000_vlan_rx_add_vid(netdev, vid);
375 adapter->mng_vlan_id = vid;
377 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
379 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
381 !vlan_group_get_device(adapter->vlgrp, old_vid))
382 e1000_vlan_rx_kill_vid(netdev, old_vid);
384 adapter->mng_vlan_id = vid;
389 * e1000_release_hw_control - release control of the h/w to f/w
390 * @adapter: address of board private structure
392 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
393 * For ASF and Pass Through versions of f/w this means that the
394 * driver is no longer loaded. For AMT version (only with 82573) i
395 * of the f/w this means that the network i/f is closed.
400 e1000_release_hw_control(struct e1000_adapter *adapter)
405 /* Let firmware taken over control of h/w */
406 switch (adapter->hw.mac_type) {
408 swsm = E1000_READ_REG(&adapter->hw, SWSM);
409 E1000_WRITE_REG(&adapter->hw, SWSM,
410 swsm & ~E1000_SWSM_DRV_LOAD);
414 case e1000_80003es2lan:
416 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
417 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
418 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
426 * e1000_get_hw_control - get control of the h/w from f/w
427 * @adapter: address of board private structure
429 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
430 * For ASF and Pass Through versions of f/w this means that
431 * the driver is loaded. For AMT version (only with 82573)
432 * of the f/w this means that the network i/f is open.
437 e1000_get_hw_control(struct e1000_adapter *adapter)
442 /* Let firmware know the driver has taken over */
443 switch (adapter->hw.mac_type) {
445 swsm = E1000_READ_REG(&adapter->hw, SWSM);
446 E1000_WRITE_REG(&adapter->hw, SWSM,
447 swsm | E1000_SWSM_DRV_LOAD);
451 case e1000_80003es2lan:
453 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
454 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
455 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
463 e1000_init_manageability(struct e1000_adapter *adapter)
465 if (adapter->en_mng_pt) {
466 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
468 /* disable hardware interception of ARP */
469 manc &= ~(E1000_MANC_ARP_EN);
471 /* enable receiving management packets to the host */
472 /* this will probably generate destination unreachable messages
473 * from the host OS, but the packets will be handled on SMBUS */
474 if (adapter->hw.has_manc2h) {
475 uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
477 manc |= E1000_MANC_EN_MNG2HOST;
478 #define E1000_MNG2HOST_PORT_623 (1 << 5)
479 #define E1000_MNG2HOST_PORT_664 (1 << 6)
480 manc2h |= E1000_MNG2HOST_PORT_623;
481 manc2h |= E1000_MNG2HOST_PORT_664;
482 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
485 E1000_WRITE_REG(&adapter->hw, MANC, manc);
490 e1000_release_manageability(struct e1000_adapter *adapter)
492 if (adapter->en_mng_pt) {
493 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
495 /* re-enable hardware interception of ARP */
496 manc |= E1000_MANC_ARP_EN;
498 if (adapter->hw.has_manc2h)
499 manc &= ~E1000_MANC_EN_MNG2HOST;
501 /* don't explicitly have to mess with MANC2H since
502 * MANC has an enable disable that gates MANC2H */
504 E1000_WRITE_REG(&adapter->hw, MANC, manc);
509 * e1000_configure - configure the hardware for RX and TX
510 * @adapter = private board structure
512 static void e1000_configure(struct e1000_adapter *adapter)
514 struct net_device *netdev = adapter->netdev;
517 e1000_set_rx_mode(netdev);
519 e1000_restore_vlan(adapter);
520 e1000_init_manageability(adapter);
522 e1000_configure_tx(adapter);
523 e1000_setup_rctl(adapter);
524 e1000_configure_rx(adapter);
525 /* call E1000_DESC_UNUSED which always leaves
526 * at least 1 descriptor unused to make sure
527 * next_to_use != next_to_clean */
528 for (i = 0; i < adapter->num_rx_queues; i++) {
529 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
530 adapter->alloc_rx_buf(adapter, ring,
531 E1000_DESC_UNUSED(ring));
534 adapter->tx_queue_len = netdev->tx_queue_len;
537 int e1000_up(struct e1000_adapter *adapter)
539 /* hardware has been reset, we need to reload some things */
540 e1000_configure(adapter);
542 clear_bit(__E1000_DOWN, &adapter->flags);
544 #ifdef CONFIG_E1000_NAPI
545 napi_enable(&adapter->napi);
547 e1000_irq_enable(adapter);
549 /* fire a link change interrupt to start the watchdog */
550 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
555 * e1000_power_up_phy - restore link in case the phy was powered down
556 * @adapter: address of board private structure
558 * The phy may be powered down to save power and turn off link when the
559 * driver is unloaded and wake on lan is not enabled (among others)
560 * *** this routine MUST be followed by a call to e1000_reset ***
564 void e1000_power_up_phy(struct e1000_adapter *adapter)
566 uint16_t mii_reg = 0;
568 /* Just clear the power down bit to wake the phy back up */
569 if (adapter->hw.media_type == e1000_media_type_copper) {
570 /* according to the manual, the phy will retain its
571 * settings across a power-down/up cycle */
572 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
573 mii_reg &= ~MII_CR_POWER_DOWN;
574 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
578 static void e1000_power_down_phy(struct e1000_adapter *adapter)
580 /* Power down the PHY so no link is implied when interface is down *
581 * The PHY cannot be powered down if any of the following is TRUE *
584 * (c) SoL/IDER session is active */
585 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
586 adapter->hw.media_type == e1000_media_type_copper) {
587 uint16_t mii_reg = 0;
589 switch (adapter->hw.mac_type) {
592 case e1000_82545_rev_3:
594 case e1000_82546_rev_3:
596 case e1000_82541_rev_2:
598 case e1000_82547_rev_2:
599 if (E1000_READ_REG(&adapter->hw, MANC) &
606 case e1000_80003es2lan:
608 if (e1000_check_mng_mode(&adapter->hw) ||
609 e1000_check_phy_reset_block(&adapter->hw))
615 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
616 mii_reg |= MII_CR_POWER_DOWN;
617 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
625 e1000_down(struct e1000_adapter *adapter)
627 struct net_device *netdev = adapter->netdev;
629 /* signal that we're down so the interrupt handler does not
630 * reschedule our watchdog timer */
631 set_bit(__E1000_DOWN, &adapter->flags);
633 #ifdef CONFIG_E1000_NAPI
634 napi_disable(&adapter->napi);
635 atomic_set(&adapter->irq_sem, 0);
637 e1000_irq_disable(adapter);
639 del_timer_sync(&adapter->tx_fifo_stall_timer);
640 del_timer_sync(&adapter->watchdog_timer);
641 del_timer_sync(&adapter->phy_info_timer);
643 netdev->tx_queue_len = adapter->tx_queue_len;
644 adapter->link_speed = 0;
645 adapter->link_duplex = 0;
646 netif_carrier_off(netdev);
647 netif_stop_queue(netdev);
649 e1000_reset(adapter);
650 e1000_clean_all_tx_rings(adapter);
651 e1000_clean_all_rx_rings(adapter);
655 e1000_reinit_locked(struct e1000_adapter *adapter)
657 WARN_ON(in_interrupt());
658 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
662 clear_bit(__E1000_RESETTING, &adapter->flags);
666 e1000_reset(struct e1000_adapter *adapter)
668 uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
669 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
670 boolean_t legacy_pba_adjust = FALSE;
672 /* Repartition Pba for greater than 9k mtu
673 * To take effect CTRL.RST is required.
676 switch (adapter->hw.mac_type) {
677 case e1000_82542_rev2_0:
678 case e1000_82542_rev2_1:
683 case e1000_82541_rev_2:
684 legacy_pba_adjust = TRUE;
688 case e1000_82545_rev_3:
690 case e1000_82546_rev_3:
694 case e1000_82547_rev_2:
695 legacy_pba_adjust = TRUE;
700 case e1000_80003es2lan:
708 case e1000_undefined:
713 if (legacy_pba_adjust == TRUE) {
714 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
715 pba -= 8; /* allocate more FIFO for Tx */
717 if (adapter->hw.mac_type == e1000_82547) {
718 adapter->tx_fifo_head = 0;
719 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
720 adapter->tx_fifo_size =
721 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
722 atomic_set(&adapter->tx_fifo_stall, 0);
724 } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
725 /* adjust PBA for jumbo frames */
726 E1000_WRITE_REG(&adapter->hw, PBA, pba);
728 /* To maintain wire speed transmits, the Tx FIFO should be
729 * large enough to accomodate two full transmit packets,
730 * rounded up to the next 1KB and expressed in KB. Likewise,
731 * the Rx FIFO should be large enough to accomodate at least
732 * one full receive packet and is similarly rounded up and
733 * expressed in KB. */
734 pba = E1000_READ_REG(&adapter->hw, PBA);
735 /* upper 16 bits has Tx packet buffer allocation size in KB */
736 tx_space = pba >> 16;
737 /* lower 16 bits has Rx packet buffer allocation size in KB */
739 /* don't include ethernet FCS because hardware appends/strips */
740 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
742 min_tx_space = min_rx_space;
744 min_tx_space = ALIGN(min_tx_space, 1024);
746 min_rx_space = ALIGN(min_rx_space, 1024);
749 /* If current Tx allocation is less than the min Tx FIFO size,
750 * and the min Tx FIFO size is less than the current Rx FIFO
751 * allocation, take space away from current Rx allocation */
752 if (tx_space < min_tx_space &&
753 ((min_tx_space - tx_space) < pba)) {
754 pba = pba - (min_tx_space - tx_space);
756 /* PCI/PCIx hardware has PBA alignment constraints */
757 switch (adapter->hw.mac_type) {
758 case e1000_82545 ... e1000_82546_rev_3:
759 pba &= ~(E1000_PBA_8K - 1);
765 /* if short on rx space, rx wins and must trump tx
766 * adjustment or use Early Receive if available */
767 if (pba < min_rx_space) {
768 switch (adapter->hw.mac_type) {
770 /* ERT enabled in e1000_configure_rx */
780 E1000_WRITE_REG(&adapter->hw, PBA, pba);
782 /* flow control settings */
783 /* Set the FC high water mark to 90% of the FIFO size.
784 * Required to clear last 3 LSB */
785 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
786 /* We can't use 90% on small FIFOs because the remainder
787 * would be less than 1 full frame. In this case, we size
788 * it to allow at least a full frame above the high water
790 if (pba < E1000_PBA_16K)
791 fc_high_water_mark = (pba * 1024) - 1600;
793 adapter->hw.fc_high_water = fc_high_water_mark;
794 adapter->hw.fc_low_water = fc_high_water_mark - 8;
795 if (adapter->hw.mac_type == e1000_80003es2lan)
796 adapter->hw.fc_pause_time = 0xFFFF;
798 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
799 adapter->hw.fc_send_xon = 1;
800 adapter->hw.fc = adapter->hw.original_fc;
802 /* Allow time for pending master requests to run */
803 e1000_reset_hw(&adapter->hw);
804 if (adapter->hw.mac_type >= e1000_82544)
805 E1000_WRITE_REG(&adapter->hw, WUC, 0);
807 if (e1000_init_hw(&adapter->hw))
808 DPRINTK(PROBE, ERR, "Hardware Error\n");
809 e1000_update_mng_vlan(adapter);
811 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
812 if (adapter->hw.mac_type >= e1000_82544 &&
813 adapter->hw.mac_type <= e1000_82547_rev_2 &&
814 adapter->hw.autoneg == 1 &&
815 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
816 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
817 /* clear phy power management bit if we are in gig only mode,
818 * which if enabled will attempt negotiation to 100Mb, which
819 * can cause a loss of link at power off or driver unload */
820 ctrl &= ~E1000_CTRL_SWDPIN3;
821 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
824 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
825 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
827 e1000_reset_adaptive(&adapter->hw);
828 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
830 if (!adapter->smart_power_down &&
831 (adapter->hw.mac_type == e1000_82571 ||
832 adapter->hw.mac_type == e1000_82572)) {
833 uint16_t phy_data = 0;
834 /* speed up time to link by disabling smart power down, ignore
835 * the return value of this function because there is nothing
836 * different we would do if it failed */
837 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
839 phy_data &= ~IGP02E1000_PM_SPD;
840 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
844 e1000_release_manageability(adapter);
848 * Dump the eeprom for users having checksum issues
850 void e1000_dump_eeprom(struct e1000_adapter *adapter)
852 struct net_device *netdev = adapter->netdev;
853 struct ethtool_eeprom eeprom;
854 const struct ethtool_ops *ops = netdev->ethtool_ops;
857 u16 csum_old, csum_new = 0;
859 eeprom.len = ops->get_eeprom_len(netdev);
862 data = kmalloc(eeprom.len, GFP_KERNEL);
864 printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
869 ops->get_eeprom(netdev, &eeprom, data);
871 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
872 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
873 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
874 csum_new += data[i] + (data[i + 1] << 8);
875 csum_new = EEPROM_SUM - csum_new;
877 printk(KERN_ERR "/*********************/\n");
878 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
879 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
881 printk(KERN_ERR "Offset Values\n");
882 printk(KERN_ERR "======== ======\n");
883 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
885 printk(KERN_ERR "Include this output when contacting your support "
887 printk(KERN_ERR "This is not a software error! Something bad "
888 "happened to your hardware or\n");
889 printk(KERN_ERR "EEPROM image. Ignoring this "
890 "problem could result in further problems,\n");
891 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
892 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
893 "which is invalid\n");
894 printk(KERN_ERR "and requires you to set the proper MAC "
895 "address manually before continuing\n");
896 printk(KERN_ERR "to enable this network device.\n");
897 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
898 "to your hardware vendor\n");
899 printk(KERN_ERR "or Intel Customer Support: linux-nics@intel.com\n");
900 printk(KERN_ERR "/*********************/\n");
906 * e1000_probe - Device Initialization Routine
907 * @pdev: PCI device information struct
908 * @ent: entry in e1000_pci_tbl
910 * Returns 0 on success, negative on failure
912 * e1000_probe initializes an adapter identified by a pci_dev structure.
913 * The OS initialization, configuring of the adapter private structure,
914 * and a hardware reset occur.
918 e1000_probe(struct pci_dev *pdev,
919 const struct pci_device_id *ent)
921 struct net_device *netdev;
922 struct e1000_adapter *adapter;
923 unsigned long mmio_start, mmio_len;
924 unsigned long flash_start, flash_len;
926 static int cards_found = 0;
927 static int global_quad_port_a = 0; /* global ksp3 port a indication */
928 int i, err, pci_using_dac;
929 uint16_t eeprom_data = 0;
930 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
931 DECLARE_MAC_BUF(mac);
933 if ((err = pci_enable_device(pdev)))
936 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
937 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
940 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
941 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
942 E1000_ERR("No usable DMA configuration, aborting\n");
948 if ((err = pci_request_regions(pdev, e1000_driver_name)))
951 pci_set_master(pdev);
954 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
956 goto err_alloc_etherdev;
958 SET_NETDEV_DEV(netdev, &pdev->dev);
960 pci_set_drvdata(pdev, netdev);
961 adapter = netdev_priv(netdev);
962 adapter->netdev = netdev;
963 adapter->pdev = pdev;
964 adapter->hw.back = adapter;
965 adapter->msg_enable = (1 << debug) - 1;
967 mmio_start = pci_resource_start(pdev, BAR_0);
968 mmio_len = pci_resource_len(pdev, BAR_0);
971 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
972 if (!adapter->hw.hw_addr)
975 for (i = BAR_1; i <= BAR_5; i++) {
976 if (pci_resource_len(pdev, i) == 0)
978 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
979 adapter->hw.io_base = pci_resource_start(pdev, i);
984 netdev->open = &e1000_open;
985 netdev->stop = &e1000_close;
986 netdev->hard_start_xmit = &e1000_xmit_frame;
987 netdev->get_stats = &e1000_get_stats;
988 netdev->set_rx_mode = &e1000_set_rx_mode;
989 netdev->set_mac_address = &e1000_set_mac;
990 netdev->change_mtu = &e1000_change_mtu;
991 netdev->do_ioctl = &e1000_ioctl;
992 e1000_set_ethtool_ops(netdev);
993 netdev->tx_timeout = &e1000_tx_timeout;
994 netdev->watchdog_timeo = 5 * HZ;
995 #ifdef CONFIG_E1000_NAPI
996 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
998 netdev->vlan_rx_register = e1000_vlan_rx_register;
999 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
1000 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
1001 #ifdef CONFIG_NET_POLL_CONTROLLER
1002 netdev->poll_controller = e1000_netpoll;
1004 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1006 netdev->mem_start = mmio_start;
1007 netdev->mem_end = mmio_start + mmio_len;
1008 netdev->base_addr = adapter->hw.io_base;
1010 adapter->bd_number = cards_found;
1012 /* setup the private structure */
1014 if ((err = e1000_sw_init(adapter)))
1018 /* Flash BAR mapping must happen after e1000_sw_init
1019 * because it depends on mac_type */
1020 if ((adapter->hw.mac_type == e1000_ich8lan) &&
1021 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
1022 flash_start = pci_resource_start(pdev, 1);
1023 flash_len = pci_resource_len(pdev, 1);
1024 adapter->hw.flash_address = ioremap(flash_start, flash_len);
1025 if (!adapter->hw.flash_address)
1029 if (e1000_check_phy_reset_block(&adapter->hw))
1030 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
1032 if (adapter->hw.mac_type >= e1000_82543) {
1033 netdev->features = NETIF_F_SG |
1035 NETIF_F_HW_VLAN_TX |
1036 NETIF_F_HW_VLAN_RX |
1037 NETIF_F_HW_VLAN_FILTER;
1038 if (adapter->hw.mac_type == e1000_ich8lan)
1039 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1042 if ((adapter->hw.mac_type >= e1000_82544) &&
1043 (adapter->hw.mac_type != e1000_82547))
1044 netdev->features |= NETIF_F_TSO;
1046 if (adapter->hw.mac_type > e1000_82547_rev_2)
1047 netdev->features |= NETIF_F_TSO6;
1049 netdev->features |= NETIF_F_HIGHDMA;
1051 netdev->features |= NETIF_F_LLTX;
1053 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
1055 /* initialize eeprom parameters */
1056 if (e1000_init_eeprom_params(&adapter->hw)) {
1057 E1000_ERR("EEPROM initialization failed\n");
1061 /* before reading the EEPROM, reset the controller to
1062 * put the device in a known good starting state */
1064 e1000_reset_hw(&adapter->hw);
1066 /* make sure the EEPROM is good */
1067 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1068 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1069 e1000_dump_eeprom(adapter);
1071 * set MAC address to all zeroes to invalidate and temporary
1072 * disable this device for the user. This blocks regular
1073 * traffic while still permitting ethtool ioctls from reaching
1074 * the hardware as well as allowing the user to run the
1075 * interface after manually setting a hw addr using
1078 memset(adapter->hw.mac_addr, 0, netdev->addr_len);
1080 /* copy the MAC address out of the EEPROM */
1081 if (e1000_read_mac_addr(&adapter->hw))
1082 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1084 /* don't block initalization here due to bad MAC address */
1085 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
1086 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1088 if (!is_valid_ether_addr(netdev->perm_addr))
1089 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1091 e1000_get_bus_info(&adapter->hw);
1093 init_timer(&adapter->tx_fifo_stall_timer);
1094 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1095 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
1097 init_timer(&adapter->watchdog_timer);
1098 adapter->watchdog_timer.function = &e1000_watchdog;
1099 adapter->watchdog_timer.data = (unsigned long) adapter;
1101 init_timer(&adapter->phy_info_timer);
1102 adapter->phy_info_timer.function = &e1000_update_phy_info;
1103 adapter->phy_info_timer.data = (unsigned long) adapter;
1105 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1107 e1000_check_options(adapter);
1109 /* Initial Wake on LAN setting
1110 * If APM wake is enabled in the EEPROM,
1111 * enable the ACPI Magic Packet filter
1114 switch (adapter->hw.mac_type) {
1115 case e1000_82542_rev2_0:
1116 case e1000_82542_rev2_1:
1120 e1000_read_eeprom(&adapter->hw,
1121 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1122 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1125 e1000_read_eeprom(&adapter->hw,
1126 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1127 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1130 case e1000_82546_rev_3:
1132 case e1000_80003es2lan:
1133 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1134 e1000_read_eeprom(&adapter->hw,
1135 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1140 e1000_read_eeprom(&adapter->hw,
1141 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1144 if (eeprom_data & eeprom_apme_mask)
1145 adapter->eeprom_wol |= E1000_WUFC_MAG;
1147 /* now that we have the eeprom settings, apply the special cases
1148 * where the eeprom may be wrong or the board simply won't support
1149 * wake on lan on a particular port */
1150 switch (pdev->device) {
1151 case E1000_DEV_ID_82546GB_PCIE:
1152 adapter->eeprom_wol = 0;
1154 case E1000_DEV_ID_82546EB_FIBER:
1155 case E1000_DEV_ID_82546GB_FIBER:
1156 case E1000_DEV_ID_82571EB_FIBER:
1157 /* Wake events only supported on port A for dual fiber
1158 * regardless of eeprom setting */
1159 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1160 adapter->eeprom_wol = 0;
1162 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
1163 case E1000_DEV_ID_82571EB_QUAD_COPPER:
1164 case E1000_DEV_ID_82571EB_QUAD_FIBER:
1165 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
1166 case E1000_DEV_ID_82571PT_QUAD_COPPER:
1167 /* if quad port adapter, disable WoL on all but port A */
1168 if (global_quad_port_a != 0)
1169 adapter->eeprom_wol = 0;
1171 adapter->quad_port_a = 1;
1172 /* Reset for multiple quad port adapters */
1173 if (++global_quad_port_a == 4)
1174 global_quad_port_a = 0;
1178 /* initialize the wol settings based on the eeprom settings */
1179 adapter->wol = adapter->eeprom_wol;
1181 /* print bus type/speed/width info */
1183 struct e1000_hw *hw = &adapter->hw;
1184 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1185 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1186 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1187 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1188 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1189 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1190 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1191 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1192 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1193 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1194 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1198 printk("%s\n", print_mac(mac, netdev->dev_addr));
1200 /* reset the hardware with the new settings */
1201 e1000_reset(adapter);
1203 /* If the controller is 82573 and f/w is AMT, do not set
1204 * DRV_LOAD until the interface is up. For all other cases,
1205 * let the f/w know that the h/w is now under the control
1207 if (adapter->hw.mac_type != e1000_82573 ||
1208 !e1000_check_mng_mode(&adapter->hw))
1209 e1000_get_hw_control(adapter);
1211 /* tell the stack to leave us alone until e1000_open() is called */
1212 netif_carrier_off(netdev);
1213 netif_stop_queue(netdev);
1215 strcpy(netdev->name, "eth%d");
1216 if ((err = register_netdev(netdev)))
1219 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1225 e1000_release_hw_control(adapter);
1227 if (!e1000_check_phy_reset_block(&adapter->hw))
1228 e1000_phy_hw_reset(&adapter->hw);
1230 if (adapter->hw.flash_address)
1231 iounmap(adapter->hw.flash_address);
1233 #ifdef CONFIG_E1000_NAPI
1234 for (i = 0; i < adapter->num_rx_queues; i++)
1235 dev_put(&adapter->polling_netdev[i]);
1238 kfree(adapter->tx_ring);
1239 kfree(adapter->rx_ring);
1240 #ifdef CONFIG_E1000_NAPI
1241 kfree(adapter->polling_netdev);
1244 iounmap(adapter->hw.hw_addr);
1246 free_netdev(netdev);
1248 pci_release_regions(pdev);
1251 pci_disable_device(pdev);
1256 * e1000_remove - Device Removal Routine
1257 * @pdev: PCI device information struct
1259 * e1000_remove is called by the PCI subsystem to alert the driver
1260 * that it should release a PCI device. The could be caused by a
1261 * Hot-Plug event, or because the driver is going to be removed from
1265 static void __devexit
1266 e1000_remove(struct pci_dev *pdev)
1268 struct net_device *netdev = pci_get_drvdata(pdev);
1269 struct e1000_adapter *adapter = netdev_priv(netdev);
1270 #ifdef CONFIG_E1000_NAPI
1274 cancel_work_sync(&adapter->reset_task);
1276 e1000_release_manageability(adapter);
1278 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1279 * would have already happened in close and is redundant. */
1280 e1000_release_hw_control(adapter);
1282 #ifdef CONFIG_E1000_NAPI
1283 for (i = 0; i < adapter->num_rx_queues; i++)
1284 dev_put(&adapter->polling_netdev[i]);
1287 unregister_netdev(netdev);
1289 if (!e1000_check_phy_reset_block(&adapter->hw))
1290 e1000_phy_hw_reset(&adapter->hw);
1292 kfree(adapter->tx_ring);
1293 kfree(adapter->rx_ring);
1294 #ifdef CONFIG_E1000_NAPI
1295 kfree(adapter->polling_netdev);
1298 iounmap(adapter->hw.hw_addr);
1299 if (adapter->hw.flash_address)
1300 iounmap(adapter->hw.flash_address);
1301 pci_release_regions(pdev);
1303 free_netdev(netdev);
1305 pci_disable_device(pdev);
1309 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1310 * @adapter: board private structure to initialize
1312 * e1000_sw_init initializes the Adapter private data structure.
1313 * Fields are initialized based on PCI device information and
1314 * OS network device settings (MTU size).
1317 static int __devinit
1318 e1000_sw_init(struct e1000_adapter *adapter)
1320 struct e1000_hw *hw = &adapter->hw;
1321 struct net_device *netdev = adapter->netdev;
1322 struct pci_dev *pdev = adapter->pdev;
1323 #ifdef CONFIG_E1000_NAPI
1327 /* PCI config space info */
1329 hw->vendor_id = pdev->vendor;
1330 hw->device_id = pdev->device;
1331 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1332 hw->subsystem_id = pdev->subsystem_device;
1333 hw->revision_id = pdev->revision;
1335 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1337 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1338 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1339 hw->max_frame_size = netdev->mtu +
1340 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1341 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1343 /* identify the MAC */
1345 if (e1000_set_mac_type(hw)) {
1346 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1350 switch (hw->mac_type) {
1355 case e1000_82541_rev_2:
1356 case e1000_82547_rev_2:
1357 hw->phy_init_script = 1;
1361 e1000_set_media_type(hw);
1363 hw->wait_autoneg_complete = FALSE;
1364 hw->tbi_compatibility_en = TRUE;
1365 hw->adaptive_ifs = TRUE;
1367 /* Copper options */
1369 if (hw->media_type == e1000_media_type_copper) {
1370 hw->mdix = AUTO_ALL_MODES;
1371 hw->disable_polarity_correction = FALSE;
1372 hw->master_slave = E1000_MASTER_SLAVE;
1375 adapter->num_tx_queues = 1;
1376 adapter->num_rx_queues = 1;
1378 if (e1000_alloc_queues(adapter)) {
1379 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1383 #ifdef CONFIG_E1000_NAPI
1384 for (i = 0; i < adapter->num_rx_queues; i++) {
1385 adapter->polling_netdev[i].priv = adapter;
1386 dev_hold(&adapter->polling_netdev[i]);
1387 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1389 spin_lock_init(&adapter->tx_queue_lock);
1392 /* Explicitly disable IRQ since the NIC can be in any state. */
1393 atomic_set(&adapter->irq_sem, 0);
1394 e1000_irq_disable(adapter);
1396 spin_lock_init(&adapter->stats_lock);
1398 set_bit(__E1000_DOWN, &adapter->flags);
1404 * e1000_alloc_queues - Allocate memory for all rings
1405 * @adapter: board private structure to initialize
1407 * We allocate one ring per queue at run-time since we don't know the
1408 * number of queues at compile-time. The polling_netdev array is
1409 * intended for Multiqueue, but should work fine with a single queue.
1412 static int __devinit
1413 e1000_alloc_queues(struct e1000_adapter *adapter)
1415 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1416 sizeof(struct e1000_tx_ring), GFP_KERNEL);
1417 if (!adapter->tx_ring)
1420 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1421 sizeof(struct e1000_rx_ring), GFP_KERNEL);
1422 if (!adapter->rx_ring) {
1423 kfree(adapter->tx_ring);
1427 #ifdef CONFIG_E1000_NAPI
1428 adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
1429 sizeof(struct net_device),
1431 if (!adapter->polling_netdev) {
1432 kfree(adapter->tx_ring);
1433 kfree(adapter->rx_ring);
1438 return E1000_SUCCESS;
1442 * e1000_open - Called when a network interface is made active
1443 * @netdev: network interface device structure
1445 * Returns 0 on success, negative value on failure
1447 * The open entry point is called when a network interface is made
1448 * active by the system (IFF_UP). At this point all resources needed
1449 * for transmit and receive operations are allocated, the interrupt
1450 * handler is registered with the OS, the watchdog timer is started,
1451 * and the stack is notified that the interface is ready.
1455 e1000_open(struct net_device *netdev)
1457 struct e1000_adapter *adapter = netdev_priv(netdev);
1460 /* disallow open during test */
1461 if (test_bit(__E1000_TESTING, &adapter->flags))
1464 /* allocate transmit descriptors */
1465 err = e1000_setup_all_tx_resources(adapter);
1469 /* allocate receive descriptors */
1470 err = e1000_setup_all_rx_resources(adapter);
1474 e1000_power_up_phy(adapter);
1476 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1477 if ((adapter->hw.mng_cookie.status &
1478 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1479 e1000_update_mng_vlan(adapter);
1482 /* If AMT is enabled, let the firmware know that the network
1483 * interface is now open */
1484 if (adapter->hw.mac_type == e1000_82573 &&
1485 e1000_check_mng_mode(&adapter->hw))
1486 e1000_get_hw_control(adapter);
1488 /* before we allocate an interrupt, we must be ready to handle it.
1489 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1490 * as soon as we call pci_request_irq, so we have to setup our
1491 * clean_rx handler before we do so. */
1492 e1000_configure(adapter);
1494 err = e1000_request_irq(adapter);
1498 /* From here on the code is the same as e1000_up() */
1499 clear_bit(__E1000_DOWN, &adapter->flags);
1501 #ifdef CONFIG_E1000_NAPI
1502 napi_enable(&adapter->napi);
1505 e1000_irq_enable(adapter);
1507 /* fire a link status change interrupt to start the watchdog */
1508 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
1510 return E1000_SUCCESS;
1513 e1000_release_hw_control(adapter);
1514 e1000_power_down_phy(adapter);
1515 e1000_free_all_rx_resources(adapter);
1517 e1000_free_all_tx_resources(adapter);
1519 e1000_reset(adapter);
1525 * e1000_close - Disables a network interface
1526 * @netdev: network interface device structure
1528 * Returns 0, this is not allowed to fail
1530 * The close entry point is called when an interface is de-activated
1531 * by the OS. The hardware is still under the drivers control, but
1532 * needs to be disabled. A global MAC reset is issued to stop the
1533 * hardware, and all transmit and receive resources are freed.
1537 e1000_close(struct net_device *netdev)
1539 struct e1000_adapter *adapter = netdev_priv(netdev);
1541 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1542 e1000_down(adapter);
1543 e1000_power_down_phy(adapter);
1544 e1000_free_irq(adapter);
1546 e1000_free_all_tx_resources(adapter);
1547 e1000_free_all_rx_resources(adapter);
1549 /* kill manageability vlan ID if supported, but not if a vlan with
1550 * the same ID is registered on the host OS (let 8021q kill it) */
1551 if ((adapter->hw.mng_cookie.status &
1552 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1554 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
1555 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1558 /* If AMT is enabled, let the firmware know that the network
1559 * interface is now closed */
1560 if (adapter->hw.mac_type == e1000_82573 &&
1561 e1000_check_mng_mode(&adapter->hw))
1562 e1000_release_hw_control(adapter);
1568 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1569 * @adapter: address of board private structure
1570 * @start: address of beginning of memory
1571 * @len: length of memory
1574 e1000_check_64k_bound(struct e1000_adapter *adapter,
1575 void *start, unsigned long len)
1577 unsigned long begin = (unsigned long) start;
1578 unsigned long end = begin + len;
1580 /* First rev 82545 and 82546 need to not allow any memory
1581 * write location to cross 64k boundary due to errata 23 */
1582 if (adapter->hw.mac_type == e1000_82545 ||
1583 adapter->hw.mac_type == e1000_82546) {
1584 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1591 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1592 * @adapter: board private structure
1593 * @txdr: tx descriptor ring (for a specific queue) to setup
1595 * Return 0 on success, negative on failure
1599 e1000_setup_tx_resources(struct e1000_adapter *adapter,
1600 struct e1000_tx_ring *txdr)
1602 struct pci_dev *pdev = adapter->pdev;
1605 size = sizeof(struct e1000_buffer) * txdr->count;
1606 txdr->buffer_info = vmalloc(size);
1607 if (!txdr->buffer_info) {
1609 "Unable to allocate memory for the transmit descriptor ring\n");
1612 memset(txdr->buffer_info, 0, size);
1614 /* round up to nearest 4K */
1616 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1617 txdr->size = ALIGN(txdr->size, 4096);
1619 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1622 vfree(txdr->buffer_info);
1624 "Unable to allocate memory for the transmit descriptor ring\n");
1628 /* Fix for errata 23, can't cross 64kB boundary */
1629 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1630 void *olddesc = txdr->desc;
1631 dma_addr_t olddma = txdr->dma;
1632 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1633 "at %p\n", txdr->size, txdr->desc);
1634 /* Try again, without freeing the previous */
1635 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
1636 /* Failed allocation, critical failure */
1638 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1639 goto setup_tx_desc_die;
1642 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1644 pci_free_consistent(pdev, txdr->size, txdr->desc,
1646 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1648 "Unable to allocate aligned memory "
1649 "for the transmit descriptor ring\n");
1650 vfree(txdr->buffer_info);
1653 /* Free old allocation, new allocation was successful */
1654 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1657 memset(txdr->desc, 0, txdr->size);
1659 txdr->next_to_use = 0;
1660 txdr->next_to_clean = 0;
1661 spin_lock_init(&txdr->tx_lock);
1667 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1668 * (Descriptors) for all queues
1669 * @adapter: board private structure
1671 * Return 0 on success, negative on failure
1675 e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1679 for (i = 0; i < adapter->num_tx_queues; i++) {
1680 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1683 "Allocation for Tx Queue %u failed\n", i);
1684 for (i-- ; i >= 0; i--)
1685 e1000_free_tx_resources(adapter,
1686 &adapter->tx_ring[i]);
1695 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1696 * @adapter: board private structure
1698 * Configure the Tx unit of the MAC after a reset.
1702 e1000_configure_tx(struct e1000_adapter *adapter)
1705 struct e1000_hw *hw = &adapter->hw;
1706 uint32_t tdlen, tctl, tipg, tarc;
1707 uint32_t ipgr1, ipgr2;
1709 /* Setup the HW Tx Head and Tail descriptor pointers */
1711 switch (adapter->num_tx_queues) {
1714 tdba = adapter->tx_ring[0].dma;
1715 tdlen = adapter->tx_ring[0].count *
1716 sizeof(struct e1000_tx_desc);
1717 E1000_WRITE_REG(hw, TDLEN, tdlen);
1718 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1719 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1720 E1000_WRITE_REG(hw, TDT, 0);
1721 E1000_WRITE_REG(hw, TDH, 0);
1722 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1723 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
1727 /* Set the default values for the Tx Inter Packet Gap timer */
1728 if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
1729 (hw->media_type == e1000_media_type_fiber ||
1730 hw->media_type == e1000_media_type_internal_serdes))
1731 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1733 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1735 switch (hw->mac_type) {
1736 case e1000_82542_rev2_0:
1737 case e1000_82542_rev2_1:
1738 tipg = DEFAULT_82542_TIPG_IPGT;
1739 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1740 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1742 case e1000_80003es2lan:
1743 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1744 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1747 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1748 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1751 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1752 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1753 E1000_WRITE_REG(hw, TIPG, tipg);
1755 /* Set the Tx Interrupt Delay register */
1757 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1758 if (hw->mac_type >= e1000_82540)
1759 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1761 /* Program the Transmit Control Register */
1763 tctl = E1000_READ_REG(hw, TCTL);
1764 tctl &= ~E1000_TCTL_CT;
1765 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1766 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1768 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1769 tarc = E1000_READ_REG(hw, TARC0);
1770 /* set the speed mode bit, we'll clear it if we're not at
1771 * gigabit link later */
1773 E1000_WRITE_REG(hw, TARC0, tarc);
1774 } else if (hw->mac_type == e1000_80003es2lan) {
1775 tarc = E1000_READ_REG(hw, TARC0);
1777 E1000_WRITE_REG(hw, TARC0, tarc);
1778 tarc = E1000_READ_REG(hw, TARC1);
1780 E1000_WRITE_REG(hw, TARC1, tarc);
1783 e1000_config_collision_dist(hw);
1785 /* Setup Transmit Descriptor Settings for eop descriptor */
1786 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1788 /* only set IDE if we are delaying interrupts using the timers */
1789 if (adapter->tx_int_delay)
1790 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1792 if (hw->mac_type < e1000_82543)
1793 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1795 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1797 /* Cache if we're 82544 running in PCI-X because we'll
1798 * need this to apply a workaround later in the send path. */
1799 if (hw->mac_type == e1000_82544 &&
1800 hw->bus_type == e1000_bus_type_pcix)
1801 adapter->pcix_82544 = 1;
1803 E1000_WRITE_REG(hw, TCTL, tctl);
1808 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1809 * @adapter: board private structure
1810 * @rxdr: rx descriptor ring (for a specific queue) to setup
1812 * Returns 0 on success, negative on failure
1816 e1000_setup_rx_resources(struct e1000_adapter *adapter,
1817 struct e1000_rx_ring *rxdr)
1819 struct pci_dev *pdev = adapter->pdev;
1822 size = sizeof(struct e1000_buffer) * rxdr->count;
1823 rxdr->buffer_info = vmalloc(size);
1824 if (!rxdr->buffer_info) {
1826 "Unable to allocate memory for the receive descriptor ring\n");
1829 memset(rxdr->buffer_info, 0, size);
1831 rxdr->ps_page = kcalloc(rxdr->count, sizeof(struct e1000_ps_page),
1833 if (!rxdr->ps_page) {
1834 vfree(rxdr->buffer_info);
1836 "Unable to allocate memory for the receive descriptor ring\n");
1840 rxdr->ps_page_dma = kcalloc(rxdr->count,
1841 sizeof(struct e1000_ps_page_dma),
1843 if (!rxdr->ps_page_dma) {
1844 vfree(rxdr->buffer_info);
1845 kfree(rxdr->ps_page);
1847 "Unable to allocate memory for the receive descriptor ring\n");
1851 if (adapter->hw.mac_type <= e1000_82547_rev_2)
1852 desc_len = sizeof(struct e1000_rx_desc);
1854 desc_len = sizeof(union e1000_rx_desc_packet_split);
1856 /* Round up to nearest 4K */
1858 rxdr->size = rxdr->count * desc_len;
1859 rxdr->size = ALIGN(rxdr->size, 4096);
1861 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1865 "Unable to allocate memory for the receive descriptor ring\n");
1867 vfree(rxdr->buffer_info);
1868 kfree(rxdr->ps_page);
1869 kfree(rxdr->ps_page_dma);
1873 /* Fix for errata 23, can't cross 64kB boundary */
1874 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1875 void *olddesc = rxdr->desc;
1876 dma_addr_t olddma = rxdr->dma;
1877 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1878 "at %p\n", rxdr->size, rxdr->desc);
1879 /* Try again, without freeing the previous */
1880 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1881 /* Failed allocation, critical failure */
1883 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1885 "Unable to allocate memory "
1886 "for the receive descriptor ring\n");
1887 goto setup_rx_desc_die;
1890 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1892 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1894 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1896 "Unable to allocate aligned memory "
1897 "for the receive descriptor ring\n");
1898 goto setup_rx_desc_die;
1900 /* Free old allocation, new allocation was successful */
1901 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1904 memset(rxdr->desc, 0, rxdr->size);
1906 rxdr->next_to_clean = 0;
1907 rxdr->next_to_use = 0;
1913 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1914 * (Descriptors) for all queues
1915 * @adapter: board private structure
1917 * Return 0 on success, negative on failure
1921 e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1925 for (i = 0; i < adapter->num_rx_queues; i++) {
1926 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1929 "Allocation for Rx Queue %u failed\n", i);
1930 for (i-- ; i >= 0; i--)
1931 e1000_free_rx_resources(adapter,
1932 &adapter->rx_ring[i]);
1941 * e1000_setup_rctl - configure the receive control registers
1942 * @adapter: Board private structure
1944 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1945 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1947 e1000_setup_rctl(struct e1000_adapter *adapter)
1949 uint32_t rctl, rfctl;
1950 uint32_t psrctl = 0;
1951 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
1955 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1957 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1959 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1960 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1961 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1963 if (adapter->hw.tbi_compatibility_on == 1)
1964 rctl |= E1000_RCTL_SBP;
1966 rctl &= ~E1000_RCTL_SBP;
1968 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1969 rctl &= ~E1000_RCTL_LPE;
1971 rctl |= E1000_RCTL_LPE;
1973 /* Setup buffer sizes */
1974 rctl &= ~E1000_RCTL_SZ_4096;
1975 rctl |= E1000_RCTL_BSEX;
1976 switch (adapter->rx_buffer_len) {
1977 case E1000_RXBUFFER_256:
1978 rctl |= E1000_RCTL_SZ_256;
1979 rctl &= ~E1000_RCTL_BSEX;
1981 case E1000_RXBUFFER_512:
1982 rctl |= E1000_RCTL_SZ_512;
1983 rctl &= ~E1000_RCTL_BSEX;
1985 case E1000_RXBUFFER_1024:
1986 rctl |= E1000_RCTL_SZ_1024;
1987 rctl &= ~E1000_RCTL_BSEX;
1989 case E1000_RXBUFFER_2048:
1991 rctl |= E1000_RCTL_SZ_2048;
1992 rctl &= ~E1000_RCTL_BSEX;
1994 case E1000_RXBUFFER_4096:
1995 rctl |= E1000_RCTL_SZ_4096;
1997 case E1000_RXBUFFER_8192:
1998 rctl |= E1000_RCTL_SZ_8192;
2000 case E1000_RXBUFFER_16384:
2001 rctl |= E1000_RCTL_SZ_16384;
2005 #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2006 /* 82571 and greater support packet-split where the protocol
2007 * header is placed in skb->data and the packet data is
2008 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2009 * In the case of a non-split, skb->data is linearly filled,
2010 * followed by the page buffers. Therefore, skb->data is
2011 * sized to hold the largest protocol header.
2013 /* allocations using alloc_page take too long for regular MTU
2014 * so only enable packet split for jumbo frames */
2015 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
2016 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
2017 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
2018 adapter->rx_ps_pages = pages;
2020 adapter->rx_ps_pages = 0;
2022 if (adapter->rx_ps_pages) {
2023 /* Configure extra packet-split registers */
2024 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
2025 rfctl |= E1000_RFCTL_EXTEN;
2026 /* disable packet split support for IPv6 extension headers,
2027 * because some malformed IPv6 headers can hang the RX */
2028 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2029 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2031 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
2033 rctl |= E1000_RCTL_DTYP_PS;
2035 psrctl |= adapter->rx_ps_bsize0 >>
2036 E1000_PSRCTL_BSIZE0_SHIFT;
2038 switch (adapter->rx_ps_pages) {
2040 psrctl |= PAGE_SIZE <<
2041 E1000_PSRCTL_BSIZE3_SHIFT;
2043 psrctl |= PAGE_SIZE <<
2044 E1000_PSRCTL_BSIZE2_SHIFT;
2046 psrctl |= PAGE_SIZE >>
2047 E1000_PSRCTL_BSIZE1_SHIFT;
2051 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
2054 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2058 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
2059 * @adapter: board private structure
2061 * Configure the Rx unit of the MAC after a reset.
2065 e1000_configure_rx(struct e1000_adapter *adapter)
2068 struct e1000_hw *hw = &adapter->hw;
2069 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2071 if (adapter->rx_ps_pages) {
2072 /* this is a 32 byte descriptor */
2073 rdlen = adapter->rx_ring[0].count *
2074 sizeof(union e1000_rx_desc_packet_split);
2075 adapter->clean_rx = e1000_clean_rx_irq_ps;
2076 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2078 rdlen = adapter->rx_ring[0].count *
2079 sizeof(struct e1000_rx_desc);
2080 adapter->clean_rx = e1000_clean_rx_irq;
2081 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2084 /* disable receives while setting up the descriptors */
2085 rctl = E1000_READ_REG(hw, RCTL);
2086 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
2088 /* set the Receive Delay Timer Register */
2089 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
2091 if (hw->mac_type >= e1000_82540) {
2092 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
2093 if (adapter->itr_setting != 0)
2094 E1000_WRITE_REG(hw, ITR,
2095 1000000000 / (adapter->itr * 256));
2098 if (hw->mac_type >= e1000_82571) {
2099 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
2100 /* Reset delay timers after every interrupt */
2101 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2102 #ifdef CONFIG_E1000_NAPI
2103 /* Auto-Mask interrupts upon ICR access */
2104 ctrl_ext |= E1000_CTRL_EXT_IAME;
2105 E1000_WRITE_REG(hw, IAM, 0xffffffff);
2107 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
2108 E1000_WRITE_FLUSH(hw);
2111 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2112 * the Base and Length of the Rx Descriptor Ring */
2113 switch (adapter->num_rx_queues) {
2116 rdba = adapter->rx_ring[0].dma;
2117 E1000_WRITE_REG(hw, RDLEN, rdlen);
2118 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
2119 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
2120 E1000_WRITE_REG(hw, RDT, 0);
2121 E1000_WRITE_REG(hw, RDH, 0);
2122 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2123 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
2127 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
2128 if (hw->mac_type >= e1000_82543) {
2129 rxcsum = E1000_READ_REG(hw, RXCSUM);
2130 if (adapter->rx_csum == TRUE) {
2131 rxcsum |= E1000_RXCSUM_TUOFL;
2133 /* Enable 82571 IPv4 payload checksum for UDP fragments
2134 * Must be used in conjunction with packet-split. */
2135 if ((hw->mac_type >= e1000_82571) &&
2136 (adapter->rx_ps_pages)) {
2137 rxcsum |= E1000_RXCSUM_IPPCSE;
2140 rxcsum &= ~E1000_RXCSUM_TUOFL;
2141 /* don't need to clear IPPCSE as it defaults to 0 */
2143 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
2146 /* enable early receives on 82573, only takes effect if using > 2048
2147 * byte total frame size. for example only for jumbo frames */
2148 #define E1000_ERT_2048 0x100
2149 if (hw->mac_type == e1000_82573)
2150 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2152 /* Enable Receives */
2153 E1000_WRITE_REG(hw, RCTL, rctl);
2157 * e1000_free_tx_resources - Free Tx Resources per Queue
2158 * @adapter: board private structure
2159 * @tx_ring: Tx descriptor ring for a specific queue
2161 * Free all transmit software resources
2165 e1000_free_tx_resources(struct e1000_adapter *adapter,
2166 struct e1000_tx_ring *tx_ring)
2168 struct pci_dev *pdev = adapter->pdev;
2170 e1000_clean_tx_ring(adapter, tx_ring);
2172 vfree(tx_ring->buffer_info);
2173 tx_ring->buffer_info = NULL;
2175 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2177 tx_ring->desc = NULL;
2181 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2182 * @adapter: board private structure
2184 * Free all transmit software resources
2188 e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2192 for (i = 0; i < adapter->num_tx_queues; i++)
2193 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
2197 e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2198 struct e1000_buffer *buffer_info)
2200 if (buffer_info->dma) {
2201 pci_unmap_page(adapter->pdev,
2203 buffer_info->length,
2205 buffer_info->dma = 0;
2207 if (buffer_info->skb) {
2208 dev_kfree_skb_any(buffer_info->skb);
2209 buffer_info->skb = NULL;
2211 /* buffer_info must be completely set up in the transmit path */
2215 * e1000_clean_tx_ring - Free Tx Buffers
2216 * @adapter: board private structure
2217 * @tx_ring: ring to be cleaned
2221 e1000_clean_tx_ring(struct e1000_adapter *adapter,
2222 struct e1000_tx_ring *tx_ring)
2224 struct e1000_buffer *buffer_info;
2228 /* Free all the Tx ring sk_buffs */
2230 for (i = 0; i < tx_ring->count; i++) {
2231 buffer_info = &tx_ring->buffer_info[i];
2232 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2235 size = sizeof(struct e1000_buffer) * tx_ring->count;
2236 memset(tx_ring->buffer_info, 0, size);
2238 /* Zero out the descriptor ring */
2240 memset(tx_ring->desc, 0, tx_ring->size);
2242 tx_ring->next_to_use = 0;
2243 tx_ring->next_to_clean = 0;
2244 tx_ring->last_tx_tso = 0;
2246 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2247 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2251 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2252 * @adapter: board private structure
2256 e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2260 for (i = 0; i < adapter->num_tx_queues; i++)
2261 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
2265 * e1000_free_rx_resources - Free Rx Resources
2266 * @adapter: board private structure
2267 * @rx_ring: ring to clean the resources from
2269 * Free all receive software resources
2273 e1000_free_rx_resources(struct e1000_adapter *adapter,
2274 struct e1000_rx_ring *rx_ring)
2276 struct pci_dev *pdev = adapter->pdev;
2278 e1000_clean_rx_ring(adapter, rx_ring);
2280 vfree(rx_ring->buffer_info);
2281 rx_ring->buffer_info = NULL;
2282 kfree(rx_ring->ps_page);
2283 rx_ring->ps_page = NULL;
2284 kfree(rx_ring->ps_page_dma);
2285 rx_ring->ps_page_dma = NULL;
2287 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2289 rx_ring->desc = NULL;
2293 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
2294 * @adapter: board private structure
2296 * Free all receive software resources
2300 e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2304 for (i = 0; i < adapter->num_rx_queues; i++)
2305 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2309 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2310 * @adapter: board private structure
2311 * @rx_ring: ring to free buffers from
2315 e1000_clean_rx_ring(struct e1000_adapter *adapter,
2316 struct e1000_rx_ring *rx_ring)
2318 struct e1000_buffer *buffer_info;
2319 struct e1000_ps_page *ps_page;
2320 struct e1000_ps_page_dma *ps_page_dma;
2321 struct pci_dev *pdev = adapter->pdev;
2325 /* Free all the Rx ring sk_buffs */
2326 for (i = 0; i < rx_ring->count; i++) {
2327 buffer_info = &rx_ring->buffer_info[i];
2328 if (buffer_info->skb) {
2329 pci_unmap_single(pdev,
2331 buffer_info->length,
2332 PCI_DMA_FROMDEVICE);
2334 dev_kfree_skb(buffer_info->skb);
2335 buffer_info->skb = NULL;
2337 ps_page = &rx_ring->ps_page[i];
2338 ps_page_dma = &rx_ring->ps_page_dma[i];
2339 for (j = 0; j < adapter->rx_ps_pages; j++) {
2340 if (!ps_page->ps_page[j]) break;
2341 pci_unmap_page(pdev,
2342 ps_page_dma->ps_page_dma[j],
2343 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2344 ps_page_dma->ps_page_dma[j] = 0;
2345 put_page(ps_page->ps_page[j]);
2346 ps_page->ps_page[j] = NULL;
2350 size = sizeof(struct e1000_buffer) * rx_ring->count;
2351 memset(rx_ring->buffer_info, 0, size);
2352 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2353 memset(rx_ring->ps_page, 0, size);
2354 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2355 memset(rx_ring->ps_page_dma, 0, size);
2357 /* Zero out the descriptor ring */
2359 memset(rx_ring->desc, 0, rx_ring->size);
2361 rx_ring->next_to_clean = 0;
2362 rx_ring->next_to_use = 0;
2364 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2365 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2369 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2370 * @adapter: board private structure
2374 e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2378 for (i = 0; i < adapter->num_rx_queues; i++)
2379 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
2382 /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2383 * and memory write and invalidate disabled for certain operations
2386 e1000_enter_82542_rst(struct e1000_adapter *adapter)
2388 struct net_device *netdev = adapter->netdev;
2391 e1000_pci_clear_mwi(&adapter->hw);
2393 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2394 rctl |= E1000_RCTL_RST;
2395 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2396 E1000_WRITE_FLUSH(&adapter->hw);
2399 if (netif_running(netdev))
2400 e1000_clean_all_rx_rings(adapter);
2404 e1000_leave_82542_rst(struct e1000_adapter *adapter)
2406 struct net_device *netdev = adapter->netdev;
2409 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2410 rctl &= ~E1000_RCTL_RST;
2411 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2412 E1000_WRITE_FLUSH(&adapter->hw);
2415 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
2416 e1000_pci_set_mwi(&adapter->hw);
2418 if (netif_running(netdev)) {
2419 /* No need to loop, because 82542 supports only 1 queue */
2420 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
2421 e1000_configure_rx(adapter);
2422 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
2427 * e1000_set_mac - Change the Ethernet Address of the NIC
2428 * @netdev: network interface device structure
2429 * @p: pointer to an address structure
2431 * Returns 0 on success, negative on failure
2435 e1000_set_mac(struct net_device *netdev, void *p)
2437 struct e1000_adapter *adapter = netdev_priv(netdev);
2438 struct sockaddr *addr = p;
2440 if (!is_valid_ether_addr(addr->sa_data))
2441 return -EADDRNOTAVAIL;
2443 /* 82542 2.0 needs to be in reset to write receive address registers */
2445 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2446 e1000_enter_82542_rst(adapter);
2448 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2449 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2451 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2453 /* With 82571 controllers, LAA may be overwritten (with the default)
2454 * due to controller reset from the other port. */
2455 if (adapter->hw.mac_type == e1000_82571) {
2456 /* activate the work around */
2457 adapter->hw.laa_is_present = 1;
2459 /* Hold a copy of the LAA in RAR[14] This is done so that
2460 * between the time RAR[0] gets clobbered and the time it
2461 * gets fixed (in e1000_watchdog), the actual LAA is in one
2462 * of the RARs and no incoming packets directed to this port
2463 * are dropped. Eventaully the LAA will be in RAR[0] and
2465 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
2466 E1000_RAR_ENTRIES - 1);
2469 if (adapter->hw.mac_type == e1000_82542_rev2_0)
2470 e1000_leave_82542_rst(adapter);
2476 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
2477 * @netdev: network interface device structure
2479 * The set_rx_mode entry point is called whenever the unicast or multicast
2480 * address lists or the network interface flags are updated. This routine is
2481 * responsible for configuring the hardware for proper unicast, multicast,
2482 * promiscuous mode, and all-multi behavior.
2486 e1000_set_rx_mode(struct net_device *netdev)
2488 struct e1000_adapter *adapter = netdev_priv(netdev);
2489 struct e1000_hw *hw = &adapter->hw;
2490 struct dev_addr_list *uc_ptr;
2491 struct dev_addr_list *mc_ptr;
2493 uint32_t hash_value;
2494 int i, rar_entries = E1000_RAR_ENTRIES;
2495 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2496 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2497 E1000_NUM_MTA_REGISTERS;
2499 if (adapter->hw.mac_type == e1000_ich8lan)
2500 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
2502 /* reserve RAR[14] for LAA over-write work-around */
2503 if (adapter->hw.mac_type == e1000_82571)
2506 /* Check for Promiscuous and All Multicast modes */
2508 rctl = E1000_READ_REG(hw, RCTL);
2510 if (netdev->flags & IFF_PROMISC) {
2511 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
2512 } else if (netdev->flags & IFF_ALLMULTI) {
2513 rctl |= E1000_RCTL_MPE;
2515 rctl &= ~E1000_RCTL_MPE;
2519 if (netdev->uc_count > rar_entries - 1) {
2520 rctl |= E1000_RCTL_UPE;
2521 } else if (!(netdev->flags & IFF_PROMISC)) {
2522 rctl &= ~E1000_RCTL_UPE;
2523 uc_ptr = netdev->uc_list;
2526 E1000_WRITE_REG(hw, RCTL, rctl);
2528 /* 82542 2.0 needs to be in reset to write receive address registers */
2530 if (hw->mac_type == e1000_82542_rev2_0)
2531 e1000_enter_82542_rst(adapter);
2533 /* load the first 14 addresses into the exact filters 1-14. Unicast
2534 * addresses take precedence to avoid disabling unicast filtering
2537 * RAR 0 is used for the station MAC adddress
2538 * if there are not 14 addresses, go ahead and clear the filters
2539 * -- with 82571 controllers only 0-13 entries are filled here
2541 mc_ptr = netdev->mc_list;
2543 for (i = 1; i < rar_entries; i++) {
2545 e1000_rar_set(hw, uc_ptr->da_addr, i);
2546 uc_ptr = uc_ptr->next;
2547 } else if (mc_ptr) {
2548 e1000_rar_set(hw, mc_ptr->da_addr, i);
2549 mc_ptr = mc_ptr->next;
2551 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2552 E1000_WRITE_FLUSH(hw);
2553 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2554 E1000_WRITE_FLUSH(hw);
2557 WARN_ON(uc_ptr != NULL);
2559 /* clear the old settings from the multicast hash table */
2561 for (i = 0; i < mta_reg_count; i++) {
2562 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2563 E1000_WRITE_FLUSH(hw);
2566 /* load any remaining addresses into the hash table */
2568 for (; mc_ptr; mc_ptr = mc_ptr->next) {
2569 hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr);
2570 e1000_mta_set(hw, hash_value);
2573 if (hw->mac_type == e1000_82542_rev2_0)
2574 e1000_leave_82542_rst(adapter);
2577 /* Need to wait a few seconds after link up to get diagnostic information from
2581 e1000_update_phy_info(unsigned long data)
2583 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2584 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2588 * e1000_82547_tx_fifo_stall - Timer Call-back
2589 * @data: pointer to adapter cast into an unsigned long
2593 e1000_82547_tx_fifo_stall(unsigned long data)
2595 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2596 struct net_device *netdev = adapter->netdev;
2599 if (atomic_read(&adapter->tx_fifo_stall)) {
2600 if ((E1000_READ_REG(&adapter->hw, TDT) ==
2601 E1000_READ_REG(&adapter->hw, TDH)) &&
2602 (E1000_READ_REG(&adapter->hw, TDFT) ==
2603 E1000_READ_REG(&adapter->hw, TDFH)) &&
2604 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2605 E1000_READ_REG(&adapter->hw, TDFHS))) {
2606 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2607 E1000_WRITE_REG(&adapter->hw, TCTL,
2608 tctl & ~E1000_TCTL_EN);
2609 E1000_WRITE_REG(&adapter->hw, TDFT,
2610 adapter->tx_head_addr);
2611 E1000_WRITE_REG(&adapter->hw, TDFH,
2612 adapter->tx_head_addr);
2613 E1000_WRITE_REG(&adapter->hw, TDFTS,
2614 adapter->tx_head_addr);
2615 E1000_WRITE_REG(&adapter->hw, TDFHS,
2616 adapter->tx_head_addr);
2617 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2618 E1000_WRITE_FLUSH(&adapter->hw);
2620 adapter->tx_fifo_head = 0;
2621 atomic_set(&adapter->tx_fifo_stall, 0);
2622 netif_wake_queue(netdev);
2624 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2630 * e1000_watchdog - Timer Call-back
2631 * @data: pointer to adapter cast into an unsigned long
2634 e1000_watchdog(unsigned long data)
2636 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2637 struct net_device *netdev = adapter->netdev;
2638 struct e1000_tx_ring *txdr = adapter->tx_ring;
2639 uint32_t link, tctl;
2642 ret_val = e1000_check_for_link(&adapter->hw);
2643 if ((ret_val == E1000_ERR_PHY) &&
2644 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2645 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2646 /* See e1000_kumeran_lock_loss_workaround() */
2648 "Gigabit has been disabled, downgrading speed\n");
2651 if (adapter->hw.mac_type == e1000_82573) {
2652 e1000_enable_tx_pkt_filtering(&adapter->hw);
2653 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2654 e1000_update_mng_vlan(adapter);
2657 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
2658 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2659 link = !adapter->hw.serdes_link_down;
2661 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2664 if (!netif_carrier_ok(netdev)) {
2666 boolean_t txb2b = 1;
2667 e1000_get_speed_and_duplex(&adapter->hw,
2668 &adapter->link_speed,
2669 &adapter->link_duplex);
2671 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
2672 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2673 "Flow Control: %s\n",
2674 adapter->link_speed,
2675 adapter->link_duplex == FULL_DUPLEX ?
2676 "Full Duplex" : "Half Duplex",
2677 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2678 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2679 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2680 E1000_CTRL_TFCE) ? "TX" : "None" )));
2682 /* tweak tx_queue_len according to speed/duplex
2683 * and adjust the timeout factor */
2684 netdev->tx_queue_len = adapter->tx_queue_len;
2685 adapter->tx_timeout_factor = 1;
2686 switch (adapter->link_speed) {
2689 netdev->tx_queue_len = 10;
2690 adapter->tx_timeout_factor = 8;
2694 netdev->tx_queue_len = 100;
2695 /* maybe add some timeout factor ? */
2699 if ((adapter->hw.mac_type == e1000_82571 ||
2700 adapter->hw.mac_type == e1000_82572) &&
2703 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2704 tarc0 &= ~(1 << 21);
2705 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2708 /* disable TSO for pcie and 10/100 speeds, to avoid
2709 * some hardware issues */
2710 if (!adapter->tso_force &&
2711 adapter->hw.bus_type == e1000_bus_type_pci_express){
2712 switch (adapter->link_speed) {
2716 "10/100 speed: disabling TSO\n");
2717 netdev->features &= ~NETIF_F_TSO;
2718 netdev->features &= ~NETIF_F_TSO6;
2721 netdev->features |= NETIF_F_TSO;
2722 netdev->features |= NETIF_F_TSO6;
2730 /* enable transmits in the hardware, need to do this
2731 * after setting TARC0 */
2732 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2733 tctl |= E1000_TCTL_EN;
2734 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2736 netif_carrier_on(netdev);
2737 netif_wake_queue(netdev);
2738 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2739 adapter->smartspeed = 0;
2741 /* make sure the receive unit is started */
2742 if (adapter->hw.rx_needs_kicking) {
2743 struct e1000_hw *hw = &adapter->hw;
2744 uint32_t rctl = E1000_READ_REG(hw, RCTL);
2745 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
2749 if (netif_carrier_ok(netdev)) {
2750 adapter->link_speed = 0;
2751 adapter->link_duplex = 0;
2752 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2753 netif_carrier_off(netdev);
2754 netif_stop_queue(netdev);
2755 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
2757 /* 80003ES2LAN workaround--
2758 * For packet buffer work-around on link down event;
2759 * disable receives in the ISR and
2760 * reset device here in the watchdog
2762 if (adapter->hw.mac_type == e1000_80003es2lan)
2764 schedule_work(&adapter->reset_task);
2767 e1000_smartspeed(adapter);
2770 e1000_update_stats(adapter);
2772 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2773 adapter->tpt_old = adapter->stats.tpt;
2774 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2775 adapter->colc_old = adapter->stats.colc;
2777 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2778 adapter->gorcl_old = adapter->stats.gorcl;
2779 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2780 adapter->gotcl_old = adapter->stats.gotcl;
2782 e1000_update_adaptive(&adapter->hw);
2784 if (!netif_carrier_ok(netdev)) {
2785 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
2786 /* We've lost link, so the controller stops DMA,
2787 * but we've got queued Tx work that's never going
2788 * to get done, so reset controller to flush Tx.
2789 * (Do the reset outside of interrupt context). */
2790 adapter->tx_timeout_count++;
2791 schedule_work(&adapter->reset_task);
2795 /* Cause software interrupt to ensure rx ring is cleaned */
2796 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2798 /* Force detection of hung controller every watchdog period */
2799 adapter->detect_tx_hung = TRUE;
2801 /* With 82571 controllers, LAA may be overwritten due to controller
2802 * reset from the other port. Set the appropriate LAA in RAR[0] */
2803 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2804 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2806 /* Reset the timer */
2807 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
2810 enum latency_range {
2814 latency_invalid = 255
2818 * e1000_update_itr - update the dynamic ITR value based on statistics
2819 * Stores a new ITR value based on packets and byte
2820 * counts during the last interrupt. The advantage of per interrupt
2821 * computation is faster updates and more accurate ITR for the current
2822 * traffic pattern. Constants in this function were computed
2823 * based on theoretical maximum wire speed and thresholds were set based
2824 * on testing data as well as attempting to minimize response time
2825 * while increasing bulk throughput.
2826 * this functionality is controlled by the InterruptThrottleRate module
2827 * parameter (see e1000_param.c)
2828 * @adapter: pointer to adapter
2829 * @itr_setting: current adapter->itr
2830 * @packets: the number of packets during this measurement interval
2831 * @bytes: the number of bytes during this measurement interval
2833 static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2834 uint16_t itr_setting,
2838 unsigned int retval = itr_setting;
2839 struct e1000_hw *hw = &adapter->hw;
2841 if (unlikely(hw->mac_type < e1000_82540))
2842 goto update_itr_done;
2845 goto update_itr_done;
2847 switch (itr_setting) {
2848 case lowest_latency:
2849 /* jumbo frames get bulk treatment*/
2850 if (bytes/packets > 8000)
2851 retval = bulk_latency;
2852 else if ((packets < 5) && (bytes > 512))
2853 retval = low_latency;
2855 case low_latency: /* 50 usec aka 20000 ints/s */
2856 if (bytes > 10000) {
2857 /* jumbo frames need bulk latency setting */
2858 if (bytes/packets > 8000)
2859 retval = bulk_latency;
2860 else if ((packets < 10) || ((bytes/packets) > 1200))
2861 retval = bulk_latency;
2862 else if ((packets > 35))
2863 retval = lowest_latency;
2864 } else if (bytes/packets > 2000)
2865 retval = bulk_latency;
2866 else if (packets <= 2 && bytes < 512)
2867 retval = lowest_latency;
2869 case bulk_latency: /* 250 usec aka 4000 ints/s */
2870 if (bytes > 25000) {
2872 retval = low_latency;
2873 } else if (bytes < 6000) {
2874 retval = low_latency;
2883 static void e1000_set_itr(struct e1000_adapter *adapter)
2885 struct e1000_hw *hw = &adapter->hw;
2886 uint16_t current_itr;
2887 uint32_t new_itr = adapter->itr;
2889 if (unlikely(hw->mac_type < e1000_82540))
2892 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2893 if (unlikely(adapter->link_speed != SPEED_1000)) {
2899 adapter->tx_itr = e1000_update_itr(adapter,
2901 adapter->total_tx_packets,
2902 adapter->total_tx_bytes);
2903 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2904 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2905 adapter->tx_itr = low_latency;
2907 adapter->rx_itr = e1000_update_itr(adapter,
2909 adapter->total_rx_packets,
2910 adapter->total_rx_bytes);
2911 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2912 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2913 adapter->rx_itr = low_latency;
2915 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2917 switch (current_itr) {
2918 /* counts and packets in update_itr are dependent on these numbers */
2919 case lowest_latency:
2923 new_itr = 20000; /* aka hwitr = ~200 */
2933 if (new_itr != adapter->itr) {
2934 /* this attempts to bias the interrupt rate towards Bulk
2935 * by adding intermediate steps when interrupt rate is
2937 new_itr = new_itr > adapter->itr ?
2938 min(adapter->itr + (new_itr >> 2), new_itr) :
2940 adapter->itr = new_itr;
2941 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2947 #define E1000_TX_FLAGS_CSUM 0x00000001
2948 #define E1000_TX_FLAGS_VLAN 0x00000002
2949 #define E1000_TX_FLAGS_TSO 0x00000004
2950 #define E1000_TX_FLAGS_IPV4 0x00000008
2951 #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2952 #define E1000_TX_FLAGS_VLAN_SHIFT 16
2955 e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2956 struct sk_buff *skb)
2958 struct e1000_context_desc *context_desc;
2959 struct e1000_buffer *buffer_info;
2961 uint32_t cmd_length = 0;
2962 uint16_t ipcse = 0, tucse, mss;
2963 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2966 if (skb_is_gso(skb)) {
2967 if (skb_header_cloned(skb)) {
2968 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2973 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
2974 mss = skb_shinfo(skb)->gso_size;
2975 if (skb->protocol == htons(ETH_P_IP)) {
2976 struct iphdr *iph = ip_hdr(skb);
2979 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2983 cmd_length = E1000_TXD_CMD_IP;
2984 ipcse = skb_transport_offset(skb) - 1;
2985 } else if (skb->protocol == htons(ETH_P_IPV6)) {
2986 ipv6_hdr(skb)->payload_len = 0;
2987 tcp_hdr(skb)->check =
2988 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2989 &ipv6_hdr(skb)->daddr,
2993 ipcss = skb_network_offset(skb);
2994 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
2995 tucss = skb_transport_offset(skb);
2996 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
2999 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
3000 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
3002 i = tx_ring->next_to_use;
3003 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3004 buffer_info = &tx_ring->buffer_info[i];
3006 context_desc->lower_setup.ip_fields.ipcss = ipcss;
3007 context_desc->lower_setup.ip_fields.ipcso = ipcso;
3008 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
3009 context_desc->upper_setup.tcp_fields.tucss = tucss;
3010 context_desc->upper_setup.tcp_fields.tucso = tucso;
3011 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
3012 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
3013 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
3014 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
3016 buffer_info->time_stamp = jiffies;
3017 buffer_info->next_to_watch = i;
3019 if (++i == tx_ring->count) i = 0;
3020 tx_ring->next_to_use = i;
3028 e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3029 struct sk_buff *skb)
3031 struct e1000_context_desc *context_desc;
3032 struct e1000_buffer *buffer_info;
3036 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
3037 css = skb_transport_offset(skb);
3039 i = tx_ring->next_to_use;
3040 buffer_info = &tx_ring->buffer_info[i];
3041 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3043 context_desc->lower_setup.ip_config = 0;
3044 context_desc->upper_setup.tcp_fields.tucss = css;
3045 context_desc->upper_setup.tcp_fields.tucso =
3046 css + skb->csum_offset;
3047 context_desc->upper_setup.tcp_fields.tucse = 0;
3048 context_desc->tcp_seg_setup.data = 0;
3049 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
3051 buffer_info->time_stamp = jiffies;
3052 buffer_info->next_to_watch = i;
3054 if (unlikely(++i == tx_ring->count)) i = 0;
3055 tx_ring->next_to_use = i;
3063 #define E1000_MAX_TXD_PWR 12
3064 #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
3067 e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3068 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
3069 unsigned int nr_frags, unsigned int mss)
3071 struct e1000_buffer *buffer_info;
3072 unsigned int len = skb->len;
3073 unsigned int offset = 0, size, count = 0, i;
3075 len -= skb->data_len;
3077 i = tx_ring->next_to_use;
3080 buffer_info = &tx_ring->buffer_info[i];
3081 size = min(len, max_per_txd);
3082 /* Workaround for Controller erratum --
3083 * descriptor for non-tso packet in a linear SKB that follows a
3084 * tso gets written back prematurely before the data is fully
3085 * DMA'd to the controller */
3086 if (!skb->data_len && tx_ring->last_tx_tso &&
3088 tx_ring->last_tx_tso = 0;
3092 /* Workaround for premature desc write-backs
3093 * in TSO mode. Append 4-byte sentinel desc */
3094 if (unlikely(mss && !nr_frags && size == len && size > 8))
3096 /* work-around for errata 10 and it applies
3097 * to all controllers in PCI-X mode
3098 * The fix is to make sure that the first descriptor of a
3099 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
3101 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3102 (size > 2015) && count == 0))
3105 /* Workaround for potential 82544 hang in PCI-X. Avoid
3106 * terminating buffers within evenly-aligned dwords. */
3107 if (unlikely(adapter->pcix_82544 &&
3108 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3112 buffer_info->length = size;
3114 pci_map_single(adapter->pdev,
3118 buffer_info->time_stamp = jiffies;
3119 buffer_info->next_to_watch = i;
3124 if (unlikely(++i == tx_ring->count)) i = 0;
3127 for (f = 0; f < nr_frags; f++) {
3128 struct skb_frag_struct *frag;
3130 frag = &skb_shinfo(skb)->frags[f];
3132 offset = frag->page_offset;
3135 buffer_info = &tx_ring->buffer_info[i];
3136 size = min(len, max_per_txd);
3137 /* Workaround for premature desc write-backs
3138 * in TSO mode. Append 4-byte sentinel desc */
3139 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
3141 /* Workaround for potential 82544 hang in PCI-X.
3142 * Avoid terminating buffers within evenly-aligned
3144 if (unlikely(adapter->pcix_82544 &&
3145 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3149 buffer_info->length = size;
3151 pci_map_page(adapter->pdev,
3156 buffer_info->time_stamp = jiffies;
3157 buffer_info->next_to_watch = i;
3162 if (unlikely(++i == tx_ring->count)) i = 0;
3166 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3167 tx_ring->buffer_info[i].skb = skb;
3168 tx_ring->buffer_info[first].next_to_watch = i;
3174 e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3175 int tx_flags, int count)
3177 struct e1000_tx_desc *tx_desc = NULL;
3178 struct e1000_buffer *buffer_info;
3179 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3182 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
3183 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3185 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3187 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
3188 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3191 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
3192 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3193 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3196 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
3197 txd_lower |= E1000_TXD_CMD_VLE;
3198 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3201 i = tx_ring->next_to_use;
3204 buffer_info = &tx_ring->buffer_info[i];
3205 tx_desc = E1000_TX_DESC(*tx_ring, i);
3206 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3207 tx_desc->lower.data =
3208 cpu_to_le32(txd_lower | buffer_info->length);
3209 tx_desc->upper.data = cpu_to_le32(txd_upper);
3210 if (unlikely(++i == tx_ring->count)) i = 0;
3213 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3215 /* Force memory writes to complete before letting h/w
3216 * know there are new descriptors to fetch. (Only
3217 * applicable for weak-ordered memory model archs,
3218 * such as IA-64). */
3221 tx_ring->next_to_use = i;
3222 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
3223 /* we need this if more than one processor can write to our tail
3224 * at a time, it syncronizes IO on IA64/Altix systems */
3229 * 82547 workaround to avoid controller hang in half-duplex environment.
3230 * The workaround is to avoid queuing a large packet that would span
3231 * the internal Tx FIFO ring boundary by notifying the stack to resend
3232 * the packet at a later time. This gives the Tx FIFO an opportunity to
3233 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3234 * to the beginning of the Tx FIFO.
3237 #define E1000_FIFO_HDR 0x10
3238 #define E1000_82547_PAD_LEN 0x3E0
3241 e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3243 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3244 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3246 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
3248 if (adapter->link_duplex != HALF_DUPLEX)
3249 goto no_fifo_stall_required;
3251 if (atomic_read(&adapter->tx_fifo_stall))
3254 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
3255 atomic_set(&adapter->tx_fifo_stall, 1);
3259 no_fifo_stall_required:
3260 adapter->tx_fifo_head += skb_fifo_len;
3261 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
3262 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3266 #define MINIMUM_DHCP_PACKET_SIZE 282
3268 e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3270 struct e1000_hw *hw = &adapter->hw;
3271 uint16_t length, offset;
3272 if (vlan_tx_tag_present(skb)) {
3273 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
3274 ( adapter->hw.mng_cookie.status &
3275 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3278 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
3279 struct ethhdr *eth = (struct ethhdr *) skb->data;
3280 if ((htons(ETH_P_IP) == eth->h_proto)) {
3281 const struct iphdr *ip =
3282 (struct iphdr *)((uint8_t *)skb->data+14);
3283 if (IPPROTO_UDP == ip->protocol) {
3284 struct udphdr *udp =
3285 (struct udphdr *)((uint8_t *)ip +
3287 if (ntohs(udp->dest) == 67) {
3288 offset = (uint8_t *)udp + 8 - skb->data;
3289 length = skb->len - offset;
3291 return e1000_mng_write_dhcp_info(hw,
3301 static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3303 struct e1000_adapter *adapter = netdev_priv(netdev);
3304 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3306 netif_stop_queue(netdev);
3307 /* Herbert's original patch had:
3308 * smp_mb__after_netif_stop_queue();
3309 * but since that doesn't exist yet, just open code it. */
3312 /* We need to check again in a case another CPU has just
3313 * made room available. */
3314 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3318 netif_start_queue(netdev);
3319 ++adapter->restart_queue;
3323 static int e1000_maybe_stop_tx(struct net_device *netdev,
3324 struct e1000_tx_ring *tx_ring, int size)
3326 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3328 return __e1000_maybe_stop_tx(netdev, size);
3331 #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3333 e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3335 struct e1000_adapter *adapter = netdev_priv(netdev);
3336 struct e1000_tx_ring *tx_ring;
3337 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3338 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3339 unsigned int tx_flags = 0;
3340 unsigned int len = skb->len - skb->data_len;
3341 unsigned long flags;
3342 unsigned int nr_frags;
3348 /* This goes back to the question of how to logically map a tx queue
3349 * to a flow. Right now, performance is impacted slightly negatively
3350 * if using multiple tx queues. If the stack breaks away from a
3351 * single qdisc implementation, we can look at this again. */
3352 tx_ring = adapter->tx_ring;
3354 if (unlikely(skb->len <= 0)) {
3355 dev_kfree_skb_any(skb);
3356 return NETDEV_TX_OK;
3359 /* 82571 and newer doesn't need the workaround that limited descriptor
3361 if (adapter->hw.mac_type >= e1000_82571)
3364 mss = skb_shinfo(skb)->gso_size;
3365 /* The controller does a simple calculation to
3366 * make sure there is enough room in the FIFO before
3367 * initiating the DMA for each buffer. The calc is:
3368 * 4 = ceil(buffer len/mss). To make sure we don't
3369 * overrun the FIFO, adjust the max buffer len if mss
3373 max_per_txd = min(mss << 2, max_per_txd);
3374 max_txd_pwr = fls(max_per_txd) - 1;
3376 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3377 * points to just header, pull a few bytes of payload from
3378 * frags into skb->data */
3379 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3380 if (skb->data_len && hdr_len == len) {
3381 switch (adapter->hw.mac_type) {
3382 unsigned int pull_size;
3384 /* Make sure we have room to chop off 4 bytes,
3385 * and that the end alignment will work out to
3386 * this hardware's requirements
3387 * NOTE: this is a TSO only workaround
3388 * if end byte alignment not correct move us
3389 * into the next dword */
3390 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
3397 pull_size = min((unsigned int)4, skb->data_len);
3398 if (!__pskb_pull_tail(skb, pull_size)) {
3400 "__pskb_pull_tail failed.\n");
3401 dev_kfree_skb_any(skb);
3402 return NETDEV_TX_OK;
3404 len = skb->len - skb->data_len;
3413 /* reserve a descriptor for the offload context */
3414 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
3418 /* Controller Erratum workaround */
3419 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
3422 count += TXD_USE_COUNT(len, max_txd_pwr);
3424 if (adapter->pcix_82544)
3427 /* work-around for errata 10 and it applies to all controllers
3428 * in PCI-X mode, so add one more descriptor to the count
3430 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
3434 nr_frags = skb_shinfo(skb)->nr_frags;
3435 for (f = 0; f < nr_frags; f++)
3436 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3438 if (adapter->pcix_82544)
3442 if (adapter->hw.tx_pkt_filtering &&
3443 (adapter->hw.mac_type == e1000_82573))
3444 e1000_transfer_dhcp_info(adapter, skb);
3446 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
3447 /* Collision - tell upper layer to requeue */
3448 return NETDEV_TX_LOCKED;
3450 /* need: count + 2 desc gap to keep tail from touching
3451 * head, otherwise try next time */
3452 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
3453 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3454 return NETDEV_TX_BUSY;
3457 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3458 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
3459 netif_stop_queue(netdev);
3460 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
3461 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3462 return NETDEV_TX_BUSY;
3466 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
3467 tx_flags |= E1000_TX_FLAGS_VLAN;
3468 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3471 first = tx_ring->next_to_use;
3473 tso = e1000_tso(adapter, tx_ring, skb);
3475 dev_kfree_skb_any(skb);
3476 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3477 return NETDEV_TX_OK;
3481 tx_ring->last_tx_tso = 1;
3482 tx_flags |= E1000_TX_FLAGS_TSO;
3483 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
3484 tx_flags |= E1000_TX_FLAGS_CSUM;
3486 /* Old method was to assume IPv4 packet by default if TSO was enabled.
3487 * 82571 hardware supports TSO capabilities for IPv6 as well...
3488 * no longer assume, we must. */
3489 if (likely(skb->protocol == htons(ETH_P_IP)))
3490 tx_flags |= E1000_TX_FLAGS_IPV4;
3492 e1000_tx_queue(adapter, tx_ring, tx_flags,
3493 e1000_tx_map(adapter, tx_ring, skb, first,
3494 max_per_txd, nr_frags, mss));
3496 netdev->trans_start = jiffies;
3498 /* Make sure there is space in the ring for the next send. */
3499 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
3501 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
3502 return NETDEV_TX_OK;
3506 * e1000_tx_timeout - Respond to a Tx Hang
3507 * @netdev: network interface device structure
3511 e1000_tx_timeout(struct net_device *netdev)
3513 struct e1000_adapter *adapter = netdev_priv(netdev);
3515 /* Do the reset outside of interrupt context */
3516 adapter->tx_timeout_count++;
3517 schedule_work(&adapter->reset_task);
3521 e1000_reset_task(struct work_struct *work)
3523 struct e1000_adapter *adapter =
3524 container_of(work, struct e1000_adapter, reset_task);
3526 e1000_reinit_locked(adapter);
3530 * e1000_get_stats - Get System Network Statistics
3531 * @netdev: network interface device structure
3533 * Returns the address of the device statistics structure.
3534 * The statistics are actually updated from the timer callback.
3537 static struct net_device_stats *
3538 e1000_get_stats(struct net_device *netdev)
3540 struct e1000_adapter *adapter = netdev_priv(netdev);
3542 /* only return the current stats */
3543 return &adapter->net_stats;
3547 * e1000_change_mtu - Change the Maximum Transfer Unit
3548 * @netdev: network interface device structure
3549 * @new_mtu: new value for maximum frame size
3551 * Returns 0 on success, negative on failure
3555 e1000_change_mtu(struct net_device *netdev, int new_mtu)
3557 struct e1000_adapter *adapter = netdev_priv(netdev);
3558 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
3559 uint16_t eeprom_data = 0;
3561 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3562 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3563 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
3567 /* Adapter-specific max frame size limits. */
3568 switch (adapter->hw.mac_type) {
3569 case e1000_undefined ... e1000_82542_rev2_1:
3571 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3572 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
3577 /* Jumbo Frames not supported if:
3578 * - this is not an 82573L device
3579 * - ASPM is enabled in any way (0x1A bits 3:2) */
3580 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3582 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3583 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
3584 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3586 "Jumbo Frames not supported.\n");
3591 /* ERT will be enabled later to enable wire speed receives */
3593 /* fall through to get support */
3596 case e1000_80003es2lan:
3597 #define MAX_STD_JUMBO_FRAME_SIZE 9234
3598 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3599 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3604 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3608 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
3609 * means we reserve 2 more, this pushes us to allocate from the next
3611 * i.e. RXBUFFER_2048 --> size-4096 slab */
3613 if (max_frame <= E1000_RXBUFFER_256)
3614 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3615 else if (max_frame <= E1000_RXBUFFER_512)
3616 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3617 else if (max_frame <= E1000_RXBUFFER_1024)
3618 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3619 else if (max_frame <= E1000_RXBUFFER_2048)
3620 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3621 else if (max_frame <= E1000_RXBUFFER_4096)
3622 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3623 else if (max_frame <= E1000_RXBUFFER_8192)
3624 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3625 else if (max_frame <= E1000_RXBUFFER_16384)
3626 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3628 /* adjust allocation if LPE protects us, and we aren't using SBP */
3629 if (!adapter->hw.tbi_compatibility_on &&
3630 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3631 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3632 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
3634 netdev->mtu = new_mtu;
3635 adapter->hw.max_frame_size = max_frame;
3637 if (netif_running(netdev))
3638 e1000_reinit_locked(adapter);
3644 * e1000_update_stats - Update the board statistics counters
3645 * @adapter: board private structure
3649 e1000_update_stats(struct e1000_adapter *adapter)
3651 struct e1000_hw *hw = &adapter->hw;
3652 struct pci_dev *pdev = adapter->pdev;
3653 unsigned long flags;
3656 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3659 * Prevent stats update while adapter is being reset, or if the pci
3660 * connection is down.
3662 if (adapter->link_speed == 0)
3664 if (pci_channel_offline(pdev))
3667 spin_lock_irqsave(&adapter->stats_lock, flags);
3669 /* these counters are modified from e1000_tbi_adjust_stats,
3670 * called from the interrupt context, so they must only
3671 * be written while holding adapter->stats_lock
3674 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3675 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3676 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3677 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3678 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3679 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3680 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3682 if (adapter->hw.mac_type != e1000_ich8lan) {
3683 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3684 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3685 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3686 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3687 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3688 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3691 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3692 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3693 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3694 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3695 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3696 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3697 adapter->stats.dc += E1000_READ_REG(hw, DC);
3698 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3699 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3700 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3701 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3702 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3703 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3704 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3705 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3706 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3707 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3708 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3709 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3710 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3711 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3712 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3713 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3714 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3715 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3716 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3718 if (adapter->hw.mac_type != e1000_ich8lan) {
3719 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3720 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3721 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3722 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3723 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3724 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3727 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3728 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3730 /* used for adaptive IFS */
3732 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3733 adapter->stats.tpt += hw->tx_packet_delta;
3734 hw->collision_delta = E1000_READ_REG(hw, COLC);
3735 adapter->stats.colc += hw->collision_delta;
3737 if (hw->mac_type >= e1000_82543) {
3738 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3739 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3740 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3741 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3742 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3743 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3745 if (hw->mac_type > e1000_82547_rev_2) {
3746 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3747 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3749 if (adapter->hw.mac_type != e1000_ich8lan) {
3750 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3751 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3752 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3753 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3754 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3755 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3756 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3760 /* Fill out the OS statistics structure */
3761 adapter->net_stats.multicast = adapter->stats.mprc;
3762 adapter->net_stats.collisions = adapter->stats.colc;
3766 /* RLEC on some newer hardware can be incorrect so build
3767 * our own version based on RUC and ROC */
3768 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3769 adapter->stats.crcerrs + adapter->stats.algnerrc +
3770 adapter->stats.ruc + adapter->stats.roc +
3771 adapter->stats.cexterr;
3772 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3773 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
3774 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3775 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
3776 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3779 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3780 adapter->net_stats.tx_errors = adapter->stats.txerrc;
3781 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3782 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3783 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3784 if (adapter->hw.bad_tx_carr_stats_fd &&
3785 adapter->link_duplex == FULL_DUPLEX) {
3786 adapter->net_stats.tx_carrier_errors = 0;
3787 adapter->stats.tncrs = 0;
3790 /* Tx Dropped needs to be maintained elsewhere */
3793 if (hw->media_type == e1000_media_type_copper) {
3794 if ((adapter->link_speed == SPEED_1000) &&
3795 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3796 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3797 adapter->phy_stats.idle_errors += phy_tmp;
3800 if ((hw->mac_type <= e1000_82546) &&
3801 (hw->phy_type == e1000_phy_m88) &&
3802 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3803 adapter->phy_stats.receive_errors += phy_tmp;
3806 /* Management Stats */
3807 if (adapter->hw.has_smbus) {
3808 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
3809 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
3810 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
3813 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3817 * e1000_intr_msi - Interrupt Handler
3818 * @irq: interrupt number
3819 * @data: pointer to a network interface device structure
3823 e1000_intr_msi(int irq, void *data)
3825 struct net_device *netdev = data;
3826 struct e1000_adapter *adapter = netdev_priv(netdev);
3827 struct e1000_hw *hw = &adapter->hw;
3828 #ifndef CONFIG_E1000_NAPI
3831 uint32_t icr = E1000_READ_REG(hw, ICR);
3833 #ifdef CONFIG_E1000_NAPI
3834 /* read ICR disables interrupts using IAM, so keep up with our
3835 * enable/disable accounting */
3836 atomic_inc(&adapter->irq_sem);
3838 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3839 hw->get_link_status = 1;
3840 /* 80003ES2LAN workaround-- For packet buffer work-around on
3841 * link down event; disable receives here in the ISR and reset
3842 * adapter in watchdog */
3843 if (netif_carrier_ok(netdev) &&
3844 (adapter->hw.mac_type == e1000_80003es2lan)) {
3845 /* disable receives */
3846 uint32_t rctl = E1000_READ_REG(hw, RCTL);
3847 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3849 /* guard against interrupt when we're going down */
3850 if (!test_bit(__E1000_DOWN, &adapter->flags))
3851 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3854 #ifdef CONFIG_E1000_NAPI
3855 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
3856 adapter->total_tx_bytes = 0;
3857 adapter->total_tx_packets = 0;
3858 adapter->total_rx_bytes = 0;
3859 adapter->total_rx_packets = 0;
3860 __netif_rx_schedule(netdev, &adapter->napi);
3862 e1000_irq_enable(adapter);
3864 adapter->total_tx_bytes = 0;
3865 adapter->total_rx_bytes = 0;
3866 adapter->total_tx_packets = 0;
3867 adapter->total_rx_packets = 0;
3869 for (i = 0; i < E1000_MAX_INTR; i++)
3870 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3871 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3874 if (likely(adapter->itr_setting & 3))
3875 e1000_set_itr(adapter);
3882 * e1000_intr - Interrupt Handler
3883 * @irq: interrupt number
3884 * @data: pointer to a network interface device structure
3888 e1000_intr(int irq, void *data)
3890 struct net_device *netdev = data;
3891 struct e1000_adapter *adapter = netdev_priv(netdev);
3892 struct e1000_hw *hw = &adapter->hw;
3893 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
3894 #ifndef CONFIG_E1000_NAPI
3898 return IRQ_NONE; /* Not our interrupt */
3900 #ifdef CONFIG_E1000_NAPI
3901 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3902 * not set, then the adapter didn't send an interrupt */
3903 if (unlikely(hw->mac_type >= e1000_82571 &&
3904 !(icr & E1000_ICR_INT_ASSERTED)))
3907 /* Interrupt Auto-Mask...upon reading ICR,
3908 * interrupts are masked. No need for the
3909 * IMC write, but it does mean we should
3910 * account for it ASAP. */
3911 if (likely(hw->mac_type >= e1000_82571))
3912 atomic_inc(&adapter->irq_sem);
3915 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
3916 hw->get_link_status = 1;
3917 /* 80003ES2LAN workaround--
3918 * For packet buffer work-around on link down event;
3919 * disable receives here in the ISR and
3920 * reset adapter in watchdog
3922 if (netif_carrier_ok(netdev) &&
3923 (adapter->hw.mac_type == e1000_80003es2lan)) {
3924 /* disable receives */
3925 rctl = E1000_READ_REG(hw, RCTL);
3926 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3928 /* guard against interrupt when we're going down */
3929 if (!test_bit(__E1000_DOWN, &adapter->flags))
3930 mod_timer(&adapter->watchdog_timer, jiffies + 1);
3933 #ifdef CONFIG_E1000_NAPI
3934 if (unlikely(hw->mac_type < e1000_82571)) {
3935 /* disable interrupts, without the synchronize_irq bit */
3936 atomic_inc(&adapter->irq_sem);
3937 E1000_WRITE_REG(hw, IMC, ~0);
3938 E1000_WRITE_FLUSH(hw);
3940 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
3941 adapter->total_tx_bytes = 0;
3942 adapter->total_tx_packets = 0;
3943 adapter->total_rx_bytes = 0;
3944 adapter->total_rx_packets = 0;
3945 __netif_rx_schedule(netdev, &adapter->napi);
3947 /* this really should not happen! if it does it is basically a
3948 * bug, but not a hard error, so enable ints and continue */
3949 e1000_irq_enable(adapter);
3951 /* Writing IMC and IMS is needed for 82547.
3952 * Due to Hub Link bus being occupied, an interrupt
3953 * de-assertion message is not able to be sent.
3954 * When an interrupt assertion message is generated later,
3955 * two messages are re-ordered and sent out.
3956 * That causes APIC to think 82547 is in de-assertion
3957 * state, while 82547 is in assertion state, resulting
3958 * in dead lock. Writing IMC forces 82547 into
3959 * de-assertion state.
3961 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
3962 atomic_inc(&adapter->irq_sem);
3963 E1000_WRITE_REG(hw, IMC, ~0);
3966 adapter->total_tx_bytes = 0;
3967 adapter->total_rx_bytes = 0;
3968 adapter->total_tx_packets = 0;
3969 adapter->total_rx_packets = 0;
3971 for (i = 0; i < E1000_MAX_INTR; i++)
3972 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
3973 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
3976 if (likely(adapter->itr_setting & 3))
3977 e1000_set_itr(adapter);
3979 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
3980 e1000_irq_enable(adapter);
3986 #ifdef CONFIG_E1000_NAPI
3988 * e1000_clean - NAPI Rx polling callback
3989 * @adapter: board private structure
3993 e1000_clean(struct napi_struct *napi, int budget)
3995 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
3996 struct net_device *poll_dev = adapter->netdev;
3997 int tx_cleaned = 0, work_done = 0;
3999 /* Must NOT use netdev_priv macro here. */
4000 adapter = poll_dev->priv;
4002 /* e1000_clean is called per-cpu. This lock protects
4003 * tx_ring[0] from being cleaned by multiple cpus
4004 * simultaneously. A failure obtaining the lock means
4005 * tx_ring[0] is currently being cleaned anyway. */
4006 if (spin_trylock(&adapter->tx_queue_lock)) {
4007 tx_cleaned = e1000_clean_tx_irq(adapter,
4008 &adapter->tx_ring[0]);
4009 spin_unlock(&adapter->tx_queue_lock);
4012 adapter->clean_rx(adapter, &adapter->rx_ring[0],
4013 &work_done, budget);
4018 /* If budget not fully consumed, exit the polling mode */
4019 if (work_done < budget) {
4020 if (likely(adapter->itr_setting & 3))
4021 e1000_set_itr(adapter);
4022 netif_rx_complete(poll_dev, napi);
4023 e1000_irq_enable(adapter);
4031 * e1000_clean_tx_irq - Reclaim resources after transmit completes
4032 * @adapter: board private structure
4036 e1000_clean_tx_irq(struct e1000_adapter *adapter,
4037 struct e1000_tx_ring *tx_ring)
4039 struct net_device *netdev = adapter->netdev;
4040 struct e1000_tx_desc *tx_desc, *eop_desc;
4041 struct e1000_buffer *buffer_info;
4042 unsigned int i, eop;
4043 #ifdef CONFIG_E1000_NAPI
4044 unsigned int count = 0;
4046 boolean_t cleaned = FALSE;
4047 unsigned int total_tx_bytes=0, total_tx_packets=0;
4049 i = tx_ring->next_to_clean;
4050 eop = tx_ring->buffer_info[i].next_to_watch;
4051 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4053 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
4054 for (cleaned = FALSE; !cleaned; ) {
4055 tx_desc = E1000_TX_DESC(*tx_ring, i);
4056 buffer_info = &tx_ring->buffer_info[i];
4057 cleaned = (i == eop);
4060 struct sk_buff *skb = buffer_info->skb;
4061 unsigned int segs, bytecount;
4062 segs = skb_shinfo(skb)->gso_segs ?: 1;
4063 /* multiply data chunks by size of headers */
4064 bytecount = ((segs - 1) * skb_headlen(skb)) +
4066 total_tx_packets += segs;
4067 total_tx_bytes += bytecount;
4069 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
4070 tx_desc->upper.data = 0;
4072 if (unlikely(++i == tx_ring->count)) i = 0;
4075 eop = tx_ring->buffer_info[i].next_to_watch;
4076 eop_desc = E1000_TX_DESC(*tx_ring, eop);
4077 #ifdef CONFIG_E1000_NAPI
4078 #define E1000_TX_WEIGHT 64
4079 /* weight of a sort for tx, to avoid endless transmit cleanup */
4080 if (count++ == E1000_TX_WEIGHT) break;
4084 tx_ring->next_to_clean = i;
4086 #define TX_WAKE_THRESHOLD 32
4087 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
4088 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
4089 /* Make sure that anybody stopping the queue after this
4090 * sees the new next_to_clean.
4093 if (netif_queue_stopped(netdev)) {
4094 netif_wake_queue(netdev);
4095 ++adapter->restart_queue;
4099 if (adapter->detect_tx_hung) {
4100 /* Detect a transmit hang in hardware, this serializes the
4101 * check with the clearing of time_stamp and movement of i */
4102 adapter->detect_tx_hung = FALSE;
4103 if (tx_ring->buffer_info[eop].dma &&
4104 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
4105 (adapter->tx_timeout_factor * HZ))
4106 && !(E1000_READ_REG(&adapter->hw, STATUS) &
4107 E1000_STATUS_TXOFF)) {
4109 /* detected Tx unit hang */
4110 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
4114 " next_to_use <%x>\n"
4115 " next_to_clean <%x>\n"
4116 "buffer_info[next_to_clean]\n"
4117 " time_stamp <%lx>\n"
4118 " next_to_watch <%x>\n"
4120 " next_to_watch.status <%x>\n",
4121 (unsigned long)((tx_ring - adapter->tx_ring) /
4122 sizeof(struct e1000_tx_ring)),
4123 readl(adapter->hw.hw_addr + tx_ring->tdh),
4124 readl(adapter->hw.hw_addr + tx_ring->tdt),
4125 tx_ring->next_to_use,
4126 tx_ring->next_to_clean,
4127 tx_ring->buffer_info[eop].time_stamp,
4130 eop_desc->upper.fields.status);
4131 netif_stop_queue(netdev);
4134 adapter->total_tx_bytes += total_tx_bytes;
4135 adapter->total_tx_packets += total_tx_packets;
4136 adapter->net_stats.tx_bytes += total_tx_bytes;
4137 adapter->net_stats.tx_packets += total_tx_packets;
4142 * e1000_rx_checksum - Receive Checksum Offload for 82543
4143 * @adapter: board private structure
4144 * @status_err: receive descriptor status and error fields
4145 * @csum: receive descriptor csum field
4146 * @sk_buff: socket buffer with received data
4150 e1000_rx_checksum(struct e1000_adapter *adapter,
4151 uint32_t status_err, uint32_t csum,
4152 struct sk_buff *skb)
4154 uint16_t status = (uint16_t)status_err;
4155 uint8_t errors = (uint8_t)(status_err >> 24);
4156 skb->ip_summed = CHECKSUM_NONE;
4158 /* 82543 or newer only */
4159 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
4160 /* Ignore Checksum bit is set */
4161 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
4162 /* TCP/UDP checksum error bit is set */
4163 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
4164 /* let the stack verify checksum errors */
4165 adapter->hw_csum_err++;
4168 /* TCP/UDP Checksum has not been calculated */
4169 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
4170 if (!(status & E1000_RXD_STAT_TCPCS))
4173 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
4176 /* It must be a TCP or UDP packet with a valid checksum */
4177 if (likely(status & E1000_RXD_STAT_TCPCS)) {
4178 /* TCP checksum is good */
4179 skb->ip_summed = CHECKSUM_UNNECESSARY;
4180 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
4181 /* IP fragment with UDP payload */
4182 /* Hardware complements the payload checksum, so we undo it
4183 * and then put the value in host order for further stack use.
4185 __sum16 sum = (__force __sum16)htons(csum);
4186 skb->csum = csum_unfold(~sum);
4187 skb->ip_summed = CHECKSUM_COMPLETE;
4189 adapter->hw_csum_good++;
4193 * e1000_clean_rx_irq - Send received data up the network stack; legacy
4194 * @adapter: board private structure
4198 #ifdef CONFIG_E1000_NAPI
4199 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4200 struct e1000_rx_ring *rx_ring,
4201 int *work_done, int work_to_do)
4203 e1000_clean_rx_irq(struct e1000_adapter *adapter,
4204 struct e1000_rx_ring *rx_ring)
4207 struct net_device *netdev = adapter->netdev;
4208 struct pci_dev *pdev = adapter->pdev;
4209 struct e1000_rx_desc *rx_desc, *next_rxd;
4210 struct e1000_buffer *buffer_info, *next_buffer;
4211 unsigned long flags;
4215 int cleaned_count = 0;
4216 boolean_t cleaned = FALSE;
4217 unsigned int total_rx_bytes=0, total_rx_packets=0;
4219 i = rx_ring->next_to_clean;
4220 rx_desc = E1000_RX_DESC(*rx_ring, i);
4221 buffer_info = &rx_ring->buffer_info[i];
4223 while (rx_desc->status & E1000_RXD_STAT_DD) {
4224 struct sk_buff *skb;
4227 #ifdef CONFIG_E1000_NAPI
4228 if (*work_done >= work_to_do)
4232 status = rx_desc->status;
4233 skb = buffer_info->skb;
4234 buffer_info->skb = NULL;
4236 prefetch(skb->data - NET_IP_ALIGN);
4238 if (++i == rx_ring->count) i = 0;
4239 next_rxd = E1000_RX_DESC(*rx_ring, i);
4242 next_buffer = &rx_ring->buffer_info[i];
4246 pci_unmap_single(pdev,
4248 buffer_info->length,
4249 PCI_DMA_FROMDEVICE);
4251 length = le16_to_cpu(rx_desc->length);
4253 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4254 /* All receives must fit into a single buffer */
4255 E1000_DBG("%s: Receive packet consumed multiple"
4256 " buffers\n", netdev->name);
4258 buffer_info->skb = skb;
4262 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
4263 last_byte = *(skb->data + length - 1);
4264 if (TBI_ACCEPT(&adapter->hw, status,
4265 rx_desc->errors, length, last_byte)) {
4266 spin_lock_irqsave(&adapter->stats_lock, flags);
4267 e1000_tbi_adjust_stats(&adapter->hw,
4270 spin_unlock_irqrestore(&adapter->stats_lock,
4275 buffer_info->skb = skb;
4280 /* adjust length to remove Ethernet CRC, this must be
4281 * done after the TBI_ACCEPT workaround above */
4284 /* probably a little skewed due to removing CRC */
4285 total_rx_bytes += length;
4288 /* code added for copybreak, this should improve
4289 * performance for small packets with large amounts
4290 * of reassembly being done in the stack */
4291 if (length < copybreak) {
4292 struct sk_buff *new_skb =
4293 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
4295 skb_reserve(new_skb, NET_IP_ALIGN);
4296 skb_copy_to_linear_data_offset(new_skb,
4302 /* save the skb in buffer_info as good */
4303 buffer_info->skb = skb;
4306 /* else just continue with the old one */
4308 /* end copybreak code */
4309 skb_put(skb, length);
4311 /* Receive Checksum Offload */
4312 e1000_rx_checksum(adapter,
4313 (uint32_t)(status) |
4314 ((uint32_t)(rx_desc->errors) << 24),
4315 le16_to_cpu(rx_desc->csum), skb);
4317 skb->protocol = eth_type_trans(skb, netdev);
4318 #ifdef CONFIG_E1000_NAPI
4319 if (unlikely(adapter->vlgrp &&
4320 (status & E1000_RXD_STAT_VP))) {
4321 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4322 le16_to_cpu(rx_desc->special) &
4323 E1000_RXD_SPC_VLAN_MASK);
4325 netif_receive_skb(skb);
4327 #else /* CONFIG_E1000_NAPI */
4328 if (unlikely(adapter->vlgrp &&
4329 (status & E1000_RXD_STAT_VP))) {
4330 vlan_hwaccel_rx(skb, adapter->vlgrp,
4331 le16_to_cpu(rx_desc->special) &
4332 E1000_RXD_SPC_VLAN_MASK);
4336 #endif /* CONFIG_E1000_NAPI */
4337 netdev->last_rx = jiffies;
4340 rx_desc->status = 0;
4342 /* return some buffers to hardware, one at a time is too slow */
4343 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4344 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4348 /* use prefetched values */
4350 buffer_info = next_buffer;
4352 rx_ring->next_to_clean = i;
4354 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4356 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4358 adapter->total_rx_packets += total_rx_packets;
4359 adapter->total_rx_bytes += total_rx_bytes;
4360 adapter->net_stats.rx_bytes += total_rx_bytes;
4361 adapter->net_stats.rx_packets += total_rx_packets;
4366 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4367 * @adapter: board private structure
4371 #ifdef CONFIG_E1000_NAPI
4372 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4373 struct e1000_rx_ring *rx_ring,
4374 int *work_done, int work_to_do)
4376 e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4377 struct e1000_rx_ring *rx_ring)
4380 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
4381 struct net_device *netdev = adapter->netdev;
4382 struct pci_dev *pdev = adapter->pdev;
4383 struct e1000_buffer *buffer_info, *next_buffer;
4384 struct e1000_ps_page *ps_page;
4385 struct e1000_ps_page_dma *ps_page_dma;
4386 struct sk_buff *skb;
4388 uint32_t length, staterr;
4389 int cleaned_count = 0;
4390 boolean_t cleaned = FALSE;
4391 unsigned int total_rx_bytes=0, total_rx_packets=0;
4393 i = rx_ring->next_to_clean;
4394 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4395 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4396 buffer_info = &rx_ring->buffer_info[i];
4398 while (staterr & E1000_RXD_STAT_DD) {
4399 ps_page = &rx_ring->ps_page[i];
4400 ps_page_dma = &rx_ring->ps_page_dma[i];
4401 #ifdef CONFIG_E1000_NAPI
4402 if (unlikely(*work_done >= work_to_do))
4406 skb = buffer_info->skb;
4408 /* in the packet split case this is header only */
4409 prefetch(skb->data - NET_IP_ALIGN);
4411 if (++i == rx_ring->count) i = 0;
4412 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
4415 next_buffer = &rx_ring->buffer_info[i];
4419 pci_unmap_single(pdev, buffer_info->dma,
4420 buffer_info->length,
4421 PCI_DMA_FROMDEVICE);
4423 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
4424 E1000_DBG("%s: Packet Split buffers didn't pick up"
4425 " the full packet\n", netdev->name);
4426 dev_kfree_skb_irq(skb);
4430 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
4431 dev_kfree_skb_irq(skb);
4435 length = le16_to_cpu(rx_desc->wb.middle.length0);
4437 if (unlikely(!length)) {
4438 E1000_DBG("%s: Last part of the packet spanning"
4439 " multiple descriptors\n", netdev->name);
4440 dev_kfree_skb_irq(skb);
4445 skb_put(skb, length);
4448 /* this looks ugly, but it seems compiler issues make it
4449 more efficient than reusing j */
4450 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4452 /* page alloc/put takes too long and effects small packet
4453 * throughput, so unsplit small packets and save the alloc/put*/
4454 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
4456 /* there is no documentation about how to call
4457 * kmap_atomic, so we can't hold the mapping
4459 pci_dma_sync_single_for_cpu(pdev,
4460 ps_page_dma->ps_page_dma[0],
4462 PCI_DMA_FROMDEVICE);
4463 vaddr = kmap_atomic(ps_page->ps_page[0],
4464 KM_SKB_DATA_SOFTIRQ);
4465 memcpy(skb_tail_pointer(skb), vaddr, l1);
4466 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4467 pci_dma_sync_single_for_device(pdev,
4468 ps_page_dma->ps_page_dma[0],
4469 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4470 /* remove the CRC */
4477 for (j = 0; j < adapter->rx_ps_pages; j++) {
4478 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
4480 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4481 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4482 ps_page_dma->ps_page_dma[j] = 0;
4483 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4485 ps_page->ps_page[j] = NULL;
4487 skb->data_len += length;
4488 skb->truesize += length;
4491 /* strip the ethernet crc, problem is we're using pages now so
4492 * this whole operation can get a little cpu intensive */
4493 pskb_trim(skb, skb->len - 4);
4496 total_rx_bytes += skb->len;
4499 e1000_rx_checksum(adapter, staterr,
4500 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
4501 skb->protocol = eth_type_trans(skb, netdev);
4503 if (likely(rx_desc->wb.upper.header_status &
4504 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
4505 adapter->rx_hdr_split++;
4506 #ifdef CONFIG_E1000_NAPI
4507 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4508 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
4509 le16_to_cpu(rx_desc->wb.middle.vlan) &
4510 E1000_RXD_SPC_VLAN_MASK);
4512 netif_receive_skb(skb);
4514 #else /* CONFIG_E1000_NAPI */
4515 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
4516 vlan_hwaccel_rx(skb, adapter->vlgrp,
4517 le16_to_cpu(rx_desc->wb.middle.vlan) &
4518 E1000_RXD_SPC_VLAN_MASK);
4522 #endif /* CONFIG_E1000_NAPI */
4523 netdev->last_rx = jiffies;
4526 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
4527 buffer_info->skb = NULL;
4529 /* return some buffers to hardware, one at a time is too slow */
4530 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4531 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4535 /* use prefetched values */
4537 buffer_info = next_buffer;
4539 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
4541 rx_ring->next_to_clean = i;
4543 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4545 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4547 adapter->total_rx_packets += total_rx_packets;
4548 adapter->total_rx_bytes += total_rx_bytes;
4549 adapter->net_stats.rx_bytes += total_rx_bytes;
4550 adapter->net_stats.rx_packets += total_rx_packets;
4555 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
4556 * @adapter: address of board private structure
4560 e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4561 struct e1000_rx_ring *rx_ring,
4564 struct net_device *netdev = adapter->netdev;
4565 struct pci_dev *pdev = adapter->pdev;
4566 struct e1000_rx_desc *rx_desc;
4567 struct e1000_buffer *buffer_info;
4568 struct sk_buff *skb;
4570 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
4572 i = rx_ring->next_to_use;
4573 buffer_info = &rx_ring->buffer_info[i];
4575 while (cleaned_count--) {
4576 skb = buffer_info->skb;
4582 skb = netdev_alloc_skb(netdev, bufsz);
4583 if (unlikely(!skb)) {
4584 /* Better luck next round */
4585 adapter->alloc_rx_buff_failed++;
4589 /* Fix for errata 23, can't cross 64kB boundary */
4590 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4591 struct sk_buff *oldskb = skb;
4592 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4593 "at %p\n", bufsz, skb->data);
4594 /* Try again, without freeing the previous */
4595 skb = netdev_alloc_skb(netdev, bufsz);
4596 /* Failed allocation, critical failure */
4598 dev_kfree_skb(oldskb);
4602 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4605 dev_kfree_skb(oldskb);
4606 break; /* while !buffer_info->skb */
4609 /* Use new allocation */
4610 dev_kfree_skb(oldskb);
4612 /* Make buffer alignment 2 beyond a 16 byte boundary
4613 * this will result in a 16 byte aligned IP header after
4614 * the 14 byte MAC header is removed
4616 skb_reserve(skb, NET_IP_ALIGN);
4618 buffer_info->skb = skb;
4619 buffer_info->length = adapter->rx_buffer_len;
4621 buffer_info->dma = pci_map_single(pdev,
4623 adapter->rx_buffer_len,
4624 PCI_DMA_FROMDEVICE);
4626 /* Fix for errata 23, can't cross 64kB boundary */
4627 if (!e1000_check_64k_bound(adapter,
4628 (void *)(unsigned long)buffer_info->dma,
4629 adapter->rx_buffer_len)) {
4630 DPRINTK(RX_ERR, ERR,
4631 "dma align check failed: %u bytes at %p\n",
4632 adapter->rx_buffer_len,
4633 (void *)(unsigned long)buffer_info->dma);
4635 buffer_info->skb = NULL;
4637 pci_unmap_single(pdev, buffer_info->dma,
4638 adapter->rx_buffer_len,
4639 PCI_DMA_FROMDEVICE);
4641 break; /* while !buffer_info->skb */
4643 rx_desc = E1000_RX_DESC(*rx_ring, i);
4644 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4646 if (unlikely(++i == rx_ring->count))
4648 buffer_info = &rx_ring->buffer_info[i];
4651 if (likely(rx_ring->next_to_use != i)) {
4652 rx_ring->next_to_use = i;
4653 if (unlikely(i-- == 0))
4654 i = (rx_ring->count - 1);
4656 /* Force memory writes to complete before letting h/w
4657 * know there are new descriptors to fetch. (Only
4658 * applicable for weak-ordered memory model archs,
4659 * such as IA-64). */
4661 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4666 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4667 * @adapter: address of board private structure
4671 e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
4672 struct e1000_rx_ring *rx_ring,
4675 struct net_device *netdev = adapter->netdev;
4676 struct pci_dev *pdev = adapter->pdev;
4677 union e1000_rx_desc_packet_split *rx_desc;
4678 struct e1000_buffer *buffer_info;
4679 struct e1000_ps_page *ps_page;
4680 struct e1000_ps_page_dma *ps_page_dma;
4681 struct sk_buff *skb;
4684 i = rx_ring->next_to_use;
4685 buffer_info = &rx_ring->buffer_info[i];
4686 ps_page = &rx_ring->ps_page[i];
4687 ps_page_dma = &rx_ring->ps_page_dma[i];
4689 while (cleaned_count--) {
4690 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4692 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
4693 if (j < adapter->rx_ps_pages) {
4694 if (likely(!ps_page->ps_page[j])) {
4695 ps_page->ps_page[j] =
4696 alloc_page(GFP_ATOMIC);
4697 if (unlikely(!ps_page->ps_page[j])) {
4698 adapter->alloc_rx_buff_failed++;
4701 ps_page_dma->ps_page_dma[j] =
4703 ps_page->ps_page[j],
4705 PCI_DMA_FROMDEVICE);
4707 /* Refresh the desc even if buffer_addrs didn't
4708 * change because each write-back erases
4711 rx_desc->read.buffer_addr[j+1] =
4712 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4714 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
4717 skb = netdev_alloc_skb(netdev,
4718 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
4720 if (unlikely(!skb)) {
4721 adapter->alloc_rx_buff_failed++;
4725 /* Make buffer alignment 2 beyond a 16 byte boundary
4726 * this will result in a 16 byte aligned IP header after
4727 * the 14 byte MAC header is removed
4729 skb_reserve(skb, NET_IP_ALIGN);
4731 buffer_info->skb = skb;
4732 buffer_info->length = adapter->rx_ps_bsize0;
4733 buffer_info->dma = pci_map_single(pdev, skb->data,
4734 adapter->rx_ps_bsize0,
4735 PCI_DMA_FROMDEVICE);
4737 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4739 if (unlikely(++i == rx_ring->count)) i = 0;
4740 buffer_info = &rx_ring->buffer_info[i];
4741 ps_page = &rx_ring->ps_page[i];
4742 ps_page_dma = &rx_ring->ps_page_dma[i];
4746 if (likely(rx_ring->next_to_use != i)) {
4747 rx_ring->next_to_use = i;
4748 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4750 /* Force memory writes to complete before letting h/w
4751 * know there are new descriptors to fetch. (Only
4752 * applicable for weak-ordered memory model archs,
4753 * such as IA-64). */
4755 /* Hardware increments by 16 bytes, but packet split
4756 * descriptors are 32 bytes...so we increment tail
4759 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4764 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4769 e1000_smartspeed(struct e1000_adapter *adapter)
4771 uint16_t phy_status;
4774 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
4775 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4778 if (adapter->smartspeed == 0) {
4779 /* If Master/Slave config fault is asserted twice,
4780 * we assume back-to-back */
4781 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4782 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4783 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
4784 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
4785 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4786 if (phy_ctrl & CR_1000T_MS_ENABLE) {
4787 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4788 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4790 adapter->smartspeed++;
4791 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4792 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4794 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4795 MII_CR_RESTART_AUTO_NEG);
4796 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4801 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
4802 /* If still no link, perhaps using 2/3 pair cable */
4803 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4804 phy_ctrl |= CR_1000T_MS_ENABLE;
4805 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
4806 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
4807 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4808 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4809 MII_CR_RESTART_AUTO_NEG);
4810 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4813 /* Restart process after E1000_SMARTSPEED_MAX iterations */
4814 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
4815 adapter->smartspeed = 0;
4826 e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4832 return e1000_mii_ioctl(netdev, ifr, cmd);
4846 e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4848 struct e1000_adapter *adapter = netdev_priv(netdev);
4849 struct mii_ioctl_data *data = if_mii(ifr);
4853 unsigned long flags;
4855 if (adapter->hw.media_type != e1000_media_type_copper)
4860 data->phy_id = adapter->hw.phy_addr;
4863 if (!capable(CAP_NET_ADMIN))
4865 spin_lock_irqsave(&adapter->stats_lock, flags);
4866 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
4868 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4871 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4874 if (!capable(CAP_NET_ADMIN))
4876 if (data->reg_num & ~(0x1F))
4878 mii_reg = data->val_in;
4879 spin_lock_irqsave(&adapter->stats_lock, flags);
4880 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
4882 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4885 spin_unlock_irqrestore(&adapter->stats_lock, flags);
4886 if (adapter->hw.media_type == e1000_media_type_copper) {
4887 switch (data->reg_num) {
4889 if (mii_reg & MII_CR_POWER_DOWN)
4891 if (mii_reg & MII_CR_AUTO_NEG_EN) {
4892 adapter->hw.autoneg = 1;
4893 adapter->hw.autoneg_advertised = 0x2F;
4896 spddplx = SPEED_1000;
4897 else if (mii_reg & 0x2000)
4898 spddplx = SPEED_100;
4901 spddplx += (mii_reg & 0x100)
4904 retval = e1000_set_spd_dplx(adapter,
4909 if (netif_running(adapter->netdev))
4910 e1000_reinit_locked(adapter);
4912 e1000_reset(adapter);
4914 case M88E1000_PHY_SPEC_CTRL:
4915 case M88E1000_EXT_PHY_SPEC_CTRL:
4916 if (e1000_phy_reset(&adapter->hw))
4921 switch (data->reg_num) {
4923 if (mii_reg & MII_CR_POWER_DOWN)
4925 if (netif_running(adapter->netdev))
4926 e1000_reinit_locked(adapter);
4928 e1000_reset(adapter);
4936 return E1000_SUCCESS;
4940 e1000_pci_set_mwi(struct e1000_hw *hw)
4942 struct e1000_adapter *adapter = hw->back;
4943 int ret_val = pci_set_mwi(adapter->pdev);
4946 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
4950 e1000_pci_clear_mwi(struct e1000_hw *hw)
4952 struct e1000_adapter *adapter = hw->back;
4954 pci_clear_mwi(adapter->pdev);
4958 e1000_pcix_get_mmrbc(struct e1000_hw *hw)
4960 struct e1000_adapter *adapter = hw->back;
4961 return pcix_get_mmrbc(adapter->pdev);
4965 e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
4967 struct e1000_adapter *adapter = hw->back;
4968 pcix_set_mmrbc(adapter->pdev, mmrbc);
4972 e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4974 struct e1000_adapter *adapter = hw->back;
4975 uint16_t cap_offset;
4977 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4979 return -E1000_ERR_CONFIG;
4981 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4983 return E1000_SUCCESS;
4987 e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4993 e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4995 struct e1000_adapter *adapter = netdev_priv(netdev);
4996 uint32_t ctrl, rctl;
4998 e1000_irq_disable(adapter);
4999 adapter->vlgrp = grp;
5002 /* enable VLAN tag insert/strip */
5003 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5004 ctrl |= E1000_CTRL_VME;
5005 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5007 if (adapter->hw.mac_type != e1000_ich8lan) {
5008 /* enable VLAN receive filtering */
5009 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5010 rctl |= E1000_RCTL_VFE;
5011 rctl &= ~E1000_RCTL_CFIEN;
5012 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5013 e1000_update_mng_vlan(adapter);
5016 /* disable VLAN tag insert/strip */
5017 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5018 ctrl &= ~E1000_CTRL_VME;
5019 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5021 if (adapter->hw.mac_type != e1000_ich8lan) {
5022 /* disable VLAN filtering */
5023 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5024 rctl &= ~E1000_RCTL_VFE;
5025 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5026 if (adapter->mng_vlan_id !=
5027 (uint16_t)E1000_MNG_VLAN_NONE) {
5028 e1000_vlan_rx_kill_vid(netdev,
5029 adapter->mng_vlan_id);
5030 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
5035 e1000_irq_enable(adapter);
5039 e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
5041 struct e1000_adapter *adapter = netdev_priv(netdev);
5042 uint32_t vfta, index;
5044 if ((adapter->hw.mng_cookie.status &
5045 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5046 (vid == adapter->mng_vlan_id))
5048 /* add VID to filter table */
5049 index = (vid >> 5) & 0x7F;
5050 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5051 vfta |= (1 << (vid & 0x1F));
5052 e1000_write_vfta(&adapter->hw, index, vfta);
5056 e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
5058 struct e1000_adapter *adapter = netdev_priv(netdev);
5059 uint32_t vfta, index;
5061 e1000_irq_disable(adapter);
5062 vlan_group_set_device(adapter->vlgrp, vid, NULL);
5063 e1000_irq_enable(adapter);
5065 if ((adapter->hw.mng_cookie.status &
5066 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
5067 (vid == adapter->mng_vlan_id)) {
5068 /* release control to f/w */
5069 e1000_release_hw_control(adapter);
5073 /* remove VID from filter table */
5074 index = (vid >> 5) & 0x7F;
5075 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5076 vfta &= ~(1 << (vid & 0x1F));
5077 e1000_write_vfta(&adapter->hw, index, vfta);
5081 e1000_restore_vlan(struct e1000_adapter *adapter)
5083 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
5085 if (adapter->vlgrp) {
5087 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5088 if (!vlan_group_get_device(adapter->vlgrp, vid))
5090 e1000_vlan_rx_add_vid(adapter->netdev, vid);
5096 e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
5098 adapter->hw.autoneg = 0;
5100 /* Fiber NICs only allow 1000 gbps Full duplex */
5101 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
5102 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
5103 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5108 case SPEED_10 + DUPLEX_HALF:
5109 adapter->hw.forced_speed_duplex = e1000_10_half;
5111 case SPEED_10 + DUPLEX_FULL:
5112 adapter->hw.forced_speed_duplex = e1000_10_full;
5114 case SPEED_100 + DUPLEX_HALF:
5115 adapter->hw.forced_speed_duplex = e1000_100_half;
5117 case SPEED_100 + DUPLEX_FULL:
5118 adapter->hw.forced_speed_duplex = e1000_100_full;
5120 case SPEED_1000 + DUPLEX_FULL:
5121 adapter->hw.autoneg = 1;
5122 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
5124 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5126 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5133 e1000_suspend(struct pci_dev *pdev, pm_message_t state)
5135 struct net_device *netdev = pci_get_drvdata(pdev);
5136 struct e1000_adapter *adapter = netdev_priv(netdev);
5137 uint32_t ctrl, ctrl_ext, rctl, status;
5138 uint32_t wufc = adapter->wol;
5143 netif_device_detach(netdev);
5145 if (netif_running(netdev)) {
5146 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
5147 e1000_down(adapter);
5151 retval = pci_save_state(pdev);
5156 status = E1000_READ_REG(&adapter->hw, STATUS);
5157 if (status & E1000_STATUS_LU)
5158 wufc &= ~E1000_WUFC_LNKC;
5161 e1000_setup_rctl(adapter);
5162 e1000_set_rx_mode(netdev);
5164 /* turn on all-multi mode if wake on multicast is enabled */
5165 if (wufc & E1000_WUFC_MC) {
5166 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5167 rctl |= E1000_RCTL_MPE;
5168 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5171 if (adapter->hw.mac_type >= e1000_82540) {
5172 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5173 /* advertise wake from D3Cold */
5174 #define E1000_CTRL_ADVD3WUC 0x00100000
5175 /* phy power management enable */
5176 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5177 ctrl |= E1000_CTRL_ADVD3WUC |
5178 E1000_CTRL_EN_PHY_PWR_MGMT;
5179 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5182 if (adapter->hw.media_type == e1000_media_type_fiber ||
5183 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5184 /* keep the laser running in D3 */
5185 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5186 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5187 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5190 /* Allow time for pending master requests to run */
5191 e1000_disable_pciex_master(&adapter->hw);
5193 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5194 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
5195 pci_enable_wake(pdev, PCI_D3hot, 1);
5196 pci_enable_wake(pdev, PCI_D3cold, 1);
5198 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5199 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
5200 pci_enable_wake(pdev, PCI_D3hot, 0);
5201 pci_enable_wake(pdev, PCI_D3cold, 0);
5204 e1000_release_manageability(adapter);
5206 /* make sure adapter isn't asleep if manageability is enabled */
5207 if (adapter->en_mng_pt) {
5208 pci_enable_wake(pdev, PCI_D3hot, 1);
5209 pci_enable_wake(pdev, PCI_D3cold, 1);
5212 if (adapter->hw.phy_type == e1000_phy_igp_3)
5213 e1000_phy_powerdown_workaround(&adapter->hw);
5215 if (netif_running(netdev))
5216 e1000_free_irq(adapter);
5218 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5219 * would have already happened in close and is redundant. */
5220 e1000_release_hw_control(adapter);
5222 pci_disable_device(pdev);
5224 pci_set_power_state(pdev, pci_choose_state(pdev, state));
5231 e1000_resume(struct pci_dev *pdev)
5233 struct net_device *netdev = pci_get_drvdata(pdev);
5234 struct e1000_adapter *adapter = netdev_priv(netdev);
5237 pci_set_power_state(pdev, PCI_D0);
5238 pci_restore_state(pdev);
5239 if ((err = pci_enable_device(pdev))) {
5240 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5243 pci_set_master(pdev);
5245 pci_enable_wake(pdev, PCI_D3hot, 0);
5246 pci_enable_wake(pdev, PCI_D3cold, 0);
5248 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5251 e1000_power_up_phy(adapter);
5252 e1000_reset(adapter);
5253 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5255 e1000_init_manageability(adapter);
5257 if (netif_running(netdev))
5260 netif_device_attach(netdev);
5262 /* If the controller is 82573 and f/w is AMT, do not set
5263 * DRV_LOAD until the interface is up. For all other cases,
5264 * let the f/w know that the h/w is now under the control
5266 if (adapter->hw.mac_type != e1000_82573 ||
5267 !e1000_check_mng_mode(&adapter->hw))
5268 e1000_get_hw_control(adapter);
5274 static void e1000_shutdown(struct pci_dev *pdev)
5276 e1000_suspend(pdev, PMSG_SUSPEND);
5279 #ifdef CONFIG_NET_POLL_CONTROLLER
5281 * Polling 'interrupt' - used by things like netconsole to send skbs
5282 * without having to re-enable interrupts. It's not called while
5283 * the interrupt routine is executing.
5286 e1000_netpoll(struct net_device *netdev)
5288 struct e1000_adapter *adapter = netdev_priv(netdev);
5290 disable_irq(adapter->pdev->irq);
5291 e1000_intr(adapter->pdev->irq, netdev);
5292 e1000_clean_tx_irq(adapter, adapter->tx_ring);
5293 #ifndef CONFIG_E1000_NAPI
5294 adapter->clean_rx(adapter, adapter->rx_ring);
5296 enable_irq(adapter->pdev->irq);
5301 * e1000_io_error_detected - called when PCI error is detected
5302 * @pdev: Pointer to PCI device
5303 * @state: The current pci conneection state
5305 * This function is called after a PCI bus error affecting
5306 * this device has been detected.
5308 static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5310 struct net_device *netdev = pci_get_drvdata(pdev);
5311 struct e1000_adapter *adapter = netdev->priv;
5313 netif_device_detach(netdev);
5315 if (netif_running(netdev))
5316 e1000_down(adapter);
5317 pci_disable_device(pdev);
5319 /* Request a slot slot reset. */
5320 return PCI_ERS_RESULT_NEED_RESET;
5324 * e1000_io_slot_reset - called after the pci bus has been reset.
5325 * @pdev: Pointer to PCI device
5327 * Restart the card from scratch, as if from a cold-boot. Implementation
5328 * resembles the first-half of the e1000_resume routine.
5330 static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5332 struct net_device *netdev = pci_get_drvdata(pdev);
5333 struct e1000_adapter *adapter = netdev->priv;
5335 if (pci_enable_device(pdev)) {
5336 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5337 return PCI_ERS_RESULT_DISCONNECT;
5339 pci_set_master(pdev);
5341 pci_enable_wake(pdev, PCI_D3hot, 0);
5342 pci_enable_wake(pdev, PCI_D3cold, 0);
5344 e1000_reset(adapter);
5345 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5347 return PCI_ERS_RESULT_RECOVERED;
5351 * e1000_io_resume - called when traffic can start flowing again.
5352 * @pdev: Pointer to PCI device
5354 * This callback is called when the error recovery driver tells us that
5355 * its OK to resume normal operation. Implementation resembles the
5356 * second-half of the e1000_resume routine.
5358 static void e1000_io_resume(struct pci_dev *pdev)
5360 struct net_device *netdev = pci_get_drvdata(pdev);
5361 struct e1000_adapter *adapter = netdev->priv;
5363 e1000_init_manageability(adapter);
5365 if (netif_running(netdev)) {
5366 if (e1000_up(adapter)) {
5367 printk("e1000: can't bring device back up after reset\n");
5372 netif_device_attach(netdev);
5374 /* If the controller is 82573 and f/w is AMT, do not set
5375 * DRV_LOAD until the interface is up. For all other cases,
5376 * let the f/w know that the h/w is now under the control
5378 if (adapter->hw.mac_type != e1000_82573 ||
5379 !e1000_check_mng_mode(&adapter->hw))
5380 e1000_get_hw_control(adapter);