2 * AMD 10Gb Ethernet driver
4 * This file is available to you under your choice of the following two
9 * Copyright (c) 2016 Advanced Micro Devices, Inc.
11 * This file is free software; you may copy, redistribute and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation, either version 2 of the License, or (at
14 * your option) any later version.
16 * This file is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program. If not, see <http://www.gnu.org/licenses/>.
24 * This file incorporates work covered by the following copyright and
26 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
27 * (hereinafter "Software") is an unsupported proprietary work of Synopsys,
28 * Inc. unless otherwise expressly agreed to in writing between Synopsys
31 * The Software IS NOT an item of Licensed Software or Licensed Product
32 * under any End User Software License Agreement or Agreement for Licensed
33 * Product with Synopsys or any supplement thereto. Permission is hereby
34 * granted, free of charge, to any person obtaining a copy of this software
35 * annotated with this license and the Software, to deal in the Software
36 * without restriction, including without limitation the rights to use,
37 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies
38 * of the Software, and to permit persons to whom the Software is furnished
39 * to do so, subject to the following conditions:
41 * The above copyright notice and this permission notice shall be included
42 * in all copies or substantial portions of the Software.
44 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
45 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
46 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
47 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
48 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
49 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
50 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
51 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
52 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
53 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
54 * THE POSSIBILITY OF SUCH DAMAGE.
57 * License 2: Modified BSD
59 * Copyright (c) 2016 Advanced Micro Devices, Inc.
60 * All rights reserved.
62 * Redistribution and use in source and binary forms, with or without
63 * modification, are permitted provided that the following conditions are met:
64 * * Redistributions of source code must retain the above copyright
65 * notice, this list of conditions and the following disclaimer.
66 * * Redistributions in binary form must reproduce the above copyright
67 * notice, this list of conditions and the following disclaimer in the
68 * documentation and/or other materials provided with the distribution.
69 * * Neither the name of Advanced Micro Devices, Inc. nor the
70 * names of its contributors may be used to endorse or promote products
71 * derived from this software without specific prior written permission.
73 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
74 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
75 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
76 * ARE DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY
77 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
78 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
79 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
80 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
81 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
82 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
84 * This file incorporates work covered by the following copyright and
86 * The Synopsys DWC ETHER XGMAC Software Driver and documentation
87 * (hereinafter "Software") is an unsupported proprietary work of Synopsys,
88 * Inc. unless otherwise expressly agreed to in writing between Synopsys
91 * The Software IS NOT an item of Licensed Software or Licensed Product
92 * under any End User Software License Agreement or Agreement for Licensed
93 * Product with Synopsys or any supplement thereto. Permission is hereby
94 * granted, free of charge, to any person obtaining a copy of this software
95 * annotated with this license and the Software, to deal in the Software
96 * without restriction, including without limitation the rights to use,
97 * copy, modify, merge, publish, distribute, sublicense, and/or sell copies
98 * of the Software, and to permit persons to whom the Software is furnished
99 * to do so, subject to the following conditions:
101 * The above copyright notice and this permission notice shall be included
102 * in all copies or substantial portions of the Software.
104 * THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS"
105 * BASIS AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
106 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
107 * PARTICULAR PURPOSE ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS
108 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
109 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
110 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
111 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
112 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
113 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
114 * THE POSSIBILITY OF SUCH DAMAGE.
117 #include <linux/module.h>
118 #include <linux/kmod.h>
119 #include <linux/mdio.h>
120 #include <linux/phy.h>
123 #include "xgbe-common.h"
125 #define XGBE_PHY_PORT_SPEED_100 BIT(0)
126 #define XGBE_PHY_PORT_SPEED_1000 BIT(1)
127 #define XGBE_PHY_PORT_SPEED_2500 BIT(2)
128 #define XGBE_PHY_PORT_SPEED_10000 BIT(3)
130 /* Rate-change complete wait/retry count */
131 #define XGBE_RATECHANGE_COUNT 500
133 enum xgbe_port_mode {
134 XGBE_PORT_MODE_RSVD = 0,
135 XGBE_PORT_MODE_BACKPLANE,
136 XGBE_PORT_MODE_BACKPLANE_2500,
137 XGBE_PORT_MODE_1000BASE_T,
138 XGBE_PORT_MODE_1000BASE_X,
139 XGBE_PORT_MODE_NBASE_T,
140 XGBE_PORT_MODE_10GBASE_T,
141 XGBE_PORT_MODE_10GBASE_R,
146 enum xgbe_conn_type {
147 XGBE_CONN_TYPE_NONE = 0,
150 XGBE_CONN_TYPE_BACKPLANE,
154 /* PHY related configuration information */
155 struct xgbe_phy_data {
156 enum xgbe_port_mode port_mode;
158 unsigned int port_id;
160 unsigned int port_speeds;
162 enum xgbe_conn_type conn_type;
164 enum xgbe_mode cur_mode;
165 enum xgbe_mode start_mode;
167 unsigned int rrc_count;
170 static enum xgbe_mode xgbe_phy_an_outcome(struct xgbe_prv_data *pdata)
173 unsigned int ad_reg, lp_reg;
175 pdata->phy.lp_advertising |= ADVERTISED_Autoneg;
176 pdata->phy.lp_advertising |= ADVERTISED_Backplane;
178 /* Compare Advertisement and Link Partner register 1 */
179 ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE);
180 lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA);
182 pdata->phy.lp_advertising |= ADVERTISED_Pause;
184 pdata->phy.lp_advertising |= ADVERTISED_Asym_Pause;
186 if (pdata->phy.pause_autoneg) {
187 /* Set flow control based on auto-negotiation result */
188 pdata->phy.tx_pause = 0;
189 pdata->phy.rx_pause = 0;
191 if (ad_reg & lp_reg & 0x400) {
192 pdata->phy.tx_pause = 1;
193 pdata->phy.rx_pause = 1;
194 } else if (ad_reg & lp_reg & 0x800) {
196 pdata->phy.rx_pause = 1;
197 else if (lp_reg & 0x400)
198 pdata->phy.tx_pause = 1;
202 /* Compare Advertisement and Link Partner register 2 */
203 ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 1);
204 lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 1);
206 pdata->phy.lp_advertising |= ADVERTISED_10000baseKR_Full;
208 pdata->phy.lp_advertising |= ADVERTISED_1000baseKX_Full;
213 else if (ad_reg & 0x20)
214 mode = XGBE_MODE_KX_1000;
216 mode = XGBE_MODE_UNKNOWN;
218 /* Compare Advertisement and Link Partner register 3 */
219 ad_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_ADVERTISE + 2);
220 lp_reg = XMDIO_READ(pdata, MDIO_MMD_AN, MDIO_AN_LPA + 2);
222 pdata->phy.lp_advertising |= ADVERTISED_10000baseR_FEC;
227 static enum xgbe_an_mode xgbe_phy_an_mode(struct xgbe_prv_data *pdata)
229 struct xgbe_phy_data *phy_data = pdata->phy_data;
231 switch (phy_data->port_mode) {
232 case XGBE_PORT_MODE_BACKPLANE:
233 return XGBE_AN_MODE_CL73;
234 case XGBE_PORT_MODE_BACKPLANE_2500:
235 return XGBE_AN_MODE_NONE;
236 case XGBE_PORT_MODE_1000BASE_T:
237 case XGBE_PORT_MODE_1000BASE_X:
238 case XGBE_PORT_MODE_NBASE_T:
239 case XGBE_PORT_MODE_10GBASE_T:
240 case XGBE_PORT_MODE_10GBASE_R:
241 case XGBE_PORT_MODE_SFP:
243 return XGBE_AN_MODE_NONE;
247 static void xgbe_phy_start_ratechange(struct xgbe_prv_data *pdata)
249 if (!XP_IOREAD_BITS(pdata, XP_DRIVER_INT_RO, STATUS))
252 /* Log if a previous command did not complete */
253 netif_dbg(pdata, link, pdata->netdev,
254 "firmware mailbox not ready for command\n");
257 static void xgbe_phy_complete_ratechange(struct xgbe_prv_data *pdata)
261 /* Wait for command to complete */
262 wait = XGBE_RATECHANGE_COUNT;
264 if (!XP_IOREAD_BITS(pdata, XP_DRIVER_INT_RO, STATUS))
267 usleep_range(1000, 2000);
270 netif_dbg(pdata, link, pdata->netdev,
271 "firmware mailbox command did not complete\n");
274 static void xgbe_phy_rrc(struct xgbe_prv_data *pdata)
278 xgbe_phy_start_ratechange(pdata);
280 /* Receiver Reset Cycle */
282 XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, COMMAND, 5);
283 XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, SUB_COMMAND, 0);
285 /* Call FW to make the change */
286 XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_0, s0);
287 XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_1, 0);
288 XP_IOWRITE_BITS(pdata, XP_DRIVER_INT_REQ, REQUEST, 1);
290 xgbe_phy_complete_ratechange(pdata);
292 netif_dbg(pdata, link, pdata->netdev, "receiver reset complete\n");
295 static void xgbe_phy_power_off(struct xgbe_prv_data *pdata)
297 struct xgbe_phy_data *phy_data = pdata->phy_data;
299 xgbe_phy_start_ratechange(pdata);
301 /* Call FW to make the change */
302 XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_0, 0);
303 XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_1, 0);
304 XP_IOWRITE_BITS(pdata, XP_DRIVER_INT_REQ, REQUEST, 1);
306 xgbe_phy_complete_ratechange(pdata);
308 phy_data->cur_mode = XGBE_MODE_UNKNOWN;
310 netif_dbg(pdata, link, pdata->netdev, "phy powered off\n");
313 static void xgbe_phy_kr_mode(struct xgbe_prv_data *pdata)
315 struct xgbe_phy_data *phy_data = pdata->phy_data;
318 xgbe_phy_start_ratechange(pdata);
322 XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, COMMAND, 4);
323 XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, SUB_COMMAND, 0);
325 /* Call FW to make the change */
326 XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_0, s0);
327 XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_1, 0);
328 XP_IOWRITE_BITS(pdata, XP_DRIVER_INT_REQ, REQUEST, 1);
330 xgbe_phy_complete_ratechange(pdata);
332 phy_data->cur_mode = XGBE_MODE_KR;
334 netif_dbg(pdata, link, pdata->netdev, "10GbE KR mode set\n");
337 static void xgbe_phy_kx_2500_mode(struct xgbe_prv_data *pdata)
339 struct xgbe_phy_data *phy_data = pdata->phy_data;
342 xgbe_phy_start_ratechange(pdata);
346 XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, COMMAND, 2);
347 XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, SUB_COMMAND, 0);
349 /* Call FW to make the change */
350 XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_0, s0);
351 XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_1, 0);
352 XP_IOWRITE_BITS(pdata, XP_DRIVER_INT_REQ, REQUEST, 1);
354 xgbe_phy_complete_ratechange(pdata);
356 phy_data->cur_mode = XGBE_MODE_KX_2500;
358 netif_dbg(pdata, link, pdata->netdev, "2.5GbE KX mode set\n");
361 static void xgbe_phy_kx_1000_mode(struct xgbe_prv_data *pdata)
363 struct xgbe_phy_data *phy_data = pdata->phy_data;
366 xgbe_phy_start_ratechange(pdata);
370 XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, COMMAND, 1);
371 XP_SET_BITS(s0, XP_DRIVER_SCRATCH_0, SUB_COMMAND, 3);
373 /* Call FW to make the change */
374 XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_0, s0);
375 XP_IOWRITE(pdata, XP_DRIVER_SCRATCH_1, 0);
376 XP_IOWRITE_BITS(pdata, XP_DRIVER_INT_REQ, REQUEST, 1);
378 xgbe_phy_complete_ratechange(pdata);
380 phy_data->cur_mode = XGBE_MODE_KX_1000;
382 netif_dbg(pdata, link, pdata->netdev, "1GbE KX mode set\n");
385 static enum xgbe_mode xgbe_phy_cur_mode(struct xgbe_prv_data *pdata)
387 struct xgbe_phy_data *phy_data = pdata->phy_data;
389 return phy_data->cur_mode;
392 static enum xgbe_mode xgbe_phy_switch_bp_2500_mode(struct xgbe_prv_data *pdata)
394 return XGBE_MODE_KX_2500;
397 static enum xgbe_mode xgbe_phy_switch_bp_mode(struct xgbe_prv_data *pdata)
399 /* If we are in KR switch to KX, and vice-versa */
400 switch (xgbe_phy_cur_mode(pdata)) {
401 case XGBE_MODE_KX_1000:
405 return XGBE_MODE_KX_1000;
409 static enum xgbe_mode xgbe_phy_switch_mode(struct xgbe_prv_data *pdata)
411 struct xgbe_phy_data *phy_data = pdata->phy_data;
413 switch (phy_data->port_mode) {
414 case XGBE_PORT_MODE_BACKPLANE:
415 return xgbe_phy_switch_bp_mode(pdata);
416 case XGBE_PORT_MODE_BACKPLANE_2500:
417 return xgbe_phy_switch_bp_2500_mode(pdata);
418 case XGBE_PORT_MODE_1000BASE_T:
419 case XGBE_PORT_MODE_1000BASE_X:
420 case XGBE_PORT_MODE_NBASE_T:
421 case XGBE_PORT_MODE_10GBASE_T:
422 case XGBE_PORT_MODE_10GBASE_R:
423 case XGBE_PORT_MODE_SFP:
425 return XGBE_MODE_UNKNOWN;
429 static enum xgbe_mode xgbe_phy_get_bp_2500_mode(int speed)
433 return XGBE_MODE_KX_2500;
435 return XGBE_MODE_UNKNOWN;
439 static enum xgbe_mode xgbe_phy_get_bp_mode(int speed)
443 return XGBE_MODE_KX_1000;
447 return XGBE_MODE_UNKNOWN;
451 static enum xgbe_mode xgbe_phy_get_mode(struct xgbe_prv_data *pdata,
454 struct xgbe_phy_data *phy_data = pdata->phy_data;
456 switch (phy_data->port_mode) {
457 case XGBE_PORT_MODE_BACKPLANE:
458 return xgbe_phy_get_bp_mode(speed);
459 case XGBE_PORT_MODE_BACKPLANE_2500:
460 return xgbe_phy_get_bp_2500_mode(speed);
461 case XGBE_PORT_MODE_1000BASE_T:
462 case XGBE_PORT_MODE_1000BASE_X:
463 case XGBE_PORT_MODE_NBASE_T:
464 case XGBE_PORT_MODE_10GBASE_T:
465 case XGBE_PORT_MODE_10GBASE_R:
466 case XGBE_PORT_MODE_SFP:
468 return XGBE_MODE_UNKNOWN;
472 static void xgbe_phy_set_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode)
475 case XGBE_MODE_KX_1000:
476 xgbe_phy_kx_1000_mode(pdata);
478 case XGBE_MODE_KX_2500:
479 xgbe_phy_kx_2500_mode(pdata);
482 xgbe_phy_kr_mode(pdata);
489 static bool xgbe_phy_check_mode(struct xgbe_prv_data *pdata,
490 enum xgbe_mode mode, u32 advert)
492 if (pdata->phy.autoneg == AUTONEG_ENABLE) {
493 if (pdata->phy.advertising & advert)
496 enum xgbe_mode cur_mode;
498 cur_mode = xgbe_phy_get_mode(pdata, pdata->phy.speed);
499 if (cur_mode == mode)
506 static bool xgbe_phy_use_bp_2500_mode(struct xgbe_prv_data *pdata,
510 case XGBE_MODE_KX_2500:
511 return xgbe_phy_check_mode(pdata, mode,
512 ADVERTISED_2500baseX_Full);
518 static bool xgbe_phy_use_bp_mode(struct xgbe_prv_data *pdata,
522 case XGBE_MODE_KX_1000:
523 return xgbe_phy_check_mode(pdata, mode,
524 ADVERTISED_1000baseKX_Full);
526 return xgbe_phy_check_mode(pdata, mode,
527 ADVERTISED_10000baseKR_Full);
533 static bool xgbe_phy_use_mode(struct xgbe_prv_data *pdata, enum xgbe_mode mode)
535 struct xgbe_phy_data *phy_data = pdata->phy_data;
537 switch (phy_data->port_mode) {
538 case XGBE_PORT_MODE_BACKPLANE:
539 return xgbe_phy_use_bp_mode(pdata, mode);
540 case XGBE_PORT_MODE_BACKPLANE_2500:
541 return xgbe_phy_use_bp_2500_mode(pdata, mode);
542 case XGBE_PORT_MODE_1000BASE_T:
543 case XGBE_PORT_MODE_1000BASE_X:
544 case XGBE_PORT_MODE_NBASE_T:
545 case XGBE_PORT_MODE_10GBASE_T:
546 case XGBE_PORT_MODE_10GBASE_R:
547 case XGBE_PORT_MODE_SFP:
553 static bool xgbe_phy_valid_speed_bp_2500_mode(int speed)
563 static bool xgbe_phy_valid_speed_bp_mode(int speed)
574 static bool xgbe_phy_valid_speed(struct xgbe_prv_data *pdata, int speed)
576 struct xgbe_phy_data *phy_data = pdata->phy_data;
578 switch (phy_data->port_mode) {
579 case XGBE_PORT_MODE_BACKPLANE:
580 return xgbe_phy_valid_speed_bp_mode(speed);
581 case XGBE_PORT_MODE_BACKPLANE_2500:
582 return xgbe_phy_valid_speed_bp_2500_mode(speed);
583 case XGBE_PORT_MODE_1000BASE_T:
584 case XGBE_PORT_MODE_1000BASE_X:
585 case XGBE_PORT_MODE_NBASE_T:
586 case XGBE_PORT_MODE_10GBASE_T:
587 case XGBE_PORT_MODE_10GBASE_R:
588 case XGBE_PORT_MODE_SFP:
594 static int xgbe_phy_link_status(struct xgbe_prv_data *pdata)
596 struct xgbe_phy_data *phy_data = pdata->phy_data;
599 /* Link status is latched low, so read once to clear
600 * and then read again to get current state
602 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);
603 reg = XMDIO_READ(pdata, MDIO_MMD_PCS, MDIO_STAT1);
604 if (reg & MDIO_STAT1_LSTATUS)
607 /* No link, attempt a receiver reset cycle */
608 if (phy_data->rrc_count++) {
609 phy_data->rrc_count = 0;
616 static bool xgbe_phy_port_mode_mismatch(struct xgbe_prv_data *pdata)
618 struct xgbe_phy_data *phy_data = pdata->phy_data;
620 switch (phy_data->port_mode) {
621 case XGBE_PORT_MODE_BACKPLANE:
622 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) ||
623 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000))
626 case XGBE_PORT_MODE_BACKPLANE_2500:
627 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500)
630 case XGBE_PORT_MODE_1000BASE_T:
631 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) ||
632 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000))
635 case XGBE_PORT_MODE_1000BASE_X:
636 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000)
639 case XGBE_PORT_MODE_NBASE_T:
640 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) ||
641 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) ||
642 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_2500))
645 case XGBE_PORT_MODE_10GBASE_T:
646 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) ||
647 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000))
650 case XGBE_PORT_MODE_10GBASE_R:
651 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000)
654 case XGBE_PORT_MODE_SFP:
655 if ((phy_data->port_speeds & XGBE_PHY_PORT_SPEED_100) ||
656 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) ||
657 (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000))
667 static bool xgbe_phy_conn_type_mismatch(struct xgbe_prv_data *pdata)
669 struct xgbe_phy_data *phy_data = pdata->phy_data;
671 switch (phy_data->port_mode) {
672 case XGBE_PORT_MODE_BACKPLANE:
673 case XGBE_PORT_MODE_BACKPLANE_2500:
674 if (phy_data->conn_type == XGBE_CONN_TYPE_BACKPLANE)
677 case XGBE_PORT_MODE_1000BASE_T:
678 case XGBE_PORT_MODE_1000BASE_X:
679 case XGBE_PORT_MODE_NBASE_T:
680 case XGBE_PORT_MODE_10GBASE_T:
681 case XGBE_PORT_MODE_10GBASE_R:
682 if (phy_data->conn_type == XGBE_CONN_TYPE_MDIO)
685 case XGBE_PORT_MODE_SFP:
686 if (phy_data->conn_type == XGBE_CONN_TYPE_SFP)
696 static bool xgbe_phy_port_enabled(struct xgbe_prv_data *pdata)
700 reg = XP_IOREAD(pdata, XP_PROP_0);
701 if (!XP_GET_BITS(reg, XP_PROP_0, PORT_SPEEDS))
703 if (!XP_GET_BITS(reg, XP_PROP_0, CONN_TYPE))
709 static void xgbe_phy_stop(struct xgbe_prv_data *pdata)
711 /* Power off the PHY */
712 xgbe_phy_power_off(pdata);
714 /* Stop the I2C controller */
715 pdata->i2c_if.i2c_stop(pdata);
718 static int xgbe_phy_start(struct xgbe_prv_data *pdata)
720 struct xgbe_phy_data *phy_data = pdata->phy_data;
723 /* Start the I2C controller */
724 ret = pdata->i2c_if.i2c_start(pdata);
728 /* Start in highest supported mode */
729 xgbe_phy_set_mode(pdata, phy_data->start_mode);
734 static int xgbe_phy_reset(struct xgbe_prv_data *pdata)
736 struct xgbe_phy_data *phy_data = pdata->phy_data;
737 enum xgbe_mode cur_mode;
739 /* Reset by power cycling the PHY */
740 cur_mode = phy_data->cur_mode;
741 xgbe_phy_power_off(pdata);
742 xgbe_phy_set_mode(pdata, cur_mode);
747 static void xgbe_phy_exit(struct xgbe_prv_data *pdata)
749 /* Nothing uniquely required for exit */
752 static int xgbe_phy_init(struct xgbe_prv_data *pdata)
754 struct xgbe_phy_data *phy_data;
758 /* Check if enabled */
759 if (!xgbe_phy_port_enabled(pdata)) {
760 dev_info(pdata->dev, "device is not enabled\n");
764 /* Initialize the I2C controller */
765 ret = pdata->i2c_if.i2c_init(pdata);
769 phy_data = devm_kzalloc(pdata->dev, sizeof(*phy_data), GFP_KERNEL);
772 pdata->phy_data = phy_data;
774 reg = XP_IOREAD(pdata, XP_PROP_0);
775 phy_data->port_mode = XP_GET_BITS(reg, XP_PROP_0, PORT_MODE);
776 phy_data->port_id = XP_GET_BITS(reg, XP_PROP_0, PORT_ID);
777 phy_data->port_speeds = XP_GET_BITS(reg, XP_PROP_0, PORT_SPEEDS);
778 phy_data->conn_type = XP_GET_BITS(reg, XP_PROP_0, CONN_TYPE);
779 if (netif_msg_probe(pdata)) {
780 dev_dbg(pdata->dev, "port mode=%u\n", phy_data->port_mode);
781 dev_dbg(pdata->dev, "port id=%u\n", phy_data->port_id);
782 dev_dbg(pdata->dev, "port speeds=%#x\n", phy_data->port_speeds);
783 dev_dbg(pdata->dev, "conn type=%u\n", phy_data->conn_type);
786 /* Validate the connection requested */
787 if (xgbe_phy_conn_type_mismatch(pdata)) {
788 dev_err(pdata->dev, "phy mode/connection mismatch (%#x/%#x)\n",
789 phy_data->port_mode, phy_data->conn_type);
792 /* Validate the mode requested */
793 if (xgbe_phy_port_mode_mismatch(pdata)) {
794 dev_err(pdata->dev, "phy mode/speed mismatch (%#x/%#x)\n",
795 phy_data->port_mode, phy_data->port_speeds);
799 /* Indicate current mode is unknown */
800 phy_data->cur_mode = XGBE_MODE_UNKNOWN;
802 /* Initialize supported features */
803 pdata->phy.supported = 0;
805 switch (phy_data->port_mode) {
806 case XGBE_PORT_MODE_BACKPLANE:
807 pdata->phy.supported |= SUPPORTED_Autoneg;
808 pdata->phy.supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
809 pdata->phy.supported |= SUPPORTED_Backplane;
810 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_1000) {
811 pdata->phy.supported |= SUPPORTED_1000baseKX_Full;
812 phy_data->start_mode = XGBE_MODE_KX_1000;
814 if (phy_data->port_speeds & XGBE_PHY_PORT_SPEED_10000) {
815 pdata->phy.supported |= SUPPORTED_10000baseKR_Full;
816 if (pdata->fec_ability & MDIO_PMA_10GBR_FECABLE_ABLE)
817 pdata->phy.supported |=
818 SUPPORTED_10000baseR_FEC;
819 phy_data->start_mode = XGBE_MODE_KR;
822 case XGBE_PORT_MODE_BACKPLANE_2500:
823 pdata->phy.supported |= SUPPORTED_Pause | SUPPORTED_Asym_Pause;
824 pdata->phy.supported |= SUPPORTED_Backplane;
825 pdata->phy.supported |= SUPPORTED_2500baseX_Full;
826 phy_data->start_mode = XGBE_MODE_KX_2500;
828 case XGBE_PORT_MODE_1000BASE_T:
829 case XGBE_PORT_MODE_1000BASE_X:
830 case XGBE_PORT_MODE_NBASE_T:
831 case XGBE_PORT_MODE_10GBASE_T:
832 case XGBE_PORT_MODE_10GBASE_R:
833 case XGBE_PORT_MODE_SFP:
838 if (netif_msg_probe(pdata))
839 dev_dbg(pdata->dev, "phy supported=%#x\n",
840 pdata->phy.supported);
845 void xgbe_init_function_ptrs_phy_v2(struct xgbe_phy_if *phy_if)
847 struct xgbe_phy_impl_if *phy_impl = &phy_if->phy_impl;
849 phy_impl->init = xgbe_phy_init;
850 phy_impl->exit = xgbe_phy_exit;
852 phy_impl->reset = xgbe_phy_reset;
853 phy_impl->start = xgbe_phy_start;
854 phy_impl->stop = xgbe_phy_stop;
856 phy_impl->link_status = xgbe_phy_link_status;
858 phy_impl->valid_speed = xgbe_phy_valid_speed;
860 phy_impl->use_mode = xgbe_phy_use_mode;
861 phy_impl->set_mode = xgbe_phy_set_mode;
862 phy_impl->get_mode = xgbe_phy_get_mode;
863 phy_impl->switch_mode = xgbe_phy_switch_mode;
864 phy_impl->cur_mode = xgbe_phy_cur_mode;
866 phy_impl->an_mode = xgbe_phy_an_mode;
868 phy_impl->an_outcome = xgbe_phy_an_outcome;