1 /* Applied Micro X-Gene SoC Ethernet Driver
3 * Copyright (c) 2014, Applied Micro Circuits Corporation
4 * Authors: Iyappan Subramanian <isubramanian@apm.com>
5 * Ravi Patel <rapatel@apm.com>
6 * Keyur Chudgar <kchudgar@apm.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 #include "xgene_enet_main.h"
23 #include "xgene_enet_hw.h"
24 #include "xgene_enet_sgmac.h"
25 #include "xgene_enet_xgmac.h"
27 #define RES_ENET_CSR 0
28 #define RES_RING_CSR 1
29 #define RES_RING_CMD 2
31 static const struct of_device_id xgene_enet_of_match[];
32 static const struct acpi_device_id xgene_enet_acpi_match[];
34 static void xgene_enet_init_bufpool(struct xgene_enet_desc_ring *buf_pool)
36 struct xgene_enet_raw_desc16 *raw_desc;
39 for (i = 0; i < buf_pool->slots; i++) {
40 raw_desc = &buf_pool->raw_desc16[i];
42 /* Hardware expects descriptor in little endian format */
43 raw_desc->m0 = cpu_to_le64(i |
44 SET_VAL(FPQNUM, buf_pool->dst_ring_num) |
49 static int xgene_enet_refill_bufpool(struct xgene_enet_desc_ring *buf_pool,
53 struct xgene_enet_raw_desc16 *raw_desc;
54 struct xgene_enet_pdata *pdata;
55 struct net_device *ndev;
58 u32 tail = buf_pool->tail;
59 u32 slots = buf_pool->slots - 1;
63 ndev = buf_pool->ndev;
64 dev = ndev_to_dev(buf_pool->ndev);
65 pdata = netdev_priv(ndev);
66 bufdatalen = BUF_LEN_CODE_2K | (SKB_BUFFER_SIZE & GENMASK(11, 0));
67 len = XGENE_ENET_MAX_MTU;
69 for (i = 0; i < nbuf; i++) {
70 raw_desc = &buf_pool->raw_desc16[tail];
72 skb = netdev_alloc_skb_ip_align(ndev, len);
75 buf_pool->rx_skb[tail] = skb;
77 dma_addr = dma_map_single(dev, skb->data, len, DMA_FROM_DEVICE);
78 if (dma_mapping_error(dev, dma_addr)) {
79 netdev_err(ndev, "DMA mapping error\n");
80 dev_kfree_skb_any(skb);
84 raw_desc->m1 = cpu_to_le64(SET_VAL(DATAADDR, dma_addr) |
85 SET_VAL(BUFDATALEN, bufdatalen) |
87 tail = (tail + 1) & slots;
90 pdata->ring_ops->wr_cmd(buf_pool, nbuf);
91 buf_pool->tail = tail;
96 static u16 xgene_enet_dst_ring_num(struct xgene_enet_desc_ring *ring)
98 struct xgene_enet_pdata *pdata = netdev_priv(ring->ndev);
100 return ((u16)pdata->rm << 10) | ring->num;
103 static u8 xgene_enet_hdr_len(const void *data)
105 const struct ethhdr *eth = data;
107 return (eth->h_proto == htons(ETH_P_8021Q)) ? VLAN_ETH_HLEN : ETH_HLEN;
110 static void xgene_enet_delete_bufpool(struct xgene_enet_desc_ring *buf_pool)
112 struct xgene_enet_pdata *pdata = netdev_priv(buf_pool->ndev);
113 struct xgene_enet_raw_desc16 *raw_desc;
114 u32 slots = buf_pool->slots - 1;
115 u32 tail = buf_pool->tail;
119 len = pdata->ring_ops->len(buf_pool);
120 for (i = 0; i < len; i++) {
121 tail = (tail - 1) & slots;
122 raw_desc = &buf_pool->raw_desc16[tail];
124 /* Hardware stores descriptor in little endian format */
125 userinfo = GET_VAL(USERINFO, le64_to_cpu(raw_desc->m0));
126 dev_kfree_skb_any(buf_pool->rx_skb[userinfo]);
129 pdata->ring_ops->wr_cmd(buf_pool, -len);
130 buf_pool->tail = tail;
133 static irqreturn_t xgene_enet_rx_irq(const int irq, void *data)
135 struct xgene_enet_desc_ring *rx_ring = data;
137 if (napi_schedule_prep(&rx_ring->napi)) {
138 disable_irq_nosync(irq);
139 __napi_schedule(&rx_ring->napi);
145 static int xgene_enet_tx_completion(struct xgene_enet_desc_ring *cp_ring,
146 struct xgene_enet_raw_desc *raw_desc)
154 skb_index = GET_VAL(USERINFO, le64_to_cpu(raw_desc->m0));
155 skb = cp_ring->cp_skb[skb_index];
157 dev = ndev_to_dev(cp_ring->ndev);
158 dma_unmap_single(dev, GET_VAL(DATAADDR, le64_to_cpu(raw_desc->m1)),
159 GET_VAL(BUFDATALEN, le64_to_cpu(raw_desc->m1)),
162 /* Checking for error */
163 status = GET_VAL(LERR, le64_to_cpu(raw_desc->m0));
164 if (unlikely(status > 2)) {
165 xgene_enet_parse_error(cp_ring, netdev_priv(cp_ring->ndev),
171 dev_kfree_skb_any(skb);
173 netdev_err(cp_ring->ndev, "completion skb is NULL\n");
180 static u64 xgene_enet_work_msg(struct sk_buff *skb)
183 u8 l3hlen, l4hlen = 0;
189 if (unlikely(skb->protocol != htons(ETH_P_IP)) &&
190 unlikely(skb->protocol != htons(ETH_P_8021Q)))
193 if (unlikely(!(skb->dev->features & NETIF_F_IP_CSUM)))
197 if (unlikely(ip_is_fragment(iph)))
200 if (likely(iph->protocol == IPPROTO_TCP)) {
201 l4hlen = tcp_hdrlen(skb) >> 2;
203 proto = TSO_IPPROTO_TCP;
204 } else if (iph->protocol == IPPROTO_UDP) {
205 l4hlen = UDP_HDR_SIZE;
209 l3hlen = ip_hdrlen(skb) >> 2;
210 ethhdr = xgene_enet_hdr_len(skb->data);
211 hopinfo = SET_VAL(TCPHDR, l4hlen) |
212 SET_VAL(IPHDR, l3hlen) |
213 SET_VAL(ETHHDR, ethhdr) |
214 SET_VAL(EC, csum_enable) |
217 SET_BIT(TYPE_ETH_WORK_MESSAGE);
222 static int xgene_enet_setup_tx_desc(struct xgene_enet_desc_ring *tx_ring,
225 struct device *dev = ndev_to_dev(tx_ring->ndev);
226 struct xgene_enet_raw_desc *raw_desc;
228 u16 tail = tx_ring->tail;
231 raw_desc = &tx_ring->raw_desc[tail];
232 memset(raw_desc, 0, sizeof(struct xgene_enet_raw_desc));
234 dma_addr = dma_map_single(dev, skb->data, skb->len, DMA_TO_DEVICE);
235 if (dma_mapping_error(dev, dma_addr)) {
236 netdev_err(tx_ring->ndev, "DMA mapping error\n");
240 /* Hardware expects descriptor in little endian format */
241 raw_desc->m0 = cpu_to_le64(tail);
242 raw_desc->m1 = cpu_to_le64(SET_VAL(DATAADDR, dma_addr) |
243 SET_VAL(BUFDATALEN, skb->len) |
245 hopinfo = xgene_enet_work_msg(skb);
246 raw_desc->m3 = cpu_to_le64(SET_VAL(HENQNUM, tx_ring->dst_ring_num) |
248 tx_ring->cp_ring->cp_skb[tail] = skb;
253 static netdev_tx_t xgene_enet_start_xmit(struct sk_buff *skb,
254 struct net_device *ndev)
256 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
257 struct xgene_enet_desc_ring *tx_ring = pdata->tx_ring;
258 struct xgene_enet_desc_ring *cp_ring = tx_ring->cp_ring;
259 u32 tx_level, cq_level;
261 tx_level = pdata->ring_ops->len(tx_ring);
262 cq_level = pdata->ring_ops->len(cp_ring);
263 if (unlikely(tx_level > pdata->tx_qcnt_hi ||
264 cq_level > pdata->cp_qcnt_hi)) {
265 netif_stop_queue(ndev);
266 return NETDEV_TX_BUSY;
269 if (xgene_enet_setup_tx_desc(tx_ring, skb)) {
270 dev_kfree_skb_any(skb);
274 pdata->ring_ops->wr_cmd(tx_ring, 1);
275 skb_tx_timestamp(skb);
276 tx_ring->tail = (tx_ring->tail + 1) & (tx_ring->slots - 1);
278 pdata->stats.tx_packets++;
279 pdata->stats.tx_bytes += skb->len;
284 static void xgene_enet_skip_csum(struct sk_buff *skb)
286 struct iphdr *iph = ip_hdr(skb);
288 if (!ip_is_fragment(iph) ||
289 (iph->protocol != IPPROTO_TCP && iph->protocol != IPPROTO_UDP)) {
290 skb->ip_summed = CHECKSUM_UNNECESSARY;
294 static int xgene_enet_rx_frame(struct xgene_enet_desc_ring *rx_ring,
295 struct xgene_enet_raw_desc *raw_desc)
297 struct net_device *ndev;
298 struct xgene_enet_pdata *pdata;
300 struct xgene_enet_desc_ring *buf_pool;
301 u32 datalen, skb_index;
306 ndev = rx_ring->ndev;
307 pdata = netdev_priv(ndev);
308 dev = ndev_to_dev(rx_ring->ndev);
309 buf_pool = rx_ring->buf_pool;
311 dma_unmap_single(dev, GET_VAL(DATAADDR, le64_to_cpu(raw_desc->m1)),
312 XGENE_ENET_MAX_MTU, DMA_FROM_DEVICE);
313 skb_index = GET_VAL(USERINFO, le64_to_cpu(raw_desc->m0));
314 skb = buf_pool->rx_skb[skb_index];
316 /* checking for error */
317 status = GET_VAL(LERR, le64_to_cpu(raw_desc->m0));
318 if (unlikely(status > 2)) {
319 dev_kfree_skb_any(skb);
320 xgene_enet_parse_error(rx_ring, netdev_priv(rx_ring->ndev),
322 pdata->stats.rx_dropped++;
327 /* strip off CRC as HW isn't doing this */
328 datalen = GET_VAL(BUFDATALEN, le64_to_cpu(raw_desc->m1));
330 prefetch(skb->data - NET_IP_ALIGN);
331 skb_put(skb, datalen);
333 skb_checksum_none_assert(skb);
334 skb->protocol = eth_type_trans(skb, ndev);
335 if (likely((ndev->features & NETIF_F_IP_CSUM) &&
336 skb->protocol == htons(ETH_P_IP))) {
337 xgene_enet_skip_csum(skb);
340 pdata->stats.rx_packets++;
341 pdata->stats.rx_bytes += datalen;
342 napi_gro_receive(&rx_ring->napi, skb);
344 if (--rx_ring->nbufpool == 0) {
345 ret = xgene_enet_refill_bufpool(buf_pool, NUM_BUFPOOL);
346 rx_ring->nbufpool = NUM_BUFPOOL;
352 static bool is_rx_desc(struct xgene_enet_raw_desc *raw_desc)
354 return GET_VAL(FPQNUM, le64_to_cpu(raw_desc->m0)) ? true : false;
357 static int xgene_enet_process_ring(struct xgene_enet_desc_ring *ring,
360 struct xgene_enet_pdata *pdata = netdev_priv(ring->ndev);
361 struct xgene_enet_raw_desc *raw_desc;
362 u16 head = ring->head;
363 u16 slots = ring->slots - 1;
367 raw_desc = &ring->raw_desc[head];
368 if (unlikely(xgene_enet_is_desc_slot_empty(raw_desc)))
371 /* read fpqnum field after dataaddr field */
373 if (is_rx_desc(raw_desc))
374 ret = xgene_enet_rx_frame(ring, raw_desc);
376 ret = xgene_enet_tx_completion(ring, raw_desc);
377 xgene_enet_mark_desc_slot_empty(raw_desc);
379 head = (head + 1) & slots;
387 pdata->ring_ops->wr_cmd(ring, -count);
390 if (netif_queue_stopped(ring->ndev)) {
391 if (pdata->ring_ops->len(ring) < pdata->cp_qcnt_low)
392 netif_wake_queue(ring->ndev);
399 static int xgene_enet_napi(struct napi_struct *napi, const int budget)
401 struct xgene_enet_desc_ring *ring;
404 ring = container_of(napi, struct xgene_enet_desc_ring, napi);
405 processed = xgene_enet_process_ring(ring, budget);
407 if (processed != budget) {
409 enable_irq(ring->irq);
415 static void xgene_enet_timeout(struct net_device *ndev)
417 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
419 pdata->mac_ops->reset(pdata);
422 static int xgene_enet_register_irq(struct net_device *ndev)
424 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
425 struct device *dev = ndev_to_dev(ndev);
426 struct xgene_enet_desc_ring *ring;
429 ring = pdata->rx_ring;
430 ret = devm_request_irq(dev, ring->irq, xgene_enet_rx_irq,
431 IRQF_SHARED, ring->irq_name, ring);
433 netdev_err(ndev, "Failed to request irq %s\n", ring->irq_name);
436 ring = pdata->tx_ring->cp_ring;
437 ret = devm_request_irq(dev, ring->irq, xgene_enet_rx_irq,
438 IRQF_SHARED, ring->irq_name, ring);
440 netdev_err(ndev, "Failed to request irq %s\n",
448 static void xgene_enet_free_irq(struct net_device *ndev)
450 struct xgene_enet_pdata *pdata;
453 pdata = netdev_priv(ndev);
454 dev = ndev_to_dev(ndev);
455 devm_free_irq(dev, pdata->rx_ring->irq, pdata->rx_ring);
458 devm_free_irq(dev, pdata->tx_ring->cp_ring->irq,
459 pdata->tx_ring->cp_ring);
463 static void xgene_enet_napi_enable(struct xgene_enet_pdata *pdata)
465 struct napi_struct *napi;
467 napi = &pdata->rx_ring->napi;
471 napi = &pdata->tx_ring->cp_ring->napi;
476 static void xgene_enet_napi_disable(struct xgene_enet_pdata *pdata)
478 struct napi_struct *napi;
480 napi = &pdata->rx_ring->napi;
484 napi = &pdata->tx_ring->cp_ring->napi;
489 static int xgene_enet_open(struct net_device *ndev)
491 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
492 struct xgene_mac_ops *mac_ops = pdata->mac_ops;
495 mac_ops->tx_enable(pdata);
496 mac_ops->rx_enable(pdata);
498 ret = xgene_enet_register_irq(ndev);
501 xgene_enet_napi_enable(pdata);
503 if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII)
504 phy_start(pdata->phy_dev);
506 schedule_delayed_work(&pdata->link_work, PHY_POLL_LINK_OFF);
508 netif_carrier_off(ndev);
509 netif_start_queue(ndev);
514 static int xgene_enet_close(struct net_device *ndev)
516 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
517 struct xgene_mac_ops *mac_ops = pdata->mac_ops;
519 netif_stop_queue(ndev);
521 if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII)
522 phy_stop(pdata->phy_dev);
524 cancel_delayed_work_sync(&pdata->link_work);
526 xgene_enet_napi_disable(pdata);
527 xgene_enet_free_irq(ndev);
528 xgene_enet_process_ring(pdata->rx_ring, -1);
530 mac_ops->tx_disable(pdata);
531 mac_ops->rx_disable(pdata);
536 static void xgene_enet_delete_ring(struct xgene_enet_desc_ring *ring)
538 struct xgene_enet_pdata *pdata;
541 pdata = netdev_priv(ring->ndev);
542 dev = ndev_to_dev(ring->ndev);
544 pdata->ring_ops->clear(ring);
545 dma_free_coherent(dev, ring->size, ring->desc_addr, ring->dma);
548 static void xgene_enet_delete_desc_rings(struct xgene_enet_pdata *pdata)
550 struct xgene_enet_desc_ring *buf_pool;
552 if (pdata->tx_ring) {
553 xgene_enet_delete_ring(pdata->tx_ring);
554 pdata->tx_ring = NULL;
557 if (pdata->rx_ring) {
558 buf_pool = pdata->rx_ring->buf_pool;
559 xgene_enet_delete_bufpool(buf_pool);
560 xgene_enet_delete_ring(buf_pool);
561 xgene_enet_delete_ring(pdata->rx_ring);
562 pdata->rx_ring = NULL;
566 static int xgene_enet_get_ring_size(struct device *dev,
567 enum xgene_enet_ring_cfgsize cfgsize)
572 case RING_CFGSIZE_512B:
575 case RING_CFGSIZE_2KB:
578 case RING_CFGSIZE_16KB:
581 case RING_CFGSIZE_64KB:
584 case RING_CFGSIZE_512KB:
588 dev_err(dev, "Unsupported cfg ring size %d\n", cfgsize);
595 static void xgene_enet_free_desc_ring(struct xgene_enet_desc_ring *ring)
597 struct xgene_enet_pdata *pdata;
603 dev = ndev_to_dev(ring->ndev);
604 pdata = netdev_priv(ring->ndev);
606 if (ring->desc_addr) {
607 pdata->ring_ops->clear(ring);
608 dma_free_coherent(dev, ring->size, ring->desc_addr, ring->dma);
610 devm_kfree(dev, ring);
613 static void xgene_enet_free_desc_rings(struct xgene_enet_pdata *pdata)
615 struct device *dev = &pdata->pdev->dev;
616 struct xgene_enet_desc_ring *ring;
618 ring = pdata->tx_ring;
620 if (ring->cp_ring && ring->cp_ring->cp_skb)
621 devm_kfree(dev, ring->cp_ring->cp_skb);
622 if (ring->cp_ring && pdata->cq_cnt)
623 xgene_enet_free_desc_ring(ring->cp_ring);
624 xgene_enet_free_desc_ring(ring);
627 ring = pdata->rx_ring;
629 if (ring->buf_pool) {
630 if (ring->buf_pool->rx_skb)
631 devm_kfree(dev, ring->buf_pool->rx_skb);
632 xgene_enet_free_desc_ring(ring->buf_pool);
634 xgene_enet_free_desc_ring(ring);
638 static bool is_irq_mbox_required(struct xgene_enet_pdata *pdata,
639 struct xgene_enet_desc_ring *ring)
641 if ((pdata->enet_id == XGENE_ENET2) &&
642 (xgene_enet_ring_owner(ring->id) == RING_OWNER_CPU)) {
649 static void __iomem *xgene_enet_ring_cmd_base(struct xgene_enet_pdata *pdata,
650 struct xgene_enet_desc_ring *ring)
652 u8 num_ring_id_shift = pdata->ring_ops->num_ring_id_shift;
654 return pdata->ring_cmd_addr + (ring->num << num_ring_id_shift);
657 static struct xgene_enet_desc_ring *xgene_enet_create_desc_ring(
658 struct net_device *ndev, u32 ring_num,
659 enum xgene_enet_ring_cfgsize cfgsize, u32 ring_id)
661 struct xgene_enet_desc_ring *ring;
662 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
663 struct device *dev = ndev_to_dev(ndev);
666 size = xgene_enet_get_ring_size(dev, cfgsize);
670 ring = devm_kzalloc(dev, sizeof(struct xgene_enet_desc_ring),
676 ring->num = ring_num;
677 ring->cfgsize = cfgsize;
680 ring->desc_addr = dma_zalloc_coherent(dev, size, &ring->dma,
682 if (!ring->desc_addr) {
683 devm_kfree(dev, ring);
688 if (is_irq_mbox_required(pdata, ring)) {
689 ring->irq_mbox_addr = dma_zalloc_coherent(dev, INTR_MBOX_SIZE,
690 &ring->irq_mbox_dma, GFP_KERNEL);
691 if (!ring->irq_mbox_addr) {
692 dma_free_coherent(dev, size, ring->desc_addr,
694 devm_kfree(dev, ring);
699 ring->cmd_base = xgene_enet_ring_cmd_base(pdata, ring);
700 ring->cmd = ring->cmd_base + INC_DEC_CMD_ADDR;
701 ring = pdata->ring_ops->setup(ring);
702 netdev_dbg(ndev, "ring info: num=%d size=%d id=%d slots=%d\n",
703 ring->num, ring->size, ring->id, ring->slots);
708 static u16 xgene_enet_get_ring_id(enum xgene_ring_owner owner, u8 bufnum)
710 return (owner << 6) | (bufnum & GENMASK(5, 0));
713 static enum xgene_ring_owner xgene_derive_ring_owner(struct xgene_enet_pdata *p)
715 enum xgene_ring_owner owner;
717 if (p->enet_id == XGENE_ENET1) {
718 switch (p->phy_mode) {
719 case PHY_INTERFACE_MODE_SGMII:
720 owner = RING_OWNER_ETH0;
723 owner = (!p->port_id) ? RING_OWNER_ETH0 :
728 owner = (!p->port_id) ? RING_OWNER_ETH0 : RING_OWNER_ETH1;
734 static int xgene_enet_create_desc_rings(struct net_device *ndev)
736 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
737 struct device *dev = ndev_to_dev(ndev);
738 struct xgene_enet_desc_ring *rx_ring, *tx_ring, *cp_ring;
739 struct xgene_enet_desc_ring *buf_pool = NULL;
740 enum xgene_ring_owner owner;
741 u8 cpu_bufnum = pdata->cpu_bufnum;
742 u8 eth_bufnum = pdata->eth_bufnum;
743 u8 bp_bufnum = pdata->bp_bufnum;
744 u16 ring_num = pdata->ring_num;
748 /* allocate rx descriptor ring */
749 owner = xgene_derive_ring_owner(pdata);
750 ring_id = xgene_enet_get_ring_id(RING_OWNER_CPU, cpu_bufnum++);
751 rx_ring = xgene_enet_create_desc_ring(ndev, ring_num++,
752 RING_CFGSIZE_16KB, ring_id);
758 /* allocate buffer pool for receiving packets */
759 owner = xgene_derive_ring_owner(pdata);
760 ring_id = xgene_enet_get_ring_id(owner, bp_bufnum++);
761 buf_pool = xgene_enet_create_desc_ring(ndev, ring_num++,
762 RING_CFGSIZE_2KB, ring_id);
768 rx_ring->nbufpool = NUM_BUFPOOL;
769 rx_ring->buf_pool = buf_pool;
770 rx_ring->irq = pdata->rx_irq;
771 if (!pdata->cq_cnt) {
772 snprintf(rx_ring->irq_name, IRQ_ID_SIZE, "%s-rx-txc",
775 snprintf(rx_ring->irq_name, IRQ_ID_SIZE, "%s-rx", ndev->name);
777 buf_pool->rx_skb = devm_kcalloc(dev, buf_pool->slots,
778 sizeof(struct sk_buff *), GFP_KERNEL);
779 if (!buf_pool->rx_skb) {
784 buf_pool->dst_ring_num = xgene_enet_dst_ring_num(buf_pool);
785 rx_ring->buf_pool = buf_pool;
786 pdata->rx_ring = rx_ring;
788 /* allocate tx descriptor ring */
789 owner = xgene_derive_ring_owner(pdata);
790 ring_id = xgene_enet_get_ring_id(owner, eth_bufnum++);
791 tx_ring = xgene_enet_create_desc_ring(ndev, ring_num++,
792 RING_CFGSIZE_16KB, ring_id);
797 pdata->tx_ring = tx_ring;
799 if (!pdata->cq_cnt) {
800 cp_ring = pdata->rx_ring;
802 /* allocate tx completion descriptor ring */
803 ring_id = xgene_enet_get_ring_id(RING_OWNER_CPU, cpu_bufnum++);
804 cp_ring = xgene_enet_create_desc_ring(ndev, ring_num++,
811 cp_ring->irq = pdata->txc_irq;
812 snprintf(cp_ring->irq_name, IRQ_ID_SIZE, "%s-txc", ndev->name);
815 cp_ring->cp_skb = devm_kcalloc(dev, tx_ring->slots,
816 sizeof(struct sk_buff *), GFP_KERNEL);
817 if (!cp_ring->cp_skb) {
821 pdata->tx_ring->cp_ring = cp_ring;
822 pdata->tx_ring->dst_ring_num = xgene_enet_dst_ring_num(cp_ring);
824 pdata->tx_qcnt_hi = pdata->tx_ring->slots / 2;
825 pdata->cp_qcnt_hi = pdata->rx_ring->slots / 2;
826 pdata->cp_qcnt_low = pdata->cp_qcnt_hi / 2;
831 xgene_enet_free_desc_rings(pdata);
835 static struct rtnl_link_stats64 *xgene_enet_get_stats64(
836 struct net_device *ndev,
837 struct rtnl_link_stats64 *storage)
839 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
840 struct rtnl_link_stats64 *stats = &pdata->stats;
842 stats->rx_errors += stats->rx_length_errors +
843 stats->rx_crc_errors +
844 stats->rx_frame_errors +
845 stats->rx_fifo_errors;
846 memcpy(storage, &pdata->stats, sizeof(struct rtnl_link_stats64));
851 static int xgene_enet_set_mac_address(struct net_device *ndev, void *addr)
853 struct xgene_enet_pdata *pdata = netdev_priv(ndev);
856 ret = eth_mac_addr(ndev, addr);
859 pdata->mac_ops->set_mac_addr(pdata);
864 static const struct net_device_ops xgene_ndev_ops = {
865 .ndo_open = xgene_enet_open,
866 .ndo_stop = xgene_enet_close,
867 .ndo_start_xmit = xgene_enet_start_xmit,
868 .ndo_tx_timeout = xgene_enet_timeout,
869 .ndo_get_stats64 = xgene_enet_get_stats64,
870 .ndo_change_mtu = eth_change_mtu,
871 .ndo_set_mac_address = xgene_enet_set_mac_address,
875 static int xgene_get_port_id_acpi(struct device *dev,
876 struct xgene_enet_pdata *pdata)
881 status = acpi_evaluate_integer(ACPI_HANDLE(dev), "_SUN", NULL, &temp);
882 if (ACPI_FAILURE(status)) {
885 pdata->port_id = temp;
892 static int xgene_get_port_id_dt(struct device *dev, struct xgene_enet_pdata *pdata)
897 ret = of_property_read_u32(dev->of_node, "port-id", &id);
902 pdata->port_id = id & BIT(0);
908 static int xgene_get_mac_address(struct device *dev,
913 ret = device_property_read_u8_array(dev, "local-mac-address", addr, 6);
915 ret = device_property_read_u8_array(dev, "mac-address",
923 static int xgene_get_phy_mode(struct device *dev)
928 ret = device_property_read_string(dev, "phy-connection-type",
929 (const char **)&modestr);
931 ret = device_property_read_string(dev, "phy-mode",
932 (const char **)&modestr);
936 for (i = 0; i < PHY_INTERFACE_MODE_MAX; i++) {
937 if (!strcasecmp(modestr, phy_modes(i)))
943 static int xgene_enet_get_resources(struct xgene_enet_pdata *pdata)
945 struct platform_device *pdev;
946 struct net_device *ndev;
948 struct resource *res;
949 void __iomem *base_addr;
957 res = platform_get_resource(pdev, IORESOURCE_MEM, RES_ENET_CSR);
959 dev_err(dev, "Resource enet_csr not defined\n");
962 pdata->base_addr = devm_ioremap(dev, res->start, resource_size(res));
963 if (!pdata->base_addr) {
964 dev_err(dev, "Unable to retrieve ENET Port CSR region\n");
968 res = platform_get_resource(pdev, IORESOURCE_MEM, RES_RING_CSR);
970 dev_err(dev, "Resource ring_csr not defined\n");
973 pdata->ring_csr_addr = devm_ioremap(dev, res->start,
975 if (!pdata->ring_csr_addr) {
976 dev_err(dev, "Unable to retrieve ENET Ring CSR region\n");
980 res = platform_get_resource(pdev, IORESOURCE_MEM, RES_RING_CMD);
982 dev_err(dev, "Resource ring_cmd not defined\n");
985 pdata->ring_cmd_addr = devm_ioremap(dev, res->start,
987 if (!pdata->ring_cmd_addr) {
988 dev_err(dev, "Unable to retrieve ENET Ring command region\n");
993 ret = xgene_get_port_id_dt(dev, pdata);
996 ret = xgene_get_port_id_acpi(dev, pdata);
1001 if (xgene_get_mac_address(dev, ndev->dev_addr) != ETH_ALEN)
1002 eth_hw_addr_random(ndev);
1004 memcpy(ndev->perm_addr, ndev->dev_addr, ndev->addr_len);
1006 pdata->phy_mode = xgene_get_phy_mode(dev);
1007 if (pdata->phy_mode < 0) {
1008 dev_err(dev, "Unable to get phy-connection-type\n");
1009 return pdata->phy_mode;
1011 if (pdata->phy_mode != PHY_INTERFACE_MODE_RGMII &&
1012 pdata->phy_mode != PHY_INTERFACE_MODE_SGMII &&
1013 pdata->phy_mode != PHY_INTERFACE_MODE_XGMII) {
1014 dev_err(dev, "Incorrect phy-connection-type specified\n");
1018 ret = platform_get_irq(pdev, 0);
1020 dev_err(dev, "Unable to get ENET Rx IRQ\n");
1021 ret = ret ? : -ENXIO;
1024 pdata->rx_irq = ret;
1026 if (pdata->phy_mode != PHY_INTERFACE_MODE_RGMII) {
1027 ret = platform_get_irq(pdev, 1);
1030 dev_info(dev, "Unable to get Tx completion IRQ,"
1031 "using Rx IRQ instead\n");
1033 pdata->cq_cnt = XGENE_MAX_TXC_RINGS;
1034 pdata->txc_irq = ret;
1038 pdata->clk = devm_clk_get(&pdev->dev, NULL);
1039 if (IS_ERR(pdata->clk)) {
1040 /* Firmware may have set up the clock already. */
1041 dev_info(dev, "clocks have been setup already\n");
1044 if (pdata->phy_mode != PHY_INTERFACE_MODE_XGMII)
1045 base_addr = pdata->base_addr - (pdata->port_id * MAC_OFFSET);
1047 base_addr = pdata->base_addr;
1048 pdata->eth_csr_addr = base_addr + BLOCK_ETH_CSR_OFFSET;
1049 pdata->eth_ring_if_addr = base_addr + BLOCK_ETH_RING_IF_OFFSET;
1050 pdata->eth_diag_csr_addr = base_addr + BLOCK_ETH_DIAG_CSR_OFFSET;
1051 if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII ||
1052 pdata->phy_mode == PHY_INTERFACE_MODE_SGMII) {
1053 pdata->mcx_mac_addr = pdata->base_addr + BLOCK_ETH_MAC_OFFSET;
1054 offset = (pdata->enet_id == XGENE_ENET1) ?
1055 BLOCK_ETH_MAC_CSR_OFFSET :
1056 X2_BLOCK_ETH_MAC_CSR_OFFSET;
1057 pdata->mcx_mac_csr_addr = base_addr + offset;
1059 pdata->mcx_mac_addr = base_addr + BLOCK_AXG_MAC_OFFSET;
1060 pdata->mcx_mac_csr_addr = base_addr + BLOCK_AXG_MAC_CSR_OFFSET;
1062 pdata->rx_buff_cnt = NUM_PKT_BUF;
1067 static int xgene_enet_init_hw(struct xgene_enet_pdata *pdata)
1069 struct net_device *ndev = pdata->ndev;
1070 struct xgene_enet_desc_ring *buf_pool;
1074 ret = pdata->port_ops->reset(pdata);
1078 ret = xgene_enet_create_desc_rings(ndev);
1080 netdev_err(ndev, "Error in ring configuration\n");
1084 /* setup buffer pool */
1085 buf_pool = pdata->rx_ring->buf_pool;
1086 xgene_enet_init_bufpool(buf_pool);
1087 ret = xgene_enet_refill_bufpool(buf_pool, pdata->rx_buff_cnt);
1089 xgene_enet_delete_desc_rings(pdata);
1093 dst_ring_num = xgene_enet_dst_ring_num(pdata->rx_ring);
1094 pdata->port_ops->cle_bypass(pdata, dst_ring_num, buf_pool->id);
1095 pdata->mac_ops->init(pdata);
1100 static void xgene_enet_setup_ops(struct xgene_enet_pdata *pdata)
1102 switch (pdata->phy_mode) {
1103 case PHY_INTERFACE_MODE_RGMII:
1104 pdata->mac_ops = &xgene_gmac_ops;
1105 pdata->port_ops = &xgene_gport_ops;
1108 case PHY_INTERFACE_MODE_SGMII:
1109 pdata->mac_ops = &xgene_sgmac_ops;
1110 pdata->port_ops = &xgene_sgport_ops;
1114 pdata->mac_ops = &xgene_xgmac_ops;
1115 pdata->port_ops = &xgene_xgport_ops;
1120 if (pdata->enet_id == XGENE_ENET1) {
1121 switch (pdata->port_id) {
1123 pdata->cpu_bufnum = START_CPU_BUFNUM_0;
1124 pdata->eth_bufnum = START_ETH_BUFNUM_0;
1125 pdata->bp_bufnum = START_BP_BUFNUM_0;
1126 pdata->ring_num = START_RING_NUM_0;
1129 pdata->cpu_bufnum = START_CPU_BUFNUM_1;
1130 pdata->eth_bufnum = START_ETH_BUFNUM_1;
1131 pdata->bp_bufnum = START_BP_BUFNUM_1;
1132 pdata->ring_num = START_RING_NUM_1;
1137 pdata->ring_ops = &xgene_ring1_ops;
1139 switch (pdata->port_id) {
1141 pdata->cpu_bufnum = X2_START_CPU_BUFNUM_0;
1142 pdata->eth_bufnum = X2_START_ETH_BUFNUM_0;
1143 pdata->bp_bufnum = X2_START_BP_BUFNUM_0;
1144 pdata->ring_num = X2_START_RING_NUM_0;
1147 pdata->cpu_bufnum = X2_START_CPU_BUFNUM_1;
1148 pdata->eth_bufnum = X2_START_ETH_BUFNUM_1;
1149 pdata->bp_bufnum = X2_START_BP_BUFNUM_1;
1150 pdata->ring_num = X2_START_RING_NUM_1;
1156 pdata->ring_ops = &xgene_ring2_ops;
1160 static void xgene_enet_napi_add(struct xgene_enet_pdata *pdata)
1162 struct napi_struct *napi;
1164 napi = &pdata->rx_ring->napi;
1165 netif_napi_add(pdata->ndev, napi, xgene_enet_napi, NAPI_POLL_WEIGHT);
1167 if (pdata->cq_cnt) {
1168 napi = &pdata->tx_ring->cp_ring->napi;
1169 netif_napi_add(pdata->ndev, napi, xgene_enet_napi,
1174 static void xgene_enet_napi_del(struct xgene_enet_pdata *pdata)
1176 struct napi_struct *napi;
1178 napi = &pdata->rx_ring->napi;
1179 netif_napi_del(napi);
1181 if (pdata->cq_cnt) {
1182 napi = &pdata->tx_ring->cp_ring->napi;
1183 netif_napi_del(napi);
1187 static int xgene_enet_probe(struct platform_device *pdev)
1189 struct net_device *ndev;
1190 struct xgene_enet_pdata *pdata;
1191 struct device *dev = &pdev->dev;
1192 struct xgene_mac_ops *mac_ops;
1193 const struct of_device_id *of_id;
1196 ndev = alloc_etherdev(sizeof(struct xgene_enet_pdata));
1200 pdata = netdev_priv(ndev);
1204 SET_NETDEV_DEV(ndev, dev);
1205 platform_set_drvdata(pdev, pdata);
1206 ndev->netdev_ops = &xgene_ndev_ops;
1207 xgene_enet_set_ethtool_ops(ndev);
1208 ndev->features |= NETIF_F_IP_CSUM |
1212 of_id = of_match_device(xgene_enet_of_match, &pdev->dev);
1214 pdata->enet_id = (enum xgene_enet_id)of_id->data;
1218 const struct acpi_device_id *acpi_id;
1220 acpi_id = acpi_match_device(xgene_enet_acpi_match, &pdev->dev);
1222 pdata->enet_id = (enum xgene_enet_id) acpi_id->driver_data;
1225 if (!pdata->enet_id) {
1230 ret = xgene_enet_get_resources(pdata);
1234 xgene_enet_setup_ops(pdata);
1236 ret = register_netdev(ndev);
1238 netdev_err(ndev, "Failed to register netdev\n");
1242 ret = dma_coerce_mask_and_coherent(dev, DMA_BIT_MASK(64));
1244 netdev_err(ndev, "No usable DMA configuration\n");
1248 ret = xgene_enet_init_hw(pdata);
1252 xgene_enet_napi_add(pdata);
1253 mac_ops = pdata->mac_ops;
1254 if (pdata->phy_mode == PHY_INTERFACE_MODE_RGMII)
1255 ret = xgene_enet_mdio_config(pdata);
1257 INIT_DELAYED_WORK(&pdata->link_work, mac_ops->link_state);
1261 unregister_netdev(ndev);
1266 static int xgene_enet_remove(struct platform_device *pdev)
1268 struct xgene_enet_pdata *pdata;
1269 struct xgene_mac_ops *mac_ops;
1270 struct net_device *ndev;
1272 pdata = platform_get_drvdata(pdev);
1273 mac_ops = pdata->mac_ops;
1276 mac_ops->rx_disable(pdata);
1277 mac_ops->tx_disable(pdata);
1279 xgene_enet_napi_del(pdata);
1280 xgene_enet_mdio_remove(pdata);
1281 xgene_enet_delete_desc_rings(pdata);
1282 unregister_netdev(ndev);
1283 pdata->port_ops->shutdown(pdata);
1290 static const struct acpi_device_id xgene_enet_acpi_match[] = {
1291 { "APMC0D05", XGENE_ENET1},
1292 { "APMC0D30", XGENE_ENET1},
1293 { "APMC0D31", XGENE_ENET1},
1294 { "APMC0D26", XGENE_ENET2},
1295 { "APMC0D25", XGENE_ENET2},
1298 MODULE_DEVICE_TABLE(acpi, xgene_enet_acpi_match);
1302 static const struct of_device_id xgene_enet_of_match[] = {
1303 {.compatible = "apm,xgene-enet", .data = (void *)XGENE_ENET1},
1304 {.compatible = "apm,xgene1-sgenet", .data = (void *)XGENE_ENET1},
1305 {.compatible = "apm,xgene1-xgenet", .data = (void *)XGENE_ENET1},
1306 {.compatible = "apm,xgene2-sgenet", .data = (void *)XGENE_ENET2},
1307 {.compatible = "apm,xgene2-xgenet", .data = (void *)XGENE_ENET2},
1311 MODULE_DEVICE_TABLE(of, xgene_enet_of_match);
1314 static struct platform_driver xgene_enet_driver = {
1316 .name = "xgene-enet",
1317 .of_match_table = of_match_ptr(xgene_enet_of_match),
1318 .acpi_match_table = ACPI_PTR(xgene_enet_acpi_match),
1320 .probe = xgene_enet_probe,
1321 .remove = xgene_enet_remove,
1324 module_platform_driver(xgene_enet_driver);
1326 MODULE_DESCRIPTION("APM X-Gene SoC Ethernet driver");
1327 MODULE_VERSION(XGENE_DRV_VERSION);
1328 MODULE_AUTHOR("Iyappan Subramanian <isubramanian@apm.com>");
1329 MODULE_AUTHOR("Keyur Chudgar <kchudgar@apm.com>");
1330 MODULE_LICENSE("GPL");