drivers/net/ethernet/broadcom/bcmsysport.c

   1 /*
   2  * Broadcom BCM7xxx System Port Ethernet MAC driver
   3  *
   4  * Copyright (C) 2014 Broadcom Corporation
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9  */
  10
  11 #define pr_fmt(fmt)     KBUILD_MODNAME ": " fmt
  12
  13 #include <linux/init.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/module.h>
  16 #include <linux/kernel.h>
  17 #include <linux/netdevice.h>
  18 #include <linux/etherdevice.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/of.h>
  21 #include <linux/of_net.h>
  22 #include <linux/of_mdio.h>
  23 #include <linux/phy.h>
  24 #include <linux/phy_fixed.h>
  25 #include <net/ip.h>
  26 #include <net/ipv6.h>
  27
  28 #include "bcmsysport.h"
  29
  30 /* I/O accessors register helpers */
  31 #define BCM_SYSPORT_IO_MACRO(name, offset) \
  32 static inline u32 name##_readl(struct bcm_sysport_priv *priv, u32 off)  \
  33 {                                                                       \
  34         u32 reg = __raw_readl(priv->base + offset + off);               \
  35         return reg;                                                     \
  36 }                                                                       \
  37 static inline void name##_writel(struct bcm_sysport_priv *priv,         \
  38                                   u32 val, u32 off)                     \
  39 {                                                                       \
  40         __raw_writel(val, priv->base + offset + off);                   \
  41 }                                                                       \
  42
  43 BCM_SYSPORT_IO_MACRO(intrl2_0, SYS_PORT_INTRL2_0_OFFSET);
  44 BCM_SYSPORT_IO_MACRO(intrl2_1, SYS_PORT_INTRL2_1_OFFSET);
  45 BCM_SYSPORT_IO_MACRO(umac, SYS_PORT_UMAC_OFFSET);
  46 BCM_SYSPORT_IO_MACRO(tdma, SYS_PORT_TDMA_OFFSET);
  47 BCM_SYSPORT_IO_MACRO(rdma, SYS_PORT_RDMA_OFFSET);
  48 BCM_SYSPORT_IO_MACRO(rxchk, SYS_PORT_RXCHK_OFFSET);
  49 BCM_SYSPORT_IO_MACRO(txchk, SYS_PORT_TXCHK_OFFSET);
  50 BCM_SYSPORT_IO_MACRO(rbuf, SYS_PORT_RBUF_OFFSET);
  51 BCM_SYSPORT_IO_MACRO(tbuf, SYS_PORT_TBUF_OFFSET);
  52 BCM_SYSPORT_IO_MACRO(topctrl, SYS_PORT_TOPCTRL_OFFSET);
  53
  54 /* L2-interrupt masking/unmasking helpers, does automatic saving of the applied
  55  * mask in a software copy to avoid CPU_MASK_STATUS reads in hot-paths.
  56   */
  57 #define BCM_SYSPORT_INTR_L2(which)      \
  58 static inline void intrl2_##which##_mask_clear(struct bcm_sysport_priv *priv, \
  59                                                 u32 mask)               \
  60 {                                                                       \
  61         intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR);     \
  62         priv->irq##which##_mask &= ~(mask);                             \
  63 }                                                                       \
  64 static inline void intrl2_##which##_mask_set(struct bcm_sysport_priv *priv, \
  65                                                 u32 mask)               \
  66 {                                                                       \
  67         intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET);      \
  68         priv->irq##which##_mask |= (mask);                              \
  69 }                                                                       \
  70
  71 BCM_SYSPORT_INTR_L2(0)
  72 BCM_SYSPORT_INTR_L2(1)
  73
  74 /* Register accesses to GISB/RBUS registers are expensive (few hundred
  75  * nanoseconds), so keep the check for 64-bits explicit here to save
  76  * one register write per-packet on 32-bits platforms.
  77  */
  78 static inline void dma_desc_set_addr(struct bcm_sysport_priv *priv,
  79                                      void __iomem *d,
  80                                      dma_addr_t addr)
  81 {
  82 #ifdef CONFIG_PHYS_ADDR_T_64BIT
  83         __raw_writel(upper_32_bits(addr) & DESC_ADDR_HI_MASK,
  84                      d + DESC_ADDR_HI_STATUS_LEN);
  85 #endif
  86         __raw_writel(lower_32_bits(addr), d + DESC_ADDR_LO);
  87 }
  88
  89 static inline void tdma_port_write_desc_addr(struct bcm_sysport_priv *priv,
  90                                              struct dma_desc *desc,
  91                                              unsigned int port)
  92 {
  93         /* Ports are latched, so write upper address first */
  94         tdma_writel(priv, desc->addr_status_len, TDMA_WRITE_PORT_HI(port));
  95         tdma_writel(priv, desc->addr_lo, TDMA_WRITE_PORT_LO(port));
  96 }
  97
  98 /* Ethtool operations */
  99 static int bcm_sysport_set_settings(struct net_device *dev,
 100                                     struct ethtool_cmd *cmd)
 101 {
 102         if (!netif_running(dev))
 103                 return -EINVAL;
 104
 105         return phy_ethtool_sset(dev->phydev, cmd);
 106 }
 107
 108 static int bcm_sysport_get_settings(struct net_device *dev,
 109                                     struct ethtool_cmd *cmd)
 110 {
 111         if (!netif_running(dev))
 112                 return -EINVAL;
 113
 114         return phy_ethtool_gset(dev->phydev, cmd);
 115 }
 116
 117 static int bcm_sysport_set_rx_csum(struct net_device *dev,
 118                                    netdev_features_t wanted)
 119 {
 120         struct bcm_sysport_priv *priv = netdev_priv(dev);
 121         u32 reg;
 122
 123         priv->rx_chk_en = !!(wanted & NETIF_F_RXCSUM);
 124         reg = rxchk_readl(priv, RXCHK_CONTROL);
 125         if (priv->rx_chk_en)
 126                 reg |= RXCHK_EN;
 127         else
 128                 reg &= ~RXCHK_EN;
 129
 130         /* If UniMAC forwards CRC, we need to skip over it to get
 131          * a valid CHK bit to be set in the per-packet status word
 132          */
 133         if (priv->rx_chk_en && priv->crc_fwd)
 134                 reg |= RXCHK_SKIP_FCS;
 135         else
 136                 reg &= ~RXCHK_SKIP_FCS;
 137
 138         /* If Broadcom tags are enabled (e.g: using a switch), make
 139          * sure we tell the RXCHK hardware to expect a 4-bytes Broadcom
 140          * tag after the Ethernet MAC Source Address.
 141          */
 142         if (netdev_uses_dsa(dev))
 143                 reg |= RXCHK_BRCM_TAG_EN;
 144         else
 145                 reg &= ~RXCHK_BRCM_TAG_EN;
 146
 147         rxchk_writel(priv, reg, RXCHK_CONTROL);
 148
 149         return 0;
 150 }
 151
 152 static int bcm_sysport_set_tx_csum(struct net_device *dev,
 153                                    netdev_features_t wanted)
 154 {
 155         struct bcm_sysport_priv *priv = netdev_priv(dev);
 156         u32 reg;
 157
 158         /* Hardware transmit checksum requires us to enable the Transmit status
 159          * block prepended to the packet contents
 160          */
 161         priv->tsb_en = !!(wanted & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM));
 162         reg = tdma_readl(priv, TDMA_CONTROL);
 163         if (priv->tsb_en)
 164                 reg |= TSB_EN;
 165         else
 166                 reg &= ~TSB_EN;
 167         tdma_writel(priv, reg, TDMA_CONTROL);
 168
 169         return 0;
 170 }
 171
 172 static int bcm_sysport_set_features(struct net_device *dev,
 173                                     netdev_features_t features)
 174 {
 175         netdev_features_t changed = features ^ dev->features;
 176         netdev_features_t wanted = dev->wanted_features;
 177         int ret = 0;
 178
 179         if (changed & NETIF_F_RXCSUM)
 180                 ret = bcm_sysport_set_rx_csum(dev, wanted);
 181         if (changed & (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM))
 182                 ret = bcm_sysport_set_tx_csum(dev, wanted);
 183
 184         return ret;
 185 }
 186
 187 /* Hardware counters must be kept in sync because the order/offset
 188  * is important here (order in structure declaration = order in hardware)
 189  */
 190 static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = {
 191         /* general stats */
 192         STAT_NETDEV(rx_packets),
 193         STAT_NETDEV(tx_packets),
 194         STAT_NETDEV(rx_bytes),
 195         STAT_NETDEV(tx_bytes),
 196         STAT_NETDEV(rx_errors),
 197         STAT_NETDEV(tx_errors),
 198         STAT_NETDEV(rx_dropped),
 199         STAT_NETDEV(tx_dropped),
 200         STAT_NETDEV(multicast),
 201         /* UniMAC RSV counters */
 202         STAT_MIB_RX("rx_64_octets", mib.rx.pkt_cnt.cnt_64),
 203         STAT_MIB_RX("rx_65_127_oct", mib.rx.pkt_cnt.cnt_127),
 204         STAT_MIB_RX("rx_128_255_oct", mib.rx.pkt_cnt.cnt_255),
 205         STAT_MIB_RX("rx_256_511_oct", mib.rx.pkt_cnt.cnt_511),
 206         STAT_MIB_RX("rx_512_1023_oct", mib.rx.pkt_cnt.cnt_1023),
 207         STAT_MIB_RX("rx_1024_1518_oct", mib.rx.pkt_cnt.cnt_1518),
 208         STAT_MIB_RX("rx_vlan_1519_1522_oct", mib.rx.pkt_cnt.cnt_mgv),
 209         STAT_MIB_RX("rx_1522_2047_oct", mib.rx.pkt_cnt.cnt_2047),
 210         STAT_MIB_RX("rx_2048_4095_oct", mib.rx.pkt_cnt.cnt_4095),
 211         STAT_MIB_RX("rx_4096_9216_oct", mib.rx.pkt_cnt.cnt_9216),
 212         STAT_MIB_RX("rx_pkts", mib.rx.pkt),
 213         STAT_MIB_RX("rx_bytes", mib.rx.bytes),
 214         STAT_MIB_RX("rx_multicast", mib.rx.mca),
 215         STAT_MIB_RX("rx_broadcast", mib.rx.bca),
 216         STAT_MIB_RX("rx_fcs", mib.rx.fcs),
 217         STAT_MIB_RX("rx_control", mib.rx.cf),
 218         STAT_MIB_RX("rx_pause", mib.rx.pf),
 219         STAT_MIB_RX("rx_unknown", mib.rx.uo),
 220         STAT_MIB_RX("rx_align", mib.rx.aln),
 221         STAT_MIB_RX("rx_outrange", mib.rx.flr),
 222         STAT_MIB_RX("rx_code", mib.rx.cde),
 223         STAT_MIB_RX("rx_carrier", mib.rx.fcr),
 224         STAT_MIB_RX("rx_oversize", mib.rx.ovr),
 225         STAT_MIB_RX("rx_jabber", mib.rx.jbr),
 226         STAT_MIB_RX("rx_mtu_err", mib.rx.mtue),
 227         STAT_MIB_RX("rx_good_pkts", mib.rx.pok),
 228         STAT_MIB_RX("rx_unicast", mib.rx.uc),
 229         STAT_MIB_RX("rx_ppp", mib.rx.ppp),
 230         STAT_MIB_RX("rx_crc", mib.rx.rcrc),
 231         /* UniMAC TSV counters */
 232         STAT_MIB_TX("tx_64_octets", mib.tx.pkt_cnt.cnt_64),
 233         STAT_MIB_TX("tx_65_127_oct", mib.tx.pkt_cnt.cnt_127),
 234         STAT_MIB_TX("tx_128_255_oct", mib.tx.pkt_cnt.cnt_255),
 235         STAT_MIB_TX("tx_256_511_oct", mib.tx.pkt_cnt.cnt_511),
 236         STAT_MIB_TX("tx_512_1023_oct", mib.tx.pkt_cnt.cnt_1023),
 237         STAT_MIB_TX("tx_1024_1518_oct", mib.tx.pkt_cnt.cnt_1518),
 238         STAT_MIB_TX("tx_vlan_1519_1522_oct", mib.tx.pkt_cnt.cnt_mgv),
 239         STAT_MIB_TX("tx_1522_2047_oct", mib.tx.pkt_cnt.cnt_2047),
 240         STAT_MIB_TX("tx_2048_4095_oct", mib.tx.pkt_cnt.cnt_4095),
 241         STAT_MIB_TX("tx_4096_9216_oct", mib.tx.pkt_cnt.cnt_9216),
 242         STAT_MIB_TX("tx_pkts", mib.tx.pkts),
 243         STAT_MIB_TX("tx_multicast", mib.tx.mca),
 244         STAT_MIB_TX("tx_broadcast", mib.tx.bca),
 245         STAT_MIB_TX("tx_pause", mib.tx.pf),
 246         STAT_MIB_TX("tx_control", mib.tx.cf),
 247         STAT_MIB_TX("tx_fcs_err", mib.tx.fcs),
 248         STAT_MIB_TX("tx_oversize", mib.tx.ovr),
 249         STAT_MIB_TX("tx_defer", mib.tx.drf),
 250         STAT_MIB_TX("tx_excess_defer", mib.tx.edf),
 251         STAT_MIB_TX("tx_single_col", mib.tx.scl),
 252         STAT_MIB_TX("tx_multi_col", mib.tx.mcl),
 253         STAT_MIB_TX("tx_late_col", mib.tx.lcl),
 254         STAT_MIB_TX("tx_excess_col", mib.tx.ecl),
 255         STAT_MIB_TX("tx_frags", mib.tx.frg),
 256         STAT_MIB_TX("tx_total_col", mib.tx.ncl),
 257         STAT_MIB_TX("tx_jabber", mib.tx.jbr),
 258         STAT_MIB_TX("tx_bytes", mib.tx.bytes),
 259         STAT_MIB_TX("tx_good_pkts", mib.tx.pok),
 260         STAT_MIB_TX("tx_unicast", mib.tx.uc),
 261         /* UniMAC RUNT counters */
 262         STAT_RUNT("rx_runt_pkts", mib.rx_runt_cnt),
 263         STAT_RUNT("rx_runt_valid_fcs", mib.rx_runt_fcs),
 264         STAT_RUNT("rx_runt_inval_fcs_align", mib.rx_runt_fcs_align),
 265         STAT_RUNT("rx_runt_bytes", mib.rx_runt_bytes),
 266         /* RXCHK misc statistics */
 267         STAT_RXCHK("rxchk_bad_csum", mib.rxchk_bad_csum, RXCHK_BAD_CSUM_CNTR),
 268         STAT_RXCHK("rxchk_other_pkt_disc", mib.rxchk_other_pkt_disc,
 269                    RXCHK_OTHER_DISC_CNTR),
 270         /* RBUF misc statistics */
 271         STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR),
 272         STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR),
 273         STAT_MIB_SOFT("alloc_rx_buff_failed", mib.alloc_rx_buff_failed),
 274         STAT_MIB_SOFT("rx_dma_failed", mib.rx_dma_failed),
 275         STAT_MIB_SOFT("tx_dma_failed", mib.tx_dma_failed),
 276 };
 277
 278 #define BCM_SYSPORT_STATS_LEN   ARRAY_SIZE(bcm_sysport_gstrings_stats)
 279
 280 static void bcm_sysport_get_drvinfo(struct net_device *dev,
 281                                     struct ethtool_drvinfo *info)
 282 {
 283         strlcpy(info->driver, KBUILD_MODNAME, sizeof(info->driver));
 284         strlcpy(info->version, "0.1", sizeof(info->version));
 285         strlcpy(info->bus_info, "platform", sizeof(info->bus_info));
 286 }
 287
 288 static u32 bcm_sysport_get_msglvl(struct net_device *dev)
 289 {
 290         struct bcm_sysport_priv *priv = netdev_priv(dev);
 291
 292         return priv->msg_enable;
 293 }
 294
 295 static void bcm_sysport_set_msglvl(struct net_device *dev, u32 enable)
 296 {
 297         struct bcm_sysport_priv *priv = netdev_priv(dev);
 298
 299         priv->msg_enable = enable;
 300 }
 301
 302 static int bcm_sysport_get_sset_count(struct net_device *dev, int string_set)
 303 {
 304         switch (string_set) {
 305         case ETH_SS_STATS:
 306                 return BCM_SYSPORT_STATS_LEN;
 307         default:
 308                 return -EOPNOTSUPP;
 309         }
 310 }
 311
 312 static void bcm_sysport_get_strings(struct net_device *dev,
 313                                     u32 stringset, u8 *data)
 314 {
 315         int i;
 316
 317         switch (stringset) {
 318         case ETH_SS_STATS:
 319                 for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 320                         memcpy(data + i * ETH_GSTRING_LEN,
 321                                bcm_sysport_gstrings_stats[i].stat_string,
 322                                ETH_GSTRING_LEN);
 323                 }
 324                 break;
 325         default:
 326                 break;
 327         }
 328 }
 329
 330 static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
 331 {
 332         int i, j = 0;
 333
 334         for (i = 0; i < BCM_SYSPORT_STATS_LEN; i++) {
 335                 const struct bcm_sysport_stats *s;
 336                 u8 offset = 0;
 337                 u32 val = 0;
 338                 char *p;
 339
 340                 s = &bcm_sysport_gstrings_stats[i];
 341                 switch (s->type) {
 342                 case BCM_SYSPORT_STAT_NETDEV:
 343                 case BCM_SYSPORT_STAT_SOFT:
 344                         continue;
 345                 case BCM_SYSPORT_STAT_MIB_RX:
 346                 case BCM_SYSPORT_STAT_MIB_TX:
 347                 case BCM_SYSPORT_STAT_RUNT:
 348                         if (s->type != BCM_SYSPORT_STAT_MIB_RX)
 349                                 offset = UMAC_MIB_STAT_OFFSET;
 350                         val = umac_readl(priv, UMAC_MIB_START + j + offset);
 351                         break;
 352                 case BCM_SYSPORT_STAT_RXCHK:
 353                         val = rxchk_readl(priv, s->reg_offset);
 354                         if (val == ~0)
 355                                 rxchk_writel(priv, 0, s->reg_offset);
 356                         break;
 357                 case BCM_SYSPORT_STAT_RBUF:
 358                         val = rbuf_readl(priv, s->reg_offset);
 359                         if (val == ~0)
 360                                 rbuf_writel(priv, 0, s->reg_offset);
 361                         break;
 362                 }
 363
 364                 j += s->stat_sizeof;
 365                 p = (char *)priv + s->stat_offset;
 366                 *(u32 *)p = val;
 367         }
 368
 369         netif_dbg(priv, hw, priv->netdev, "updated MIB counters\n");
 370 }
 371
 372 static void bcm_sysport_get_stats(struct net_device *dev,
 373                                   struct ethtool_stats *stats, u64 *data)
 374 {
 375         struct bcm_sysport_priv *priv = netdev_priv(dev);
 376         int i;
 377
 378         if (netif_running(dev))
 379                 bcm_sysport_update_mib_counters(priv);
 380
 381         for (i =  0; i < BCM_SYSPORT_STATS_LEN; i++) {
 382                 const struct bcm_sysport_stats *s;
 383                 char *p;
 384
 385                 s = &bcm_sysport_gstrings_stats[i];
 386                 if (s->type == BCM_SYSPORT_STAT_NETDEV)
 387                         p = (char *)&dev->stats;
 388                 else
 389                         p = (char *)priv;
 390                 p += s->stat_offset;
 391                 data[i] = *(u32 *)p;
 392         }
 393 }
 394
 395 static void bcm_sysport_get_wol(struct net_device *dev,
 396                                 struct ethtool_wolinfo *wol)
 397 {
 398         struct bcm_sysport_priv *priv = netdev_priv(dev);
 399         u32 reg;
 400
 401         wol->supported = WAKE_MAGIC | WAKE_MAGICSECURE;
 402         wol->wolopts = priv->wolopts;
 403
 404         if (!(priv->wolopts & WAKE_MAGICSECURE))
 405                 return;
 406
 407         /* Return the programmed SecureOn password */
 408         reg = umac_readl(priv, UMAC_PSW_MS);
 409         put_unaligned_be16(reg, &wol->sopass[0]);
 410         reg = umac_readl(priv, UMAC_PSW_LS);
 411         put_unaligned_be32(reg, &wol->sopass[2]);
 412 }
 413
 414 static int bcm_sysport_set_wol(struct net_device *dev,
 415                                struct ethtool_wolinfo *wol)
 416 {
 417         struct bcm_sysport_priv *priv = netdev_priv(dev);
 418         struct device *kdev = &priv->pdev->dev;
 419         u32 supported = WAKE_MAGIC | WAKE_MAGICSECURE;
 420
 421         if (!device_can_wakeup(kdev))
 422                 return -ENOTSUPP;
 423
 424         if (wol->wolopts & ~supported)
 425                 return -EINVAL;
 426
 427         /* Program the SecureOn password */
 428         if (wol->wolopts & WAKE_MAGICSECURE) {
 429                 umac_writel(priv, get_unaligned_be16(&wol->sopass[0]),
 430                             UMAC_PSW_MS);
 431                 umac_writel(priv, get_unaligned_be32(&wol->sopass[2]),
 432                             UMAC_PSW_LS);
 433         }
 434
 435         /* Flag the device and relevant IRQ as wakeup capable */
 436         if (wol->wolopts) {
 437                 device_set_wakeup_enable(kdev, 1);
 438                 if (priv->wol_irq_disabled)
 439                         enable_irq_wake(priv->wol_irq);
 440                 priv->wol_irq_disabled = 0;
 441         } else {
 442                 device_set_wakeup_enable(kdev, 0);
 443                 /* Avoid unbalanced disable_irq_wake calls */
 444                 if (!priv->wol_irq_disabled)
 445                         disable_irq_wake(priv->wol_irq);
 446                 priv->wol_irq_disabled = 1;
 447         }
 448
 449         priv->wolopts = wol->wolopts;
 450
 451         return 0;
 452 }
 453
 454 static int bcm_sysport_get_coalesce(struct net_device *dev,
 455                                     struct ethtool_coalesce *ec)
 456 {
 457         struct bcm_sysport_priv *priv = netdev_priv(dev);
 458         u32 reg;
 459
 460         reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(0));
 461
 462         ec->tx_coalesce_usecs = (reg >> RING_TIMEOUT_SHIFT) * 8192 / 1000;
 463         ec->tx_max_coalesced_frames = reg & RING_INTR_THRESH_MASK;
 464
 465         reg = rdma_readl(priv, RDMA_MBDONE_INTR);
 466
 467         ec->rx_coalesce_usecs = (reg >> RDMA_TIMEOUT_SHIFT) * 8192 / 1000;
 468         ec->rx_max_coalesced_frames = reg & RDMA_INTR_THRESH_MASK;
 469
 470         return 0;
 471 }
 472
 473 static int bcm_sysport_set_coalesce(struct net_device *dev,
 474                                     struct ethtool_coalesce *ec)
 475 {
 476         struct bcm_sysport_priv *priv = netdev_priv(dev);
 477         unsigned int i;
 478         u32 reg;
 479
 480         /* Base system clock is 125Mhz, DMA timeout is this reference clock
 481          * divided by 1024, which yield roughly 8.192 us, our maximum value has
 482          * to fit in the RING_TIMEOUT_MASK (16 bits).
 483          */
 484         if (ec->tx_max_coalesced_frames > RING_INTR_THRESH_MASK ||
 485             ec->tx_coalesce_usecs > (RING_TIMEOUT_MASK * 8) + 1 ||
 486             ec->rx_max_coalesced_frames > RDMA_INTR_THRESH_MASK ||
 487             ec->rx_coalesce_usecs > (RDMA_TIMEOUT_MASK * 8) + 1)
 488                 return -EINVAL;
 489
 490         if ((ec->tx_coalesce_usecs == 0 && ec->tx_max_coalesced_frames == 0) ||
 491             (ec->rx_coalesce_usecs == 0 && ec->rx_max_coalesced_frames == 0))
 492                 return -EINVAL;
 493
 494         for (i = 0; i < dev->num_tx_queues; i++) {
 495                 reg = tdma_readl(priv, TDMA_DESC_RING_INTR_CONTROL(i));
 496                 reg &= ~(RING_INTR_THRESH_MASK |
 497                          RING_TIMEOUT_MASK << RING_TIMEOUT_SHIFT);
 498                 reg |= ec->tx_max_coalesced_frames;
 499                 reg |= DIV_ROUND_UP(ec->tx_coalesce_usecs * 1000, 8192) <<
 500                          RING_TIMEOUT_SHIFT;
 501                 tdma_writel(priv, reg, TDMA_DESC_RING_INTR_CONTROL(i));
 502         }
 503
 504         reg = rdma_readl(priv, RDMA_MBDONE_INTR);
 505         reg &= ~(RDMA_INTR_THRESH_MASK |
 506                  RDMA_TIMEOUT_MASK << RDMA_TIMEOUT_SHIFT);
 507         reg |= ec->rx_max_coalesced_frames;
 508         reg |= DIV_ROUND_UP(ec->rx_coalesce_usecs * 1000, 8192) <<
 509                             RDMA_TIMEOUT_SHIFT;
 510         rdma_writel(priv, reg, RDMA_MBDONE_INTR);
 511
 512         return 0;
 513 }
 514
 515 static void bcm_sysport_free_cb(struct bcm_sysport_cb *cb)
 516 {
 517         dev_kfree_skb_any(cb->skb);
 518         cb->skb = NULL;
 519         dma_unmap_addr_set(cb, dma_addr, 0);
 520 }
 521
 522 static struct sk_buff *bcm_sysport_rx_refill(struct bcm_sysport_priv *priv,
 523                                              struct bcm_sysport_cb *cb)
 524 {
 525         struct device *kdev = &priv->pdev->dev;
 526         struct net_device *ndev = priv->netdev;
 527         struct sk_buff *skb, *rx_skb;
 528         dma_addr_t mapping;
 529
 530         /* Allocate a new SKB for a new packet */
 531         skb = netdev_alloc_skb(priv->netdev, RX_BUF_LENGTH);
 532         if (!skb) {
 533                 priv->mib.alloc_rx_buff_failed++;
 534                 netif_err(priv, rx_err, ndev, "SKB alloc failed\n");
 535                 return NULL;
 536         }
 537
 538         mapping = dma_map_single(kdev, skb->data,
 539                                  RX_BUF_LENGTH, DMA_FROM_DEVICE);
 540         if (dma_mapping_error(kdev, mapping)) {
 541                 priv->mib.rx_dma_failed++;
 542                 dev_kfree_skb_any(skb);
 543                 netif_err(priv, rx_err, ndev, "DMA mapping failure\n");
 544                 return NULL;
 545         }
 546
 547         /* Grab the current SKB on the ring */
 548         rx_skb = cb->skb;
 549         if (likely(rx_skb))
 550                 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
 551                                  RX_BUF_LENGTH, DMA_FROM_DEVICE);
 552
 553         /* Put the new SKB on the ring */
 554         cb->skb = skb;
 555         dma_unmap_addr_set(cb, dma_addr, mapping);
 556         dma_desc_set_addr(priv, cb->bd_addr, mapping);
 557
 558         netif_dbg(priv, rx_status, ndev, "RX refill\n");
 559
 560         /* Return the current SKB to the caller */
 561         return rx_skb;
 562 }
 563
 564 static int bcm_sysport_alloc_rx_bufs(struct bcm_sysport_priv *priv)
 565 {
 566         struct bcm_sysport_cb *cb;
 567         struct sk_buff *skb;
 568         unsigned int i;
 569
 570         for (i = 0; i < priv->num_rx_bds; i++) {
 571                 cb = &priv->rx_cbs[i];
 572                 skb = bcm_sysport_rx_refill(priv, cb);
 573                 if (skb)
 574                         dev_kfree_skb(skb);
 575                 if (!cb->skb)
 576                         return -ENOMEM;
 577         }
 578
 579         return 0;
 580 }
 581
 582 /* Poll the hardware for up to budget packets to process */
 583 static unsigned int bcm_sysport_desc_rx(struct bcm_sysport_priv *priv,
 584                                         unsigned int budget)
 585 {
 586         struct net_device *ndev = priv->netdev;
 587         unsigned int processed = 0, to_process;
 588         struct bcm_sysport_cb *cb;
 589         struct sk_buff *skb;
 590         unsigned int p_index;
 591         u16 len, status;
 592         struct bcm_rsb *rsb;
 593
 594         /* Determine how much we should process since last call */
 595         p_index = rdma_readl(priv, RDMA_PROD_INDEX);
 596         p_index &= RDMA_PROD_INDEX_MASK;
 597
 598         if (p_index < priv->rx_c_index)
 599                 to_process = (RDMA_CONS_INDEX_MASK + 1) -
 600                         priv->rx_c_index + p_index;
 601         else
 602                 to_process = p_index - priv->rx_c_index;
 603
 604         netif_dbg(priv, rx_status, ndev,
 605                   "p_index=%d rx_c_index=%d to_process=%d\n",
 606                   p_index, priv->rx_c_index, to_process);
 607
 608         while ((processed < to_process) && (processed < budget)) {
 609                 cb = &priv->rx_cbs[priv->rx_read_ptr];
 610                 skb = bcm_sysport_rx_refill(priv, cb);
 611
 612
 613                 /* We do not have a backing SKB, so we do not a corresponding
 614                  * DMA mapping for this incoming packet since
 615                  * bcm_sysport_rx_refill always either has both skb and mapping
 616                  * or none.
 617                  */
 618                 if (unlikely(!skb)) {
 619                         netif_err(priv, rx_err, ndev, "out of memory!\n");
 620                         ndev->stats.rx_dropped++;
 621                         ndev->stats.rx_errors++;
 622                         goto next;
 623                 }
 624
 625                 /* Extract the Receive Status Block prepended */
 626                 rsb = (struct bcm_rsb *)skb->data;
 627                 len = (rsb->rx_status_len >> DESC_LEN_SHIFT) & DESC_LEN_MASK;
 628                 status = (rsb->rx_status_len >> DESC_STATUS_SHIFT) &
 629                           DESC_STATUS_MASK;
 630
 631                 netif_dbg(priv, rx_status, ndev,
 632                           "p=%d, c=%d, rd_ptr=%d, len=%d, flag=0x%04x\n",
 633                           p_index, priv->rx_c_index, priv->rx_read_ptr,
 634                           len, status);
 635
 636                 if (unlikely(len > RX_BUF_LENGTH)) {
 637                         netif_err(priv, rx_status, ndev, "oversized packet\n");
 638                         ndev->stats.rx_length_errors++;
 639                         ndev->stats.rx_errors++;
 640                         dev_kfree_skb_any(skb);
 641                         goto next;
 642                 }
 643
 644                 if (unlikely(!(status & DESC_EOP) || !(status & DESC_SOP))) {
 645                         netif_err(priv, rx_status, ndev, "fragmented packet!\n");
 646                         ndev->stats.rx_dropped++;
 647                         ndev->stats.rx_errors++;
 648                         dev_kfree_skb_any(skb);
 649                         goto next;
 650                 }
 651
 652                 if (unlikely(status & (RX_STATUS_ERR | RX_STATUS_OVFLOW))) {
 653                         netif_err(priv, rx_err, ndev, "error packet\n");
 654                         if (status & RX_STATUS_OVFLOW)
 655                                 ndev->stats.rx_over_errors++;
 656                         ndev->stats.rx_dropped++;
 657                         ndev->stats.rx_errors++;
 658                         dev_kfree_skb_any(skb);
 659                         goto next;
 660                 }
 661
 662                 skb_put(skb, len);
 663
 664                 /* Hardware validated our checksum */
 665                 if (likely(status & DESC_L4_CSUM))
 666                         skb->ip_summed = CHECKSUM_UNNECESSARY;
 667
 668                 /* Hardware pre-pends packets with 2bytes before Ethernet
 669                  * header plus we have the Receive Status Block, strip off all
 670                  * of this from the SKB.
 671                  */
 672                 skb_pull(skb, sizeof(*rsb) + 2);
 673                 len -= (sizeof(*rsb) + 2);
 674
 675                 /* UniMAC may forward CRC */
 676                 if (priv->crc_fwd) {
 677                         skb_trim(skb, len - ETH_FCS_LEN);
 678                         len -= ETH_FCS_LEN;
 679                 }
 680
 681                 skb->protocol = eth_type_trans(skb, ndev);
 682                 ndev->stats.rx_packets++;
 683                 ndev->stats.rx_bytes += len;
 684
 685                 napi_gro_receive(&priv->napi, skb);
 686 next:
 687                 processed++;
 688                 priv->rx_read_ptr++;
 689
 690                 if (priv->rx_read_ptr == priv->num_rx_bds)
 691                         priv->rx_read_ptr = 0;
 692         }
 693
 694         return processed;
 695 }
 696
 697 static void bcm_sysport_tx_reclaim_one(struct bcm_sysport_priv *priv,
 698                                        struct bcm_sysport_cb *cb,
 699                                        unsigned int *bytes_compl,
 700                                        unsigned int *pkts_compl)
 701 {
 702         struct device *kdev = &priv->pdev->dev;
 703         struct net_device *ndev = priv->netdev;
 704
 705         if (cb->skb) {
 706                 ndev->stats.tx_bytes += cb->skb->len;
 707                 *bytes_compl += cb->skb->len;
 708                 dma_unmap_single(kdev, dma_unmap_addr(cb, dma_addr),
 709                                  dma_unmap_len(cb, dma_len),
 710                                  DMA_TO_DEVICE);
 711                 ndev->stats.tx_packets++;
 712                 (*pkts_compl)++;
 713                 bcm_sysport_free_cb(cb);
 714         /* SKB fragment */
 715         } else if (dma_unmap_addr(cb, dma_addr)) {
 716                 ndev->stats.tx_bytes += dma_unmap_len(cb, dma_len);
 717                 dma_unmap_page(kdev, dma_unmap_addr(cb, dma_addr),
 718                                dma_unmap_len(cb, dma_len), DMA_TO_DEVICE);
 719                 dma_unmap_addr_set(cb, dma_addr, 0);
 720         }
 721 }
 722
 723 /* Reclaim queued SKBs for transmission completion, lockless version */
 724 static unsigned int __bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
 725                                              struct bcm_sysport_tx_ring *ring)
 726 {
 727         struct net_device *ndev = priv->netdev;
 728         unsigned int c_index, last_c_index, last_tx_cn, num_tx_cbs;
 729         unsigned int pkts_compl = 0, bytes_compl = 0;
 730         struct bcm_sysport_cb *cb;
 731         struct netdev_queue *txq;
 732         u32 hw_ind;
 733
 734         txq = netdev_get_tx_queue(ndev, ring->index);
 735
 736         /* Compute how many descriptors have been processed since last call */
 737         hw_ind = tdma_readl(priv, TDMA_DESC_RING_PROD_CONS_INDEX(ring->index));
 738         c_index = (hw_ind >> RING_CONS_INDEX_SHIFT) & RING_CONS_INDEX_MASK;
 739         ring->p_index = (hw_ind & RING_PROD_INDEX_MASK);
 740
 741         last_c_index = ring->c_index;
 742         num_tx_cbs = ring->size;
 743
 744         c_index &= (num_tx_cbs - 1);
 745
 746         if (c_index >= last_c_index)
 747                 last_tx_cn = c_index - last_c_index;
 748         else
 749                 last_tx_cn = num_tx_cbs - last_c_index + c_index;
 750
 751         netif_dbg(priv, tx_done, ndev,
 752                   "ring=%d c_index=%d last_tx_cn=%d last_c_index=%d\n",
 753                   ring->index, c_index, last_tx_cn, last_c_index);
 754
 755         while (last_tx_cn-- > 0) {
 756                 cb = ring->cbs + last_c_index;
 757                 bcm_sysport_tx_reclaim_one(priv, cb, &bytes_compl, &pkts_compl);
 758
 759                 ring->desc_count++;
 760                 last_c_index++;
 761                 last_c_index &= (num_tx_cbs - 1);
 762         }
 763
 764         ring->c_index = c_index;
 765
 766         if (netif_tx_queue_stopped(txq) && pkts_compl)
 767                 netif_tx_wake_queue(txq);
 768
 769         netif_dbg(priv, tx_done, ndev,
 770                   "ring=%d c_index=%d pkts_compl=%d, bytes_compl=%d\n",
 771                   ring->index, ring->c_index, pkts_compl, bytes_compl);
 772
 773         return pkts_compl;
 774 }
 775
 776 /* Locked version of the per-ring TX reclaim routine */
 777 static unsigned int bcm_sysport_tx_reclaim(struct bcm_sysport_priv *priv,
 778                                            struct bcm_sysport_tx_ring *ring)
 779 {
 780         unsigned int released;
 781         unsigned long flags;
 782
 783         spin_lock_irqsave(&ring->lock, flags);
 784         released = __bcm_sysport_tx_reclaim(priv, ring);
 785         spin_unlock_irqrestore(&ring->lock, flags);
 786
 787         return released;
 788 }
 789
 790 static int bcm_sysport_tx_poll(struct napi_struct *napi, int budget)
 791 {
 792         struct bcm_sysport_tx_ring *ring =
 793                 container_of(napi, struct bcm_sysport_tx_ring, napi);
 794         unsigned int work_done = 0;
 795
 796         work_done = bcm_sysport_tx_reclaim(ring->priv, ring);
 797
 798         if (work_done == 0) {
 799                 napi_complete(napi);
 800                 /* re-enable TX interrupt */
 801                 intrl2_1_mask_clear(ring->priv, BIT(ring->index));
 802
 803                 return 0;
 804         }
 805
 806         return budget;
 807 }
 808
 809 static void bcm_sysport_tx_reclaim_all(struct bcm_sysport_priv *priv)
 810 {
 811         unsigned int q;
 812
 813         for (q = 0; q < priv->netdev->num_tx_queues; q++)
 814                 bcm_sysport_tx_reclaim(priv, &priv->tx_rings[q]);
 815 }
 816
 817 static int bcm_sysport_poll(struct napi_struct *napi, int budget)
 818 {
 819         struct bcm_sysport_priv *priv =
 820                 container_of(napi, struct bcm_sysport_priv, napi);
 821         unsigned int work_done = 0;
 822
 823         work_done = bcm_sysport_desc_rx(priv, budget);
 824
 825         priv->rx_c_index += work_done;
 826         priv->rx_c_index &= RDMA_CONS_INDEX_MASK;
 827         rdma_writel(priv, priv->rx_c_index, RDMA_CONS_INDEX);
 828
 829         if (work_done < budget) {
 830                 napi_complete_done(napi, work_done);
 831                 /* re-enable RX interrupts */
 832                 intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE);
 833         }
 834
 835         return work_done;
 836 }
 837
 838 static void bcm_sysport_resume_from_wol(struct bcm_sysport_priv *priv)
 839 {
 840         u32 reg;
 841
 842         /* Stop monitoring MPD interrupt */
 843         intrl2_0_mask_set(priv, INTRL2_0_MPD);
 844
 845         /* Clear the MagicPacket detection logic */
 846         reg = umac_readl(priv, UMAC_MPD_CTRL);
 847         reg &= ~MPD_EN;
 848         umac_writel(priv, reg, UMAC_MPD_CTRL);
 849
 850         netif_dbg(priv, wol, priv->netdev, "resumed from WOL\n");
 851 }
 852
 853 /* RX and misc interrupt routine */
 854 static irqreturn_t bcm_sysport_rx_isr(int irq, void *dev_id)
 855 {
 856         struct net_device *dev = dev_id;
 857         struct bcm_sysport_priv *priv = netdev_priv(dev);
 858
 859         priv->irq0_stat = intrl2_0_readl(priv, INTRL2_CPU_STATUS) &
 860                           ~intrl2_0_readl(priv, INTRL2_CPU_MASK_STATUS);
 861         intrl2_0_writel(priv, priv->irq0_stat, INTRL2_CPU_CLEAR);
 862
 863         if (unlikely(priv->irq0_stat == 0)) {
 864                 netdev_warn(priv->netdev, "spurious RX interrupt\n");
 865                 return IRQ_NONE;
 866         }
 867
 868         if (priv->irq0_stat & INTRL2_0_RDMA_MBDONE) {
 869                 if (likely(napi_schedule_prep(&priv->napi))) {
 870                         /* disable RX interrupts */
 871                         intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE);
 872                         __napi_schedule_irqoff(&priv->napi);
 873                 }
 874         }
 875
 876         /* TX ring is full, perform a full reclaim since we do not know
 877          * which one would trigger this interrupt
 878          */
 879         if (priv->irq0_stat & INTRL2_0_TX_RING_FULL)
 880                 bcm_sysport_tx_reclaim_all(priv);
 881
 882         if (priv->irq0_stat & INTRL2_0_MPD) {
 883                 netdev_info(priv->netdev, "Wake-on-LAN interrupt!\n");
 884                 bcm_sysport_resume_from_wol(priv);
 885         }
 886
 887         return IRQ_HANDLED;
 888 }
 889
 890 /* TX interrupt service routine */
 891 static irqreturn_t bcm_sysport_tx_isr(int irq, void *dev_id)
 892 {
 893         struct net_device *dev = dev_id;
 894         struct bcm_sysport_priv *priv = netdev_priv(dev);
 895         struct bcm_sysport_tx_ring *txr;
 896         unsigned int ring;
 897
 898         priv->irq1_stat = intrl2_1_readl(priv, INTRL2_CPU_STATUS) &
 899                                 ~intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);
 900         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
 901
 902         if (unlikely(priv->irq1_stat == 0)) {
 903                 netdev_warn(priv->netdev, "spurious TX interrupt\n");
 904                 return IRQ_NONE;
 905         }
 906
 907         for (ring = 0; ring < dev->num_tx_queues; ring++) {
 908                 if (!(priv->irq1_stat & BIT(ring)))
 909                         continue;
 910
 911                 txr = &priv->tx_rings[ring];
 912
 913                 if (likely(napi_schedule_prep(&txr->napi))) {
 914                         intrl2_1_mask_set(priv, BIT(ring));
 915                         __napi_schedule_irqoff(&txr->napi);
 916                 }
 917         }
 918
 919         return IRQ_HANDLED;
 920 }
 921
 922 static irqreturn_t bcm_sysport_wol_isr(int irq, void *dev_id)
 923 {
 924         struct bcm_sysport_priv *priv = dev_id;
 925
 926         pm_wakeup_event(&priv->pdev->dev, 0);
 927
 928         return IRQ_HANDLED;
 929 }
 930
 931 #ifdef CONFIG_NET_POLL_CONTROLLER
 932 static void bcm_sysport_poll_controller(struct net_device *dev)
 933 {
 934         struct bcm_sysport_priv *priv = netdev_priv(dev);
 935
 936         disable_irq(priv->irq0);
 937         bcm_sysport_rx_isr(priv->irq0, priv);
 938         enable_irq(priv->irq0);
 939
 940         disable_irq(priv->irq1);
 941         bcm_sysport_tx_isr(priv->irq1, priv);
 942         enable_irq(priv->irq1);
 943 }
 944 #endif
 945
 946 static struct sk_buff *bcm_sysport_insert_tsb(struct sk_buff *skb,
 947                                               struct net_device *dev)
 948 {
 949         struct sk_buff *nskb;
 950         struct bcm_tsb *tsb;
 951         u32 csum_info;
 952         u8 ip_proto;
 953         u16 csum_start;
 954         u16 ip_ver;
 955
 956         /* Re-allocate SKB if needed */
 957         if (unlikely(skb_headroom(skb) < sizeof(*tsb))) {
 958                 nskb = skb_realloc_headroom(skb, sizeof(*tsb));
 959                 dev_kfree_skb(skb);
 960                 if (!nskb) {
 961                         dev->stats.tx_errors++;
 962                         dev->stats.tx_dropped++;
 963                         return NULL;
 964                 }
 965                 skb = nskb;
 966         }
 967
 968         tsb = (struct bcm_tsb *)skb_push(skb, sizeof(*tsb));
 969         /* Zero-out TSB by default */
 970         memset(tsb, 0, sizeof(*tsb));
 971
 972         if (skb->ip_summed == CHECKSUM_PARTIAL) {
 973                 ip_ver = htons(skb->protocol);
 974                 switch (ip_ver) {
 975                 case ETH_P_IP:
 976                         ip_proto = ip_hdr(skb)->protocol;
 977                         break;
 978                 case ETH_P_IPV6:
 979                         ip_proto = ipv6_hdr(skb)->nexthdr;
 980                         break;
 981                 default:
 982                         return skb;
 983                 }
 984
 985                 /* Get the checksum offset and the L4 (transport) offset */
 986                 csum_start = skb_checksum_start_offset(skb) - sizeof(*tsb);
 987                 csum_info = (csum_start + skb->csum_offset) & L4_CSUM_PTR_MASK;
 988                 csum_info |= (csum_start << L4_PTR_SHIFT);
 989
 990                 if (ip_proto == IPPROTO_TCP || ip_proto == IPPROTO_UDP) {
 991                         csum_info |= L4_LENGTH_VALID;
 992                         if (ip_proto == IPPROTO_UDP && ip_ver == ETH_P_IP)
 993                                 csum_info |= L4_UDP;
 994                 } else {
 995                         csum_info = 0;
 996                 }
 997
 998                 tsb->l4_ptr_dest_map = csum_info;
 999         }
1000
1001         return skb;
1002 }
1003
1004 static netdev_tx_t bcm_sysport_xmit(struct sk_buff *skb,
1005                                     struct net_device *dev)
1006 {
1007         struct bcm_sysport_priv *priv = netdev_priv(dev);
1008         struct device *kdev = &priv->pdev->dev;
1009         struct bcm_sysport_tx_ring *ring;
1010         struct bcm_sysport_cb *cb;
1011         struct netdev_queue *txq;
1012         struct dma_desc *desc;
1013         unsigned int skb_len;
1014         unsigned long flags;
1015         dma_addr_t mapping;
1016         u32 len_status;
1017         u16 queue;
1018         int ret;
1019
1020         queue = skb_get_queue_mapping(skb);
1021         txq = netdev_get_tx_queue(dev, queue);
1022         ring = &priv->tx_rings[queue];
1023
1024         /* lock against tx reclaim in BH context and TX ring full interrupt */
1025         spin_lock_irqsave(&ring->lock, flags);
1026         if (unlikely(ring->desc_count == 0)) {
1027                 netif_tx_stop_queue(txq);
1028                 netdev_err(dev, "queue %d awake and ring full!\n", queue);
1029                 ret = NETDEV_TX_BUSY;
1030                 goto out;
1031         }
1032
1033         /* Insert TSB and checksum infos */
1034         if (priv->tsb_en) {
1035                 skb = bcm_sysport_insert_tsb(skb, dev);
1036                 if (!skb) {
1037                         ret = NETDEV_TX_OK;
1038                         goto out;
1039                 }
1040         }
1041
1042         /* The Ethernet switch we are interfaced with needs packets to be at
1043          * least 64 bytes (including FCS) otherwise they will be discarded when
1044          * they enter the switch port logic. When Broadcom tags are enabled, we
1045          * need to make sure that packets are at least 68 bytes
1046          * (including FCS and tag) because the length verification is done after
1047          * the Broadcom tag is stripped off the ingress packet.
1048          */
1049         if (skb_padto(skb, ETH_ZLEN + ENET_BRCM_TAG_LEN)) {
1050                 ret = NETDEV_TX_OK;
1051                 goto out;
1052         }
1053
1054         skb_len = skb->len < ETH_ZLEN + ENET_BRCM_TAG_LEN ?
1055                         ETH_ZLEN + ENET_BRCM_TAG_LEN : skb->len;
1056
1057         mapping = dma_map_single(kdev, skb->data, skb_len, DMA_TO_DEVICE);
1058         if (dma_mapping_error(kdev, mapping)) {
1059                 priv->mib.tx_dma_failed++;
1060                 netif_err(priv, tx_err, dev, "DMA map failed at %p (len=%d)\n",
1061                           skb->data, skb_len);
1062                 ret = NETDEV_TX_OK;
1063                 goto out;
1064         }
1065
1066         /* Remember the SKB for future freeing */
1067         cb = &ring->cbs[ring->curr_desc];
1068         cb->skb = skb;
1069         dma_unmap_addr_set(cb, dma_addr, mapping);
1070         dma_unmap_len_set(cb, dma_len, skb_len);
1071
1072         /* Fetch a descriptor entry from our pool */
1073         desc = ring->desc_cpu;
1074
1075         desc->addr_lo = lower_32_bits(mapping);
1076         len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK;
1077         len_status |= (skb_len << DESC_LEN_SHIFT);
1078         len_status |= (DESC_SOP | DESC_EOP | TX_STATUS_APP_CRC) <<
1079                        DESC_STATUS_SHIFT;
1080         if (skb->ip_summed == CHECKSUM_PARTIAL)
1081                 len_status |= (DESC_L4_CSUM << DESC_STATUS_SHIFT);
1082
1083         ring->curr_desc++;
1084         if (ring->curr_desc == ring->size)
1085                 ring->curr_desc = 0;
1086         ring->desc_count--;
1087
1088         /* Ensure write completion of the descriptor status/length
1089          * in DRAM before the System Port WRITE_PORT register latches
1090          * the value
1091          */
1092         wmb();
1093         desc->addr_status_len = len_status;
1094         wmb();
1095
1096         /* Write this descriptor address to the RING write port */
1097         tdma_port_write_desc_addr(priv, desc, ring->index);
1098
1099         /* Check ring space and update SW control flow */
1100         if (ring->desc_count == 0)
1101                 netif_tx_stop_queue(txq);
1102
1103         netif_dbg(priv, tx_queued, dev, "ring=%d desc_count=%d, curr_desc=%d\n",
1104                   ring->index, ring->desc_count, ring->curr_desc);
1105
1106         ret = NETDEV_TX_OK;
1107 out:
1108         spin_unlock_irqrestore(&ring->lock, flags);
1109         return ret;
1110 }
1111
1112 static void bcm_sysport_tx_timeout(struct net_device *dev)
1113 {
1114         netdev_warn(dev, "transmit timeout!\n");
1115
1116         netif_trans_update(dev);
1117         dev->stats.tx_errors++;
1118
1119         netif_tx_wake_all_queues(dev);
1120 }
1121
1122 /* phylib adjust link callback */
1123 static void bcm_sysport_adj_link(struct net_device *dev)
1124 {
1125         struct bcm_sysport_priv *priv = netdev_priv(dev);
1126         struct phy_device *phydev = dev->phydev;
1127         unsigned int changed = 0;
1128         u32 cmd_bits = 0, reg;
1129
1130         if (priv->old_link != phydev->link) {
1131                 changed = 1;
1132                 priv->old_link = phydev->link;
1133         }
1134
1135         if (priv->old_duplex != phydev->duplex) {
1136                 changed = 1;
1137                 priv->old_duplex = phydev->duplex;
1138         }
1139
1140         switch (phydev->speed) {
1141         case SPEED_2500:
1142                 cmd_bits = CMD_SPEED_2500;
1143                 break;
1144         case SPEED_1000:
1145                 cmd_bits = CMD_SPEED_1000;
1146                 break;
1147         case SPEED_100:
1148                 cmd_bits = CMD_SPEED_100;
1149                 break;
1150         case SPEED_10:
1151                 cmd_bits = CMD_SPEED_10;
1152                 break;
1153         default:
1154                 break;
1155         }
1156         cmd_bits <<= CMD_SPEED_SHIFT;
1157
1158         if (phydev->duplex == DUPLEX_HALF)
1159                 cmd_bits |= CMD_HD_EN;
1160
1161         if (priv->old_pause != phydev->pause) {
1162                 changed = 1;
1163                 priv->old_pause = phydev->pause;
1164         }
1165
1166         if (!phydev->pause)
1167                 cmd_bits |= CMD_RX_PAUSE_IGNORE | CMD_TX_PAUSE_IGNORE;
1168
1169         if (!changed)
1170                 return;
1171
1172         if (phydev->link) {
1173                 reg = umac_readl(priv, UMAC_CMD);
1174                 reg &= ~((CMD_SPEED_MASK << CMD_SPEED_SHIFT) |
1175                         CMD_HD_EN | CMD_RX_PAUSE_IGNORE |
1176                         CMD_TX_PAUSE_IGNORE);
1177                 reg |= cmd_bits;
1178                 umac_writel(priv, reg, UMAC_CMD);
1179         }
1180
1181         phy_print_status(phydev);
1182 }
1183
1184 static int bcm_sysport_init_tx_ring(struct bcm_sysport_priv *priv,
1185                                     unsigned int index)
1186 {
1187         struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1188         struct device *kdev = &priv->pdev->dev;
1189         size_t size;
1190         void *p;
1191         u32 reg;
1192
1193         /* Simple descriptors partitioning for now */
1194         size = 256;
1195
1196         /* We just need one DMA descriptor which is DMA-able, since writing to
1197          * the port will allocate a new descriptor in its internal linked-list
1198          */
1199         p = dma_zalloc_coherent(kdev, sizeof(struct dma_desc), &ring->desc_dma,
1200                                 GFP_KERNEL);
1201         if (!p) {
1202                 netif_err(priv, hw, priv->netdev, "DMA alloc failed\n");
1203                 return -ENOMEM;
1204         }
1205
1206         ring->cbs = kcalloc(size, sizeof(struct bcm_sysport_cb), GFP_KERNEL);
1207         if (!ring->cbs) {
1208                 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1209                 return -ENOMEM;
1210         }
1211
1212         /* Initialize SW view of the ring */
1213         spin_lock_init(&ring->lock);
1214         ring->priv = priv;
1215         netif_tx_napi_add(priv->netdev, &ring->napi, bcm_sysport_tx_poll, 64);
1216         ring->index = index;
1217         ring->size = size;
1218         ring->alloc_size = ring->size;
1219         ring->desc_cpu = p;
1220         ring->desc_count = ring->size;
1221         ring->curr_desc = 0;
1222
1223         /* Initialize HW ring */
1224         tdma_writel(priv, RING_EN, TDMA_DESC_RING_HEAD_TAIL_PTR(index));
1225         tdma_writel(priv, 0, TDMA_DESC_RING_COUNT(index));
1226         tdma_writel(priv, 1, TDMA_DESC_RING_INTR_CONTROL(index));
1227         tdma_writel(priv, 0, TDMA_DESC_RING_PROD_CONS_INDEX(index));
1228         tdma_writel(priv, RING_IGNORE_STATUS, TDMA_DESC_RING_MAPPING(index));
1229         tdma_writel(priv, 0, TDMA_DESC_RING_PCP_DEI_VID(index));
1230
1231         /* Program the number of descriptors as MAX_THRESHOLD and half of
1232          * its size for the hysteresis trigger
1233          */
1234         tdma_writel(priv, ring->size |
1235                         1 << RING_HYST_THRESH_SHIFT,
1236                         TDMA_DESC_RING_MAX_HYST(index));
1237
1238         /* Enable the ring queue in the arbiter */
1239         reg = tdma_readl(priv, TDMA_TIER1_ARB_0_QUEUE_EN);
1240         reg |= (1 << index);
1241         tdma_writel(priv, reg, TDMA_TIER1_ARB_0_QUEUE_EN);
1242
1243         napi_enable(&ring->napi);
1244
1245         netif_dbg(priv, hw, priv->netdev,
1246                   "TDMA cfg, size=%d, desc_cpu=%p\n",
1247                   ring->size, ring->desc_cpu);
1248
1249         return 0;
1250 }
1251
1252 static void bcm_sysport_fini_tx_ring(struct bcm_sysport_priv *priv,
1253                                      unsigned int index)
1254 {
1255         struct bcm_sysport_tx_ring *ring = &priv->tx_rings[index];
1256         struct device *kdev = &priv->pdev->dev;
1257         u32 reg;
1258
1259         /* Caller should stop the TDMA engine */
1260         reg = tdma_readl(priv, TDMA_STATUS);
1261         if (!(reg & TDMA_DISABLED))
1262                 netdev_warn(priv->netdev, "TDMA not stopped!\n");
1263
1264         /* ring->cbs is the last part in bcm_sysport_init_tx_ring which could
1265          * fail, so by checking this pointer we know whether the TX ring was
1266          * fully initialized or not.
1267          */
1268         if (!ring->cbs)
1269                 return;
1270
1271         napi_disable(&ring->napi);
1272         netif_napi_del(&ring->napi);
1273
1274         bcm_sysport_tx_reclaim(priv, ring);
1275
1276         kfree(ring->cbs);
1277         ring->cbs = NULL;
1278
1279         if (ring->desc_dma) {
1280                 dma_free_coherent(kdev, sizeof(struct dma_desc),
1281                                   ring->desc_cpu, ring->desc_dma);
1282                 ring->desc_dma = 0;
1283         }
1284         ring->size = 0;
1285         ring->alloc_size = 0;
1286
1287         netif_dbg(priv, hw, priv->netdev, "TDMA fini done\n");
1288 }
1289
1290 /* RDMA helper */
1291 static inline int rdma_enable_set(struct bcm_sysport_priv *priv,
1292                                   unsigned int enable)
1293 {
1294         unsigned int timeout = 1000;
1295         u32 reg;
1296
1297         reg = rdma_readl(priv, RDMA_CONTROL);
1298         if (enable)
1299                 reg |= RDMA_EN;
1300         else
1301                 reg &= ~RDMA_EN;
1302         rdma_writel(priv, reg, RDMA_CONTROL);
1303
1304         /* Poll for RMDA disabling completion */
1305         do {
1306                 reg = rdma_readl(priv, RDMA_STATUS);
1307                 if (!!(reg & RDMA_DISABLED) == !enable)
1308                         return 0;
1309                 usleep_range(1000, 2000);
1310         } while (timeout-- > 0);
1311
1312         netdev_err(priv->netdev, "timeout waiting for RDMA to finish\n");
1313
1314         return -ETIMEDOUT;
1315 }
1316
1317 /* TDMA helper */
1318 static inline int tdma_enable_set(struct bcm_sysport_priv *priv,
1319                                   unsigned int enable)
1320 {
1321         unsigned int timeout = 1000;
1322         u32 reg;
1323
1324         reg = tdma_readl(priv, TDMA_CONTROL);
1325         if (enable)
1326                 reg |= TDMA_EN;
1327         else
1328                 reg &= ~TDMA_EN;
1329         tdma_writel(priv, reg, TDMA_CONTROL);
1330
1331         /* Poll for TMDA disabling completion */
1332         do {
1333                 reg = tdma_readl(priv, TDMA_STATUS);
1334                 if (!!(reg & TDMA_DISABLED) == !enable)
1335                         return 0;
1336
1337                 usleep_range(1000, 2000);
1338         } while (timeout-- > 0);
1339
1340         netdev_err(priv->netdev, "timeout waiting for TDMA to finish\n");
1341
1342         return -ETIMEDOUT;
1343 }
1344
1345 static int bcm_sysport_init_rx_ring(struct bcm_sysport_priv *priv)
1346 {
1347         struct bcm_sysport_cb *cb;
1348         u32 reg;
1349         int ret;
1350         int i;
1351
1352         /* Initialize SW view of the RX ring */
1353         priv->num_rx_bds = NUM_RX_DESC;
1354         priv->rx_bds = priv->base + SYS_PORT_RDMA_OFFSET;
1355         priv->rx_c_index = 0;
1356         priv->rx_read_ptr = 0;
1357         priv->rx_cbs = kcalloc(priv->num_rx_bds, sizeof(struct bcm_sysport_cb),
1358                                 GFP_KERNEL);
1359         if (!priv->rx_cbs) {
1360                 netif_err(priv, hw, priv->netdev, "CB allocation failed\n");
1361                 return -ENOMEM;
1362         }
1363
1364         for (i = 0; i < priv->num_rx_bds; i++) {
1365                 cb = priv->rx_cbs + i;
1366                 cb->bd_addr = priv->rx_bds + i * DESC_SIZE;
1367         }
1368
1369         ret = bcm_sysport_alloc_rx_bufs(priv);
1370         if (ret) {
1371                 netif_err(priv, hw, priv->netdev, "SKB allocation failed\n");
1372                 return ret;
1373         }
1374
1375         /* Initialize HW, ensure RDMA is disabled */
1376         reg = rdma_readl(priv, RDMA_STATUS);
1377         if (!(reg & RDMA_DISABLED))
1378                 rdma_enable_set(priv, 0);
1379
1380         rdma_writel(priv, 0, RDMA_WRITE_PTR_LO);
1381         rdma_writel(priv, 0, RDMA_WRITE_PTR_HI);
1382         rdma_writel(priv, 0, RDMA_PROD_INDEX);
1383         rdma_writel(priv, 0, RDMA_CONS_INDEX);
1384         rdma_writel(priv, priv->num_rx_bds << RDMA_RING_SIZE_SHIFT |
1385                           RX_BUF_LENGTH, RDMA_RING_BUF_SIZE);
1386         /* Operate the queue in ring mode */
1387         rdma_writel(priv, 0, RDMA_START_ADDR_HI);
1388         rdma_writel(priv, 0, RDMA_START_ADDR_LO);
1389         rdma_writel(priv, 0, RDMA_END_ADDR_HI);
1390         rdma_writel(priv, NUM_HW_RX_DESC_WORDS - 1, RDMA_END_ADDR_LO);
1391
1392         rdma_writel(priv, 1, RDMA_MBDONE_INTR);
1393
1394         netif_dbg(priv, hw, priv->netdev,
1395                   "RDMA cfg, num_rx_bds=%d, rx_bds=%p\n",
1396                   priv->num_rx_bds, priv->rx_bds);
1397
1398         return 0;
1399 }
1400
1401 static void bcm_sysport_fini_rx_ring(struct bcm_sysport_priv *priv)
1402 {
1403         struct bcm_sysport_cb *cb;
1404         unsigned int i;
1405         u32 reg;
1406
1407         /* Caller should ensure RDMA is disabled */
1408         reg = rdma_readl(priv, RDMA_STATUS);
1409         if (!(reg & RDMA_DISABLED))
1410                 netdev_warn(priv->netdev, "RDMA not stopped!\n");
1411
1412         for (i = 0; i < priv->num_rx_bds; i++) {
1413                 cb = &priv->rx_cbs[i];
1414                 if (dma_unmap_addr(cb, dma_addr))
1415                         dma_unmap_single(&priv->pdev->dev,
1416                                          dma_unmap_addr(cb, dma_addr),
1417                                          RX_BUF_LENGTH, DMA_FROM_DEVICE);
1418                 bcm_sysport_free_cb(cb);
1419         }
1420
1421         kfree(priv->rx_cbs);
1422         priv->rx_cbs = NULL;
1423
1424         netif_dbg(priv, hw, priv->netdev, "RDMA fini done\n");
1425 }
1426
1427 static void bcm_sysport_set_rx_mode(struct net_device *dev)
1428 {
1429         struct bcm_sysport_priv *priv = netdev_priv(dev);
1430         u32 reg;
1431
1432         reg = umac_readl(priv, UMAC_CMD);
1433         if (dev->flags & IFF_PROMISC)
1434                 reg |= CMD_PROMISC;
1435         else
1436                 reg &= ~CMD_PROMISC;
1437         umac_writel(priv, reg, UMAC_CMD);
1438
1439         /* No support for ALLMULTI */
1440         if (dev->flags & IFF_ALLMULTI)
1441                 return;
1442 }
1443
1444 static inline void umac_enable_set(struct bcm_sysport_priv *priv,
1445                                    u32 mask, unsigned int enable)
1446 {
1447         u32 reg;
1448
1449         reg = umac_readl(priv, UMAC_CMD);
1450         if (enable)
1451                 reg |= mask;
1452         else
1453                 reg &= ~mask;
1454         umac_writel(priv, reg, UMAC_CMD);
1455
1456         /* UniMAC stops on a packet boundary, wait for a full-sized packet
1457          * to be processed (1 msec).
1458          */
1459         if (enable == 0)
1460                 usleep_range(1000, 2000);
1461 }
1462
1463 static inline void umac_reset(struct bcm_sysport_priv *priv)
1464 {
1465         u32 reg;
1466
1467         reg = umac_readl(priv, UMAC_CMD);
1468         reg |= CMD_SW_RESET;
1469         umac_writel(priv, reg, UMAC_CMD);
1470         udelay(10);
1471         reg = umac_readl(priv, UMAC_CMD);
1472         reg &= ~CMD_SW_RESET;
1473         umac_writel(priv, reg, UMAC_CMD);
1474 }
1475
1476 static void umac_set_hw_addr(struct bcm_sysport_priv *priv,
1477                              unsigned char *addr)
1478 {
1479         umac_writel(priv, (addr[0] << 24) | (addr[1] << 16) |
1480                         (addr[2] << 8) | addr[3], UMAC_MAC0);
1481         umac_writel(priv, (addr[4] << 8) | addr[5], UMAC_MAC1);
1482 }
1483
1484 static void topctrl_flush(struct bcm_sysport_priv *priv)
1485 {
1486         topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1487         topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1488         mdelay(1);
1489         topctrl_writel(priv, 0, RX_FLUSH_CNTL);
1490         topctrl_writel(priv, 0, TX_FLUSH_CNTL);
1491 }
1492
1493 static int bcm_sysport_change_mac(struct net_device *dev, void *p)
1494 {
1495         struct bcm_sysport_priv *priv = netdev_priv(dev);
1496         struct sockaddr *addr = p;
1497
1498         if (!is_valid_ether_addr(addr->sa_data))
1499                 return -EINVAL;
1500
1501         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1502
1503         /* interface is disabled, changes to MAC will be reflected on next
1504          * open call
1505          */
1506         if (!netif_running(dev))
1507                 return 0;
1508
1509         umac_set_hw_addr(priv, dev->dev_addr);
1510
1511         return 0;
1512 }
1513
1514 static void bcm_sysport_netif_start(struct net_device *dev)
1515 {
1516         struct bcm_sysport_priv *priv = netdev_priv(dev);
1517
1518         /* Enable NAPI */
1519         napi_enable(&priv->napi);
1520
1521         /* Enable RX interrupt and TX ring full interrupt */
1522         intrl2_0_mask_clear(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1523
1524         phy_start(dev->phydev);
1525
1526         /* Enable TX interrupts for the 32 TXQs */
1527         intrl2_1_mask_clear(priv, 0xffffffff);
1528
1529         /* Last call before we start the real business */
1530         netif_tx_start_all_queues(dev);
1531 }
1532
1533 static void rbuf_init(struct bcm_sysport_priv *priv)
1534 {
1535         u32 reg;
1536
1537         reg = rbuf_readl(priv, RBUF_CONTROL);
1538         reg |= RBUF_4B_ALGN | RBUF_RSB_EN;
1539         rbuf_writel(priv, reg, RBUF_CONTROL);
1540 }
1541
1542 static int bcm_sysport_open(struct net_device *dev)
1543 {
1544         struct bcm_sysport_priv *priv = netdev_priv(dev);
1545         struct phy_device *phydev;
1546         unsigned int i;
1547         int ret;
1548
1549         /* Reset UniMAC */
1550         umac_reset(priv);
1551
1552         /* Flush TX and RX FIFOs at TOPCTRL level */
1553         topctrl_flush(priv);
1554
1555         /* Disable the UniMAC RX/TX */
1556         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 0);
1557
1558         /* Enable RBUF 2bytes alignment and Receive Status Block */
1559         rbuf_init(priv);
1560
1561         /* Set maximum frame length */
1562         umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
1563
1564         /* Set MAC address */
1565         umac_set_hw_addr(priv, dev->dev_addr);
1566
1567         /* Read CRC forward */
1568         priv->crc_fwd = !!(umac_readl(priv, UMAC_CMD) & CMD_CRC_FWD);
1569
1570         phydev = of_phy_connect(dev, priv->phy_dn, bcm_sysport_adj_link,
1571                                 0, priv->phy_interface);
1572         if (!phydev) {
1573                 netdev_err(dev, "could not attach to PHY\n");
1574                 return -ENODEV;
1575         }
1576
1577         /* Reset house keeping link status */
1578         priv->old_duplex = -1;
1579         priv->old_link = -1;
1580         priv->old_pause = -1;
1581
1582         /* mask all interrupts and request them */
1583         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1584         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1585         intrl2_0_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1586         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_MASK_SET);
1587         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1588         intrl2_1_writel(priv, 0, INTRL2_CPU_MASK_CLEAR);
1589
1590         ret = request_irq(priv->irq0, bcm_sysport_rx_isr, 0, dev->name, dev);
1591         if (ret) {
1592                 netdev_err(dev, "failed to request RX interrupt\n");
1593                 goto out_phy_disconnect;
1594         }
1595
1596         ret = request_irq(priv->irq1, bcm_sysport_tx_isr, 0, dev->name, dev);
1597         if (ret) {
1598                 netdev_err(dev, "failed to request TX interrupt\n");
1599                 goto out_free_irq0;
1600         }
1601
1602         /* Initialize both hardware and software ring */
1603         for (i = 0; i < dev->num_tx_queues; i++) {
1604                 ret = bcm_sysport_init_tx_ring(priv, i);
1605                 if (ret) {
1606                         netdev_err(dev, "failed to initialize TX ring %d\n",
1607                                    i);
1608                         goto out_free_tx_ring;
1609                 }
1610         }
1611
1612         /* Initialize linked-list */
1613         tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
1614
1615         /* Initialize RX ring */
1616         ret = bcm_sysport_init_rx_ring(priv);
1617         if (ret) {
1618                 netdev_err(dev, "failed to initialize RX ring\n");
1619                 goto out_free_rx_ring;
1620         }
1621
1622         /* Turn on RDMA */
1623         ret = rdma_enable_set(priv, 1);
1624         if (ret)
1625                 goto out_free_rx_ring;
1626
1627         /* Turn on TDMA */
1628         ret = tdma_enable_set(priv, 1);
1629         if (ret)
1630                 goto out_clear_rx_int;
1631
1632         /* Turn on UniMAC TX/RX */
1633         umac_enable_set(priv, CMD_RX_EN | CMD_TX_EN, 1);
1634
1635         bcm_sysport_netif_start(dev);
1636
1637         return 0;
1638
1639 out_clear_rx_int:
1640         intrl2_0_mask_set(priv, INTRL2_0_RDMA_MBDONE | INTRL2_0_TX_RING_FULL);
1641 out_free_rx_ring:
1642         bcm_sysport_fini_rx_ring(priv);
1643 out_free_tx_ring:
1644         for (i = 0; i < dev->num_tx_queues; i++)
1645                 bcm_sysport_fini_tx_ring(priv, i);
1646         free_irq(priv->irq1, dev);
1647 out_free_irq0:
1648         free_irq(priv->irq0, dev);
1649 out_phy_disconnect:
1650         phy_disconnect(phydev);
1651         return ret;
1652 }
1653
1654 static void bcm_sysport_netif_stop(struct net_device *dev)
1655 {
1656         struct bcm_sysport_priv *priv = netdev_priv(dev);
1657
1658         /* stop all software from updating hardware */
1659         netif_tx_stop_all_queues(dev);
1660         napi_disable(&priv->napi);
1661         phy_stop(dev->phydev);
1662
1663         /* mask all interrupts */
1664         intrl2_0_mask_set(priv, 0xffffffff);
1665         intrl2_0_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1666         intrl2_1_mask_set(priv, 0xffffffff);
1667         intrl2_1_writel(priv, 0xffffffff, INTRL2_CPU_CLEAR);
1668 }
1669
1670 static int bcm_sysport_stop(struct net_device *dev)
1671 {
1672         struct bcm_sysport_priv *priv = netdev_priv(dev);
1673         unsigned int i;
1674         int ret;
1675
1676         bcm_sysport_netif_stop(dev);
1677
1678         /* Disable UniMAC RX */
1679         umac_enable_set(priv, CMD_RX_EN, 0);
1680
1681         ret = tdma_enable_set(priv, 0);
1682         if (ret) {
1683                 netdev_err(dev, "timeout disabling RDMA\n");
1684                 return ret;
1685         }
1686
1687         /* Wait for a maximum packet size to be drained */
1688         usleep_range(2000, 3000);
1689
1690         ret = rdma_enable_set(priv, 0);
1691         if (ret) {
1692                 netdev_err(dev, "timeout disabling TDMA\n");
1693                 return ret;
1694         }
1695
1696         /* Disable UniMAC TX */
1697         umac_enable_set(priv, CMD_TX_EN, 0);
1698
1699         /* Free RX/TX rings SW structures */
1700         for (i = 0; i < dev->num_tx_queues; i++)
1701                 bcm_sysport_fini_tx_ring(priv, i);
1702         bcm_sysport_fini_rx_ring(priv);
1703
1704         free_irq(priv->irq0, dev);
1705         free_irq(priv->irq1, dev);
1706
1707         /* Disconnect from PHY */
1708         phy_disconnect(dev->phydev);
1709
1710         return 0;
1711 }
1712
1713 static struct ethtool_ops bcm_sysport_ethtool_ops = {
1714         .get_settings           = bcm_sysport_get_settings,
1715         .set_settings           = bcm_sysport_set_settings,
1716         .get_drvinfo            = bcm_sysport_get_drvinfo,
1717         .get_msglevel           = bcm_sysport_get_msglvl,
1718         .set_msglevel           = bcm_sysport_set_msglvl,
1719         .get_link               = ethtool_op_get_link,
1720         .get_strings            = bcm_sysport_get_strings,
1721         .get_ethtool_stats      = bcm_sysport_get_stats,
1722         .get_sset_count         = bcm_sysport_get_sset_count,
1723         .get_wol                = bcm_sysport_get_wol,
1724         .set_wol                = bcm_sysport_set_wol,
1725         .get_coalesce           = bcm_sysport_get_coalesce,
1726         .set_coalesce           = bcm_sysport_set_coalesce,
1727 };
1728
1729 static const struct net_device_ops bcm_sysport_netdev_ops = {
1730         .ndo_start_xmit         = bcm_sysport_xmit,
1731         .ndo_tx_timeout         = bcm_sysport_tx_timeout,
1732         .ndo_open               = bcm_sysport_open,
1733         .ndo_stop               = bcm_sysport_stop,
1734         .ndo_set_features       = bcm_sysport_set_features,
1735         .ndo_set_rx_mode        = bcm_sysport_set_rx_mode,
1736         .ndo_set_mac_address    = bcm_sysport_change_mac,
1737 #ifdef CONFIG_NET_POLL_CONTROLLER
1738         .ndo_poll_controller    = bcm_sysport_poll_controller,
1739 #endif
1740 };
1741
1742 #define REV_FMT "v%2x.%02x"
1743
1744 static int bcm_sysport_probe(struct platform_device *pdev)
1745 {
1746         struct bcm_sysport_priv *priv;
1747         struct device_node *dn;
1748         struct net_device *dev;
1749         const void *macaddr;
1750         struct resource *r;
1751         u32 txq, rxq;
1752         int ret;
1753
1754         dn = pdev->dev.of_node;
1755         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1756
1757         /* Read the Transmit/Receive Queue properties */
1758         if (of_property_read_u32(dn, "systemport,num-txq", &txq))
1759                 txq = TDMA_NUM_RINGS;
1760         if (of_property_read_u32(dn, "systemport,num-rxq", &rxq))
1761                 rxq = 1;
1762
1763         dev = alloc_etherdev_mqs(sizeof(*priv), txq, rxq);
1764         if (!dev)
1765                 return -ENOMEM;
1766
1767         /* Initialize private members */
1768         priv = netdev_priv(dev);
1769
1770         priv->irq0 = platform_get_irq(pdev, 0);
1771         priv->irq1 = platform_get_irq(pdev, 1);
1772         priv->wol_irq = platform_get_irq(pdev, 2);
1773         if (priv->irq0 <= 0 || priv->irq1 <= 0) {
1774                 dev_err(&pdev->dev, "invalid interrupts\n");
1775                 ret = -EINVAL;
1776                 goto err;
1777         }
1778
1779         priv->base = devm_ioremap_resource(&pdev->dev, r);
1780         if (IS_ERR(priv->base)) {
1781                 ret = PTR_ERR(priv->base);
1782                 goto err;
1783         }
1784
1785         priv->netdev = dev;
1786         priv->pdev = pdev;
1787
1788         priv->phy_interface = of_get_phy_mode(dn);
1789         /* Default to GMII interface mode */
1790         if (priv->phy_interface < 0)
1791                 priv->phy_interface = PHY_INTERFACE_MODE_GMII;
1792
1793         /* In the case of a fixed PHY, the DT node associated
1794          * to the PHY is the Ethernet MAC DT node.
1795          */
1796         if (of_phy_is_fixed_link(dn)) {
1797                 ret = of_phy_register_fixed_link(dn);
1798                 if (ret) {
1799                         dev_err(&pdev->dev, "failed to register fixed PHY\n");
1800                         goto err;
1801                 }
1802
1803                 priv->phy_dn = dn;
1804         }
1805
1806         /* Initialize netdevice members */
1807         macaddr = of_get_mac_address(dn);
1808         if (!macaddr || !is_valid_ether_addr(macaddr)) {
1809                 dev_warn(&pdev->dev, "using random Ethernet MAC\n");
1810                 eth_hw_addr_random(dev);
1811         } else {
1812                 ether_addr_copy(dev->dev_addr, macaddr);
1813         }
1814
1815         SET_NETDEV_DEV(dev, &pdev->dev);
1816         dev_set_drvdata(&pdev->dev, dev);
1817         dev->ethtool_ops = &bcm_sysport_ethtool_ops;
1818         dev->netdev_ops = &bcm_sysport_netdev_ops;
1819         netif_napi_add(dev, &priv->napi, bcm_sysport_poll, 64);
1820
1821         /* HW supported features, none enabled by default */
1822         dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_HIGHDMA |
1823                                 NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
1824
1825         /* Request the WOL interrupt and advertise suspend if available */
1826         priv->wol_irq_disabled = 1;
1827         ret = devm_request_irq(&pdev->dev, priv->wol_irq,
1828                                bcm_sysport_wol_isr, 0, dev->name, priv);
1829         if (!ret)
1830                 device_set_wakeup_capable(&pdev->dev, 1);
1831
1832         /* Set the needed headroom once and for all */
1833         BUILD_BUG_ON(sizeof(struct bcm_tsb) != 8);
1834         dev->needed_headroom += sizeof(struct bcm_tsb);
1835
1836         /* libphy will adjust the link state accordingly */
1837         netif_carrier_off(dev);
1838
1839         ret = register_netdev(dev);
1840         if (ret) {
1841                 dev_err(&pdev->dev, "failed to register net_device\n");
1842                 goto err;
1843         }
1844
1845         priv->rev = topctrl_readl(priv, REV_CNTL) & REV_MASK;
1846         dev_info(&pdev->dev,
1847                  "Broadcom SYSTEMPORT" REV_FMT
1848                  " at 0x%p (irqs: %d, %d, TXQs: %d, RXQs: %d)\n",
1849                  (priv->rev >> 8) & 0xff, priv->rev & 0xff,
1850                  priv->base, priv->irq0, priv->irq1, txq, rxq);
1851
1852         return 0;
1853 err:
1854         free_netdev(dev);
1855         return ret;
1856 }
1857
1858 static int bcm_sysport_remove(struct platform_device *pdev)
1859 {
1860         struct net_device *dev = dev_get_drvdata(&pdev->dev);
1861
1862         /* Not much to do, ndo_close has been called
1863          * and we use managed allocations
1864          */
1865         unregister_netdev(dev);
1866         free_netdev(dev);
1867         dev_set_drvdata(&pdev->dev, NULL);
1868
1869         return 0;
1870 }
1871
1872 #ifdef CONFIG_PM_SLEEP
1873 static int bcm_sysport_suspend_to_wol(struct bcm_sysport_priv *priv)
1874 {
1875         struct net_device *ndev = priv->netdev;
1876         unsigned int timeout = 1000;
1877         u32 reg;
1878
1879         /* Password has already been programmed */
1880         reg = umac_readl(priv, UMAC_MPD_CTRL);
1881         reg |= MPD_EN;
1882         reg &= ~PSW_EN;
1883         if (priv->wolopts & WAKE_MAGICSECURE)
1884                 reg |= PSW_EN;
1885         umac_writel(priv, reg, UMAC_MPD_CTRL);
1886
1887         /* Make sure RBUF entered WoL mode as result */
1888         do {
1889                 reg = rbuf_readl(priv, RBUF_STATUS);
1890                 if (reg & RBUF_WOL_MODE)
1891                         break;
1892
1893                 udelay(10);
1894         } while (timeout-- > 0);
1895
1896         /* Do not leave the UniMAC RBUF matching only MPD packets */
1897         if (!timeout) {
1898                 reg = umac_readl(priv, UMAC_MPD_CTRL);
1899                 reg &= ~MPD_EN;
1900                 umac_writel(priv, reg, UMAC_MPD_CTRL);
1901                 netif_err(priv, wol, ndev, "failed to enter WOL mode\n");
1902                 return -ETIMEDOUT;
1903         }
1904
1905         /* UniMAC receive needs to be turned on */
1906         umac_enable_set(priv, CMD_RX_EN, 1);
1907
1908         /* Enable the interrupt wake-up source */
1909         intrl2_0_mask_clear(priv, INTRL2_0_MPD);
1910
1911         netif_dbg(priv, wol, ndev, "entered WOL mode\n");
1912
1913         return 0;
1914 }
1915
1916 static int bcm_sysport_suspend(struct device *d)
1917 {
1918         struct net_device *dev = dev_get_drvdata(d);
1919         struct bcm_sysport_priv *priv = netdev_priv(dev);
1920         unsigned int i;
1921         int ret = 0;
1922         u32 reg;
1923
1924         if (!netif_running(dev))
1925                 return 0;
1926
1927         bcm_sysport_netif_stop(dev);
1928
1929         phy_suspend(dev->phydev);
1930
1931         netif_device_detach(dev);
1932
1933         /* Disable UniMAC RX */
1934         umac_enable_set(priv, CMD_RX_EN, 0);
1935
1936         ret = rdma_enable_set(priv, 0);
1937         if (ret) {
1938                 netdev_err(dev, "RDMA timeout!\n");
1939                 return ret;
1940         }
1941
1942         /* Disable RXCHK if enabled */
1943         if (priv->rx_chk_en) {
1944                 reg = rxchk_readl(priv, RXCHK_CONTROL);
1945                 reg &= ~RXCHK_EN;
1946                 rxchk_writel(priv, reg, RXCHK_CONTROL);
1947         }
1948
1949         /* Flush RX pipe */
1950         if (!priv->wolopts)
1951                 topctrl_writel(priv, RX_FLUSH, RX_FLUSH_CNTL);
1952
1953         ret = tdma_enable_set(priv, 0);
1954         if (ret) {
1955                 netdev_err(dev, "TDMA timeout!\n");
1956                 return ret;
1957         }
1958
1959         /* Wait for a packet boundary */
1960         usleep_range(2000, 3000);
1961
1962         umac_enable_set(priv, CMD_TX_EN, 0);
1963
1964         topctrl_writel(priv, TX_FLUSH, TX_FLUSH_CNTL);
1965
1966         /* Free RX/TX rings SW structures */
1967         for (i = 0; i < dev->num_tx_queues; i++)
1968                 bcm_sysport_fini_tx_ring(priv, i);
1969         bcm_sysport_fini_rx_ring(priv);
1970
1971         /* Get prepared for Wake-on-LAN */
1972         if (device_may_wakeup(d) && priv->wolopts)
1973                 ret = bcm_sysport_suspend_to_wol(priv);
1974
1975         return ret;
1976 }
1977
1978 static int bcm_sysport_resume(struct device *d)
1979 {
1980         struct net_device *dev = dev_get_drvdata(d);
1981         struct bcm_sysport_priv *priv = netdev_priv(dev);
1982         unsigned int i;
1983         u32 reg;
1984         int ret;
1985
1986         if (!netif_running(dev))
1987                 return 0;
1988
1989         umac_reset(priv);
1990
1991         /* We may have been suspended and never received a WOL event that
1992          * would turn off MPD detection, take care of that now
1993          */
1994         bcm_sysport_resume_from_wol(priv);
1995
1996         /* Initialize both hardware and software ring */
1997         for (i = 0; i < dev->num_tx_queues; i++) {
1998                 ret = bcm_sysport_init_tx_ring(priv, i);
1999                 if (ret) {
2000                         netdev_err(dev, "failed to initialize TX ring %d\n",
2001                                    i);
2002                         goto out_free_tx_rings;
2003                 }
2004         }
2005
2006         /* Initialize linked-list */
2007         tdma_writel(priv, TDMA_LL_RAM_INIT_BUSY, TDMA_STATUS);
2008
2009         /* Initialize RX ring */
2010         ret = bcm_sysport_init_rx_ring(priv);
2011         if (ret) {
2012                 netdev_err(dev, "failed to initialize RX ring\n");
2013                 goto out_free_rx_ring;
2014         }
2015
2016         netif_device_attach(dev);
2017
2018         /* RX pipe enable */
2019         topctrl_writel(priv, 0, RX_FLUSH_CNTL);
2020
2021         ret = rdma_enable_set(priv, 1);
2022         if (ret) {
2023                 netdev_err(dev, "failed to enable RDMA\n");
2024                 goto out_free_rx_ring;
2025         }
2026
2027         /* Enable rxhck */
2028         if (priv->rx_chk_en) {
2029                 reg = rxchk_readl(priv, RXCHK_CONTROL);
2030                 reg |= RXCHK_EN;
2031                 rxchk_writel(priv, reg, RXCHK_CONTROL);
2032         }
2033
2034         rbuf_init(priv);
2035
2036         /* Set maximum frame length */
2037         umac_writel(priv, UMAC_MAX_MTU_SIZE, UMAC_MAX_FRAME_LEN);
2038
2039         /* Set MAC address */
2040         umac_set_hw_addr(priv, dev->dev_addr);
2041
2042         umac_enable_set(priv, CMD_RX_EN, 1);
2043
2044         /* TX pipe enable */
2045         topctrl_writel(priv, 0, TX_FLUSH_CNTL);
2046
2047         umac_enable_set(priv, CMD_TX_EN, 1);
2048
2049         ret = tdma_enable_set(priv, 1);
2050         if (ret) {
2051                 netdev_err(dev, "TDMA timeout!\n");
2052                 goto out_free_rx_ring;
2053         }
2054
2055         phy_resume(dev->phydev);
2056
2057         bcm_sysport_netif_start(dev);
2058
2059         return 0;
2060
2061 out_free_rx_ring:
2062         bcm_sysport_fini_rx_ring(priv);
2063 out_free_tx_rings:
2064         for (i = 0; i < dev->num_tx_queues; i++)
2065                 bcm_sysport_fini_tx_ring(priv, i);
2066         return ret;
2067 }
2068 #endif
2069
2070 static SIMPLE_DEV_PM_OPS(bcm_sysport_pm_ops,
2071                 bcm_sysport_suspend, bcm_sysport_resume);
2072
2073 static const struct of_device_id bcm_sysport_of_match[] = {
2074         { .compatible = "brcm,systemport-v1.00" },
2075         { .compatible = "brcm,systemport" },
2076         { /* sentinel */ }
2077 };
2078 MODULE_DEVICE_TABLE(of, bcm_sysport_of_match);
2079
2080 static struct platform_driver bcm_sysport_driver = {
2081         .probe  = bcm_sysport_probe,
2082         .remove = bcm_sysport_remove,
2083         .driver =  {
2084                 .name = "brcm-systemport",
2085                 .of_match_table = bcm_sysport_of_match,
2086                 .pm = &bcm_sysport_pm_ops,
2087         },
2088 };
2089 module_platform_driver(bcm_sysport_driver);
2090
2091 MODULE_AUTHOR("Broadcom Corporation");
2092 MODULE_DESCRIPTION("Broadcom System Port Ethernet MAC driver");
2093 MODULE_ALIAS("platform:brcm-systemport");
2094 MODULE_LICENSE("GPL");